Printed circuit board

Abstract

To provide a printed circuit board which even in a case where the print circuit board includes a relatively thick core insulating layer, a relatively thin electronic component can be easily buried in the penetration part of the core insulation layer, the print circuit board being thus more advantageous for warp control and allows process simplification and cost reduction.SOLUTION: The present disclosure relates to a printed circuit board including: a component laminate including an electronic component with a first surface on which connection pads are arranged and a second surface opposite to the first surface, and an insulating material disposed on the second surface of the electronic component, at least a part of the component laminate being disposed inside the through-portion; and a second insulating layer covering at least a part of a first insulating layer and the component laminate and filling at least a part of the through-portion, the insulating material containing an organic insulating material.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present disclosure relates to printed circuit boards. [Background technology]

[0002] To ensure power integrity in server products, passive components must be embedded inside the PCB. However, server products generally have large bodies, making warpage difficult to control, so they tend to use thick core layers. This limits how thick the passive components can be, and thickness discrepancies can make it difficult to embed passive components in the PCB's core layer. For example, when embedding passive components that are relatively thinner than the core layer, it can be difficult to fill the empty space with build-up material. Summary of the Invention [Problem to be solved by the invention]

[0003] One of the various objects of the present disclosure is to provide a printed circuit board that, even when including a relatively thick core insulating layer, allows relatively thin electronic components to be easily embedded within the penetrations in the core insulating layer.

[0004] Another of the various objects of the present disclosure is to provide a printed circuit board that is more advantageous in warpage control, allowing for process simplification and cost savings. [Means for solving the problem]

[0005] One of the various solutions proposed in this disclosure is to form an insulating material on the back surface of the electronic component and perform the embedding process, etc., by matching the thickness of the embedded component stack to the thickness of the core layer as closely as possible.

[0006] For example, one example of a printed circuit board includes an electronic component having a first insulating layer with a through-hole, a first surface on which connection pads are arranged, and a second surface opposite the first surface, and an insulating material arranged on the second surface of the electronic component, a component stack having at least a portion arranged within the through-hole, and a second insulating layer covering at least a portion of the first insulating layer and the component stack and filling at least a portion of the through-hole, and the insulating material can include an organic insulating material.

[0007] For example, a printed circuit board according to one example includes a core insulating layer having a through hole, a silicon body disposed in the through hole and having a front surface and a back surface, a silicon capacitor including a connection pad disposed on the front surface of the silicon body, an insulating material disposed in the through hole and connected to the back surface of the silicon body, and a build-up insulating layer covering at least a portion of the core insulating layer, the silicon capacitor, and the insulating material and filling at least a portion of the through hole, and the difference in thermal expansion coefficient between the silicon body and the insulating material may be smaller than one or more of the difference in thermal expansion coefficient between the silicon body and the core insulating layer and the difference in thermal expansion coefficient between the silicon body and the build-up insulating layer. [Effects of the Invention]

[0008] One of the various advantages of the present disclosure is that it provides a printed circuit board that can easily embed relatively thin electronic components within the penetrations in the core insulation layer, even when the printed circuit board includes a relatively thick core insulation layer.

[0009] Another advantage of the present disclosure is that it provides a printed circuit board that is more advantageous in warpage control, simplifies the process, and reduces costs. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a block diagram illustrating an example of an electronic device system. [Figure 2]FIG. 1 is a perspective view schematically illustrating an example of an electronic device. [Figure 3] FIG. 1 is a cross-sectional view schematically illustrating an example of a printed circuit board. [Figure 4] 4 is a plan view schematically showing a cross section taken along line II' of the printed circuit board of FIG. 3.

[0023] FIG. [Figure 5] 4A to 4C are cross-sectional views schematically illustrating an example of manufacturing steps for the printed circuit board of FIG. 3. [Figure 6] FIG. 10 is a cross-sectional view schematically showing another example of a printed circuit board. DETAILED DESCRIPTION OF THE INVENTION

[0011] The present disclosure will be described below with reference to the accompanying drawings. The shapes and sizes of elements in the drawings may be scaled (or highlighted or simplified) for clarity.

[0012] electronic equipment FIG. 1 is a block diagram illustrating an example of an electronic device system.

[0013] Referring to the drawing, an electronic device 1000 houses a main board 1010. Chip-related components 1020, network-related components 1030, and other components 1040 are physically and / or electrically connected to the main board 1010. These components are also coupled to other electronic components (described later) to form various signal lines 1090.

[0014] The chip-related components 1020 include, but are not limited to, memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as central processors (e.g., CPU), graphics processors (e.g., GPU), digital signal processors, encryption processors, microprocessors, and microcontrollers; and logic chips such as analog-to-digital converters and ASICs (application-specific ICs). Furthermore, these chip-related components 1020 can be combined with one another. The chip-related components 1020 can also be in the form of a package including the above-mentioned chips and electronic components.

[0015] The network-related components 1030 may include, but are not limited to, Wi-Fi (e.g., IEEE 802.11 family), WiMAX (e.g., IEEE 802.16 family), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G, and any other wireless and wired protocols designated as such, as well as any of numerous other wireless or wired standards and protocols. The network-related components 1030 may also be combined with the chip-related components 1020.

[0016] The other components 1040 may include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, low-temperature co-firing ceramics (LTCC), electro-magnetic interference (EMI) filters, multi-layer ceramic capacitors (MLCC), etc. However, the other components 1040 may include, but are not limited to, passive elements in the form of chip components used for various other applications. The other components 1040 may also be combined with the chip-related components 1020 and / or the network-related components 1030.

[0017] Depending on the type of electronic device 1000, the electronic device 1000 may include other electronic components that may or may not be physically and / or electrically connected to the main board 1010. Examples of other electronic components include, but are not limited to, a camera module 1050, an antenna module 1060, a display 1070, and a battery 1080. Other electronic components may also include, but are not limited to, an audio codec, a video codec, a power amplifier, a compass, an accelerometer, a gyroscope, a speaker, a mass storage device (e.g., a hard disk drive), a compact disk (CD), a digital versatile disk (DVD), and the like. In addition, other electronic components used for various purposes may also be included depending on the type of electronic device 1000.

[0018] The electronic device 1000 may be a smartphone, a personal digital assistant, a digital video camera, a digital still camera, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automobile, etc. However, the electronic device 1000 is not limited to these, and may be any other electronic device that processes data.

[0019] FIG. 2 is a perspective view schematically illustrating an example of an electronic device.

[0020] Referring to the drawing, the electronic device may be, for example, a smartphone 1100. The smartphone 1100 houses a motherboard 1110, to which various components 1120 are physically and / or electrically connected. Furthermore, other components, such as a camera module 1130 and / or a speaker 1140, which may or may not be physically and / or electrically connected to the motherboard 1110, are housed inside the smartphone 1100. Some of the components 1120 may be the above-described chip-related components, such as, but not limited to, a component package 1121. The component package 1121 may be in the form of a printed circuit board on which electronic components, including active and / or passive components, are mounted on a surface. Alternatively, the component package 1121 may be in the form of a printed circuit board in which active and / or passive components are embedded. Meanwhile, the electronic device is not necessarily limited to the smartphone 1100, but may be other electronic devices as described above.

[0021] printed circuit board FIG. 3 is a cross-sectional view that schematically shows an example of a printed circuit board, and FIG. 4 is a plan view that schematically shows a cross section taken along line II' of the printed circuit board of FIG.

[0022] Referring to the drawings, a printed circuit board 100 according to one example may include a first insulating layer 111 having a through hole H, a component stack 150 including an electronic component 151 having a second surface opposite to the first surface on which the connection pads P are disposed, an insulating material 152 disposed on the second surface of the electronic component 151, and at least a portion of the component stack 150 disposed within the through hole H, and a second insulating layer 112 covering at least a portion of the first insulating layer 111 and the component stack 150 and filling at least a portion of the through hole H. Meanwhile, the first and second surfaces of the electronic component 151 may be a front surface and a back surface, respectively. If necessary, the printed circuit board 100 may further include first and second wiring layers 121 and 122 disposed on one and the other surfaces of the first insulating layer 111, respectively, and a first via layer 131 penetrating the first insulating layer 111 and connecting at least a portion of the first and second wiring layers 121 and 122 to each other. If necessary, there may be a plurality of through-holes H and a plurality of component stacks 150, and at least a portion of each of the component stacks 150 may be disposed in each of the through-holes H.

[0023] In this manner, in the printed circuit board 100 according to one embodiment, the component stack 150, in which the insulating material 152 is disposed on the back surface of the electronic component 151, can be disposed in the through-hole H of the first insulating layer 111. Therefore, even when the first insulating layer 111 is thick, for example, when the thickness of the first insulating layer 111 is 1.2 mm or more, the thickness of the component stack 150 can be matched to the first insulating layer 111 as closely as possible. Meanwhile, when the first and second wiring layers 121 and 122 are formed on the first insulating layer 111, the thicknesses of the first and second wiring layers 121 and 122 and the connection pads P can be taken into consideration, and the thickness of the first insulating layer 111 and the component stack 150 can be matched to the first insulating layer 111 as closely as possible. Therefore, the step between the front surface of the electronic component 151 and one side of the first insulating layer 111 can be minimized. In addition, the through-hole H can be more easily filled with the second insulating layer 112. Furthermore, the process can be simplified, resulting in effects such as reduced investment costs. Furthermore, even when the first insulating layer 111 is configured as a single layer rather than multiple layers, it can be thickened to a desired thickness, such as 1.2 mm or more, resulting in improved warpage stability. Furthermore, the thickness t2 of the insulating material 152 can be adjusted to a thickness different from the thickness t1 of the main body of the electronic component 151. For example, the thickness t2 of the insulating material 152 can be formed thinner than the thickness t1 of the main body of the electronic component 151, which can be more advantageous in terms of warpage control.

[0024] Meanwhile, the electronic component 151 may include a passive element, and more preferably, may include a silicon capacitor (Si capacitor). When the electronic component 151 includes a silicon capacitor, power integrity can be more effectively ensured when the printed circuit board 100 is applied to a server product, etc. Meanwhile, when the electronic component 151 includes a silicon capacitor, the insulating material 152 may be made of a material having a small difference in coefficient of thermal expansion (CTE) from the body of the silicon capacitor, e.g., the silicon body, for warpage stability. For example, the difference in CTE between the silicon body and the insulating material 152 may be smaller than the difference in CTE between the silicon body and the first insulating layer 111 and / or the difference in CTE between the silicon body and the second insulating layer 112. Here, the CTE may be measured by cutting the manufactured printed circuit board 100 to prepare samples of the same size for each measurement target, and performing a tensile test or the like under the same conditions using a thermomechanical analyzer (TMA) device.

[0025] Meanwhile, the insulating material 152 may include an organic insulating material. For example, the insulating material 152 may include an organic insulating resin and may further include an inorganic filler and / or an organic filler, if necessary. For example, the insulating material 152 may include an epoxy molding compound. For example, if the electronic component 151 includes a silicon capacitor, the insulating material 152 may be directly formed on the back surface of the wafer in a backside molding process in a wafer state, and the thickness of the insulating material 152 may be adjusted in a grinding process, making it easier to form a laminate of a desired thickness in a simpler process. When a cutting process is subsequently performed, the silicon body and the insulating material 152 may be cut together. Therefore, the insulating material 152 may be disposed only on the back surface of the silicon body and may not cover the side surface of the silicon body. Furthermore, the side surface of the silicon body and the side surface of the insulating material 152 may be substantially coplanar with each other in cross section.

[0026] The components of the example printed circuit board 100 will now be described in more detail with reference to the drawings.

[0027] The first and second insulating layers 111 and 112 may each include an insulating material. The insulating material may include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a material containing an inorganic filler, an organic filler, and / or glass fiber (glass cloth, glass fabric) together with a resin. For example, the insulating material may be a non-photosensitive insulating material such as CCL (Copper Clad Laminate), ABF (Ajinomoto Build-up Film), or PPG (Prepreg), but is not limited thereto. Other polymer materials may also be used. The insulating material may also be a photosensitive insulating material such as PID (Photo Imageable Dielectric). As a non-limiting example, the first insulating layer 111 may include CCL, and the second insulating layer 112 may include ABF or PPG.

[0028] The first insulating layer 111 may be a core insulating layer. The second insulating layer 112 may be a build-up insulating layer. The first insulating layer 111 may be a single layer. The second insulating layer 112 may include multiple layers. At least a portion of the second insulating layer 112 may be disposed on one surface of the first insulating layer 111 and the component stack 150, respectively, and may cover at least a portion of the first wiring layer 121. At least another portion of the second insulating layer 112 may be disposed on the other surface of the first insulating layer 111 and the component stack 150, respectively, and may cover at least a portion of the second wiring layer 122. The first insulating layer 111 may have greater rigidity than the second insulating layer 112. For example, the first insulating layer 111 may have a greater elastic modulus than the second insulating layer 112. The first insulating layer 111 may be thicker than the second insulating layer 112. In this case, the thickness of the second insulating layer 112 may be the thickness between the upper and lower surfaces of the second insulating layer minus the thickness of the first insulating layer 111 disposed therebetween.

[0029] The through portion H may penetrate between one surface and the other surface of the first insulating layer 111. For example, the through portion H may be in the form of a through cavity. However, the present invention is not limited thereto, and the through portion H may be in the form of a blind cavity that penetrates only a portion of the first insulating layer 111 from one surface or the other surface of the first insulating layer 111, as necessary.

[0030] The first and second wiring layers 121 and 122 may each include a metal material. Metal materials may include, but are not limited to, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal material may include, but is not limited to, copper (Cu). The first and second wiring layers 121 and 122 may each perform various functions according to the design. For example, they may include signal patterns, power patterns, and ground patterns. These patterns may each have various forms, such as lines, planes, and pads. The first and second wiring layers 121 and 122 may each include an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrolytic copper). Alternatively, they may include a metal foil (or copper foil) and an electrolytic plating layer (or electrolytic copper). Alternatively, they may include a metal foil (or copper foil), an electroless plating layer (or chemical copper), and an electrolytic plating layer (or electrolytic copper). A sputtered layer may be included instead of an electroless plated layer (or chemical copper), or both may be included if desired.

[0031] The first via layer 131 may include a metal material. The metal material may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the first via layer 131 may include, but is not limited to, copper (Cu). The first via layer 131 may include a through via. The through via may include a plated through hole (PTH), in which the above-mentioned metal material is conformally plated on the wall of a through hole penetrating the first insulating layer 111 and an insulating material is filled inside the through hole. The through via of the first via layer 131 may perform various functions depending on the design of the layer. For example, it may include a ground via, a power via, a signal via, etc. The first via layer 131 may include, but is not limited to, an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrolytic copper). A sputtering layer may be formed instead of the electroless plating layer, or both may be included.

[0032] The electronic component 151 may be disposed in the through-hole H of the first insulating layer 111. The electronic component 151 may include a body having an integrated circuit formed therein. The body may be formed on an active wafer, and in this case, silicon (Si) or the like may be used as a base material for each body. The connection pads P may include a conductive material such as aluminum (Al) or copper (Cu). The surface on which the connection pads P are disposed may be a front surface or an active surface, and the opposite side may be a back surface or a non-active surface. The electronic component 151 may include, but is not limited to, a silicon capacitor.

[0033] The insulating material 152 may be disposed on the back surface of the electronic component 151 at the through portion H of the first insulating layer 111. For example, the insulating material 152 may be directly connected to the back surface of the electronic component 151. The insulating material 152 may include an organic insulating material. The organic insulating material may include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a material containing these resins together with an inorganic filler and / or an organic filler. For example, the insulating material 152 may include, but is not limited to, EMC (Epoxy Molding Compound).

[0034] 5A to 5C are cross-sectional views schematically illustrating an example of a manufacturing process for the printed circuit board of FIG.

[0035] First, referring to the drawings, a first insulating layer 111 may be prepared using CCL or the like, and a through hole H, first and second wiring layers 121 and 122, and a first via layer 131 may be formed in the first insulating layer 111. The through hole H may be formed using a mechanical drill, a laser drill, a blasting process, or the like. The via hole for the first via layer 131 may also be formed using a mechanical drill, a laser drill, or the like. The first and second wiring layers 121 and 122 and the first via layer 131 may be formed by a circuit formation process such as an additive process (AP), a semi-AP (SAP), a modified SAP (MSAP), or a tenting (TT). Forming the first via layer 131 may include a plugging process of filling the inside of the through via with an insulating material.

[0036] Next, referring to the drawing, tape 310 is attached to the underside of first insulating layer 111. Tape 310 can be attached to first wiring layer 121. Tape 310 can close the bottom of through-hole H. Then, component stack 150, in which insulating material 152 is formed on the back surfaces of electronic components 151 to match the thickness of first insulating layer 111, can be placed in through-hole H. For example, component stack 150 can be placed so that the front surfaces of electronic components 151 on which connection pads P are arranged are attached to tape 310.

[0037] Next, referring to the drawings, a 2-1 insulating layer 112-1 can be formed on tape 310, covering at least a portion of first insulating layer 111, first and second wiring layers 121 and 122, and component stack 150, and filling at least a portion of through-hole H. The 2-1 insulating layer 112-1 can be formed by a lamination process while attached to a film such as PET (Polyethylene Terephthalate).

[0038] Next, referring to the drawing, tape 310 can be removed, and a second insulating layer 112-2 can be formed on the area where tape 310 was removed, for example, on the second insulating layer 112-1. The second insulating layer 112-2 can also be formed by a lamination process while attached to a film such as PET. The second insulating layers 112-1 and 112-2 can be integrated to the extent that their boundaries are indistinguishable after curing, but this is not limiting.

[0039] The printed circuit board 100 according to the above-described example can be manufactured through a series of processes, and other redundant explanations will be omitted. Meanwhile, in the series of processes, the processes are described as being performed in a form that is upside down compared to the printed circuit board 100 according to the above-described example, and it is clear that the printed circuit board 100 according to the above-described example can be manufactured by upside down after the processes are completed.

[0040] FIG. 6 is a cross-sectional view schematically showing another example of a printed circuit board.

[0041] 1, the printed circuit board 500 according to another example includes, in the printed circuit board 100 according to the above example, third and fourth wiring layers 123 and 124 respectively disposed on one side and the other side of the second insulating layer 112, a second via layer 132 penetrating a portion of one side of the second insulating layer 112 and connecting at least a portion of each of the first and third wiring layers 121 and 123 to at least a portion of each of the first wiring layer 121 and the connection pad P, and a second via layer 132 penetrating a portion of the other side of the second insulating layer 112 and connecting at least a portion of each of the second and fourth wiring layers 122 and 124. The printed circuit board 500 may further include a third via layer 133 connecting at least a portion of the third wiring layer 123 to each other, a first resist layer 141 disposed on one surface of the second insulating layer 112 and having a plurality of first openings h1 exposing at least a portion of the third wiring layer 123, a second resist layer 142 disposed on the other surface of the second insulating layer 112 and having a plurality of second openings h2 exposing at least a portion of the fourth wiring layer 124, and a semiconductor chip 200 disposed on one surface of the first resist layer 141 and connected to at least a portion of the exposed third wiring layer 123 via a connecting member 210. For example, a printed circuit board 500 according to another example may include the printed circuit board 100 according to the above example as a package substrate with a component stack 150 embedded therein, and may have a semiconductor package form in which the semiconductor chip 200 is mounted on such a package substrate.

[0042] The components of another example printed circuit board 500 are described in more detail below with reference to the drawings.

[0043] The third and fourth wiring layers 123 and 124 may each include a metal material. Metal materials may include, but are not limited to, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal material may include, but is not limited to, copper (Cu). The third and fourth wiring layers 123 and 124 may each perform various functions depending on the design. For example, they may include signal patterns, power patterns, and ground patterns. These patterns may each have various forms, such as lines, planes, and pads. The third and fourth wiring layers 123 and 124 may each include an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrolytic copper). Alternatively, they may include a metal foil (or copper foil) and an electrolytic plating layer (or electrolytic copper). Alternatively, they may include a metal foil (or copper foil), an electroless plating layer (or chemical copper), and an electrolytic plating layer (or electrolytic copper). A sputtered layer may be included instead of an electroless plated layer (or chemical copper), or both may be included if desired.

[0044] The second and third via layers 132 and 133 may each include a metal material. The metal material may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal material may include copper (Cu), but is not limited to this. The second and third via layers 132 and 133 may each include a microvia. The microvia may be a filled via that fills a via hole or a conformal via that is arranged along the wall surface of a via hole. The microvias may be arranged in a stacked and / or staggered manner. The microvias of the second and third via layers 132 and 133 may perform various functions depending on the design of the corresponding layer. For example, they may include ground vias, power vias, signal vias, etc. The second and third via layers 132 and 133 may include, but are not limited to, an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrolytic copper), respectively. A sputtering layer may be formed instead of the electroless plating layer, or both may be included. The second and third via layers 132 and 133 may have tapered shapes in opposite directions.

[0045] The first and second resist layers 141 and 142 may each include, but are not limited to, a liquid or film type solder resist, and may also include other types of insulating materials such as ABF. The first and second resist layers 141 and 142 may have a plurality of first and second openings h1 and h2 that expose at least a portion of the third and fourth wiring layers 123 and 124, respectively. A surface treatment layer may be formed on the patterns exposed by the plurality of first and / or second openings h1 and h2, as needed.

[0046] The semiconductor chip 200 may include an integrated circuit (IC) die in which hundreds to millions of elements are integrated into one chip. In this case, the integrated circuit may be, for example, a logic chip such as a central processor (e.g., CPU), a graphics processor (e.g., GPU), a field programmable gate array (FPGA), a digital signal processor, an encryption processor, a microprocessor, a microcontroller, an application processor (e.g., AP), an analog-to-digital converter, or an application-specific IC (ASIC), but is not limited thereto. The integrated circuit may also be a memory chip such as a volatile memory (e.g., DRAM), a non-volatile memory (e.g., ROM), a flash memory, or a high-bandwidth memory (HBM), or a power management IC (PMIC).

[0047] The semiconductor chip 200 may be formed on an active wafer. In this case, silicon (Si), germanium (Ge), gallium arsenide (GaAs), etc. may be used as a base material for each body. Various circuits may be formed on the body. Connection pads may be formed on the body, and the connection pads may include a conductive material such as aluminum (Al) or copper (Cu). The semiconductor chip 200 may be a bare die. In this case, metal bumps may be disposed on the connection pads. The semiconductor chip 200 may also be a packaged die. In this case, a redistribution layer may be further formed on the connection pads, and metal bumps may be disposed on the redistribution layer.

[0048] The connecting member 210 may be formed of a low melting point metal, for example, a solder such as tin (Sn)-aluminum (Al)-copper (Cu), but this is merely an example and the material is not particularly limited thereto. The connecting member 210 may be formed of a multi-layer or a single layer. If formed of a multi-layer, it may include copper pillars and solder, and if formed of a single layer, it may include tin-silver solder or copper, but is not limited thereto. There may be a plurality of connecting members 210.

[0049] Other details are substantially the same as those described in the printed circuit board 100 according to the above example, and therefore, a duplicated description will be omitted.

[0050] In the present disclosure, the term "cover" may include not only completely covering but also at least partially covering, and may include not only directly covering but also indirectly covering. Furthermore, the term "fill" may include not only completely filling but also roughly filling, and may include the presence of some gaps or voids.

[0051] In this disclosure, cross-sectional meaning can mean the cross-sectional shape of an object when cut vertically or when the object is viewed from the side, and planar meaning can mean the planar shape of an object when cut horizontally or when the object is viewed from the top or bottom.

[0052] In the present disclosure, thickness, width, length, depth, etc. may be measured using a scanning microscope or optical microscope based on a cross section obtained by polishing or cutting a printed circuit board. The cross section may be a vertical cross section or a horizontal cross section, and each value may be measured based on the required cross section. If the value is not constant, the value may be determined as the average value of values ​​measured at any five points.

[0053] In this disclosure, for convenience, terms such as bottom, lower part, bottom surface, and other surface are used to refer to the downward direction based on the cross section of the drawing, and terms such as top, upper part, top surface, and one surface are used to refer to the opposite direction. Furthermore, terms such as side and lateral surface are used to refer to a direction perpendicular to the top and bottom surfaces. However, these are definitions of directions for convenience of explanation, and the scope of the claims is not particularly limited by these directional descriptions, and the concepts of top and bottom may change at any time.

[0054] In this disclosure, the term "connected" encompasses not only direct connection but also indirect connection via an adhesive layer or the like. Furthermore, the term "electrically connected" encompasses both physical connection and non-physical connection. Furthermore, terms such as "first" and "second" are used to distinguish one component from another and do not limit the order and / or importance of the components. In some cases, a first component may be referred to as a second component, and similarly, a second component may be referred to as a first component, without departing from the scope of the invention.

[0055] The term "one example" used in this disclosure does not mean the same embodiment as the other examples, but is provided to emphasize and describe the unique features that are different from each other. However, the above-described one example does not exclude being realized in combination with the features of another example. For example, even if a matter described in a particular example is not described in another example, it can be understood as being related to the other example unless there is a contrary or contradictory description with that matter in the other example.

[0056] The terms used in this disclosure are merely used to describe an example and are not intended to limit the disclosure. In this case, the singular expression includes the plural expression unless the context clearly indicates otherwise. [Explanation of symbols]

[0057] 1000 electronic equipment 1010 mainboard 1020 Chip related parts 1030 Network related parts 1040 Other parts 1050 camera 1060 Antenna 1070 display 1080 battery 1090 signal line 1100 smartphones 1110 motherboard 1120 parts 1121 Parts Package 1130 Camera Module 1140 Speaker 100, 500 printed circuit board 111, 112 Insulating layer 121, 122, 123, 124 wiring layer 131, 132, 133 via layers 141, 142 resist layer 150 component stacks 151 Electronic Components 152 Insulation material 200 semiconductor chips 210 Connecting member 310 Tape

Claims

1. a first insulating layer having a through portion; a component stack including an electronic component having a first surface on which connection pads are arranged and a second surface opposite to the first surface, and an insulating material arranged on the second surface of the electronic component, the component stack having at least a portion arranged within the through-hole; a second insulating layer that covers at least a portion of each of the first insulating layer and the component stack and fills at least a portion of the through-hole, The printed circuit board, wherein the insulating material comprises an organic insulating material.

2. The printed circuit board according to claim 1 , wherein the electronic component comprises a silicon capacitor.

3. 10. The printed circuit board of claim 1, wherein the insulating material comprises an epoxy molding compound.

4. The printed circuit board of claim 1 , wherein the insulating material is directly coupled to the second surface of the electronic component.

5. The printed circuit board of claim 1 , wherein the insulating material is disposed only on the second surface of the electronic component.

6. The printed circuit board of claim 1 , wherein the first insulating layer is a single layer having a thickness of 1.2 mm or more.

7. a first wiring layer and a second wiring layer disposed on one surface and the other surface of the first insulating layer, respectively; The printed circuit board according to claim 1 , further comprising: a first via layer that penetrates the first insulating layer and connects at least a portion of the first wiring layer and the second wiring layer to each other.

8. at least a portion of the second insulating layer is disposed on one surface of each of the first insulating layer and the component stack, and covers at least a portion of the first wiring layer; 8. The printed circuit board according to claim 7, wherein at least another portion of the second insulating layer is disposed on the other surface of each of the first insulating layer and the component stack, and covers at least a portion of the second wiring layer.

9. a third wiring layer and a fourth wiring layer disposed on one surface and the other surface of the second insulating layer, respectively; a second via layer that penetrates a portion of one side of the second insulating layer and connects at least a portion of each of the first wiring layer and the third wiring layer to at least a portion of each of the first wiring layer and the connection pad; The printed circuit board according to claim 8 , further comprising: a third via layer that penetrates a portion of the other side of the second insulating layer and connects at least a portion of the second wiring layer and the fourth wiring layer to each other.

10. a first resist layer disposed on one surface of the second insulating layer and having a plurality of first openings each exposing at least a portion of the third wiring layer; 10. The printed circuit board according to claim 9, further comprising: a second resist layer disposed on the other surface of the second insulating layer, the second resist layer having a plurality of second openings each exposing at least a portion of the fourth wiring layer.

11. The printed circuit board of claim 10 , further comprising a semiconductor chip disposed on one surface of the first resist layer and connected to at least a portion of the exposed third wiring layer.

12. the through-holes and the component stacks are each plural, The printed circuit board of claim 1 , wherein at least a portion of each of the component stacks is disposed in each of the through-holes.

13. a core insulating layer having a penetration; a silicon capacitor disposed in the through-hole, the silicon capacitor including a silicon body having a front surface and a back surface, and a connection pad disposed on the front surface of the silicon body; an insulating material disposed in the through-hole and coupled to a back surface of the silicon body; a build-up insulating layer that covers at least a portion of the core insulating layer, the silicon capacitor, and the insulating material, and fills at least a portion of the through-hole; A printed circuit board, wherein the difference in thermal expansion coefficient between the silicon body and the insulating material is smaller than one or more of the difference in thermal expansion coefficient between the silicon body and the core insulating layer and the difference in thermal expansion coefficient between the silicon body and the build-up insulating layer.

14. The printed circuit board of claim 13 , wherein the thickness of the silicon body is greater than the thickness of the insulating material.

15. The printed circuit board of claim 13 , wherein the sides of the silicon body and the sides of the insulating material are substantially coplanar with each other in cross section.

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