Etching jig and etching method

Abstract

To provide an etching jig and an etching method for efficiently performing mirror-finishing processing on end surfaces of a plurality of semiconductor wafers.SOLUTION: An etching jig of a semiconductor wafer includes a handle part 1, an upper plate 2, a lower plate 3, a bolt 4, and a nut 5. The handle part has a rod-shaped main body 10, and a disk-shaped flange part 11 having a diameter larger than that of the main body is provided at a lower end thereof. The flange part is a member that serves as an upper side restraint when sandwiching and fixing the plurality of semiconductor wafers between the flange part and a height adjustment jig. A guide part is a member that is inserted into an upper guide groove and a lower guide groove in a facing positional relationship from four sides toward a center direction of the upper plate and the lower plate, in a state in which the upper plate and the lower plate are disposed so as to face each other. A tip end surface of the guide part abuts against end surfaces of the plurality of semiconductor wafers stacked on the height adjustment jig from four sides, whereby the plurality of semiconductor wafers can be positioned in a horizontal direction.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to an etching jig and an etching method, and more particularly to an etching jig and an etching method that can efficiently perform mirror polishing on the edge surfaces of multiple small-diameter semiconductor wafers used in a minimal fab system while protecting the front and back surfaces of the semiconductor wafers. [Background technology]

[0002] In recent years, a manufacturing method known as the minimal fab system has been proposed for semiconductor manufacturing fabs. This method involves standardizing as much as possible of the processing equipment for each manufacturing process, transporting small-diameter wafers in a sealed transport container that holds a single wafer, and maintaining a clean atmosphere in the process processing section of the processing equipment and the sealed container, thereby minimizing fab construction costs, device manufacturing costs, and manufacturing time (see Patent Document 1).

[0003] In this minimal fab system, semiconductor chips are manufactured using small-diameter semiconductor wafers of half-inch (approximately 12.5 mm) diameter, rather than using large-diameter semiconductor wafers of, for example, 300 mm.

[0004] Semiconductor wafers include silicon wafers, epitaxial wafers, SOI wafers, and compound semiconductor materials such as InP, GaAs, SiC, GaN, sapphire, and diamond.

[0005] Furthermore, the minimal fab system is expected to enable efficient production of a wide variety of semiconductor chips in small quantities while significantly reducing the initial investment required for building a production line.

[0006] Furthermore, in order to ensure high quality and high yields in the small-diameter semiconductor wafers manufactured using a minimal fab system, it is ideal to manufacture semiconductor wafers with an edge shape as shown in Figure 7, with the edge surface subjected to mirror polishing.

[0007] In the shape of the end face of the semiconductor wafer shown in Figure 7, bevels (inclined edges) that form a predetermined angle with the extension of the front or back surface are formed above and below the end of the semiconductor wafer, and a curved surface is formed beyond the bevels.

[0008] Furthermore, by performing a mirror polishing process on the end faces of semiconductor wafers with such shapes, the flexural strength can be increased, which can prevent the generation of dust in the subsequent semiconductor wafer manufacturing process and the generation of chips due to collisions between the wafer end faces, thereby improving yield.

[0009] Here, when a conventional large-diameter semiconductor wafer having a diameter of 8 inches or 12 inches is formed into the shape of the end face of the semiconductor wafer shown in FIG. 7, a method is used in which the end face of the semiconductor wafer is ground using a rotating grinding wheel having a grinding groove formed thereon corresponding to the target shape (see Patent Document 2).

[0010] After grinding the edge of the semiconductor wafer, wet etching is performed to remove any fine scratches that may have been caused by grinding, and then the edge of the semiconductor wafer is polished with an abrasive cloth to give it a mirror finish.

[0011] Here, in order to finish the end face of a small-diameter semiconductor wafer into an ideal shape, it is necessary to go through the steps of grinding using a rotary grindstone, wet etching, and polishing, just like with a large-diameter semiconductor wafer. [Prior art documents] [Patent documents]

[0012] [Patent Document 1] Japanese Patent Application Laid-Open No. 2012-54414 [Patent Document 2] Japanese Patent Application Laid-Open No. 2009-142913 Summary of the Invention [Problem to be solved by the invention]

[0013] However, for small-diameter semiconductor wafers manufactured using a minimal fab system, the method of grinding the edge of the semiconductor wafer with a rotary grinding wheel, followed by wet etching and polishing processes, is inefficient in manufacturing and leads to reduced throughput.

[0014] In particular, in the polishing process using an abrasive cloth, the semiconductor wafers to be polished must be brought into contact with the abrasive cloth one by one while changing the angle of their edge faces, which poses the problem of time-consuming mirror polishing.

[0015] The present invention has been devised in view of the above points, and has as its object to provide an etching jig and an etching method that are capable of efficiently performing mirror polishing on the end faces of multiple small-diameter semiconductor wafers used in minimal fab systems while protecting the front and back surfaces of the semiconductor wafers. [Means for solving the problem]

[0016] In order to achieve the above object, the etching jig of the present invention comprises a first plate, which is a plate-like body having a mounting portion at its center on which a plurality of small-diameter semiconductor wafers, each having a diameter of approximately half an inch, can be stacked and mounted, and which has four first guide grooves cut out in a substantially cross direction from the mounting portion toward its outer periphery and four first hole portions penetrating in a thickness direction; a second plate, which is a plate-like body disposed opposite the first plate and has a central through-hole penetrating in the thickness direction at a position opposite the mounting portion, and which has four second guide grooves cut out in a substantially cross direction from the region where the central through-hole is formed toward the outer periphery at positions opposite the first guide grooves and four second hole portions penetrating in the thickness direction at positions opposite the first hole portions; a handle portion which is a rod-like body having an outer periphery diameter large enough to be inserted through the central through-hole; and a handle portion which is attached to an end of the handle portion and has a guide groove for inserting the guide groove into the central through-hole. the mounting portion includes a disk-shaped flange portion having a diameter larger than the inner diameter and equal to or smaller than a half-inch diameter; four bolt portions having thread grooves formed on their outer peripheral surfaces and having their tips inserted from the surface of the first plate opposite the surface facing the second plate toward the first hole portion and the second hole portion, which are positioned opposite each other; four nut portions attached to portions of the bolt portions protruding from the second hole portion and screwed into the thread grooves to fix the stacked semiconductor wafers in a state in which the semiconductor wafers are arranged between the flange portion and the mounting portion; and four guide portions that are insertable into and detachable from the first guide groove and the second guide groove, which are positioned corresponding to each other, and are inserted into the first guide groove and the second guide groove and come into contact with the end faces of the semiconductor wafers to position the semiconductor wafers before the stacked semiconductor wafers are fixed by the nut portions.

[0017] Here, the first plate is a plate-like body having a central mounting portion on which a plurality of small-diameter semiconductor wafers having a diameter of approximately half an inch can be stacked and mounted. Therefore, a plurality of small-diameter semiconductor wafers to be subjected to end-face mirror polishing can be stacked on the mounting portion of the first plate. Note that the term "approximately half an inch diameter" as used herein refers to semiconductor wafers having a diameter larger than a half inch diameter (12.5 mm) and before their end faces are processed to reduce their diameter. For example, the diameter here also refers to wafers having a diameter of approximately 12.6 to 12.7 mm. The semiconductor wafers referred to here may include, for example, semiconductor wafers having a bevel and a curved end face formed through a conventional grinding process using a rotary grindstone and before wet etching, or semiconductor wafers having only a bevel formed on their end faces by various methods (shapes with vertical faces and no curved end faces).

[0018] Furthermore, a structure can be provided in which the second plate, the handle portion, and the flange portion are integrated together by a second plate, which is a plate-like body disposed opposite the first plate and has a central through-hole formed therethrough in a position opposite the mounting portion, the second plate being a plate-like body with an outer diameter large enough to pass through the central through-hole, and a disk-shaped flange portion provided at the end of the handle portion and having a diameter larger than the inner diameter of the central through-hole but not larger than a half-inch. That is, when the handle portion is inserted into the central through-hole of the second plate and the flange portion abuts against the second plate, the insertion of the handle portion into the central through-hole is stopped, and the three components can be integrated together. That is, when the three components are viewed vertically, for example, the second plate is positioned on top of the flange portion, and the handle portion protrudes above the second plate.

[0019] The device also includes a first plate, which is a plate-like body with a central mounting portion on which a plurality of small-diameter semiconductor wafers having a diameter of approximately half an inch can be stacked and mounted; a second plate, which is a plate-like body disposed opposite the first plate and has a central through-hole formed therethrough in the thickness direction at a position opposite the mounting portion; a handle portion, which is a rod-shaped body with an outer diameter large enough to pass through the central through-hole; and a disk-shaped flange portion, which is provided at the end of the handle and has a diameter larger than the inner diameter of the central through-hole but not larger than a half inch. A plurality of small-diameter semiconductor wafers can be stacked and mounted on the mounting portion of the first plate, and the plurality of semiconductor wafers can be arranged between the first plate, the second plate, the handle portion, and the flange portion. More specifically, the plurality of semiconductor wafers can be arranged between the first plate and the flange portion. That is, for example, when the components are viewed vertically, the plurality of semiconductor wafers are placed on the first plate, and the flange portion and the second plate are arranged above it.

[0020] Furthermore, four first holes penetrating the first plate in the thickness direction are formed, and four second holes penetrating the second plate at positions opposite the first holes are formed in the thickness direction. Four bolts, each with its tip inserted from the surface of the first plate opposite the surface facing the second plate toward the first holes and the second holes in the opposing relationship, can be inserted into each pair of the first holes and the second holes in the opposing relationship when the first and second plates are positioned opposite each other. The bolts can also be inserted from the surface of the first plate opposite the surface facing the second plate toward the pair of the first holes and the second holes. This allows one bolt to be used for each of the four pairs of first holes and second holes.

[0021] Furthermore, with a plurality of semiconductor wafers arranged between the flange portion and the mounting portion, four bolt portions, each having a thread groove formed on its outer circumferential surface, are inserted at their tips from the surface of the first plate opposite the surface facing the second plate toward the first hole portion and the second hole portion that are positioned opposite each other, and four nut portions are attached to the portions of the bolt portions that protrude from the second hole portion and screw into the thread grooves to secure the plurality of stacked semiconductor wafers. The nut portions are screwed into the thread grooves on the outer circumferential surfaces of the bolt portions whose tips have passed through the first hole portion and the second hole portion, and the first plate and the second plate are tightened to secure the plurality of stacked semiconductor wafers. Furthermore, because the first plate and the second plate are tightened directly by the bolt portions and the nut portions, while the flange portion is not tightened directly by the bolt portions and the nut portions, stress is less likely to occur during tightening. This makes it difficult for the shape of the flange portion to be deformed by stress when the bolts or the like are tightened, and multiple stacked semiconductor wafers can be stably fixed between the flange portion and the second plate while maintaining their original shape. As a result, the front and back surfaces of the multiple semiconductor wafers can be firmly protected, and the etching solution can be prevented from flowing onto the front and back surfaces of the semiconductor wafers during mirror etching. Furthermore, the degree of fixation using the bolts and nuts can be varied by changing the tightening force, such as a temporary fixation state in which the nuts are lightly tightened into the thread grooves, or a fixation state in which the nuts are firmly tightened into the thread grooves.

[0022] The first plate has four first guide grooves cut out in a generally cross direction from the mounting portion toward the outer periphery, and the second plate has four second guide grooves cut out in a generally cross direction from the region where the central through hole is formed toward the outer periphery at positions facing the first guide grooves, and the second plate is insertable into and detachable from the first guide grooves and the second guide grooves, which are positioned in a corresponding relationship. Before the stacked semiconductor wafers are fastened with the nut portion, the four guide portions are inserted into the first guide grooves and the second guide grooves and abut against the end faces of the semiconductor wafers to position the semiconductor wafers, so that one guide portion can be inserted into one combination of the first guide grooves and the second guide grooves, which are positioned in a corresponding relationship. Furthermore, the four inserted guide portions abut against the end faces of the semiconductor wafers in a provisionally fastened state before they are completely fastened by tightening the bolt portion and the nut portion, thereby positioning the semiconductor wafers toward the central positions of the guide grooves cut out in a generally cross direction in a plan view. This aligns the end faces of the multiple semiconductor wafers, preventing some of the stacked and fixed semiconductor wafers from falling off due to the centrifugal force of rotation during mirror etching. Furthermore, since the end faces of the multiple semiconductor wafers are aligned, it becomes easier to apply the etching solution uniformly to the end faces of each wafer. Note that "cut out in an approximately cross direction" as used here means that the center region of the cross is not cut out, but is cut out in all four directions, vertically and horizontally, from the center region.

[0023] Furthermore, when a height adjustment jig having a circular plate shape with a diameter of half an inch or less is provided between the mounting portion and the plurality of semiconductor wafers to adjust the thickness of the stacked semiconductor wafers, the plurality of semiconductor wafers can be sufficiently fixed between the flange portion and the height adjustment jig according to the number of semiconductor wafers to be processed. Furthermore, since the first and second plates are directly fastened with bolts and nuts, and neither the flange portion nor the height adjustment jig is directly fastened with bolts and nuts, the height adjustment jig, like the flange portion, is less susceptible to stress during fastening. This makes it difficult for the shape of the height adjustment jig to be deformed by stress when fastened with bolts or the like, and allows the stacked semiconductor wafers to be more stably fixed between the flange portion and the jig while maintaining their original shape. As a result, the front and back surfaces of the plurality of semiconductor wafers can be securely protected, further preventing the etching solution from flowing onto the front and back surfaces of the semiconductor wafers during mirror etching.

[0024] Furthermore, when the guide portion is inserted into the first guide groove and the second guide groove, if the end of the guide portion that fits into the second guide groove in the thickness direction of the second plate is positioned so as not to protrude beyond the surface of the second plate opposite the surface facing the first plate, then when the nut portion is threaded into the thread groove on the outer peripheral surface of the bolt portion, the end of the guide portion in the thickness direction of the second plate is positioned so as not to interfere with the nut portion. In other words, when the first plate and the second plate are fastened together with the bolt portion and the nut portion, the nut portion can be easily rotated, making the fastening operation easier.

[0025] Furthermore, when the guide portion has rounded corners on the surface that abuts the end face of the semiconductor wafer when viewed in cross section from the thickness direction of the second plate, even if the inner widths of the first guide groove and the second guide groove and the outer width of the guide portion are formed to be approximately the same size, the rounded portions of the surface of the guide portion that abuts the end face of the semiconductor wafer will abut against the inner surfaces of the first guide groove and the second guide groove, making it possible to insert the guide portion smoothly.

[0026] Furthermore, if a plate-shaped top portion is formed on the base end of the bolt portion, and the guide portion is positioned so that the other end of the guide portion that is fitted into the first guide groove abuts the top portion in the thickness direction of the second plate when inserted into the first guide groove and the second guide groove, when the first plate and the second plate are tightened with the bolt portion and the nut portion, the other end of the guide portion abuts the top portion of the bolt portion in the thickness direction of the second plate, restricting the rotation of the bolt portion and making it easier to rotate only the nut portion. This prevents the bolt portion from spinning freely during tightening. It also makes it possible to tighten the bolt by rotating only the nut portion without holding the bolt portion by hand.

[0027] Furthermore, if a fitting portion that restricts the rotation of the handle portion around its axis is formed at the position where the second plate and the flange portion are joined, it is possible to prevent the handle portion and the second plate from spinning freely when etching is performed while the jig is rotated. This makes it possible to prevent unevenness caused by air bubbles during wet etching of the edge surfaces of each wafer by rotating the jig itself, and to more stably fix multiple semiconductor wafers.

[0028] Furthermore, when the four bolt portions are inserted into the first hole portion and the second hole portion and the distance to the nearest bolt portion is 10 mm or less in a cross-sectional view along the thickness direction of the second plate, even if the semiconductor wafers are misaligned while remaining in the stacked orientation, the semiconductor wafers cannot pass between the bolt portions, making it possible to prevent the semiconductor wafers from falling out of the space surrounded by the four bolt portions.

[0029] Furthermore, when the diameter of the flange portion is 12.5 mm, the flange portion can be configured to be less likely to interfere with the guide portions when the four guide portions are inserted into the first guide groove and the second guide groove to position the multiple semiconductor wafers. That is, the approximately half-inch diameter of a small-diameter semiconductor wafer before mirror etching includes, as described above, semiconductor wafers whose diameters are larger than the half-inch diameter and whose end faces have not yet been processed to reduce their diameter. In other words, the diameter of the flange portion is smaller than the diameters of the multiple semiconductor wafers placed on the first plate and whose diameters exceed 12.5 mm, so the inserted four guide portions do not come into contact with the flange portion but rather with the end faces of the multiple semiconductor wafers, thereby enabling more reliable positioning of the multiple semiconductor wafers.

[0030] Furthermore, when the diameter of the flange portion and the diameter of the height adjustment jig are 12.5 mm, the flange portion and the height adjustment jig are less likely to interfere with the guide portions when inserting four guide portions into the first guide groove and the second guide groove to position multiple semiconductor wafers. That is, the approximately half-inch diameter of a small-diameter semiconductor wafer before mirror etching includes, as described above, semiconductor wafers whose diameters are larger than the half-inch diameter and whose end faces have not yet been processed to reduce their diameter. In other words, because the diameters of the flange portion and the height adjustment jig are smaller than the diameters of multiple semiconductor wafers with diameters exceeding 12.5 mm placed on the first plate, the four inserted guide portions do not abut against the flange portion and the height adjustment jig at their central positions, but rather abut against the end faces of the multiple semiconductor wafers, thereby enabling more reliable positioning of the multiple semiconductor wafers.

[0031] Further, in order to achieve the above object, an etching method of the present invention is an etching method for stacking and fixing a plurality of small-diameter semiconductor wafers having a diameter of approximately half an inch, and performing mirror etching on end faces of the plurality of semiconductor wafers, the etching method comprising the steps of: placing the plurality of semiconductor wafers at the center of a first plate which is a plate-like body and has a notch formed in a substantially cross direction; and inserting a rod-like body which is insertable into the through hole of a second plate which is a plate-like body and has a notch formed in a substantially cross direction and a through hole formed in the center, the rod-like body having one end attached to a handle which is a rod-like body insertable into the through hole, the other end of which has a disk-shaped flange portion attached to one end thereof and which has a diameter larger than the inner diameter of the through hole and not larger than the half inch diameter, into the through hole, The method includes a clamping step of clamping the plurality of semiconductor wafers between the first plate and the flange portion, a positioning step of temporarily fastening the first plate and the second plate with a fastener while the plurality of semiconductor wafers are sandwiched, and inserting guide portions into the notches of the first plate and the second plate to position the plurality of semiconductor wafers, a fixing step of fixing the first plate and the second plate with the fastener after the positioning step, and an etching step of immersing the plurality of semiconductor wafers in an etching solution, rotating them around the handle portion as a rotation axis, and performing mirror etching on the end faces of the plurality of semiconductor wafers after the fixing step.

[0032] Here, in the clamping process, a second plate is a plate-like body having a through hole formed in the center, and a handle portion is a rod-like body that can be inserted into the through hole, one end of which has a disk-shaped flange portion attached to it that is larger than the inner diameter of the through hole and has a diameter of half an inch or less. The other end of the handle portion is inserted into the through hole, and multiple semiconductor wafers are clamped between the first plate and the flange portion, thereby allowing the multiple semiconductor wafers to be arranged between the first plate and the flange portion.

[0033] Furthermore, the first plate and the second plate are formed with notches in a generally cross direction, and in the positioning step, the first plate and the second plate are temporarily fixed with fasteners while sandwiching the multiple semiconductor wafers, and the guide portions are inserted into the notches of the first plate and the second plate to position the multiple semiconductor wafers. The guide portions inserted through the notches on all four sides are brought into contact with the multiple semiconductor wafers in a temporarily fixed state before they are completely fixed with the fasteners, and the multiple semiconductor wafers can be positioned toward the center position in the generally cross direction in a plan view. This aligns the end faces of the multiple semiconductor wafers, preventing some of the stacked and fixed semiconductor wafers from falling off due to centrifugal force during mirror etching. Furthermore, since the end faces of the multiple semiconductor wafers are aligned, it becomes easier to apply an etching solution uniformly to the end faces of each wafer.

[0034] Furthermore, in the fixing step, after the positioning step, the first plate and the second plate are fixed with fasteners, whereby each semiconductor wafer can be firmly fixed along the direction in which the multiple semiconductor wafers are stacked, and can be subjected to the next etching step.

[0035] Furthermore, in the etching process, after the fixing process, multiple semiconductor wafers are placed in an etching solution, rotated around the handle as the rotation axis, and mirror etching is performed on the edge surfaces of multiple semiconductor wafers, thereby enabling mirror finishing of multiple semiconductor wafers simultaneously. Also, mirror etching can remove fine scratches that occur on the edge surfaces of the semiconductor wafers during the grinding process. Furthermore, by rotating around the handle as the rotation axis, the jig itself rotates during wet etching of each wafer edge, preventing unevenness due to air bubbles.

[0036] Furthermore, when a disc-shaped height-adjusting jig having a diameter of half an inch or less is placed between the first plate and the semiconductor wafers during the mounting process to adjust the thickness of the stacked semiconductor wafers, the semiconductor wafers can be sufficiently fixed between the flange portion and the height-adjusting jig according to the number of semiconductor wafers to be processed. Furthermore, since the first plate and the second plate are directly fastened by the fasteners, while the flange portion and the height-adjusting jig are not directly fastened by the fasteners, stress is less likely to be generated in the flange portion and the height-adjusting jig during fastening. As a result, the shapes of the flange portion and the height-adjusting jig are less likely to be deformed by stress when the fasteners are tightened, and the stacked semiconductor wafers can be more stably fixed between the flange portion and the height-adjusting jig while maintaining their original shapes. As a result, the front and back surfaces of the semiconductor wafers can be securely protected, and the etching solution can be more effectively prevented from flowing onto the front and back surfaces of the semiconductor wafers during mirror etching. [Effects of the Invention]

[0037] The etching jig of the present invention is capable of efficiently performing mirror polishing on the edge surfaces of multiple small-diameter semiconductor wafers used in minimal fab systems while protecting the front and back surfaces of the semiconductor wafers. Furthermore, the etching method according to the present invention is a method that can efficiently perform mirror polishing on the end faces of multiple small-diameter semiconductor wafers used in minimal fab systems while protecting the front and back surfaces of the semiconductor wafers. [Brief explanation of the drawings]

[0038] [Figure 1] 1 is a schematic perspective view showing the overall appearance of an etching jig according to an embodiment of the present invention; [Figure 2] FIG. 2 is a schematic exploded perspective view showing an etching jig including a guide portion disassembled into its individual members. [Figure 3] 3(a) is a schematic front view of the etching jig shown in FIG. 1 with a guide attached, and FIG. 3(b) is a schematic perspective view of the etching jig shown in FIG. 3(a) as seen from the bottom side. [Figure 4] 1(a) is a schematic perspective view showing the top surface of the flange portion, and FIG. 1(b) is a schematic perspective view showing the central through-hole and its periphery in the bottom surface of the upper plate. [Figure 5] FIG. 1 is a schematic diagram showing a mirror etching process using an etching jig. [Figure 6] 1 is photographic data showing the end face of a semiconductor wafer W that has been subjected to mirror etching using an etching jig. [Figure 7] 1 is a schematic diagram showing the shape of an end face of a semiconductor wafer. DETAILED DESCRIPTION OF THE INVENTION

[0039] Hereinafter, modes for carrying out the present invention (hereinafter referred to as "embodiments") will be described with reference to the drawings. The following description is of an etching jig A, which is an example of an etching jig to which the present invention is applied, but the present invention is not limited to this and can be modified in design as appropriate.

[0040] In the following description, with reference to FIG. 3(a), the top of the figure will be referred to as the "top or upper side," and the bottom of the figure will be referred to as the "bottom or lower side." The direction connecting the top and bottom will be referred to as the "up-down direction, vertical direction, or wafer thickness direction." With reference to FIG. 3(a), the direction perpendicular to the up-down direction will be referred to as the "horizontal direction."

[0041] 1, the direction when each bolt portion 4 is viewed from the handle portion 1 is referred to as the "outside or outer side," and the direction when each bolt portion 4 is viewed from the handle portion 1 is referred to as the "inside or inner side or center side." Furthermore, with reference to FIG. 2, the direction in which the guide portion 7 is inserted or removed toward the center along the upper guide groove 22 and the lower guide groove 32 is referred to as the "guide portion insertion / removal direction or insertion / removal direction."

[0042] As shown in FIG. 1, the etching jig A has a handle 1, an upper plate 2, a lower plate 3, a bolt 4, and a nut 5.

[0043] The etching jig shown in FIG. 1 has a structure in which the bolts 4 and nuts 5 are tightened to fix a plurality of semiconductor wafers, and the guide portion 7 described below is used (after the semiconductor wafers W are positioned), and then the guide portion 7 is removed.

[0044] The etching jig A is a fixing jig for fixing a plurality of small-diameter semiconductor wafers (hereinafter simply referred to as "semiconductor wafers W") and performing mirror etching to mirror-finish the end faces while protecting the front and back surfaces of the wafers.

[0045] An example of the target small-diameter semiconductor wafer W (see FIG. 2) is a semiconductor wafer that has undergone a conventional grinding process using a rotary grindstone to form a chamfered shape on its edge, and has not yet been subjected to wet etching.

[0046] The small-diameter semiconductor wafers W are semiconductor wafers with diameters larger than a half-inch diameter (12.5 mm) and before their end faces are processed to reduce their diameter. For example, the diameter here includes sizes of about 12.6 to 12.7 mm.

[0047] The thickness of the semiconductor wafer W to be fixed by the etching jig A can be set appropriately. As an example, the thickness of the semiconductor wafer W to be fixed by the etching jig A can be set to 250 μm to 450 μm.

[0048] The number of semiconductor wafers W to be fixed by the etching jig A can be set appropriately depending on the thickness and application of the semiconductor wafers W. For example, one to several tens of semiconductor wafers W can be fixed by one etching jig A.

[0049] In addition, in the etching jig A of the present invention, by changing the length of the bolt 4 in the vertical direction and the length of the guide portion 7, it is possible to accommodate an increase or decrease in the thickness and number of semiconductor wafers W fixed by the etching jig A.

[0050] Here, the handle 1 is a member that serves as a grip when placing the upper plate 2 and a flange 11 (to be described later) on top of a plurality of semiconductor wafers W placed on the lower plate 2 and a height adjustment jig 6 (to be described later). The handle 1 also serves as a grip when rotating the etching jig A when mirror etching is performed in an etching solution. This is the component that serves as the axis of rotation when the actuator is rotated.

[0051] The upper plate 2, together with the lower plate 3, is a member that receives the fastening force of the bolts 4 and nuts 5.

[0052] The lower plate 3, together with the upper plate 2, is a member that receives fastening by bolts 4 and nuts 5. The lower plate 3 also serves as a base on which multiple semiconductor wafers are placed, either via a height adjustment jig 6 or directly without using the height adjustment jig 6.

[0053] In addition, the bolts 4 and nuts 5 are fasteners for tightening the upper plate 2 and the lower plate 3 together to fix the semiconductor wafers when multiple semiconductor wafers are placed between the upper plate 2 and the lower plate 3 (the height adjustment jig 6 and the flange portion 11).

[0054] The detailed structure of the etching jig A will be described with reference to FIG.

[0055] As shown in Figure 2, the handle 1 has a rod-shaped main body 10. At the lower end of the main body 10, a disk-shaped flange 11 having a diameter larger than that of the main body 10 is provided integrally with the main body 10.

[0056] The flange portion 11 is a member that holds down the upper side when multiple semiconductor wafers W (see FIG. 2) are sandwiched and fixed between the flange portion 11 and the height adjustment jig 6. When the height adjustment jig 6 is not used, the flange portion 11 sandwiches and fixes multiple semiconductor wafers W between the flange portion 11 and the mounting portion 31 (see FIG. 2) of the lower plate 3.

[0057] 2, the upper plate 2 has a plate-shaped main body 20, and a central through-hole 21 is formed in the center of the main body 20 in the thickness direction. Furthermore, four upper guide grooves 22 are formed in a substantially cross direction in the main body 20 from the central region where the central through-hole 21 is formed to the outer edge of the main body 20. Furthermore, four upper hole portions 23 are formed in the main body 20.

[0058] 2, the lower plate 3 has a plate-shaped main body 30, and a flat mounting portion 31 is formed in the center of the main body 30. Four lower guide grooves 32 are formed in a substantially cross direction in the main body 30 from the central region where the mounting portion 31 is formed to the outer edge of the main body 30. Four lower hole portions 33 are also formed in the main body 30.

[0059] The central through-hole 21 of the upper plate 2 is a hole through which the main body 10 of the handle part 1 is inserted from its upper end side. When the main body 10 is inserted through the central through-hole 21, the flange 11 comes into contact with the lower surface of the upper plate 2, forming a member that holds down multiple semiconductor wafers W from above.

[0060] In addition, the upper guide groove 22 and the lower guide groove 32 are positioned in an opposing positional relationship when the upper plate 2 and the lower plate 3 are arranged opposite each other, and serve as a path for inserting and removing the guide section 7, described later, toward the center of the upper plate 2 and the lower plate 3.

[0061] That is, four upper guide grooves 22 and four lower guide grooves 32 are combined in the vertical direction to form a groove into which one guide portion 7 is fitted.

[0062] Furthermore, the upper hole portion 23 and the lower hole portion 33 are positioned in an opposing positional relationship when the upper plate 2 and the lower plate 3 are arranged opposite each other, and serve as holes for inserting the bolt 4 therethrough.

[0063] That is, a combination of four upper hole portions 23 and four lower hole portions 33 positioned in the vertical direction forms a groove into which one bolt 4 is fitted.

[0064] The height adjusting jig 6 is formed in a disk shape and is a member placed on the mounting portion 31 of the lower plate 3 (see FIG. 2). The height adjusting jig 6 is a member for adjusting the thickness in the vertical direction according to the number or thickness of the semiconductor wafers W to be fixed by the etching jig A.

[0065] In other words, the height adjustment jig 6 is a member for adjusting the vertical distance at which the etching jig A can apply an appropriate fixing force, and height adjustment jigs 6 of various thicknesses can be prepared according to the number or thickness of the semiconductor wafers W to be fixed.

[0066] The height adjusting jig 6 is a member that serves as a lower support when a plurality of semiconductor wafers W are sandwiched and fixed between the height adjusting jig 6 and the flange portion 11.

[0067] In addition, multiple semiconductor wafers W are placed on a height adjustment jig 6 in the vertical direction, and adjacent semiconductor wafers are stacked in the vertical direction with their front or back surfaces in contact with each other.

[0068] 2, the bolt 4 has a thread groove (reference number omitted) cut on the outer peripheral surface of the shaft. The nut 5 also has a thread groove (reference number omitted) cut on the inner peripheral surface. The thread grooves of the bolt 4 and the nut 5 fit together, allowing the bolt 4 and the nut 5 to fasten the upper plate 2 and the lower plate 3 together.

[0069] Furthermore, a plate-shaped head portion 40 is formed at the lower end of the bolt 4 (see FIGS. 2, 3(a) and 3(b)). This head portion 40 abuts against the lower end side of the guide portion 7 inserted into the upper guide groove 22 and the lower guide groove 32, and serves as a part that restricts the rotation of the bolt 4 when the nut 5 is tightened onto the outer peripheral surface of the bolt 4 (see FIGS. 3(a) and 3(b)).

[0070] In addition, the guide portion 7 is a member that is inserted from all four sides toward the center of the upper plate 2 and the lower plate 3 into the upper guide groove 22 and the lower guide groove 32, which are in an opposing positional relationship when the upper plate 2 and the lower plate 3 are arranged opposite each other (see Figures 3(a) and 3(b)).

[0071] Furthermore, the tip surfaces of the guide parts 7 in the insertion / removal direction of the guide parts 7 come into contact with the end surfaces of the semiconductor wafers W stacked on the height adjustment jig 6 from all four sides, thereby enabling the semiconductor wafers W to be positioned in the horizontal direction. That is, the semiconductor wafers W can be centered toward a position corresponding to the center of the upper plate 2 and the lower plate 3 in the horizontal direction.

[0072] 2, the corners of the tip surface of the guide portion 7 are rounded in plan view (at the position indicated by the symbol R in FIG. 2). By forming the tip surface of the guide portion 7 in this shape, even when the groove widths of the upper guide groove 22 and the lower guide groove 32 are formed to be slightly larger than the lateral width of the tip surface of the guide portion 7, the tip surface of the guide portion 7 can be smoothly inserted along the inner circumferential surfaces of the upper guide groove 22 and the lower guide groove 32.

[0073] Furthermore, the guide portion 7 is inserted before the bolts 4 and nuts 5 are firmly tightened to completely fix the positions of the upper plate 2 and the lower plate 3.

[0074] For example, when the distance between the bottom surface of the upper plate 2 and the top surface of the lower plate 3 is slightly larger than the combined length of the thickness of the height adjustment jig 6 and the thickness of the semiconductor wafers W, and the bolts 4 and nuts 5 are in a temporarily fixed state before being tightly tightened, the four guide portions 7 are inserted into the upper guide grooves 22 and the lower guide grooves 32 to position the semiconductor wafers W.

[0075] The positions of the end faces of the multiple semiconductor wafers W stacked vertically are aligned by positioning the multiple semiconductor wafers W inserted by the guide portion 7. Then, by fixing the multiple semiconductor wafers W with the bolts 4 and nuts 5, the multiple semiconductor wafers W can be subjected to mirror etching with the end faces aligned.

[0076] Furthermore, after the upper plate 2 and the lower plate 3 are firmly fastened together via the bolts 4 and nuts 5 to fix the multiple semiconductor wafers W, the four guide portions 7 are removed from the corresponding upper guide grooves 22 and lower guide grooves 32.

[0077] Furthermore, when the guide portion 7 is inserted into the corresponding upper guide groove 22 and lower guide groove 32, the position of the upper end of the guide portion 7 is inserted so that it is at the same height as the top surface of the upper plate 2 in the vertical direction (see Figure 3(a)).

[0078] In this way, by inserting the guide portion 7 so that the position of the upper end of the guide portion 7 is at the same height as the position of the top surface of the upper plate 2 in the vertical direction, it is possible to prevent the guide portion 7 from interfering with the nut 5 when attaching the nut 5 to the outer peripheral surface of the bolt 4. This makes it easier to tighten the nut 5.

[0079] Next, the structure in which the flange portion 11 and the upper plate 2 are fitted together will be described.

[0080] First, a convex portion 110 having an arc shape in a plan view is formed on the top surface of the flange portion 11 (see FIG. 4(a)). Also, a concave portion 200 having an arc shape in a plan view is formed on part of the edge of the central through-hole 21 on the bottom surface of the main body 20 of the upper plate 2 (see FIG. 4(b)).

[0081] The convex portion 110 and the concave portion 200 have an uneven shape that allows them to fit together. Therefore, when the top surface of the flange portion 11 is brought into contact with the bottom surface of the main body 20, the convex portion 110 and the concave portion 200 fit together, preventing the handle portion 1 and the upper plate 2 from rotating around the axis of the handle portion 1.

[0082] This prevents the bolt 4 from rotating freely when the nut 5 is rotated relative to the bolt 4 to fasten the upper plate 2 and the lower plate 3. It also makes it possible to fasten the bolt 4 by rotating only the nut 5 without holding it down with a hand.

[0083] In addition, an example of the preferable sizes and the like of the constituent members of the etching jig A will be described. First, the flange portion 1 and height adjusting jig 6 formed in a disk shape are preferably set to have a diameter of 12.5 mm.

[0084] This makes it possible to insert the guide part 7 from the outside into a semiconductor wafer W having a diameter of 12.5 mm or more before mirror etching is performed on the end surface, and center the semiconductor wafer W toward a position corresponding to the center of the upper plate 2 and the lower plate 3.

[0085] In other words, the diameters of the flange portion 1 and the height adjustment jig 6 are equal to or smaller than the diameter of the semiconductor wafer W, and interference between the flange portion 1 and the height adjustment jig 6 can be prevented when the guide portion 7 is positioned by pressing it from all sides.

[0086] Furthermore, by setting the diameter of the flange portion 1 and the height adjusting jig 6 to 12.5 mm, it is possible to prevent the etching solution from coming into contact with the front or back surface of the semiconductor wafer W during mirror etching.

[0087] That is, when the end face of the semiconductor wafer W is mirror-etched, the end face is mirror-finished, and the diameter of the semiconductor wafer W becomes slightly smaller. The target diameter after processing is 12.5 mm, which is a size that allows the front or back surface to be covered by the flange portion 1 and the height adjustment jig 6. Therefore, by setting the diameter of the flange portion 1 and the height adjustment jig 6 to 12.5 mm, it is possible to prevent the etching solution from acting on the front surface of the topmost wafer or the back surface of the bottommost wafer among multiple semiconductor wafers W stacked vertically.

[0088] In addition, in etching jig A, when the upper plate 2 and the lower plate 3 are tightened via bolts 4 and nuts 5, the four bolts 4 are arranged so that the distance between them and the nearest bolt is 10 mm or less in a plan view.

[0089] This prevents the wafers W from moving horizontally and passing between the bolts 4 and falling off when multiple semiconductor wafers W are fixed between the flange portion 11 and the height adjustment jig 6.

[0090] That is, during mirror etching, the etching jig A is rotated around the handle portion 1 as the rotation axis, and centrifugal force acts on the semiconductor wafer W in the horizontal direction. However, even if this centrifugal force occurs, the semiconductor wafer W is unlikely to fall out of the area surrounded by the bolts 4 in the horizontal direction.

[0091] Furthermore, each of the components of the etching jig A can be made of Teflon (registered trademark). This allows the etching jig A to be constructed with excellent durability and chemical resistance. Furthermore, when the upper plate 2 and the lower plate 3 are fastened together with the bolts 4 and nuts 5, sufficient fixing force and appropriate adhesion are imparted to the multiple semiconductor wafers W, making it possible to stably hold the semiconductor wafers W.

[0092] Next, an example of the flow of fixing a plurality of semiconductor wafers W by the etching jig A will be described.

[0093] First, the tip end of the bolt 4 is inserted into the four lower hole portions 33 of the lower plate 3 from below, and the bolt 4 and the lower plate 3 are placed with the top portion 40 of the bolt 4 as the bottom surface.

[0094] Next, a height adjusting jig 6 is placed at the position of the mounting portion 31 of the lower plate 3. Furthermore, a plurality of semiconductor wafers W to be subjected to mirror etching are placed on the height adjusting jig 6, stacked along their thickness direction.

[0095] Next, the tip side of the main body 10 of the handle part 1 is inserted from below into the central through-hole 21 of the upper plate 2, and the bottom surface of the upper plate 2 is brought into contact with the top surface of the flange part 11. At this time, the convex part 110 of the flange part 11 is fitted into the concave part 200 on the bottom surface of the upper plate 2.

[0096] Then, while holding the main body 10 of the handle part 1 and hanging the upper plate 2, the tip side of the bolt 4 that has penetrated the lower plate 3 is inserted into the four upper hole parts 23 of the upper plate 2 from below.

[0097] As a result, the upper plate 2, flange portion 11, semiconductor wafer W, height adjusting jig 6, lower plate 3 and top portions 40 of the bolts 4 are placed one on top of the other in the vertical direction.

[0098] From this state, nuts 5 are screwed onto the outer circumferential surfaces of the four bolts 4 that have passed through the upper holes 23 of the upper plate 2 and protruded upward. Here, the nuts 5 are not tightened too tightly, but rather loosely, to temporarily secure the plate.

[0099] At this stage of temporary fixation, the four guide parts 7 are inserted from the outside toward the inside into the upper guide grooves 22 of the upper plate 2 and the lower guide grooves 32 of the lower plate 3, which are in a corresponding positional relationship in the vertical direction. When the guide parts 7 are inserted toward the inside from all four sides, their inner tip faces come into contact with the end faces of the multiple semiconductor wafers W, and the semiconductor wafers W pressed from all sides are centered. In other words, the semiconductor wafers W are positioned.

[0100] After the semiconductor wafers W are positioned by the guide portion 7, the nuts 5 are tightly tightened to firmly fix the semiconductor wafers W between the flange portion 11 and the height adjusting jig 6.

[0101] At this stage, the front and back surfaces of the plurality of semiconductor wafers W are protected in the vertical direction.

[0102] That is, the front surface of the top semiconductor wafer W is protected by contact with the bottom surface of the flange portion 11, and the back surface of the bottom semiconductor wafer W is protected by contact with the top surface of the height adjusting jig 6. The front surfaces or back surfaces of the other semiconductor wafers W are in contact with the front surfaces or back surfaces of the semiconductor wafers W adjacent thereto above and below, and the respective surfaces are in close contact with each other.

[0103] As a result, in the subsequent mirror etching process, it is possible to prevent the etching solution from coming into contact with the front and back surfaces of the semiconductor wafers W. In addition, since the end faces of the multiple semiconductor wafers W are exposed, they can be processed by mirror etching.

[0104] Furthermore, the bolts 4 and nuts 5 are tightly tightened to complete the fixation of the semiconductor wafer W, and then the four inserted guide parts 4 are removed to the outside. With the operations up to this point, the fixation of the semiconductor wafer W by the etching jig A is completed before the mirror etching process is performed.

[0105] Then, a plurality of semiconductor wafers W are fixed by the etching jig A, and mirror etching is performed on the end faces of the wafers.

[0106] Mirror etching can be performed, for example, by pouring an etching solution S for mirror etching into a container C and rotating the etching jig A around the main body 10 of the handle 1 of the etching jig A as the rotation axis, as shown in Fig. 5. Note that Fig. 5 shows the etching jig A and the semiconductor wafer W schematically.

[0107] This mirror etching can be performed under various etching conditions, such as the composition of the etching solution, the amount of etching solution, the temperature, and the processing time.

[0108] An example of mirror etching processing performed using an etching jig A to which the present invention is applied is shown below. Here, five semiconductor wafers W with a thickness of 300 μm were fixed using the etching jig A, and mirror etching processing was performed. As a result, the end faces of all the semiconductor wafers W were sufficiently mirror-finished. Note that FIG. 6 shows photographic data of a portion of the end face of the semiconductor wafer W after mirror etching processing.

[0109] This mirror etching process was able to provide a uniform and sufficient mirror finish to the edge of the semiconductor wafer W while protecting the front and back surfaces of the semiconductor wafer W. Furthermore, multiple semiconductor wafers W could be processed efficiently at the same time in a single process. Furthermore, the diameter of the semiconductor wafers after processing was reduced from 12.60 mm to 12.35 mm.

[0110] As described above, a plurality of semiconductor wafers W were fixed by the etching jig A, and the end faces of the wafers were subjected to mirror etching, thereby achieving a sufficient mirror finish.

[0111] Here, the procedure for fixing a plurality of semiconductor wafers W by the etching jig A is not limited to the above, but can be modified as appropriate.

[0112] For example, in the process described above, the four guide portions 7 are inserted facing inward after the upper plate 2 and the lower plate 3 are temporarily fixed with the bolts 4 and nuts 5, but the timing for inserting the guide portions 7 is not limited to this. The guide portions 7 can also be positioned by lightly inserting them into the lower guide grooves 32 of the lower plate 3 after the bolts 4 and the lower plate 3 are integrated.

[0113] As described above, the etching jig according to the present invention is capable of efficiently performing mirror polishing on the end faces of multiple small-diameter semiconductor wafers used in minimal fab systems while protecting the front and back surfaces of the semiconductor wafers. Furthermore, the etching method according to the present invention is a method that can efficiently perform mirror polishing on the end faces of multiple small-diameter semiconductor wafers used in minimal fab systems while protecting the front and back surfaces of the semiconductor wafers.

[0114] The terms and expressions used in the present specification and claims are merely for explanatory purposes and are not limiting in any way, and are not intended to exclude terms and expressions equivalent to the features described in the present specification and claims or portions thereof. It goes without saying that various modifications are possible within the scope of the technical idea of ​​the present invention. [Explanation of symbols]

[0115] A Etching jig W Semiconductor wafer C container S etching solution 1 Handle 10 Main Unit 11 Flange 110 Convex part 2 Upper plate 20 Main Unit 200 recess 21 Central through hole 22 Upper guide groove 23 Upper hole 3 Lower plate 30 Main Unit 31 Placement section 32 Lower guide groove 33 Lower hole 4 bolts 40 Top of the head 5 Nuts

Claims

1. a first plate having a central mounting portion on which a plurality of small-diameter semiconductor wafers having a diameter of approximately half an inch can be stacked and mounted, and having four first guide grooves cut out in a substantially cross direction from the mounting portion toward the outer periphery and four first hole portions penetrating in the thickness direction; a second plate disposed opposite the first plate and having a central through hole formed therethrough in a thickness direction at a position opposite the placement portion, and having four second guide grooves cut out in a substantially cross direction from the region where the central through hole is formed toward the outer periphery at positions opposite the first guide grooves, and four second hole portions formed therein at positions opposite the first hole portions and penetrating in a thickness direction; a handle portion that is a rod-shaped body having an outer diameter that can be inserted through the central through hole; a disk-shaped flange portion provided at an end of the handle portion and having a diameter larger than the inner diameter of the central through-hole and equal to or smaller than a half-inch diameter; four bolt portions, the tips of which are inserted from a surface of the first plate opposite to a surface facing the second plate toward the first hole portion and the second hole portion which are positioned opposite to each other, and the four bolt portions have thread grooves formed on their outer peripheral surfaces; four nut portions attached to portions of the bolt portions protruding from the second hole portions and screwed into the thread grooves to fix the stacked semiconductor wafers in a state in which the semiconductor wafers are arranged between the flange portion and the mounting portion; The device includes four guide portions that are insertable into and detachable from the first guide groove and the second guide groove, which are in a corresponding positional relationship, and that are inserted into the first guide groove and the second guide groove before the stacked semiconductor wafers are fixed by the nut portion, and come into contact with end faces of the semiconductor wafers to position the semiconductor wafers. Etching jig.

2. The wafer stacking device is formed in a disk shape having a diameter of half an inch or less, and is provided with a height adjusting jig that is disposed between the placing portion and the plurality of semiconductor wafers and adjusts the thickness of the stacked plurality of semiconductor wafers. The etching jig according to claim 1 .

3. The guide portion is disposed at a position such that, when inserted into the first guide groove and the second guide groove, one end side of the guide portion that is fitted into the second guide groove does not protrude from a surface of the second plate opposite to a surface facing the first plate in a thickness direction of the second plate. The etching jig according to claim 1 or 2.

4. The guide portion has rounded corners on a surface that contacts the end surface of the semiconductor wafer when viewed in a cross section from the thickness direction of the second plate. The etching jig according to claim 1 or 2.

5. A plate-shaped head portion is formed on the base end side of the bolt portion, The guide portion is disposed at a position where, when inserted into the first guide groove and the second guide groove, the other end side of the guide portion that is fitted into the first guide groove in the thickness direction of the second plate abuts against the top portion. The etching jig according to claim 1 or 2.

6. A fitting portion is formed at a position where the second plate and the flange portion are joined, for restricting the rotational movement of the handle portion about the axis of the handle portion. The etching jig according to claim 1 or 2.

7. When the four bolt portions are inserted into the first hole portion and the second hole portion, the distance between the nearest bolt portion and the four bolt portions is 10 mm or less in a cross-sectional view along the thickness direction of the second plate. The etching jig according to claim 1 or 2.

8. The diameter of the flange portion is 12.5 mm. The etching jig according to claim 1 or 2.

9. The diameter of the flange portion and the diameter of the height adjustment jig are 12.5 mm. The etching jig according to claim 2 .

10. An etching method for stacking and fixing a plurality of small-diameter semiconductor wafers each having a diameter of approximately half an inch, and performing mirror etching on end surfaces of the plurality of semiconductor wafers, comprising: a placing step of placing the plurality of semiconductor wafers at the center of a first plate that is a plate-like body and has notches formed in a substantially cross direction; a clamping step of inserting a rod-shaped second plate, which is a plate-shaped body having a substantially cross-shaped notch and a through-hole formed in the center, into the through-hole, the rod-shaped second plate having one end attached to a disk-shaped flange portion having a diameter larger than the inner diameter of the through-hole and not larger than a half-inch diameter, and the other end of the handle portion being inserted into the through-hole, and clamping the plurality of semiconductor wafers between the first plate and the flange portion; a positioning step of temporarily fixing the first plate and the second plate with fasteners while sandwiching the plurality of semiconductor wafers, and inserting guide portions into the notches of the first plate and the second plate to position the plurality of semiconductor wafers; a fixing step of fixing the first plate and the second plate with the fastener after the positioning step; and an etching step of, after the fixing step, placing the plurality of semiconductor wafers in an etching solution, rotating the plurality of semiconductor wafers around the handle portion as a rotation axis, and performing mirror etching on the end surfaces of the plurality of semiconductor wafers. Etching method.

11. In the placing step, a height adjusting jig formed in a disk shape having a diameter of half an inch or less is placed between the first plate and the plurality of semiconductor wafers, and the thickness of the stacked plurality of semiconductor wafers is adjusted. The etching method according to claim 10.

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