Imaging unit and imaging apparatus

Abstract

To provide an imaging unit capable of reducing the size and thickness of an imaging apparatus.SOLUTION: An imaging unit includes: an imaging chip which images a subject; and a mounting substrate which has a first main surface and a second main surface and in which the imaging chip is mounted on the first main surface and a first connector and a second connector for being connected to an external device are mounted on the second main surface. The imaging chip may include a transmission circuit for transmitting an image. On the second main surface, the first connector is arranged in a position facing the transmission circuit on the first main surface and an image signal may be transmitted to the first connector from the transmission circuit. In the mounting substrate, a bypass capacitor group for a power supply of the imaging chip may be annularly mounted on the second main surface. The first connector may be arranged more inside than the annular bypass capacitor group.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present invention relates to an imaging unit and an imaging device. [Background technology]

[0002] BACKGROUND ART Imaging devices that include an imaging element and a package that the imaging element is mounted in are known. There has been a demand for smaller and thinner imaging devices. [Prior art document] [Patent documents] [Patent Document 1] JP 2010-103456 A Summary of the Invention

[0003] A first aspect of the present invention provides an imaging unit comprising: an imaging chip for capturing an image of a subject; and a mounting board having a first main surface and a second main surface, the imaging chip mounted on the first main surface, and a first connector and a second connector mounted on the second main surface for connection to an external device.

[0004] The above summary of the invention does not list all of the necessary features of the present invention, and subcombinations of these features may also constitute inventions. [Brief explanation of the drawings]

[0005] [Figure 1] 1 is a schematic cross-sectional view of a camera 10, which is an example of an imaging device, according to an embodiment. [Figure 2] FIG. 4 is a schematic top view of an imaging unit 40 according to one embodiment. [Figure 3] FIG. 3 is a cross-sectional view schematically showing the AA cross section of FIG. 2. [Figure 4] FIG. 2 is a schematic bottom view of an imaging unit 40 according to one embodiment. [Figure 5] FIG. 10 is a bottom view schematically illustrating a state in which an imaging unit 40 is connected to an ASIC 52 and a power supply unit 53 via a first flexible substrate 250 and a second flexible substrate 260 according to an embodiment. [Figure 6] FIG. 6 is a schematic enlarged view of the area (A) shown in FIG. [Figure 7] FIG. 10 is a bottom view schematically illustrating a state in which an imaging unit 41 is connected to an ASIC 52 and a power supply unit 53 via a first flexible substrate 250 and a second flexible substrate 260 according to an embodiment. [Figure 8] FIG. 10 is a bottom view schematically illustrating a state in which an imaging unit 42 is connected to an ASIC 52 and a power supply unit 53 via a first flexible substrate 257 and a second flexible substrate 267 according to one embodiment. [Figure 9] FIG. 2 is a side view that schematically illustrates a portion of a first flexible substrate 270, according to one embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0006] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention according to the claims. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.

[0007] 1 is a schematic cross-sectional view of a camera 10, which is an example of an imaging device, according to an embodiment. The camera 10 is, for example, a digital compact camera. The camera 10 includes a lens unit 20 and a camera body 30.

[0008] Lens unit 20 has an optical system within its barrel, and this optical system defines optical axis 22. Lens unit 20 is attached to camera body 30. Lens unit 20 may be housed within camera body 30 and may extend outward as shown in the figure when in use.

[0009] Lens unit 20 guides incident subject light beams into housing 31 of camera body 30. Note that, for the sake of clarity, lens unit 20 shown in FIG. 1 includes two lenses and an aperture, but is not limited to this configuration.

[0010] The camera body 30 has an imaging unit 40, a board unit 60, and a display unit 88. The camera body 30 further has a first flexible board 250 and a second flexible board 260 that connect the imaging unit 40 and the board unit 60 to each other.

[0011] A subject light beam incident on the lens unit 20 is guided by the lens unit 20 to the imaging unit 40. The imaging unit 40 includes an imaging chip 100 that captures an image of a subject, and a mounting substrate 120 having a first main surface 111 and a second main surface 112. The imaging unit 40 in this embodiment further includes a frame 140 and a cover glass 160. Note that the imaging unit 40 does not necessarily have to include the frame 140 and the cover glass 160.

[0012] The imaging chip 100 is, for example, a CMOS image sensor or a CCD image sensor, and has a rectangular main plane shape. The imaging chip 100 is mounted on a first main surface 111 of a mounting substrate 120.

[0013] Here, in this embodiment, the direction along the optical axis 22 is defined as the z-axis direction. That is, the direction in which the subject light beam is incident on the imaging surface of the imaging chip 100 is defined as the z-axis direction. Specifically, the direction in which the subject light beam is incident is defined as the negative z-axis direction, and the opposite direction is defined as the positive z-axis direction. The longitudinal direction of the imaging chip 100 is defined as the x-axis direction. The lateral direction of the imaging chip 100 is defined as the y-axis direction. Specifically, the x-axis and y-axis directions are defined as the directions shown in FIG. 1. The x-axis, y-axis, and z-axis are in a right-handed Cartesian coordinate system.

[0014] When defined in this way, the imaging unit 40, the board unit 60, and the display unit 88 in this embodiment are arranged in this order in the negative z-axis direction. For convenience of explanation, the positive z-axis direction may be referred to as the front, front side, etc. The negative z-axis direction may be referred to as the rear, rear side, etc. The side in the negative z-axis direction may be referred to as the rear side, etc.

[0015] If an imaging unit has only one connector mounted on the backside of the mounting board, the connector must be assigned to various applications, such as power supply, control, and image transmission, to drive and / or control the imaging chip and read images from the imaging chip. Flexible substrates connected to connectors assigned to various applications must also be compatible with various applications. Therefore, flexible substrates specialized for applications requiring high current flow or high-speed image signal transmission cannot be used. However, as imaging chips become more pixelated and their readout speeds increase, their power consumption tends to increase. Furthermore, when stacked imaging chips equipped with large-scale circuits such as memory are mounted, the power consumption of the imaging chip increases even further. Furthermore, when multiple flexible substrates corresponding to various applications are connected to a single connector assigned to various applications, due to the layout of the image processing circuitry, power supply, and other components within the camera body, each flexible substrate must be arranged to extend in a different direction from the connector, necessitating the use of at least one of the flexible substrates as a relatively large size. A relatively large space must be provided within the camera body for such flexible substrates, which results in the overall device being relatively large and thick.

[0016] In contrast, according to the present embodiment, a first connector 181 and a second connector 183 are mounted on the second main surface 112 of the mounting board 120. The first connector 181 and the second connector 183 are used to connect to an external device of the imaging unit 40. In this way, by mounting the first connector 181 and the second connector 183 on the mounting board 120, the imaging unit 40 of the present embodiment can contribute to making the camera 10 smaller and thinner.

[0017] A first flexible substrate 250 is connected to the first connector 181 mounted on the mounting substrate 120. As an example, the first connector 181 may be used to transmit an image signal to an external image processing device via the first flexible substrate 250. In other words, the first connector 181 and the first flexible substrate 250 may be specialized for transmitting an image signal.

[0018] The second connector 183 mounted on the mounting substrate 120 is connected to the second flexible substrate 260. As an example, the second connector 183 may be connected to an external power supply device via the second flexible substrate 260 and used to supply current to the imaging chip 100. In other words, the second connector 183 and the second flexible substrate 260 may be specialized for use in supplying current to the imaging chip 100.

[0019] The imaging unit 40 may include three or more connectors. In other words, three or more connectors may be mounted on the second main surface 112 of the mounting substrate 120. A separate flexible substrate may be connected to each of the three or more connectors. Each pair of a connector and a flexible substrate may be specialized for a specific purpose. The purposes of multiple pairs may be partially or entirely common to each other.

[0020] The board unit 60 is disposed at a position in the negative z-axis direction of the imaging unit 40. The board unit 60 includes a board 62, and an MPU 51, an ASIC 52, and a power supply unit 53 mounted on the board 62. Note that other electronic circuits may be mounted on the board 62 in addition to or instead of the board 62.

[0021] The MPU 51 is responsible for overall control of the camera 10. The ASIC 52 processes the image signal output from the imaging chip 100. In this embodiment, the ASIC 52 receives the image signal from the imaging chip 100 via the mounting substrate 120, the first connector 181, and the first flexible substrate 250.

[0022] The power supply unit 53 includes a battery attached to the camera 10 and a power supply circuit that supplies power stored in the battery to each part of the camera 10. The power supply unit 53 in this embodiment supplies current to the imaging chip 100 via the second flexible substrate 260, the second connector 183, and the mounting substrate 120. Note that the power supply unit 53 may be an example of an external device.

[0023] The ASIC 52 generates image data for display based on the image signal from the imaging chip 100. The ASIC 52 generates image data for display by performing, for example, image processing or compression processing on the image signal from the imaging chip.

[0024] The image data for display generated by the ASIC 52 is output to the display unit 88. The image data may be recorded on a recording medium attached to the camera body 30. The recording medium may be configured to be detachable from the camera body 30. The ASIC 52 may be an example of an external image processing device.

[0025] The display unit 88 is disposed at a position in the negative z-axis direction of the board unit 60. For example, a liquid crystal panel or the like can be used as the display unit 88. The display surface of the display unit 88 appears on the rear surface of the camera body 30. The display unit 88 displays an image based on the display image data generated by the ASIC 52.

[0026] Fig. 2 is a top view schematically showing an imaging unit 40 according to one embodiment. Fig. 3 is a cross-sectional view schematically showing a cross section AA in Fig. 2. However, in Fig. 3, in addition to the imaging unit 40 shown in solid lines, a bracket 150, a first flexible substrate 250, and a second flexible substrate 260 are shown in dashed lines.

[0027] The imaging chip 100 includes an imaging region 101 and a peripheral region 102. As shown in Fig. 2, both the imaging region 101 and the peripheral region 102 are rectangular in plan view.

[0028] The imaging region 101 is formed in the central portion of the imaging chip 100. In the imaging region 101, a plurality of photoelectric conversion elements that photoelectrically convert subject light are arranged two-dimensionally, thereby forming the imaging surface of the imaging chip 100. Each pixel is configured to include one or more photoelectric conversion elements.

[0029] The peripheral region 102 is located around the imaging region 101. The peripheral region 102 includes a processing circuit 104 that reads out and processes image signals obtained by photoelectric conversion in the photoelectric conversion elements. The processing circuit 104 includes an AD conversion circuit that converts the output image signals into digital signals. The processing circuit 104 also includes a transmission circuit 105 that transmits the image signals.

[0030] The imaging chip 100 is mounted on a mounting substrate 120 using a COB (Chip On Board) method. The imaging chip 100 is fixed to the mounting substrate 120 by an adhesive 210. The adhesive 210 is, for example, a thermosetting adhesive. Other adhesives described below are also, for example, thermosetting adhesives.

[0031] The imaging chip 100 is electrically connected to the mounting substrate 120 via bonding wires 110. An image signal converted into a digital signal by an AD conversion circuit of the imaging chip 100 is output to the mounting substrate 120 via the bonding wires 110. The imaging chip 100 may be flip-chip mounted on the mounting substrate 120.

[0032] The mounting substrate 120 includes a first layer 121, a core layer 207, and a second layer 122. The first layer 121 includes a solder resist layer 201, a wiring layer 202, an insulating layer 203, a wiring layer 204, and an insulating layer 205. The second layer 122 includes an insulating layer 215, a wiring layer 214, an insulating layer 213, a wiring layer 212, and a solder resist layer 211. The mounting substrate 120 is a multilayer core substrate having the core layer 207 as a core layer.

[0033] On the mounting board 120, the following layers are arranged in the negative z-axis direction in the following order: solder resist layer 201, wiring layer 202, insulating layer 203, wiring layer 204, insulating layer 205, core layer 207, insulating layer 215, wiring layer 214, insulating layer 213, wiring layer 212, and solder resist layer 211.

[0034] The insulating layers 203, 205, 215, and 213 are, for example, resin layers. The thickness of each of the insulating layers 203 and the like in the z-axis direction is, for example, 20 μm to 50 μm.

[0035] The wiring layer 202, the wiring layer 204, the wiring layer 214, and the wiring layer 212 include wiring patterns. Materials that can be used for the wiring layer 202, etc. include nickel-iron alloys (e.g., 42 alloy, 56 alloy), copper, aluminum, etc. The thickness of each of the wiring patterns included in the wiring layer 202, etc. is, for example, 10 μm to 50 μm.

[0036] The core layer 207 is made of metal. When the core layer 207 is made of metal, the material of the core layer 207 may be, for example, an alloy of nickel and iron (for example, 42 alloy, 56 alloy), copper, aluminum, etc. The thickness of the core layer 207 is thicker than the thickness of any of the wiring layers 202, etc. The thickness of the core layer 207 is thicker than the thickness of any of the insulating layers 203, etc. Specifically, the thickness of the core layer 207 is, for example, 0.1 mm to 0.8 mm.

[0037] The rigidity of the core layer 207 is higher than the rigidity of any of the wiring layers 202, etc. The rigidity of the core layer 207 may be higher than the rigidity of the first layer 121. The rigidity of the core layer 207 may be higher than the rigidity of the second layer 122.

[0038] The core layer 207 may be formed from a resin. When the core layer 207 is formed from a resin, the core layer 207 may be formed using, for example, FR4 or a material with a higher elastic modulus than FR4. When the core layer 207 is formed from a resin, the core layer 207 is sandwiched between wiring layers in the z-axis direction. For example, when the core layer 207 is formed from a resin, the solder resist layer 201, the wiring layer 202, the insulating layer 203, the wiring layer 204, the core layer 207, the wiring layer 214, the insulating layer 213, the wiring layer 212, and the solder resist layer 211 may be arranged in this order in the negative z-axis direction. When two additional wiring layers are arranged, an additional insulating layer in contact with wiring layer 204 and an additional wiring layer in contact with core layer 207 are arranged in the negative z-axis direction between wiring layer 204 and core layer 207, and an additional wiring layer in contact with core layer 207 and an additional insulating layer in contact with wiring layer 214 are arranged in the negative z-axis direction between core layer 207 and wiring layer 214.

[0039] In this way, the mounting substrate 120 is a multi-layer core substrate having a metal core or a resin core. The thickness of the mounting substrate 120 may be, for example, 0.3 mm to 1.0 mm.

[0040] At least a part of the wiring layer 202 is used for a wiring pattern that receives image signals output from the imaging chip 100 via the bonding wires 110. The wiring layer 202 includes bonding pads 240 to which the bonding wires 110 are connected.

[0041] The wiring patterns included in the wiring layer 204 and the wiring patterns included in the wiring layer 214 can be used as, for example, ground lines, power supply lines, and the like.

[0042] The imaging chip 100 is disposed on the solder resist layer 201 and electrically connected to the bonding pads 240 by bonding wires 110. The bonding pads 240 and the wiring layer 212 are electrically connected by vias 131 that penetrate the first layer 121 and the core layer 207. The vias 131 are covered by an insulator 132. An image signal output from the imaging chip 100 is transmitted to the wiring layer 212 via the wiring layer 202 and the vias 131.

[0043] Electronic components such as a first connector 181, a second connector 183, a bypass capacitor group 185, and a circuit group 187 are mounted on the solder resist layer 211. In other words, these electronic components are mounted on the second main surface 112 of the mounting board 120, which is opposite to the first main surface 111 on which the imaging chip 100 is mounted. Other electronic components such as resistors, regulators, and transistors may also be included on the solder resist layer 211.

[0044] These electronic components are electrically connected to the wiring layer 212 by lead members. The lead members are fixed to the wiring layer 212 with solder or the like. A part of the wiring layer 212 is exposed to the outside through an opening formed in the solder resist layer 211, and provides an electrode such as a land.

[0045] In particular, the first connector 181 in this embodiment is connected to the wiring layer 212, and receives an image signal from the transmission circuit 105 via the wiring layer 212. The first connector 181 in this embodiment is also connected to the first flexible substrate 250, and transmits the image signal to the ASIC 52 via the first flexible substrate 250.

[0046] The image signal transmitted to the first connector 181 may include an image signal transmitted at 1 GHz or higher. The first connector 181 is disposed on the second main surface 112 at a position facing the transmission circuit 105 on the first main surface 111. In this way, the first connector 181 is disposed at a position that minimizes the linear distance between the first connector 181 and the transmission circuit 105, thereby minimizing the path of the image signal transmitted from the transmission circuit 105 and preventing the signal level of the image signal output at high speed from deteriorating within the mounting board 120.

[0047] Moreover, the second connector 183 in this embodiment is connected to the wiring layer 212 and supplies current to the imaging chip 100 via the wiring layer 212. Moreover, the second connector 183 in this embodiment is connected to the second flexible substrate 260 and is supplied with current from the power supply unit 53 via the second flexible substrate 260. Note that no image signal is transmitted from the transmission circuit 105 to the second connector 183 in this embodiment.

[0048] The frame 140 is made of resin and is adhered to the solder resist layer 201 of the mounting substrate 120 by adhesive parts 220. In other words, the mounting substrate 120 is fixed to the frame 140.

[0049] The frame 140 may be configured by inserting a metal body into resin. The metal body may be made of a nickel-iron alloy (e.g., 42 alloy, 56 alloy), copper, or aluminum. If a lightweight material such as aluminum is used as the material for the metal body, the weight of the frame 140 can be reduced. If a material with a relatively high thermal conductivity such as copper is used as the material for the metal body, the heat dissipation characteristics of the frame 140 can be improved.

[0050] The frame 140 has a first surface 141, a second surface 142, a third surface 143, a fourth surface 144, a fifth surface 145, and a sixth surface 146. The sixth surface 146 forms an opening 138. The sixth surface 146 forms an inner wall surface of the frame 140. The opening 138 is formed, for example, in the center of the xy plane. The imaging chip 100 mounted on the first main surface 111 of the mounting substrate 120 is located within the opening 138.

[0051] The first surface 141 is a surface that is bonded to the cover glass 160 by the adhesive portion 230. The first surface 141 is a surface that contacts an end of the sixth surface 146. The first surface 141 is formed along the outer edge of the sixth surface 146. The first surface 141 is a surface that is approximately parallel to the xy plane.

[0052] The second surface 142 is a surface that contacts the end of the first surface 141. The second surface 142 is a surface that is formed along the outer edge of the first surface 141. The second surface 142 has a surface that is approximately parallel to the yz plane and a surface that is approximately parallel to the xz plane.

[0053] The third surface 143 is a surface that contacts an end of the second surface 142. The third surface 143 is a surface that is approximately parallel to the xy plane and is a surface that is approximately parallel to the first surface 141.

[0054] The fourth surface 144 is a surface that contacts the end of the third surface 143. The fourth surface 144 is a surface that is formed along the outer edge of the third surface 143. The fourth surface 144 has a surface that is approximately parallel to the yz plane and a surface that is approximately parallel to the xz plane.

[0055] The fifth surface 145 is a surface that contacts an end of the fourth surface 144. The fifth surface 145 is a surface that is formed along the outer edge of the fourth surface 144. The fifth surface 145 is a surface that is approximately parallel to the xy plane. The fifth surface 145 is a surface that is approximately parallel to the first surface 141 and the third surface 143. The fifth surface 145 is a surface that is bonded to the solder resist layer 201 of the mounting board 120 by the adhesive portion 220. The fifth surface 145 faces the adhesive portion 220. The fifth surface 145 is a surface that contacts an end of the sixth surface 146. The fifth surface 145 is formed along the outer edge of the sixth surface 146.

[0056] The frame 140 has a stepped portion formed by a first surface 141, a second surface 142, and a third surface 143. The frame 140 has mounting holes 148 as mounting portions. The frame 140 has, for example, three mounting holes 148. All three mounting holes 148 are holes that penetrate from the third surface 143 to the fifth surface 145. All three mounting holes 148 are used to mount the imaging unit 40 to another structure, such as the housing 31 of the camera body 30.

[0057] The frame 140 is fixed to the bracket 150 by, for example, screwing it with screws 149 through three mounting holes 148. The bracket 150 is fixed to the housing 31 of the camera body 30 by, for example, screwing it. Thus, the imaging unit 40 is fixed to the housing 31 of the camera body 30.

[0058] When the frame 140 and the bracket 150 are fastened together using the mounting holes 148 with, for example, metal screws 149, a heat transfer path can be formed to dissipate the heat generated when the imaging chip 100 is operating toward the housing 31 via the screws 149.

[0059] The frame 140 has positioning holes 147. The frame 140 has, for example, two positioning holes 147. Both of the two positioning holes 147 are holes that penetrate from the third surface 143 to the fifth surface 145. Of the two positioning holes 147, one positioning hole is formed as a fitting hole, and the other positioning hole 147 is formed as an elongated hole.

[0060] The frame 140 is positioned relative to the bracket 150 using two positioning holes 147. For example, two positioning pins provided on the bracket 150 are inserted into the two positioning holes 147, thereby positioning the frame 140 and the bracket 150. The frame 140 is fixed in a state where it is positioned relative to the bracket 150. Therefore, the imaging unit 40 is fixed in a state where it is positioned relative to the housing 31. Note that the frame 140 and the bracket 150 may be fixed to a structure other than the housing 31.

[0061] The imaging unit 40 may be fixed to the housing 31 without using the bracket 150. The imaging unit 40 may be fixed to the housing 31 by being fastened, for example, with screws through the three mounting holes 148.

[0062] The cover glass 160 is made of, for example, borosilicate glass, quartz glass, alkali-free glass, heat-resistant glass, quartz, etc. The cover glass 160 is translucent. The thickness of the cover glass 160 is, for example, 0.5 mm to 0.8 mm.

[0063] The cover glass 160 is used to seal the imaging chip 100 housed in the opening 138 of the frame 140. More specifically, the cover glass 160 is fixed to the frame 140 so as to cover the opening 138 of the frame 140. The cover glass 160 is fixed to the frame 140 after the imaging chip 100, the bonding wires 110, and the frame 140 are mounted on the mounting substrate 120. The cover glass 160 is adhered to the frame 140 by an adhesive part 230. Since the cover glass 160 is translucent, the adhesive part 230 may be a photo-curable adhesive.

[0064] The cover glass 160, together with the frame 140 and the mounting substrate 120, seals the space within the opening 138. Therefore, the imaging chip 100 located within the opening 138 is disposed in a space sealed by the mounting substrate 120, the frame 140, and the cover glass 160. This makes the imaging chip 100 less susceptible to the effects of the external environment. For example, the imaging chip 100 is less susceptible to the effects of moisture present outside the space. This makes it possible to prevent deterioration of the imaging chip 100.

[0065] Fig. 4 is a bottom view schematically illustrating the imaging unit 40 according to one embodiment. Fig. 5 is a bottom view schematically illustrating the imaging unit 40 connected to the ASIC 52 and the power supply unit 53 via the first flexible substrate 250 and the second flexible substrate 260 according to one embodiment.

[0066] 4 and 5, the configuration on the second main surface 112 side of the mounting substrate 120 is indicated by solid lines, and the imaging chip 100, the processing circuit 104 in the peripheral region 102 of the imaging chip 100, and the transmission circuit 105 included in the processing circuit 104 are indicated by dashed lines on the first main surface 111 side. The bypass capacitor group 185 and the circuit group 187 are simplified and shown as hatched areas. The path and direction of current from the (+) pole within the mounting substrate 120 are indicated by solid arrows, and the path and direction of image signal flow are indicated by hollow arrows. The same applies to FIGS. 7 and 8, which will be described later, and redundant explanations will be omitted.

[0067] When mounting one connector on the back surface of the mounting board, it is preferable to position the connector approximately in the center of the back surface, taking into consideration that when multiple harnesses such as flexible boards are connected, the tension applied to each harness is uniform. Furthermore, when mounting an electrical circuit on the back surface of the mounting board, it is preferable that the wiring layer connected to the imaging chip via electrode pads and vias is exposed on the outer periphery of the back surface of the mounting board, and the electrical circuit is located near the wiring layer. In such a case, the connector needs to be located on the center of the back surface of the mounting board, where there is remaining space for mounting, rather than on the outer periphery, where there is not much space left for mounting.

[0068] When a single connector is located in the center of the back surface of the mounting board, the image signal output from the transmission circuit built in the imaging chip is transmitted along the wiring pattern within the board in the surface direction of the board and reaches the connector. In this case, the resistance loss and dielectric loss of the image signal increase in the wiring pattern, causing a deterioration in the signal level of the image signal. Furthermore, when a single connector is located in the center of the back surface of the mounting board, the distance between the connector and the external image processing device is longer than when the connector is located at the edge of the back surface. In other words, the harness, such as a flexible board, connecting the connector to the external image processing device becomes relatively long. As a result, the resistance loss and dielectric loss of the image signal flowing through the harness increase, causing a deterioration in the signal level of the image signal.

[0069] In the imaging unit 40 of this embodiment, as described above, the first connector 181 and the second connector 183 are mounted on the second main surface 112 of the mounting board 120. Here, the above-mentioned bypass capacitor group 185 is for powering the imaging chip 100, and it is preferable to shorten the distance between the bypass capacitor group 185 and the imaging chip 100 in order to improve the functionality of the bypass capacitor group 185. In this embodiment, the bypass capacitor group 185 is disposed near the wiring layer 212 exposed to the outside through an opening formed in the solder resist layer 211.

[0070] In this embodiment, the bypass capacitor group 185 is disposed on the outer periphery of the second main surface 112 of the mounting substrate 120. More specifically, the bypass capacitor group 185 is mounted in a ring shape on the outer periphery of the second main surface 112 of the mounting substrate 120. In this embodiment, the outline of the region of the bypass capacitor group 185 shown by hatching in Fig. 4 is rectangular in plan view, following the shapes of the mounting substrate 120 and the imaging chip 100, which are rectangular in plan view.

[0071] In this embodiment, the first connector 181 is arranged inside the annular bypass capacitor group 185. Similarly, the second connector 183 is arranged inside the annular bypass capacitor group 185. This arrangement allows the size of the mounting board 120 to be smaller than when each connector is arranged outside the annular bypass capacitor group 185. It can also be said that the first connector 181 and the second connector 183 are arranged inside the four sides of the rectangular region of the bypass capacitor group 185 in plan view.

[0072] As described above, in this embodiment, the image signal transmitted to the first connector 181 may include an image signal transmitted at 1 GHz or higher. This signal is, for example, a differential signal called SLVS or LVDS. The image signal output at high speed from the transmission circuit 105 of the imaging chip 100 flows through a differential signal pattern wired on the wiring layer 212 of the mounting substrate 120, passes through the first connector 181 and the first flexible substrate 250, and is transmitted to the ASIC 52.

[0073] As described above, in this embodiment, the first connector 181 is disposed on the second main surface 112 at a position facing the transmission circuit 105 on the first main surface 111. In FIG. 4 and other figures, the first connector 181, indicated by a solid line, is shown overlapping the transmission circuit 105, indicated by a dashed line. This arrangement allows both the path of the image signal within the differential signal pattern, indicated by the hollow arrows in FIG. 4, and the path of the image signal within the first flexible substrate 250, indicated by the hollow arrows in FIG. 5, to be shorter than when a single connector is disposed in the center of the back surface of the mounting substrate. Therefore, in the imaging unit 40 of this embodiment, by mounting each of the first connector 181 and the second connector 183 on the mounting substrate 120, this can contribute to making the camera 10 smaller and thinner.

[0074] The resistive and dielectric losses of image signals transmitted at 1 GHz or higher increase at a significantly greater rate depending on the length of the transmission path than image signals transmitted at lower frequencies. In other words, image signals transmitted at 1 GHz or higher experience a significantly greater attenuation rate along the transmission path.

[0075] According to the imaging unit 40 of this embodiment, the arrangement configuration shown in FIG. 4 etc. makes it possible to prevent image signals transmitted at 1 GHz or higher from attenuating within the transmission path, compared to a case where one connector is arranged in the center of the back surface of the mounting board.

[0076] Furthermore, when one connector is located in the center of the back surface of the mounting board, the differential signal pattern within the mounting board becomes relatively long, which requires the use of a base material made of a material suitable for transmitting image signals at high speed, and this base material is relatively expensive. In contrast, according to the imaging unit 40 of this embodiment, the differential signal pattern within the mounting board 120 can be made relatively short, which allows the use of a relatively inexpensive base material for the mounting board 120, thereby reducing manufacturing costs.

[0077] Image sensors tend to consume more power as their pixel count increases and image readout speeds increase, and this increase is even greater in stacked types equipped with large-scale circuits such as memory. When a single connector is used for multiple purposes, such as power supply, control, and image transmission, the connector's multiple pins are used for each purpose, which limits the amount of current that can be supplied to the image sensor through the connector. Furthermore, when a connector and harness suitable for high-speed image signal transmission are used, the efficiency of supplying a large current to the image sensor may be lower than when a general-purpose connector and harness are used.

[0078] In contrast, with the imaging unit 40 having two connectors, one connector can be specialized for one purpose and the other connector can be specialized for another purpose, allowing each connector to be used appropriately depending on the purpose. For example, the imaging unit 40 can use a first connector 181 that is suitable for transmitting image signals to the ASIC 52 at high speed and a second connector 183 that is suitable for supplying a large current supplied from the power supply unit 53 to the imaging chip 100. In this case, the imaging unit 40 can also apply a first flexible substrate 250 that is suitable for transmitting image signals at high speed to the first connector 181 and a second flexible substrate 260 that is suitable for supplying a large current to the second connector 183.

[0079] Note that the imaging unit 40 having two connectors may assign multiple uses to one connector, while the other connector may be specialized for a particular use. For example, the imaging unit 40 may assign the first connector 181 two uses, i.e., image signal transmission and current supply, and the second connector 183 may be specialized for current supply. In this case, the second connector 183 may be suitable for supplying a large current. Also, the imaging unit 40 having two connectors may assign multiple uses to each connector. For example, the imaging unit 40 may assign both the first connector 181 and the second connector 183 two uses, i.e., image signal transmission and current supply.

[0080] Furthermore, in this embodiment, first connector 181 is arranged on one end side of second main surface 112 of mounting board 120, and second connector 183 is arranged on the opposite side of the one end on second main surface 112 of mounting board 120. More specifically, first connector 181 and second connector 183 are arranged on opposite sides of circuit group 187. In this case, it can also be said that second connector 183 is arranged in a position point-symmetrical to first connector 181 with respect to the center of mounting board 120.

[0081] According to this arrangement, when the ASIC 52 and the power supply unit 53 are located on opposite sides of the imaging unit 40 in plan view, it is possible to shorten both the distance from the first connector 181 to the ASIC 52 and the distance from the second connector 183 to the power supply unit 53. As a result, compared to when one connector is located in the center of the back surface of the mounting board, the second flexible substrate 260 connecting the power supply unit 53 and the second connector 183 can be configured to be shorter, and voltage drop in the second flexible substrate 260 can be suppressed, making it possible to stabilize the voltage supplied to the imaging chip 100.

[0082] Furthermore, with this arrangement, first connector 181 and second connector 183 are arranged point-symmetrically with respect to the center of mounting board 120, so that tension applied to imaging unit 40 can be made uniform even when first flexible board 250 and second flexible board 260 are connected to first connector 181 and second connector 183, respectively. This makes it possible to stabilize operation when imaging unit 40 is operated for functions such as image stabilization, for example, and is particularly effective when camera 10 is used as a VR camera or the like.

[0083] 6 is a schematic enlarged view of region (A) shown in FIG. 5. In this embodiment, first flexible substrate 250 may be a microstrip wiring. First flexible substrate 250 of this embodiment is formed by signal line 251, ground line 253, and dielectric layer 255 located between signal line 251 and ground line 253. In FIG. 6, signal line 251 is indicated by a shaded region, and ground line 253 is indicated by a dotted region.

[0084] As shown in Fig. 6, the first flexible substrate 250 of the microstrip wiring may have a mesh-structured ground line 253 to increase the width of the signal line 251 while maintaining a matched characteristic impedance and thereby suppress signal loss. This allows the first flexible substrate 250 to suppress deterioration in the signal level of the transmitted image signal, which is particularly effective when transmitting image signals at high speed. Furthermore, it has been experimentally found that this effect is particularly pronounced when the mesh-structured ground line 253 is arranged to occupy 20% of the entire area of ​​one surface of the dielectric layer 255. An example of the material for the ground line 253 is copper.

[0085] Furthermore, by forming ground wire 253 of first flexible substrate 250 into a mesh structure, first flexible substrate 250 can be made flexible, which is particularly effective when camera 10 is used for applications such as a VR camera. The characteristic impedance may be, for example, 100 Ω. The same effect can be achieved in camera 10 even when a thin coaxial cable is used instead of first flexible substrate 250.

[0086] 6, the first flexible substrate 250 of the microstrip wiring may have ground lines 253 arranged diagonally with respect to the signal lines 251 extending parallel to the extension direction of the first flexible substrate 250. For example, the ground lines 253 may extend at an angle of about 45 degrees with respect to the extension direction of the signal lines 251. With this configuration, it is possible to average the area ratio of the ground lines 253 facing each of the multiple signal lines 251 with the dielectric layer 255 sandwiched therebetween. Furthermore, although not shown, the above-mentioned effect can also be obtained by using a strip wiring structure in which the signal lines 251 are sandwiched between the above-mentioned mesh-structured ground lines 253 and upper and lower layers.

[0087] 7 is a bottom view schematically illustrating a state in which the imaging unit 41 is connected to the ASIC 52 and the power supply unit 53 via the first flexible substrate 250 and the second flexible substrate 260 according to one embodiment. In this embodiment, the same components as those in the embodiment described using FIGS. 1 to 6 are denoted by the same reference numerals, and duplicated explanations will be omitted. The same applies to the following embodiments.

[0088] 1 to 6, in the present embodiment, first connector 181 and second connector 183 are mounted on second main surface 112 of mounting board 120, and both connectors are arranged inside annular bypass capacitor group 185. Also, as in the embodiment described using Figures 1 to 6, first connector 181 is arranged on one end side of second main surface 112 of mounting board 120, and second connector 184 is arranged in a position point-symmetrical to first connector 181 with respect to the center of mounting board 120.

[0089] This embodiment differs from the embodiment described using Figures 1 to 6 in that the first connector 181 and the second connector 184 are not arranged on opposite sides of the circuit group 187. The second connector 184 is arranged adjacent to the circuit group 187 in the negative y-axis direction. The imaging unit 41 according to this embodiment also has the same effects as the embodiment described using Figures 1 to 6.

[0090] 8 is a bottom view schematically illustrating a state in which the imaging unit 42 is connected to the ASIC 52 and the power supply unit 53 via the first flexible substrate 257 and the second flexible substrate 267 according to one embodiment. In this embodiment, as in the embodiment described with reference to FIGS. 1 to 6, the first connector 182 and the second connector 186 are mounted on the second main surface 112 of the mounting substrate 120, and both connectors are disposed inside the annular bypass capacitor group 185. Also, as in the embodiment described with reference to FIGS. 1 to 6, the first connector 182 is disposed on one end side of the second main surface 112 of the mounting substrate 120.

[0091] The present embodiment differs from the embodiment described using FIGS. 1 to 6 in that the first connector 182 and the second connector 186 are not arranged on opposing sides of the circuit group 187. The second connector 186 is arranged adjacent to the first connector 182 in the negative x-axis direction of the circuit group 187. Furthermore, in the present embodiment, the number of pins that each of the first connector 182 and the second connector 186 has is smaller than in the embodiment described using FIGS. 1 to 6. The imaging unit 42 according to the present embodiment also has the same effects as the embodiment described using FIGS. 1 to 6.

[0092] 9 is a side view schematically illustrating a portion of a first flexible substrate 270 according to one embodiment. Unlike the first flexible substrate 250 according to the embodiment described using FIGS. 1 to 6, the first flexible substrate 270 according to this embodiment is a coplanar wiring. The first flexible substrate 270 according to this embodiment is formed by a signal line 271, a ground line 273, and dielectric layers 275 adjacent to each of the signal line 271 and the ground line 273. The imaging unit 42 according to this embodiment also has the same effects as the embodiment described using FIGS. 1 to 6.

[0093] In the above embodiments, the camera 10 including the lens unit 20 and the camera body 30 has been described as an example of an imaging device. However, an imaging device does not have to include the lens unit 20. For example, the camera body 30 is an example of an imaging device. Furthermore, the concept of an imaging device includes not only imaging devices with interchangeable lenses such as single-lens reflex cameras, but also imaging devices with non-interchangeable lenses.

[0094] The ASIC 52, the power supply unit 53, etc. may also be referred to as the imaging unit 40. Additionally or alternatively, the imaging unit 40 may also include the first flexible substrate 250, the second flexible substrate 260, etc.

[0095] Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications and improvements can be made to the above embodiments. It is clear from the claims that such modifications and improvements can also be included within the technical scope of the present invention.

[0096] It should be noted that the execution order of each process, such as operations, procedures, steps, and stages, in the devices, systems, programs, and methods shown in the claims, specifications, and drawings is not specifically stated as "before," "prior to," etc., and that the processes can be performed in any order unless the output of a previous process is used in a subsequent process. Even if the operational flow in the claims, specifications, and drawings is described using "first," "next," etc. for convenience, this does not mean that the processes must be performed in this order. [Explanation of symbols]

[0097] 10 camera, 20 lens unit, 22 optical axis, 30 camera body, 31 housing, 40, 41, 42 imaging unit, 100 imaging chip, 101 imaging area, 102 peripheral area, 104 processing circuit, 105 transmission circuit, 110 bonding wire, 120 mounting board, 111 first main surface, 112 second main surface, 121 first layer, 122 second layer, 131 via, 132 insulator, 138 opening, 181, 182 first connector, 183, 184, 186 second connector, 185 bypass capacitor group, 187 circuit group, 201, 211 solder resist layer, 202, 204, 212, 214 wiring layer, 203, 205, 213, 215 insulating layer, 207 Core layer, 210, 220, 230 Adhesive part, 240 Bonding pad, 140 Frame, 141 First surface, 142 Second surface, 143 Third surface, 144 Fourth surface, 145 Fifth surface, 146 Sixth surface, 147 Positioning hole, 148 Mounting hole, 149 Screw, 150 Bracket, 160 Cover glass, 250, 257, 270 First flexible board, 251, 271 Signal line, 253, 273 Ground line, 255, 275 Dielectric layer, 260, 267 Second flexible board, 60 Board unit, 62 Board, 51 MPU, 52 ASIC, 53 Power supply unit, 88 Display unit

Claims

1. an imaging chip having an imaging region in which a plurality of photoelectric conversion elements that convert light into electric charges are arranged; a mounting substrate having a polygonal shape with at least a first side and a second side shorter than the first side, the mounting substrate having a first surface on which the imaging chip is arranged, and a second surface opposite to the first surface on which a first connector having a shape extending more in a second direction parallel to the second side than in a first direction parallel to the first side and a second connector having a shape extending more in the second direction than in the first direction are arranged; An imaging unit comprising:

2. 2. The imaging unit according to claim 1, The first connector and the second connector are spaced apart from each other in the first direction. Imaging unit.

3. 3. The imaging unit according to claim 2, electronic components including at least one of a resistor, a regulator, and a transistor are disposed on the second surface of the mounting substrate; Imaging unit.

4. 4. The imaging unit according to claim 3, the electronic component is disposed between the first connector and the second connector in the first direction; Imaging unit.

5. The imaging unit according to any one of claims 1 to 4, the first connector is electrically connected to a first flexible substrate; the second connector is electrically connected to a second flexible substrate; Imaging unit.

6. The imaging unit according to any one of claims 1 to 5, a frame disposed on the first surface of the mounting substrate so as to surround the imaging chip; Imaging unit.

7. 7. The imaging unit according to claim 6, The frame has a mounting portion for mounting another structure. Imaging unit.

8. 8. The imaging unit according to claim 6 or 7, The frame is formed from a resin. Imaging unit.

9. 8. The imaging unit according to claim 6 or 7, The frame is made of metal. Imaging unit.

10. 8. The imaging unit according to claim 6 or 7, The frame is formed of resin and metal. Imaging unit.

11. The imaging unit according to any one of claims 6 to 10, a light-transmitting substrate fixed to the frame; the imaging chip is disposed in a space formed by the mounting substrate, the frame, and the light-transmitting substrate; Imaging unit.

12. The imaging unit according to any one of claims 1 to 11, the imaging chip is fixed to the mounting substrate by an adhesive; Imaging unit.

13. 13. The imaging unit according to claim 12, The adhesive is a thermosetting adhesive. Imaging unit.

14. The imaging unit according to any one of claims 1 to 13, The mounting substrate is a multilayer core substrate having a core layer formed of a metal. Imaging unit.

15. The imaging unit according to any one of claims 1 to 13, The mounting substrate is a multilayer core substrate having a core layer formed of a resin. Imaging unit.

16. An imaging device comprising the imaging unit according to any one of claims 1 to 15.

17. 17. The imaging device according to claim 16, The imaging chip receives light emitted from a lens unit having an optical system. Imaging device.

18. 18. The imaging device according to claim 17, An imaging device comprising the lens unit.

Images