Multilayer ceramic capacitor and circuit board

By dispersing oxide particles in the via conductors of multilayer ceramic capacitors, particularly at the ends, the capacitors can handle high frequencies with reduced power consumption, addressing the issue of increased ESR and power consumption.

JP2025174325APending Publication Date: 2025-11-28TAIYO YUDEN KK
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Patent Information

Application Number
JP2024080590
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-05-17
Publication Date
2025-11-28

AI Technical Summary

Technical Problem

Multilayer ceramic capacitors with high metal oxide content at the ends of via conductors experience increased power consumption due to higher equivalent series resistance (ESR), which is a challenge for handling high-frequency signals.

Method used

Dispersing oxide particles that do not contain iron as a constituent element in the via conductors, with a higher volume fraction at the ends contacting terminal electrodes, reduces magnetic permeability and ESR, allowing the capacitors to handle high frequencies with reduced power consumption.

Benefits of technology

The solution enables multilayer ceramic capacitors to operate at higher frequencies while minimizing power consumption by reducing magnetic permeability and ESR, enhancing their performance in high-frequency applications.

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Abstract

To provide a multilayer ceramic capacitor which is capable of responding to high frequencies and of which the power consumption is suppressed, and a circuit board on which the multilayer ceramic capacitor is loaded.SOLUTION: A multilayer ceramic capacitor 100 comprises: a parallelepiped element assembly 10 including a plurality of via conductors 23a and 23b penetrating a ceramic layer 21 in a lamination direction of a laminate, having one end reaching a surface of a protection part 30 and electrically connected to an internal electrode 22; and a plurality of terminal electrodes 50a and 40b disposed on a surface of the element assembly and electrically connected with an end which reaches the surface of the protection part in each of the via conductors. Oxide particles which do not substantially contain iron as a constituent element are dispersed in the via conductor, and at least one of ends in contact with the terminal electrodes in the via conductor is an oxide segregation region where a volume percentage of the oxide particles is higher relative to an internal region of the via conductor which is positioned inside of the element assembly.SELECTED DRAWING: Figure 2
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Description

[Technical Field]

[0001] The present invention relates to a multilayer ceramic capacitor and a circuit board. [Background technology]

[0002] Integrated circuits (ICs) that operate at high frequencies, such as the central processing units (CPUs) and graphics processing units (GPUs) used in personal computers (PCs) and mobile phones, the accelerated processing units (APUs) that integrate these, and the neural processing units (NPUs) used in artificial intelligence (AI), use decoupling capacitors such as multilayer ceramic capacitors (MLCCs) as passive components to ensure smooth transmission of high-frequency signals.In recent years, as the speed of ICs has increased, electrical signals have become increasingly high-frequency, and so decoupling capacitors are also required to be able to handle high frequencies.

[0003] Patent Document 1 discloses a multilayer ceramic capacitor in which via conductors that electrically connect internal electrodes to each other and internal electrodes to external electrodes are formed from a material containing metal oxide, and the metal oxide content at the ends of the via conductors is higher than that at the center. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2008-078622 Summary of the Invention [Problem to be solved by the invention]

[0005] In the multilayer ceramic capacitor disclosed in Patent Document 1, the region with a high metal oxide content formed at the end of the via conductor accounts for a large proportion of the total length of the via conductor, which has the problem of increasing power consumption due to an increase in equivalent series resistance (ESR).

[0006] The present invention has been made to solve the above problems, and has an object to provide a multilayer ceramic capacitor that can handle high frequencies and has reduced power consumption, and a circuit board on which the multilayer ceramic capacitor is mounted. [Means for solving the problem]

[0007] The inventors conducted various studies to solve the above-mentioned problems and found that in a multilayer ceramic capacitor in which internal electrodes are electrically connected to each other through via conductors, the above-mentioned object can be achieved by dispersing oxide particles that do not substantially contain iron as a constituent element in the via conductors and selectively increasing the volume fraction of the oxide particles at the ends that contact the terminal electrodes, thereby completing the present invention.

[0008] That is, a first aspect of the present invention for solving the above-mentioned problem is a multilayer ceramic capacitor comprising: a laminate in which ceramic layers and internal electrodes mainly composed of metal are alternately stacked; a protective portion covering the surface of the laminate; and a rectangular parallelepiped element body having a plurality of via conductors arranged to penetrate the ceramic layers in the stacking direction of the laminate, at least one end of which reaches the surface of the protective portion and is electrically connected to the internal electrodes; and a plurality of terminal electrodes arranged on the surface of the element body and electrically connected to ends of the via conductors that reach the surface of the protective portion, wherein oxide particles that substantially do not contain iron as a constituent element are dispersed in the via conductors, and at least one of the ends of the via conductors that contact the terminal electrode is an oxide segregation region in which the volume percentage of the oxide particles is higher than that of any portion obtained by partitioning an internal region of the via conductor located inside the element body in the stacking direction of the laminate.

[0009] A second aspect of the present invention for solving the above problem is a circuit board on which the multilayer ceramic capacitor according to the first aspect is mounted. [Effects of the Invention]

[0010] According to the present invention, it is possible to provide a multilayer ceramic capacitor that is capable of handling high frequencies and has reduced power consumption, and a circuit board on which the multilayer ceramic capacitor is mounted. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is a schematic view (perspective view) showing the structure of a multilayer ceramic capacitor according to a first embodiment of the present invention. [Figure 2] 2 is a cross-sectional view taken along line AA (LT cross-sectional view) in FIG. 1. [Figure 3] FIG. 10 is a diagram illustrating a procedure for determining whether oxide particles that do not substantially contain iron as a constituent element are dispersed in a via conductor, and whether at least one of the ends of the via conductor that contact the terminal electrode is an oxide segregation region, using a mapping image of oxygen concentration in a cross section parallel to the stacking direction of a multilayer ceramic capacitor, and a procedure for determining the volume percentage of oxide particles in each region of the via conductor. [Figure 4] FIG. 10 is a diagram for explaining a procedure for calculating the volume percentage of oxide particles that are dispersed in the base conductor of a terminal electrode and that do not substantially contain iron as a constituent element, using a mapping image of oxygen concentration in a cross section parallel to the stacking direction of a multilayer ceramic capacitor. [Figure 5] FIG. 4 is a schematic view (LT cross-sectional view) showing the structure of a multilayer ceramic capacitor according to a second embodiment of the present invention. [Figure 6] FIG. 10 is a schematic view (LT cross-sectional view) showing the structure of a multilayer ceramic capacitor according to a third embodiment of the present invention. [Figure 7] FIG. 10 is a schematic view (perspective view) showing the structure of a multilayer ceramic capacitor according to a fourth embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0012] The configuration and effects of the present invention will be described below, along with the technical concept, with reference to the drawings. However, the mechanism of action includes assumptions, and the correctness of such assumptions does not limit the present invention.

[0013] [Multilayer ceramic capacitors] First Embodiment An embodiment of a multilayer ceramic capacitor according to a first aspect of the present invention is shown in FIGS. 1 and 2 as a first embodiment. The multilayer ceramic capacitor 100 according to the first embodiment has a rectangular parallelepiped shape and includes a pair of faces perpendicular to each of three mutually orthogonal axes, i.e., the L-axis, which is the length direction, the W-axis, which is the width direction, and the T-axis, which is the height direction. The rectangular parallelepiped is not limited to a mathematically defined rectangular parallelepiped, and may have any shape that is recognized as a rectangular parallelepiped when observed as a whole. Therefore, a rectangular parallelepiped in the present disclosure also includes a capacitor with slightly rounded edges or corners, a capacitor with slightly curved edges, and a capacitor with curved faces with a small curvature. The length (L), width (W), and height (T) dimensions of the ceramic capacitor 100 can each independently take any value.

[0014] The dimensions of the multilayer ceramic capacitor 100 are, for example, an L-direction dimension of 200 μm to 2000 μm, a W-direction dimension of 100 μm to 2000 μm, and a T-direction dimension of 30 μm to 220 μm, with a value W / L (the ratio of the W-direction dimension to the L-direction dimension) of 0.3 to 1.0. It is preferable that the L-direction dimension be 400 μm to 1200 μm, the W-direction dimension be 400 μm to 1200 μm, and the T-direction dimension be 40 μm to 150 μm, with a value W / L (the ratio of the W-direction dimension to the L-direction dimension) of 0.4 to 1.0. It is more preferable that the T-direction dimension be 100 μm or less, as this is less subject to design constraints on the circuit board on which it is mounted.

[0015] 2 (LT cross section), the multilayer ceramic capacitor 100 according to the first embodiment includes a laminate 20 in which ceramic layers 21 made of ceramic and internal electrodes 22 mainly composed of metal are alternately stacked in the T direction, and an element body 10 having a protective part 30 covering the surface of the laminate 20. The internal electrodes 22 include internal electrodes 22a of one polarity that are electrically connected to each other, and internal electrodes 22b of a polarity different from that of the internal electrodes 22a that are electrically connected to each other.

[0016] A protective portion 30 is arranged on the surface of the element body 10, covering the surface of the laminate 20. The protective portion 30 includes a cover portion 31 arranged on a plane perpendicular to the T direction, and margin portions 32 arranged on a plane perpendicular to the W direction and a plane perpendicular to the L direction, respectively.

[0017] The element body 10 has a plurality of via conductors 23 that are arranged to penetrate the ceramic layers 21 in the stacking direction of the laminate 20, with at least one end reaching the surface of the protective part 30 (cover part 31) and electrically connected to the internal electrodes 22. The via conductors 23 include a via conductor 23a electrically connected to the internal electrode 22a and a via conductor 23b electrically connected to the internal electrode 22b. Note that although the multilayer ceramic capacitor 100 shown in FIGS. 1 and 2 includes two via conductors 23, the number of via conductors in the multilayer ceramic capacitor according to the first aspect of the present invention is not limited to this.

[0018] Oxide particles 231 that are substantially free of iron as a constituent element are dispersed in the via conductors 23 (23a, 23b), and at least one of the ends of the via conductors 23 (23a, 23b) that contact the terminal electrode 40 described below forms an oxide segregation region in which the volume percentage of the oxide particles 231 is higher than any other portion obtained by dividing the internal region of the via conductors 23 (23a, 23b) located inside the element body 10 in the stacking direction of the laminate 20. This enables the multilayer ceramic capacitor 100 to handle high frequencies and has reduced power consumption. This is presumably because the oxide particles 231, which have a lower magnetic permeability than the material forming the via conductors 23 (23a, 23b), are present in high concentration at the ends of the via conductors 23 (23a, 23b) that contact the terminal electrode 40, reducing the magnetic permeability at those ends and reducing the inductance in the high frequency range, thereby increasing the self-resonant frequency of the multilayer ceramic capacitor 100. At the same time, the region where the oxide particles 231 with low conductivity are present in high concentration is narrowly limited, thereby suppressing an increase in ESR. Details of the constituent materials, shape, and dispersion mode of the via conductors 23 (23a, 23b) and the oxide particles 231 dispersed therein will be described later.

[0019] The multilayer ceramic capacitor 100 according to the first embodiment is provided with a plurality of terminal electrodes 40 arranged at least on a mounting surface 11, which is the surface that faces the circuit board when mounted on the circuit board, among the surfaces that form the surface of the element body 10. The terminal electrodes 40 include a terminal electrode 40a electrically connected to the via conductor 23a and a terminal electrode 40b electrically connected to the via conductor 23b. While the multilayer ceramic capacitor 100 shown in FIGS. 1 and 2 includes two terminal electrodes 40, the number of terminal electrodes in the multilayer ceramic capacitor according to the first aspect of the present invention is not limited to this. Furthermore, although the multilayer ceramic capacitor 100 shown in FIGS. 1 and 2 has terminal electrodes 40 formed only on the mounting surface 11, the multilayer ceramic capacitor according to the first aspect of the present invention may also have terminal electrodes formed on the surface facing the mounting surface.

[0020] The thickness of the element body 10, obtained by subtracting the thickness of the terminal electrodes 40 (40a, 40b) from the T-direction dimension of the multilayer ceramic capacitor 100 described above, is, for example, 20 μm to 200 μm, and preferably 30 μm to 180 μm.

[0021] Hereinafter, each component constituting the multilayer ceramic capacitor 100 according to the first embodiment will be described in detail.

[0022] (ceramic layer) The ceramic layer 21 is made of ceramic. The ceramic composition is not particularly limited as long as it forms a dense ceramic layer 21 by co-firing with the internal electrodes 22 described later, and may be appropriately selected depending on the properties required for the multilayer ceramic capacitor. Examples of ceramic compositions include those containing barium titanate (BaTiO3) as the main component, those containing strontium titanate (SrTiO3) as the main component, and those containing BaTiO3 having a perovskite structure. 1-x-y Ca x Sr y Ti 1-z Zr z Examples of such ceramics include those containing O3 as a main component. The ceramic may contain an additive element in addition to the main component. Examples of the additive element include at least one selected from Mo, Nb, Ta, W, Mg, Mn, V, Cr, rare earth elements (Y, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, and Yb), and Co, Ni, Li, B, Na, K, and Si. The additive element may be contained as a simple element or in the form of a compound such as an oxide, nitride, or carbide. The additive element may exist in a solid solution state in the main component, or may form a different phase from the elements constituting the main component or other additive elements.

[0023] (Internal electrode) The internal electrodes 22 (22a, 22b) are primarily composed of a metal. The type of metal is not particularly limited, and nickel (Ni), copper (Cu), palladium (Pd), platinum (Pt), silver (Ag), gold (Au), and alloys thereof can be used. Among these, nickel (Ni) is preferred as the primary element because of its high heat resistance, which allows the firing temperature to be increased when co-firing with the ceramic layer 21 to form a dense ceramic layer 21, and it is relatively inexpensive. Here, the term "primary element" as used herein refers to the element with the highest content expressed in atomic percentage (atomic %).

[0024] The internal electrodes 22 (22a, 22b) may contain, in addition to metal, ceramic particles having the same composition as the ceramic constituting the ceramic layer 21, or a glass component.

[0025] (Protection Department) The protective part 30 has a function of protecting the ceramic layers 21 and the internal electrodes 22. The material of the protective part 30 is not limited as long as it has high electrical insulation and low permeability to deterioration factors such as moisture. From the viewpoints of making shrinkage during firing when manufacturing the multilayer ceramic capacitor 100 uniform and alleviating internal stress within the multilayer ceramic capacitor 100, it is preferable that the main component of the protective part 30 be the same as the ceramic that forms the ceramic layers 21.

[0026] (Via conductor) Like the internal electrodes 22 (22a, 22b), the via conductors 23 (23a, 23b) are primarily composed of metal. Usable metals include those similar to those of the internal electrodes 22 (22a, 22b) described above. The composition of the via conductors may be different from that of the internal electrodes 22 (22a, 22b), but is preferably the same as that of the internal electrodes 22 (22a, 22b). By making the via conductors (23a, 23b) and the internal electrodes 22 (22a, 22b) the same composition, the magnitude of shrinkage caused by firing during manufacturing of the multilayer ceramic capacitor 100 is uniform, suppressing deformation, and the resistivity of the conductive paths of the multilayer ceramic capacitor 100 is uniform, suppressing localized heat generation during use.

[0027] The dimensions of the via conductors 23 (23a, 23b) in the directions perpendicular to the stacking direction of the laminate 20 (L direction and W direction) are not particularly limited, but in order to ensure the capacity of the laminated ceramic capacitor 100 while reducing electrical resistance and suppressing heat generation during circuit operation, it is preferable to make the dimensions 5 μm or more and 100 μm or less, and more preferably 10 μm or more and 50 μm or less.

[0028] As described above, oxide particles 231 that do not substantially contain iron as a constituent element are dispersed within the via conductors 23 (23a, 23b), and at least one of the ends that contact the terminal electrodes 40 (40a, 40b) is an oxide segregation region in which the volume percentage of the oxide particles 231 is higher than any part of the internal region of the via conductors 23 (23a, 23b) located inside the base body 10 divided in the stacking direction of the laminate 20.

[0029] By making the oxide particles 231 substantially free of iron as a constituent element, the magnetic permeability can be reduced, and the magnetic permeability of the via conductors 23 (23a, 23b) containing the oxide particles 231 can be reduced, making it possible to use the multilayer ceramic capacitor 100 at higher frequencies. The oxide constituting the oxide particles 231 is not particularly limited, and examples thereof include oxides of single elements such as silicon oxide (SiO2), aluminum oxide (Al2O3), titanium oxide (TiO2), and zirconium oxide (ZrO2), as well as oxides of barium titanate (BaTiO3), calcium titanate (CaTiO3), strontium titanate (SrTiO3), and oxides of the composition formula BaTiO3. 1-x-y Ca x Sr y Ti 1-z Zr zExamples of the oxide 231 include composite oxides such as oxides represented by O3. The oxide 231 may be crystalline or amorphous. The oxide 231 may also be a so-called glass, including glass-forming oxides and glass-modifying oxides. Preferred oxides include those having the same composition as the ceramic forming the ceramic layer 21, because this allows the shrinkage behavior of the via conductors 23 (23a, 23b) during firing during production to be closer to the shrinkage behavior of the ceramic layer 21.

[0030] The particle diameter of the oxide particles 231 may be set appropriately depending on the dimensions of the via conductors 23 (23a, 23b), particularly the dimensions in the directions (L direction and W direction) perpendicular to the stacking direction of the laminate 20. As an example, the particle diameter distribution range is 0.01 μm or more and 5 μm or less, and the average particle diameter is 0.1 μm or more and 3 μm or less. Here, the particle diameter of the oxide particles 231 is calculated by dividing the length of the longest line segment connecting any two points located on the periphery of each oxide particle 231 confirmed in an oxygen concentration mapping image of a cross section parallel to the stacking direction of the multilayer ceramic capacitor described below by the observation magnification of the mapping image.

[0031] At least one of the ends of the via conductors 23 (23a, 23b) that contact the terminal electrodes is an oxide segregation region, which enables the multilayer ceramic capacitor 100 to handle high frequencies and suppress power consumption. As described above, this is presumably because oxide particles 231, which have a lower magnetic permeability than the material forming the via conductors 23 (23a, 23b), are present in high concentration at the ends of the via conductors 23 (23a, 23b) that contact the terminal electrodes 40 (40a, 40b). This reduces the magnetic permeability of the ends and reduces inductance in the high-frequency range, thereby increasing the self-resonant frequency of the multilayer ceramic capacitor 100 and suppressing an increase in ESR by narrowing the region where the oxide particles 231 with low conductivity are present in high concentration.

[0032] The volume percentage V of the oxide particles 231 in the oxide segregation region e The value of V is preferably 30% or more and 70% or less.e When the value of V is 30% or more, the decrease in magnetic permeability of the via conductors 23 (23a, 23b) becomes significant, and the multilayer ceramic capacitor 100 can handle higher frequencies. e By making the value of V 70% or less, the decrease in conductivity of the via conductors 23 (23a, 23b) and the resulting increase in ESR of the multilayer ceramic capacitor 100 are suppressed. e The lower limit of V is more preferably 35% or more, and even more preferably 40% or more. e The upper limit of Ve is preferably 65% ​​or less, and more preferably 60% or less. From these points of view, the value of Ve is more preferably 35% or more and 65% or less, and even more preferably 40% or more and 60% or less.

[0033] Here, the determination of whether oxide particles 231 substantially free of iron as a constituent element are dispersed in the via conductors 23 (23a, 23b), whether at least one of the ends of the via conductors 23 (23a, 23b) that contact the terminal electrodes 40 (40a, 40b) forms an oxide segregation region, and the determination of the volume percentage of the oxide particles 231 in each of the oxide segregation region and the internal region are performed by the following procedures. First, a surface perpendicular to the mounting surface 11 of the multilayer ceramic capacitor 100, i.e., the surface that faces the circuit board when mounted on the circuit board, is ground to expose the via conductors 23a. Grinding is performed up to the vicinity of the center of gravity of the figure obtained by projecting the via conductors 23a onto the mounting surface 11. At this time, grinding may be performed on the multilayer ceramic capacitor 100 embedded in resin. Next, the ground surface where the via conductors 23a are exposed is observed using a scanning electron microscope (SEM) equipped with an energy dispersive X-ray spectrometer (EDS) or a wavelength dispersive X-ray spectrometer (WDS). The analysis area is determined to include the boundary between an arbitrarily selected via conductor 23a and the adjacent laminate 20, the internal electrodes 22 (22a, 22b), and the terminal electrode 40a in contact with the via conductor 23a and the surface of the element body 10 on which it is formed. Next, the analysis area is subjected to area analysis using EDS or WDS to obtain mapping images of oxygen and iron concentrations. Next, as shown in FIG. 3, the obtained mapping image of oxygen concentration reveals multiple areas of locally high oxygen concentration in the via conductor 23a, and the iron concentration mapping image (not shown) reveals no iron in these areas. Based on this, it is determined that oxide particles 231 that do not substantially contain iron as a constituent element are dispersed in the via conductor 23a. Next, as shown in FIG. 3, in the oxygen concentration mapping image, a line segment h e , and line segment h e is parallel to the line segment h e Two line segments h whose distance from the center is 1.5 μm e1 and h e2 At this time, construct the line segment h e The line segment located on the opposite side of the laminate 20 is the line segment h e1Let us consider the line segment h e The line segment located on the laminated body 20 side is the line segment h e2 Next, in the mapping image of the oxygen concentration, the line segment h e2 is parallel to the line segment h e2 For line segment h e is located on the opposite side of the line segment h e2 The distance from the line segment h is 1.5 μm. i Next, in the oxygen mapping image, the line segment h i For line segment h e On the opposite side, at a distance equivalent to 3.0 μm, there is a line segment h i A line segment h parallel to i1 , line segment h i2 , and line segment h in At this time, the line segment h in is the line segment h of the internal electrode 22 (22a, 22b). e If the line segment with the overlapping part is not drawn, the line segment h e The line segment h shown in FIG. 3 is the first line segment drawn beyond the inner electrode 22 (22a, 22b) that is the furthest from the inner electrode 22. in The latter case applies. Next, in the oxygen concentration mapping image, line segments v1 and v2 are drawn to define the boundary between the ceramic layer 21, which is displayed as a region with a high oxygen concentration, and the via conductor 23a, which is displayed as a region with a low oxygen concentration. e When drawing the line segments v1 and v2, if the boundary between the surface of the element body 10 and the ceramic layer 21 and the via conductor 23a observed in the image forms a curve or a polygonal line, the curve or polygonal line is linearly approximated to form the line segments. e1 , line segment h e2 The rectangular area surrounded by the line segments v1 and v2 is the end of the via conductor 23a that contacts the terminal electrode 40a. i , line segment h i(n-1)The rectangular region surrounded by the line segments v1 and v2 is defined as the internal region of the via conductor 23a. Next, the oxygen concentration mapping image is analyzed using image analysis software, and the area ratio of the oxide particles 231 is calculated for the region defined as the end portion. The value obtained for the region defined as the end portion is defined as V. e Furthermore, by a similar analysis using image analysis software, it was found that the line segment h i and line segment h i1 The area between the line segment h i1 and line segment h i2 The area between , and the line segment h i(n-2) and line segment h i(n-1) The area ratio of the oxide particles 231 was calculated for each of the regions between i1 , V i2 , ···, and V i(n-1) The average value of these is V i The image analysis software to be used is not limited as long as it can calculate the area or ratio of a region having a specific hue within the region to be analyzed, and for example, Image J can be used. Next, V e And, V i1 , V i2 , ···, and V i(n-1) In both comparisons, V e The end portion is determined to be an oxide segregation region when the difference between the polarity of the via conductor 23a and the oxide segregation region is large. Although the above procedure is performed in the vicinity of the via conductor 23a, it goes without saying that the procedure may also be performed in the vicinity of the via conductor 23b, which has a different polarity.

[0034] (terminal electrode) The material of the terminal electrodes 40 (40a, 40b) is not limited as long as it is conductive, and examples of the material include metals such as nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), silver (Ag), and gold (Au), alloys containing any of these as a main component, and conductive resins.

[0035] The terminal electrodes 40 (40a, 40b) may have an underlying conductor 41 in contact with the element body 10 and a plated conductor 42 formed on the surface of the underlying conductor 41. The terminal electrodes 40 (40a, 40b) having such a structure can improve adhesion to the element body 10 by the underlying conductor 41, and can improve solder wettability by the plated conductor 42 when mounted on a circuit board.

[0036] Ni is an example of the material of the underlying conductor 41. The thickness of the underlying conductor 41 can be set to 0.1 μm or more and 10 μm or less, and preferably 0.5 μm or more and 5 μm or less.

[0037] The plated conductor 42 may be formed of a single layer or multiple layers. When the plated conductor 42 is formed of multiple layers, the number of layers is preferably two to four. An example of the material and structure of the plated conductor 42 is one formed of Cu, Ni, and Sn in this order. The thickness of the plated conductor 42 can be 1 μm to 20 μm, and preferably 3 μm to 10 μm.

[0038] The base conductor 41 may have the oxide particles 231 dispersed therein, or may not have the oxide particles 231 therein. In either case, the volume percentage V of the oxide particles 231 is g is the average volume percentage V of oxide particles in the inner region mentioned above. i In contrast, V g <V i That is, it is preferable that the volume percentage V of the oxide particles 231 present in the underlying conductor 41 is satisfied. g However, the average volume percentage V of the oxide particles 231 in the inner region of the via conductor 23 (23a, 23b) i It is preferable that the V is lower than 0.05. This improves the plating adhesion to the base conductor 41 during manufacturing and the adhesion strength between the base conductor 41 and the plated conductor 42. This is presumably because the oxide particles 231, which have low plating adhesion, are prevented from being exposed to the surface of the base conductor 41. From the viewpoint of improving the plating adhesion and adhesion strength, the V gThe value of V is the volume percentage of the oxide particles 231 in each part of the internal region of the via conductor 23 (23a, 23b) described above. i1 , V i2 , ···, and V i(n-1) It is more preferable that the value is smaller than either of the above.

[0039] Here, the volume percentage V of the oxide particles 231 contained in the underlying conductor 41 g is determined by the following procedure: First, a mapping image of the oxygen concentration is obtained in the same procedure as in the case of determining whether or not oxide particles 231 that do not substantially contain iron as a constituent element are dispersed in the via conductors 23 (23a, 23b) and whether or not at least one of the ends in contact with the terminal electrodes 40 (40a, 40b) is an oxide segregation region, and in the mapping image, a line segment h e and line segment h e1 In addition, an SEM image or a metal element mapping image is obtained, which is measured in the same region as the oxygen concentration mapping image and allows for distinction between the underlying conductor 41 and the plated conductor 42. Next, with reference to the SEM image or the metal element mapping image, a boundary line b between the underlying conductor 41 and the plated conductor 42 is drawn in the oxygen concentration mapping image, as shown in FIG. 4. Then, a line segment h e1 The region surrounded by boundary line a and boundary line b is defined as the underlying conductor 41. Next, the mapping image of the oxygen concentration is analyzed using image analysis software to calculate the area ratio of the oxide particles 231 in the region defined as the underlying conductor 41, and the obtained value is defined as V g Let's say.

[0040] <Second embodiment> In another embodiment (second embodiment) of the multilayer ceramic capacitor according to the first aspect of the present invention, the dimensions of the via conductors in the directions perpendicular to the stacking direction of the laminate (L direction and W direction) are larger in the oxide segregation region than in the internal region in a cross section parallel to the stacking direction of the laminate. An example of a multilayer ceramic capacitor according to the second embodiment is shown in FIG. 5 . In a multilayer ceramic capacitor 200, the cross-sectional area of ​​the via conductors 23 (23a, 23b) is increased at the ends in contact with the terminal electrodes 40 (40a, 40b), where the resistivity is high due to a high proportion of oxide particles 231. This suppresses an increase in resistance. This significantly reduces power consumption. In the multilayer ceramic capacitor according to the second embodiment, in addition to the via conductors having a trapezoidal shape in a cross section parallel to the stacking direction of the laminate as shown in FIG. 5 , the dimensions of the via conductors in the L direction and W direction in a cross section parallel to the stacking direction of the laminate may be larger at both ends in the stacking direction of the laminate than at the center in the stacking direction. It should be noted that the trapezoid in this disclosure is not limited to a mathematically defined trapezoid, but may be any shape that is recognized as a trapezoid when the entire cross section is observed. For this reason, trapezoids with slightly rounded vertices, slightly curved sides, and trapezoids with upper and lower bases that are slightly deviated from parallelism also fall under the category of rectangular parallelepipeds in this disclosure.

[0041] <Third embodiment> In another embodiment (third embodiment) of the multilayer ceramic capacitor according to the first aspect of the present invention, the internal electrodes are drawn out to a surface perpendicular to the mounting surface, and external electrodes are disposed on the surfaces (drawn-out surfaces) to which the internal electrodes are drawn out, and the internal electrodes are also electrically connected via the external electrodes. An example of a multilayer ceramic capacitor according to the third embodiment is shown in FIG. 6. Note that FIG. 6 shows an example in which two opposing surfaces are drawn out as drawn-out surfaces 12, but the number of drawn-out surfaces is not limited to this. Also, FIG. 6 shows an example in which terminal electrodes 40 (40a, 40b) extending to the drawn-out surfaces 12 form external electrodes 50 (50a, 50b), but the external electrodes 50 (50a, 50b) may be formed separately from the terminal electrodes 40 (40a, 40b). In the multilayer ceramic capacitor 300, the current flowing through the internal electrodes 22 (22a, 22b) is divided between the via conductors 23 (23a, 23b) and the external electrodes 50 (50a, 50b), thereby reducing the current flowing through each of the via conductors 23 (23a, 23b) and the external electrodes 50 (50a, 50b). This reduces heat generation during operation.

[0042] <Fourth embodiment> In another embodiment (fourth embodiment) of the multilayer ceramic capacitor according to the first aspect of the present invention, the number of terminal electrodes arranged on the mounting surface is four or more, and each of the terminal electrodes has a polarity opposite to that of the nearest terminal electrode on the mounting surface. An example of the multilayer ceramic capacitor according to the fourth embodiment is shown in FIG. 7. Note that FIG. 7 shows an example in which the number of terminal electrodes 40 arranged on the mounting surface 11 is four, but the number of terminal electrodes arranged on the mounting surface is not limited to this. In the multilayer ceramic capacitor 400, the directions of currents flowing through via conductors (not shown) electrically connected to each terminal electrode 40 (40a, 40b) are opposite to those of the nearest conductors, so that magnetic fields generated by the currents cancel each other out, thereby reducing the equivalent series inductance (ESL). The above-mentioned effects are remarkable when the multilayer ceramic capacitor 400 has two pairs of surfaces that are parallel to the stacking direction of the laminate and face each other, and when the distance between one pair, i.e., the L-direction dimension, is L μm and the distance between the other pair, i.e., the W-direction dimension, is W μm (where L≧W), and when the value of W / L, which is the ratio of W to L, is 0.8 or more and 1 or less, i.e., when the mounting surface 11 has a shape that is close to a square.

[0043] [Manufacturing method for multilayer ceramic electronic components] The multilayer ceramic capacitor according to the first aspect of the present invention can be manufactured by the procedure described below.

[0044] (A) Preparation of ceramic powder First, ceramic powder is prepared. Commercially available ceramic powders can be used as appropriate. When producing ceramic powder in-house, various raw material powders containing the constituent elements are mixed in a predetermined ratio and pre-fired (calcined). When mixing the various raw material powders in a predetermined ratio, various additives such as the above-mentioned additive elements and sintering aids may be further added, or these various additives may be further added to the powder after calcination.

[0045] (B) Preparation of raw sheets Next, the ceramic powder is mixed with a binder and a dispersion medium to prepare a slurry, and the slurry is formed into a sheet to obtain a green sheet.

[0046] The binder used should be one that can maintain the shape of the green sheet and volatilizes without leaving behind carbon or other residues during the binder removal process prior to firing. Examples of binders that can be used include polyvinyl alcohol, polyvinyl butyral, cellulose, urethane, and vinyl acetate. There are no particular restrictions on the amount of binder used, but since it will be removed in a later process, it is preferable to use as little as possible within the range that achieves the desired formability and shape retention, in order to reduce raw material costs.

[0047] The dispersion medium used is one that does not cause aggregation of the calcined powder and binder and can be easily removed by volatilization or the like after forming into a green sheet, as described below. Examples of the dispersion medium that can be used include water and alcohol-based solvents.

[0048] Components for adjusting the properties of the slurry, such as dispersants, plasticizers, and thickeners, may be added to the slurry.

[0049] The method for mixing the mixed powder with the binder and the dispersion medium is not particularly limited as long as the components are mixed uniformly while preventing the inclusion of impurities. One example is ball mill mixing.

[0050] The prepared slurry can be formed into a sheet to obtain a green sheet by a commonly used method such as a doctor blade method or a die coating method.

[0051] ((C) Formation of internal electrode pattern) Next, an internal electrode pattern containing metal is formed on the green sheet. The internal electrode pattern can be formed by printing or applying an internal electrode paste in a predetermined pattern, or by forming a metal film in a predetermined pattern by vapor deposition or sputtering. The internal electrode pattern is formed with a sufficient margin to ensure electrical insulation with via conductor patterns that will be formed later and that will not come into contact with the via conductor patterns. This margin forms the internal electrode portion facing portion in the element body obtained after firing, which will be described later.

[0052] When forming an internal electrode pattern using an internal electrode paste, the internal electrode paste used is obtained by mixing metal particles and a vehicle in a triple roll mill. The internal electrode paste may contain glass frit and ceramic powder in addition to the above-mentioned components.

[0053] The type and amount of binder and solvent contained in the vehicle used are not limited, and may be selected appropriately taking into consideration the viscosity of the internal electrode paste, ease of handling, compatibility with the green sheet, and the like.

[0054] The internal electrode paste can be printed on the green sheet using, for example, a screen mask on which a predetermined internal electrode pattern is formed. When printing, a space may be left to become a margin when the multilayer ceramic capacitor is completed.

[0055] (D) Preparation of green laminate Next, a predetermined number of green sheets on which the internal electrode patterns have been formed are stacked and the green sheets are pressure-bonded together to obtain a green laminate. The stacking and pressure-bonding can be performed by a conventional method, such as pressing the stacked green sheets together in the stacking direction while heating them, and thermo-compression bonding by the action of a binder.

[0056] During lamination and compression bonding, a green sheet that will become a cover when the multilayer ceramic capacitor is completed may be added to the end portion in the lamination direction. In this case, the green sheet to be added may have the same composition as the green sheet on which the internal electrode pattern is printed, or a different composition. From the viewpoint of making the shrinkage rate during firing uniform, it is preferable that the composition of the green sheet to be added is the same as or similar to the green sheet on which the above-mentioned internal electrode precursor is arranged.

[0057] (E) Formation of holes for via conductors Next, holes for via conductors are formed in the raw laminate. The formed holes may penetrate the raw laminate or may have one end located within the raw laminate. Conventional methods such as drilling or lasering can be used to form the holes. Among these, the use of a laser is preferred because it can form a smooth processed surface. When forming via conductors in which the dimension of the oxide segregation region in a cross section parallel to the stacking direction of the laminate in a direction perpendicular to the stacking direction of the laminate is larger than that of the internal region, the direction (angle) of the drill or laser can be changed to process the holes larger near the surface of the raw laminate.

[0058] ((F) Formation of via conductor pattern) Next, after injecting the conductor paste into the holes for the via conductors, the ends of the via conductor paste are coated with an oxide particle source containing oxide particles or a material that generates oxide particles upon firing, as described below, to form a via conductor pattern. Commonly used methods, such as squeegee printing using a metal mask or a syringe, can be used to inject the conductor paste into the holes. Among these, squeegee printing using a metal mask is preferred because of its excellent ability to fill small-diameter holes. The components of the conductor paste can be the same as those of the internal electrode paste described above, and the amounts of each component can be determined taking into account the injectability into the holes. When coating the ends of the via conductor paste with the oxide particle source, methods such as applying or printing a paste containing oxide particles or a material that generates oxide particles upon firing, or applying these materials by physical vapor deposition, such as evaporation or sputtering, can be used.

[0059] ((G) Formation of terminal electrode pattern) Next, a terminal electrode pattern is formed to cover the via conductor pattern exposed on the surface of the green laminate. A green sheet that will serve as a cover when the laminate is completed as a multilayer ceramic capacitor may be crimped onto the surface where the terminal electrode pattern is not formed, covering the via conductor pattern. The terminal electrode pattern can be formed by printing or applying a terminal electrode paste, or by forming a metal film by vapor deposition or sputtering. The terminal electrode pattern may be formed using a mask with a predetermined pattern, or by forming a paste film or metal film on the entire mounting surface of the green laminate and then removing the portions other than the terminal electrode pattern. Face milling, barrel polishing, or other methods can be used to remove the portions other than the terminal electrode pattern. When a terminal electrode paste is used to form the terminal electrode pattern, the components thereof can be the same as those of the internal electrode paste described above. The blending amounts of each component can be determined so as to obtain a uniform pattern with a predetermined thickness.

[0060] (H) Preparation of pre-fired chips Next, the green laminate is divided into individual pieces to obtain pre-fired chips. For the division, a commonly used means such as a dicing saw or a laser cutting machine can be used. After dividing the green laminate into individual pieces to form surfaces on which the internal electrode precursors are exposed, the surfaces may be coated with a material for forming margins to obtain pre-fired chips.

[0061] (I) Removal of binder Next, the resulting pre-fired chips are heated to volatilize and remove the binder. The heating conditions can be set appropriately taking into account the volatilization temperature and content of the binder. For example, the chips are held in a nitrogen (N2) atmosphere at a temperature of 200 to 500°C for 5 to 20 hours.

[0062] (J) Firing of pre-fired chips Next, the pre-fired chip from which the binder has been removed is heated to a predetermined temperature and fired. During firing, oxide particles diffuse from the oxide particle source toward the via conductor pattern, forming regions with a locally high volume percentage of oxide particles near the terminal electrodes. When setting firing conditions, it is preferable to consider the sinterability of the ceramic powder and the heat resistance and oxidation resistance of the metals contained in the internal electrode pattern, via conductor pattern, and terminal electrode pattern. Examples of firing conditions include holding the chip in a reducing atmosphere containing a mixture of nitrogen (N), hydrogen (H), and water vapor (H2O) at a temperature of 1100°C to 1400°C for 10 minutes to 2 hours. After firing, a reoxidation treatment may be performed in a nitrogen (N2) gas atmosphere or a low-oxygen atmosphere at a temperature of 600°C to 1000°C.

[0063] The sintered body thus obtained may be used as a multilayer ceramic capacitor as it is, or may be used as a multilayer ceramic capacitor after forming a conductive layer on the surface of the terminal electrode pattern by plating.

[0064] [Circuit board] A circuit board according to a second aspect of the present invention is equipped with the multilayer ceramic capacitor according to the first embodiment. Because the multilayer ceramic capacitor is capable of handling high frequencies and has reduced power consumption, this circuit board is capable of handling high frequencies, reduces heat generation during operation, and has excellent energy-saving performance.

[0065] This specification also discloses the following techniques.

[0066] (Appendix 1) a laminate in which ceramic layers formed of ceramic and internal electrodes mainly composed of metal are alternately stacked; a protective portion covering the surface of the laminate; and a plurality of via conductors arranged to penetrate the ceramic layers in the stacking direction of the laminate, at least one end of which reaches the surface of the protective portion and is electrically connected to the internal electrodes; A rectangular parallelepiped element having the following structure: a plurality of terminal electrodes disposed on the surface of the element body and electrically connected to ends of the via conductors that reach the surface of the protection portion; Equipped with oxide particles that do not substantially contain iron as a constituent element are dispersed in the via conductor; and At least one of the ends of the via conductor that contacts the terminal electrode is an oxide segregation region that is higher than any part of the internal region of the via conductor located inside the element body in the stacking direction of the laminate. Multilayer ceramic capacitor.

[0067] (Appendix 2) The multilayer ceramic capacitor according to (Appendix 1), wherein the oxide segregation region has a dimension in a direction perpendicular to the stacking direction of the laminate in a cross section parallel to the stacking direction of the laminate that is larger than that of the internal region.

[0068] (Appendix 3) The multilayer ceramic capacitor according to (Supplementary Note 2), wherein the via conductor has a trapezoidal cross section parallel to the stacking direction of the laminate.

[0069] (Appendix 4) The volume percentage V of the oxide particles in the oxide segregation region e The multilayer ceramic capacitor according to any one of (Appendix 1) to (Appendix 3), wherein is 40% or more and 70% or less.

[0070] (Appendix 5) The terminal electrode includes an underlying conductor in contact with the element body and a plated conductor covering the underlying conductor, and the volume percentage of the oxide particles dispersed in the underlying conductor is V g and the average volume percentage of the oxide particles in the inner region is V i When V g <V i The multilayer ceramic capacitor according to any one of (Appendix 1) to (Appendix 4), which satisfies the above.

[0071] (Appendix 6) The multilayer ceramic capacitor according to any one of (Appendix 1) to (Appendix 5), wherein the dimension in the lamination direction is 100 μm or less.

[0072] (Appendix 7) A circuit board on which the multilayer ceramic capacitor according to any one of (Appendix 1) to (Appendix 6) is mounted. [Industrial Applicability]

[0073] According to the present invention, it is possible to provide a multilayer ceramic capacitor capable of handling high frequencies and having reduced power consumption. Such a multilayer ceramic capacitor is useful in that it can be applied to high-frequency circuits, generates less heat when the circuit is operating, and has excellent energy-saving performance. [Explanation of symbols]

[0074] 100, 200, 300, 400 Multilayer ceramic capacitors 10 Base 11 Mounting surface 12 Drawer surface 20 laminate 21 ceramic layer 22(22a, 22b) Internal electrode 23(23a, 23b) Via conductor 231 Oxide particles (substantially not containing iron as a constituent element) 30 Protection Department 31 Cover 32 Margin 40(40a, 40b) terminal electrode 41 Undercoat conductor 42 Plated conductor 50(50a, 50b) External electrode

Claims

1. a laminate in which ceramic layers formed of ceramic and internal electrodes mainly composed of metal are alternately stacked; a protective portion covering the surface of the laminate; and a plurality of via conductors arranged to penetrate the ceramic layers in the stacking direction of the laminate, at least one end of which reaches the surface of the protective portion and is electrically connected to the internal electrodes; A rectangular parallelepiped element having the following structure: a plurality of terminal electrodes disposed on the surface of the element body and electrically connected to ends of the via conductors that reach the surface of the protection portion; Equipped with oxide particles that do not substantially contain iron as a constituent element are dispersed in the via conductor; and At least one of the ends of the via conductor that contacts the terminal electrode is an oxide segregation region in which the volume percentage of the oxide particles is higher than that of any portion obtained by dividing the internal region of the via conductor located inside the element body in the stacking direction of the laminate. Multilayer ceramic capacitor.

2. 2. The multilayer ceramic capacitor according to claim 1, wherein the oxide segregation region has a dimension in a direction perpendicular to the stacking direction of the laminate in a cross section parallel to the stacking direction of the laminate that is larger than that of the internal region.

3. 3. The multilayer ceramic capacitor according to claim 2, wherein the via conductor has a trapezoidal cross section parallel to the stacking direction of the laminate.

4. The volume percentage V of the oxide particles in the oxide segregation region e 2. The multilayer ceramic capacitor according to claim 1, wherein the ratio of the surface area to the surface area is 30% or more and 70% or less.

5. The terminal electrode includes an underlying conductor in contact with the element body and a plated conductor covering the underlying conductor, and the volume percentage of the oxide particles dispersed in the underlying conductor is V g and the average volume percentage of the oxide particles in the inner region is V i When V g <V i The multilayer ceramic capacitor according to claim 1 , which satisfies the above.

6. 2. The multilayer ceramic capacitor according to claim 1, wherein the dimension in the lamination direction is 100 μm or less.

7. A circuit board having the multilayer ceramic capacitor according to claim 1 mounted thereon.

Citation Information

Patent Citations

  • Laminated capacitor, circuit board, and circuit module

    JP2008078622A