Memory device having defective address cache and method thereof

Abstract

PURPOSE: To provide a memory device having a defective address cache and a method thereof.SOLUTION: A memory device includes a plurality of memory dies and a reserved die stacked on the memory dies and configured to repair a target memory die among the plurality of memory dies. Each of the reserved dies and memory dies can include a failure address cache that records failure address information of the memory device. The failure address cache is configured to receive an input address signal and output a hit signal or a miss signal, indicating whether the input address signal indicates that the failure address stored in the failure address cache is hit or missed. The memory device is configured to control access to the memory dies and the reserved dies based on the hit signal or the miss signal.SELECTED DRAWING: Figure 2A

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