Bidirectional DC / DC converter, power shutdown protection circuit and semiconductor device

Abstract

To provide a bidirectional DC / DC converter that enables proper control with a simple design.SOLUTION: A bidirectional DC / DC converter 12, 32 comprises: high-side switch parts 122, 322; a low-side switch part 124; and a controller that generates control signals to control the operation of the high-side switch part and the low-side switch part, enabling switching between boost mode and buck mode, such that the bidirectional DC / DC converter functions as a boost converter in boost mode and as a buck converter in buck mode. At least one of the high-side switch part and the low-side switch part includes a plurality of identical switching elements ML1 to ML5 and MH1 to MH5 connected in parallel. The controller operates a plurality of identical switching elements in coordination during boost mode or buck mode.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present disclosure relates to a bidirectional DC / DC converter, a power interruption protection circuit, and a semiconductor device. [Background technology]

[0002] Various devices require a stable power supply. For example, in storage devices such as solid state drives (SSDs), if the power supply is suddenly cut off, there is a risk that the data stored on them will be lost.

[0003] Patent Document 1 describes a technology in which a power supply voltage is boosted to charge a capacitor, and when the power supply from the power supply to a device is cut off, the voltage of the charged capacitor is lowered to supply power to the device.

[0004] A boost converter is used to boost the power supply voltage, and a buck converter is used to lower the capacitor voltage. Both converters use high-side and low-side transistors, but the current supply capabilities required for the transistors differ between boosting and bucking. Patent Document 1 discloses operating low-side transistors with different on-resistances for boosting and bucking. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] U.S. Patent No. 9,705,402

[0006] [overview] However, in the technology described in Patent Document 1, to form low-side transistors with different on-resistances, the sizes of the low-side transistors must be different, which requires a separate design for each low-side transistor in the layout of the low-side transistors on the semiconductor chip.

[0007] The present disclosure has been made in light of the above circumstances, and one of its exemplary purposes is to provide a bidirectional DC / DC converter that can achieve appropriate control with a simple design.

[0008] A bidirectional DC / DC converter according to one embodiment of the present disclosure includes a high-side switch unit, a low-side switch unit, and a controller that is switchable between a step-up mode and a step-down mode and generates control signals to control the operation of the high-side switch unit and the low-side switch unit so that the bidirectional DC / DC converter functions as a step-up converter in the step-up mode and functions as a step-down converter in the step-down mode. At least one of the high-side switch unit and the low-side switch unit includes multiple switching elements of the same type connected in parallel. The controller operates the multiple switching elements of the same type in conjunction with each other in the step-up mode or the step-down mode.

[0009] A semiconductor device according to one embodiment of the present disclosure includes a capacitor connection terminal to which a backup capacitor is connected, an input / output terminal to be connected to an input / output line via an inductor, a ground terminal to be connected to ground, a high-side switch unit provided between the capacitor connection terminal and the input / output terminal, a low-side switch unit provided between the input / output terminal and the ground terminal, and a controller switchable between a step-up mode and a step-down mode, generating a control signal to control operation of the high-side switch unit and the low-side switch unit so that, in the step-up mode, the voltage of the input / output line is boosted to charge the backup capacitor, and, in the step-down mode, the voltage of the backup capacitor is lowered and the lowered voltage is supplied to the input / output line. At least one of the high-side switch unit and the low-side switch unit includes a plurality of switching elements of the same type connected in parallel. The controller operates the plurality of switching elements of the same type in conjunction with each other in the step-up mode or the step-down mode.

[0010] Any combination of the above components and conversion of the expressions of the present disclosure into methods, devices, systems, etc. are also valid aspects of the present disclosure. [Brief explanation of the drawings]

[0011] [Figure 1] FIG. 1 is a block diagram of a system according to the first embodiment. [Figure 2] FIG. 2 is a block diagram of a power supply interruption protection circuit for explaining the configuration of the bidirectional DC / DC converter according to the first embodiment. [Figure 3] FIG. 3 is a timing chart for explaining an example of the operation when the bidirectional DC / DC converter according to the first embodiment functions as a boost converter. [Figure 4] FIG. 4 is a timing chart for explaining in more detail the operation of the bidirectional DC / DC converter functioning as a boost converter during the charging period. [Figure 5] FIG. 5 is a timing chart for explaining an example of the operation when the bidirectional DC / DC converter according to the first embodiment functions as a step-down converter. [Figure 6] FIG. 6 is a top view of an example of the layout of the low-side switch unit in the semiconductor chip according to the first embodiment. [Figure 7] FIG. 7 is a block diagram of a power supply interruption protection circuit for explaining the configuration of a bidirectional DC / DC converter according to a comparative technique. [Figure 8] FIG. 8 is a top view of the layout of a semiconductor chip of a low-side switch unit according to the comparative technique. [Figure 9] FIG. 9 is a block diagram of a power supply interruption protection circuit for explaining the configuration of a bidirectional DC / DC converter according to the second embodiment. [Figure 10] FIG. 10 is a timing chart for explaining an example of the operation when the bidirectional DC / DC converter according to the second embodiment functions as a boost converter. [Figure 11]FIG. 11 is a timing chart for explaining in more detail the operation of the bidirectional DC / DC converter functioning as a boost converter during the charging period. [Figure 12] FIG. 12 is a timing chart for explaining an example of the operation when the bidirectional DC / DC converter according to the second embodiment functions as a step-down converter.

[0012] [Detailed explanation] (overview) A summary of some exemplary embodiments of the present disclosure is provided. This summary is intended to provide a simplified overview of some concepts of one or more embodiments in order to provide a basic understanding of the embodiments as a prelude to the more detailed description that follows. It is not intended to limit the scope of the invention or disclosure. This summary is not an exhaustive overview of all possible embodiments, and is not intended to identify key elements of all embodiments or to delineate the scope of some or all aspects. For convenience, the term "one embodiment" may refer to one embodiment (example or variant) or multiple embodiments (examples or variants) disclosed herein.

[0013] A bidirectional DC / DC converter according to one embodiment includes a high-side switch unit, a low-side switch unit, and a controller that is switchable between a step-up mode and a step-down mode and generates control signals to control the operation of the high-side switch unit and the low-side switch unit so that the bidirectional DC / DC converter functions as a step-up converter in the step-up mode and functions as a step-down converter in the step-down mode. At least one of the high-side switch unit and the low-side switch unit includes multiple switching elements of the same type connected in parallel. The controller operates the multiple switching elements of the same type in conjunction with each other in the step-up mode or the step-down mode.

[0014] With this configuration, by operating multiple switching elements of the same type in conjunction with each other, it is possible to achieve control appropriate for each mode, whether in step-up mode or step-down mode. Furthermore, because the multiple switching elements are of the same type, layout design is simplified. Therefore, it is possible to provide a bidirectional DC / DC converter that achieves appropriate control with a simple design.

[0015] In one embodiment, the high-side switch unit may include a high-side transistor configured with a MOS transistor. The low-side switch unit may include a plurality of low-side transistors configured with the same type of MOS transistor and connected in parallel. The controller may control the operation of the high-side switch unit and the low-side switch unit so that, in the boost mode, charging periods and discharging periods are alternately repeated to boost the voltage of an input / output line connected to a load and charge the backup capacitor, and in the buck mode, the controller may control the operation of the high-side switch unit and the low-side switch unit so that, in the boost mode, charging periods and discharging periods are alternately repeated to boost the voltage of the input / output line connected to the load and charge the backup capacitor, and so that, in the buck mode, the controller reduces the charged voltage of the backup capacitor and supplies the reduced voltage to the input / output line.

[0016] In one embodiment, the controller may operate one low-side transistor among the plurality of low-side transistors during one cycle of the charging period and the discharging period in the boost mode, and may operate all of the plurality of low-side transistors synchronously in the buck mode.

[0017] In one embodiment, the controller may switch the operating low-side transistor among the plurality of low-side transistors for each cycle between the charging period and the discharging period in the boost mode.

[0018] In one embodiment, when the plurality of low-side transistors are first to m-th low-side transistors (m is an integer of 2 or more), the controller may select an operating low-side transistor one by one from the first to m-th low-side transistors in this order for each cycle in the boost mode, and operate the selected low-side transistor.

[0019] In one embodiment, the high-side switch unit may include multiple high-side transistors each configured with the same type of MOS transistor and connected in parallel. The low-side switch unit may include a low-side transistor configured with a MOS transistor. The controller may control the operation of the high-side switch unit and the low-side switch unit so that, in the boost mode, the controller boosts the voltage of an input / output line connected to a load and charges the backup capacitor by alternately repeating a charging period and a discharging period using synchronous rectification, and in the buck mode, the controller drops the charged voltage of the backup capacitor and supplies the dropped voltage to the input / output line.

[0020] In one embodiment, the controller may operate one high-side transistor among the plurality of high-side transistors during one cycle of the charging period and the discharging period in the voltage step-up mode, and may operate all of the plurality of high-side transistors synchronously in the voltage step-down mode.

[0021] In one embodiment, the controller may switch the operating high-side transistor among the plurality of high-side transistors for each cycle between the charging period and the discharging period in the boost mode.

[0022] In one embodiment, when the plurality of high-side transistors are first to n-th (n is an integer equal to or greater than 2) high-side transistors, the controller may select an operating high-side transistor one by one from the first to n-th high-side transistors in this order for each cycle in the boost mode, and operate the selected high-side transistor.

[0023] In one embodiment, the bidirectional DC / DC converter may further include a plurality of drivers of the same type, each of which operates a corresponding one of the plurality of switching elements of the same type in response to a control signal.

[0024] In one embodiment, each of the plurality of switching elements of the same type may be paired with a corresponding one of the plurality of drivers of the same type, and each pair may be arranged side by side in one direction with the same layout.

[0025] A power interruption protection circuit according to one embodiment may include the bidirectional DC / DC converter and a backup capacitor. The controller may control the operation of the high-side switch unit and the low-side switch unit so that, in a step-up mode, the controller steps up the voltage of an input / output line connected to a load to charge the backup capacitor, and in a step-down mode, the controller steps down the charging voltage of the backup capacitor and supplies the stepped-down voltage to the input / output line. The controller may switch to the step-down mode in response to detection of an interruption of power supply from the power source to the load.

[0026] A semiconductor device according to one embodiment includes a capacitor connection terminal to which a backup capacitor is connected, an input / output terminal to be connected to an input / output line via an inductor, a ground terminal to be connected to ground, a high-side switch unit provided between the capacitor connection terminal and the input / output terminal, a low-side switch unit provided between the input / output terminal and the ground terminal, and a controller that is switchable between a step-up mode and a step-down mode and generates a control signal to control the operation of the high-side switch unit and the low-side switch unit so that, in the step-up mode, the voltage of the input / output line is boosted to charge the backup capacitor, and, in the step-down mode, the voltage of the backup capacitor is lowered and the lowered voltage is supplied to the input / output line. At least one of the high-side switch unit and the low-side switch unit includes a plurality of switching elements of the same type connected in parallel. The controller operates the plurality of switching elements of the same type in conjunction with each other in the step-up mode or the step-down mode.

[0027] According to this configuration, by operating multiple switching elements of the same type in conjunction with each other, it is possible to achieve control appropriate for each mode, whether in step-up mode or step-down mode. Furthermore, because the multiple switching elements are of the same type, layout design is simplified. Therefore, it is possible to provide a semiconductor device for a bidirectional DC / DC converter that achieves appropriate control with a simple design.

[0028] In one embodiment, the semiconductor device may be configured by being monolithically integrated on a single semiconductor substrate.

[0029] (Embodiment) Preferred embodiments will be described below with reference to the drawings. The same or equivalent components, parts, and processes shown in each drawing will be given the same reference numerals, and redundant explanations will be omitted as appropriate. Furthermore, the embodiments are examples and do not limit the disclosure and invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the disclosure and invention.

[0030] In this specification, "component A is connected to component B" includes not only a case where component A and component B are directly physically connected, but also a case where component A and component B are indirectly connected via other components that do not substantially affect the electrical connection state between them or that do not impair the function or effect achieved by their combination.

[0031] Similarly, "component C is connected (provided) between component A and component B" includes not only a case where component A and component C, or component B and component C, are directly connected, but also a case where they are indirectly connected via other components that do not substantially affect the electrical connection state between them or that do not impair the function or effect achieved by their combination.

[0032] In addition, in this specification, symbols attached to electrical signals such as voltage signals and current signals, or circuit elements such as resistors, capacitors, and inductors, represent the respective voltage values, current values, or circuit constants (resistance values, capacitance values, inductances) as necessary.

[0033] (First embodiment) 1 is a block diagram of a system 1 according to a first embodiment. The system 1 mainly includes a power interruption protection circuit 10, a power supply 20, and a load 22. The power interruption protection circuit 10 is provided between the power supply 20 and the load 22. The power supply 20 and the load 22 are connected to each other via a transmission line 21.

[0034] The power supply 20 is a power supply voltage V DD Generates the power supply voltage V DD Power according to the above is supplied to the load 22 via the transmission line 21. The load 22 may be any of various devices that operate in response to the supplied power, and may be, for example, a storage device such as an SSD.

[0035] The power supply interruption protection circuit 10 includes a bidirectional DC / DC converter 12, an input / output line 13, and a backup capacitor C STR The bidirectional DC / DC converter 12 is connected to a connection node 14 of a transmission line 21 via an input / output line 13. Although not shown in FIG. 1 , a fuse (for example, an electronic fuse) may be provided in the transmission line 21 between the connection node 14 and the power supply 20.

[0036] The power cutoff protection circuit 10 is DD The voltage V of the input / output line 13 according to A1 is boosted to the backup capacitor C STR In response to detection of an interruption in the power supply from the power source 20 to the load 22, the power supply interruption protection circuit 10 charges the backup capacitor C STR Charging voltage V STR1and supplies the stepped-down voltage to input / output line 13, thereby supplying power to load 22. As a result, even if the power supply from power supply 20 to load 22 is momentarily interrupted, power interruption protection circuit 10 can supply power to load 22. As a result, if load 22 is a storage device, for example, loss of stored data can be suppressed.

[0037] 2 is a block diagram of the power supply interruption protection circuit 10 for explaining the configuration of the bidirectional DC / DC converter 12 according to the first embodiment. The bidirectional DC / DC converter 12 functions as both a step-up converter and a step-down converter, and is configured to be able to switch between these functions.

[0038] The bidirectional DC / DC converter 12 according to this embodiment mainly includes a controller 120, a high-side switch unit 122, a low-side switch unit 124, an inductor L1, and capacitors C1 and C2.

[0039] A part of the bidirectional DC / DC converter 12 may be integrated on a single semiconductor substrate. Specifically, a semiconductor device 16 including the controller 120, the high-side switch unit 122, and the low-side switch unit 124 may be integrated on a single semiconductor substrate. This semiconductor device 16 may be configured as an IC (Integrated Circuit) having a PLP (Power Loss Protection) function.

[0040] The semiconductor device 16 further includes a backup capacitor C STR the capacitor connection terminal CAP to be connected to the inductor L1, a switching terminal SW (input / output terminal) to be connected to the input / output line 13 via the inductor L1, and a ground terminal PGND to be connected to the ground.

[0041] The controller 120 generates control signals SH, SL1 to SL5 to control the operation of the high-side switch unit 122 and the low-side switch unit 124. The controller 120 is switchable between a step-up mode and a step-down mode. In the step-up mode, the controller 120 controls the operation of the high-side switch unit 122 and the low-side switch unit 124 so that the bidirectional DC / DC converter 12 functions as a step-up converter. In the step-down mode, the controller 120 controls the operation of the high-side switch unit 122 and the low-side switch unit 124 so that the bidirectional DC / DC converter 12 functions as a step-down converter.

[0042] In the boost mode, the controller 120 according to this embodiment alternates between a charging period and a discharging period to control the voltage V A1 is boosted to the backup capacitor C STR In the step-down mode, the controller 120 controls the operation of the high-side switch unit 122 and the low-side switch unit 124 so as to charge the backup capacitor C STR Charging voltage V STR1 and controls the operations of the high-side switch unit 122 and the low-side switch unit 124 so as to step down the voltage and supply the stepped-down voltage to the input / output line 13.

[0043] The mode of the controller 120 may be switched to the step-down mode, for example, in response to detection of an interruption in the power supply from the power supply 20 to the load 22. The detection of the interruption in the power supply may be, for example, due to an abnormality in the power supply 20 itself or the transmission line 21, or a drop in the power supply voltage V DD A decrease in the supply voltage V DD This detection may be performed by a detection circuit (not shown), and a signal SP1 indicating the detection result may be transmitted to the controller 120.

[0044] The controller 120 can control the operations of the high-side switch unit 122 and the low-side switch unit 124 in response to the feedback signal SF1. The feedback signal SF1 is a voltage V A1 feedback signal (for example, voltage V A1 (e.g., a signal obtained by dividing the voltage of STR Charging voltage V STR1 feedback signal (for example, charging voltage V STR1 The signal may be a signal obtained by dividing the voltage of the

[0045] The high-side switch unit 122 is provided between the capacitor connection terminal CAP and the switching terminal SW. The low-side switch unit 124 is provided between the switching terminal SW and the ground terminal PGND. At least one of the high-side switch unit 122 and the low-side switch unit 124 includes multiple switching elements of the same type connected in parallel. The controller 120 operates the multiple switching elements of the same type in conjunction with each other in the step-up mode or the step-down mode. In this embodiment, the low-side switch unit 124 includes multiple switching elements of the same type connected in parallel.

[0046] The high-side switch unit 122 includes a high-side transistor MH and a high-side driver DH. The high-side transistor MH is configured as a transistor, specifically an N-channel MOS (Metal Oxide Semiconductor) transistor. The source of the high-side transistor MH is connected to the switching terminal SW, and the drain of the high-side transistor MH is connected to the capacitor connection terminal CAP. The high-side driver DH operates (turns on and off) the high-side transistor MH in response to a control signal SH from the controller 120.

[0047] The low-side switch unit 124 includes a plurality of low-side transistors ML1 to ML5 connected in parallel and a plurality of low-side drivers DL1 to DL5 of the same type. Although the number of pairs of low-side transistors and low-side drivers according to this embodiment is five, the number of pairs may be two to four, or may be six or more.

[0048] Each of the low-side transistors ML1 to ML5 according to this embodiment is configured as a transistor, specifically, an N-channel MOS transistor. The source of each of the low-side transistors ML1 to ML5 is connected to the ground terminal PGND, and the drain of each of the low-side transistors ML1 to ML5 is connected to the switching terminal SW.

[0049] Each of the low-side transistors ML1 to ML5 has an on-resistance that allows sufficient current supply capability in the step-up mode. Furthermore, when all of the low-side transistors ML1 to ML5 are on, their combined resistance allows sufficient current supply capability in the step-down mode. Specifically, when all of the low-side transistors ML1 to ML5 are on, their combined resistance is one-fifth the on-resistance of a single low-side transistor.

[0050] The low-side drivers DL1 to DL5 each operate (turn on or off) a corresponding one of the plurality of low-side transistors ML1 to ML5 in response to an input control signal among the control signals SL1 to SL5.

[0051] The inductor L1 and the capacitors C1 and C2 are externally connected to the semiconductor device 16. One end of the inductor L1 is connected to the switching terminal SW, and the other end of the inductor L1 is connected to the input / output line 13. The capacitor C1 is provided between the input / output line 13 and the ground. The capacitor C2 is provided between the capacitor connection terminal CAP and the ground. The backup capacitor C STRis provided between the capacitor connection terminal CAP and ground.

[0052] The circuit configuration of the power cutoff protection circuit 10 according to this embodiment has been described above. An example of the operation of the power cutoff protection circuit 10 according to this embodiment will now be described.

[0053] An example of operation when the bidirectional DC / DC converter 12 functions as a boost converter, i.e., when the controller 120 is in boost mode, will be described. The bidirectional DC / DC converter 12 according to this embodiment functions as an asynchronous rectification boost converter. Specifically, in boost mode, the controller 120 turns off the high-side transistor MH and operates the low-side transistors ML1 to ML5.

[0054] 3 is a timing chart illustrating an example of the operation of the bidirectional DC / DC converter 12 according to the first embodiment when it functions as a boost converter. STR Charging voltage V STR1 , the voltage V of the switching terminal SW SW1 , the gate-source voltage HG of the high-side transistor MH, the gate-source voltages LG1 to LG5 of the low-side transistors ML1 to ML5, the sleep trigger SLEEP_TRG1 and the selection signal S LSEL The sleep trigger SLEEP_TRG1 and the selection signal S LSEL is an internal signal of the controller 120.

[0055] In this embodiment, in the boost mode, the voltages LG1 to LG5 are controlled so that a charging period Tc1 and a discharging period Td1 are alternately repeated. STR is charged, and during the discharge period Td1, the backup capacitor C STR is discharged naturally.

[0056] In boost mode, the voltage HG between the gate and source of the high-side transistor MH is 0V, and the high-side transistor MH is maintained in the off state. The gate voltage of the high-side transistor is V SW1 This is the voltage obtained by adding the voltage HG between the gate and source of the high-side transistor MH to this.

[0057] In this embodiment, the sleep trigger SLEEP_TRG1 is set to the charging voltage V STR1 When the voltage reaches a predetermined level, the charging voltage V STR1 becomes low when the voltage drops to a predetermined voltage. Therefore, the sleep trigger SLEEP_TRG1 alternately goes high and low for each cycle T1 (=Tc1+Td1) of the charging period Tc1 and the discharging period Td1. While the sleep trigger SLEEP_TRG1 is low, the low-side transistors ML1 to ML5 are turned on and off.

[0058] The controller 120 according to this embodiment operates one of the low-side transistors ML1 to ML5 during one cycle T1 of the charging period Tc1 and discharging period Td1 in the boost mode. Specifically, during each cycle, one of the low-side transistors ML1 to ML5 is turned on and off. This prevents the low-side transistors ML1 to ML5 from operating more than necessary, thereby reducing switching loss due to parasitic capacitance.

[0059] The low-side transistors ML1 to ML5 that operate in each cycle are connected to the selection signal S LSEL In this embodiment, the selection signal S LSEL The select signal S is switched in response to the sleep trigger SLEEP_TRG1 going high. LSEL The number j (j is 1 to 5) shown in indicates the operating low-side transistor MLj (j is 1 to 5).

[0060] The controller 120 according to this embodiment switches which of the plurality of low-side transistors ML1 to ML5 is in operation for each cycle T1 of the charging period Tc1 and the discharging period Td1. This distributes the operating load among the plurality of low-side transistors ML1 to ML5, and improves the lifespan of the low-side transistors ML1 to ML5, compared to when one low-side transistor is continuously operated.

[0061] Here, the plurality of low-side transistors ML1 to ML5 are defined as first to m-th low-side transistors (m is an integer equal to or greater than 2). The controller 120 according to this embodiment selects an operating low-side transistor one by one from the first to m-th low-side transistors in this order every cycle T1, and operates the selected low-side transistor. In this embodiment, m=5.

[0062] Specifically, as shown in Figure 3, in the cycle following one cycle T1 in which low-side transistor ML1 is turned on and off, low-side transistor ML2 is turned on and off. In the cycle following that, low-side transistor ML3 is turned on and off. In the cycle following one in which low-side transistor ML5 is turned on and off, low-side transistor ML1 is turned on and off. This makes it possible to more efficiently distribute the load on low-side transistors ML1 to ML5 and more effectively improve the lifespan of low-side transistors ML1 to ML5.

[0063] 4 is a timing chart for explaining in more detail the operation of the bidirectional DC / DC converter 12 functioning as a boost converter during the charging period Tc1. STR Charging voltage V STR1 , the voltage V of the switching terminal SW SW1 , the current I flowing through the inductor L1 L1, the voltage HG between the gate and source of the high-side transistor MH and the voltage LG1 between the gate and source of the low-side transistor ML1 are shown. The current I L1 The direction from the input / output line 13 toward the switching terminal SW is defined as positive.

[0064] 3 shows an example in which the low-side transistors ML1 to ML5 are turned on and off four times in each period T1, while FIG. 4 shows an example in which the low-side transistors ML1 to ML5 are turned on and off three times. Also, FIG. 4 shows the voltage LG1 between the gate and source of the low-side transistor ML1, but even if the voltage LG1 is replaced with the voltages LG2 to LG5, the charging voltage V STR1 , voltage V SW1 and current I L1 progresses in a similar manner.

[0065] As shown in Figure 4, before timing t1 (discharge period), the switching terminal SW is in Hi-Z, and the voltage V SW1 is the voltage V of the input / output line 13 A1 After timing t1, the low-side transistor ML1 repeatedly turns on and off, causing the current I L1 is playing.

[0066] When the low-side transistor ML1 is in the on state (LG1 is high), a current path is formed through the low-side transistor ML1, and the current I L1 When the low-side transistor ML1 is in the off state, the current I L1 A current according to the voltage flows through the body diode of the high-side transistor MH to the backup capacitor C STR and backup capacitor C STR is charged.

[0067] Here, when the low-side transistor ML1 is in the on state, the voltage V SW1 becomes 0V, and when the low-side transistor ML1 is in the off state, the voltage V SW1 is VSTR1 +Vf, where Vf is the forward voltage of the body diode of the high-side transistor MH.

[0068] 5 is a timing chart for explaining an example of the operation of the bidirectional DC / DC converter 12 according to the first embodiment when it functions as a step-down converter. A1 , the voltage V of the switching terminal SW SW1 , the voltage HG between the gate and source of the high-side transistor MH, and the voltage LGα (α: 1 to 5) between the gate and source of the low-side transistor MLα (α: 1 to 5).

[0069] In the step-down mode, the controller 120 controls the operation of the high-side transistor MH and the low-side transistors ML1 to ML5 in a synchronous rectification manner. Specifically, the controller 120 alternately turns on and off the high-side transistor MH and the low-side transistors ML1 to ML5.

[0070] As shown in FIG. 5, the high-side transistor MH and the low-side transistor MLα are alternately turned on and off, causing a voltage V A1 is the charging voltage V STR1 This voltage V A1 may be supplied to the load 22 when, for example, a cutoff of the power supply from the power source 20 to the load 22 is detected. This makes it possible to supply power to the load 22 even when the power supply from the power source 20 to the load 22 is cut off.

[0071] In the step-down mode, the low-side switch unit 124 includes a backup capacitor C STR In order to achieve sufficient current supply capacity, the low-side transistors ML1 to ML5 must be operated in the linear region.

[0072] In the step-down mode, the controller 120 according to this embodiment synchronizes and operates all of the low-side transistors ML1 to ML5. Specifically, the controller 120 simultaneously turns on and off all of the low-side transistors ML1 to ML5. This reduces the combined resistance of the low-side transistors ML1 to ML5 compared to operating a single low-side transistor. As a result, the low-side transistors ML1 to ML5 can be operated more reliably in the linear region, thereby improving the current supply capability of the low-side switch unit 124.

[0073] 6 is a top view of an example of the layout of the low-side switch section 124 according to the first embodiment on a semiconductor chip. The low-side transistors ML1 to ML5 and low-side drivers DL1 to DL5 according to this embodiment have rectangular shapes. However, the shapes of the low-side transistors ML1 to ML5 and low-side drivers DL1 to DL5 are not limited to this. In FIG. 6, the x-axis indicates the width direction of the low-side transistors ML1 to ML5, and the y-axis orthogonal to the x-axis indicates the length direction of the low-side transistors ML1 to ML5.

[0074] 6, the plurality of low-side transistors ML1 to ML5 form pairs P1 to P5 with the plurality of low-side drivers DL1 to DL5, respectively. The pairs P1 to P5 are arranged side by side in one direction with the same layout.

[0075] Specifically, the low-side transistors ML1 to ML5 have the same shape, and the low-side drivers DL1 to DL5 have the same shape. Furthermore, in each of the pairs P1 to P5, the positional relationship between the low-side transistors ML1 to ML5 and the low-side drivers DL1 to DL5 is also the same. Specifically, in each of the pairs P1 to P5, the low-side transistors ML1 to ML5 and the low-side drivers DL1 to DL5 are arranged side by side in the y-axis direction.

[0076] The pairs P1 to P5 are arranged side by side at equal intervals d in the x-axis direction. The ends of the low-side drivers DL1 to DL5 opposite the low-side transistors ML1 to ML5 are aligned along an imaginary line 126 parallel to the x-axis. Furthermore, the ends of the low-side transistors ML1 to ML5 opposite the low-side drivers DL1 to DL5 are aligned along an imaginary line 128 parallel to the x-axis.

[0077] In the low-side switch section 124 according to this embodiment, each pair P1 to P5 has the same layout, so that by designing the layout of one pair, the same design can be applied to the other pairs, simplifying layout design. Furthermore, because each pair P1 to P5 has the same layout and is arranged in one direction, it is possible to allow current to flow evenly through the low-side transistors ML1 to ML5. As a result, current concentration in some low-side transistors is suppressed, achieving higher reliability.

[0078] The configuration and operation of the power interruption protection circuit 10 according to this embodiment have been described above. The bidirectional DC / DC converter 12 included in the power interruption protection circuit 10 according to this embodiment has a controller 120, a high-side switch unit 122, and a low-side switch unit 124. At least one of the high-side switch unit 122 and the low-side switch unit 124 (the low-side switch unit 124 in this embodiment) includes a plurality of switching elements of the same type (low-side transistors ML1 to ML5) connected in parallel. The controller 120 operates the plurality of switching elements of the same type (low-side transistors ML1 to ML5) in conjunction with each other in the step-up mode or the step-down mode (the step-down mode in this embodiment).

[0079] According to this configuration, by operating multiple switching elements of the same type in conjunction with each other, it is possible to achieve control appropriate for each mode, either step-up mode or step-down mode. Furthermore, since the multiple switching elements are of the same type, layout design is simplified. Therefore, the bidirectional DC / DC converter 12 according to this embodiment can achieve appropriate control with a simple design.

[0080] The advantages of the bidirectional DC / DC converter 12 according to this embodiment become clearer when compared with the comparative techniques.

[0081] 7 is a block diagram of a power-off protection circuit 90 for explaining the configuration of a bidirectional DC / DC converter 92 according to the comparative technology. The power-off protection circuit 90 according to the comparative technology includes a bidirectional DC / DC converter 92 and a backup capacitor C STR Equipped with.

[0082] The bidirectional DC / DC converter 92 includes a controller 920, a high-side switch unit 122, a low-side switch unit 922, an inductor L1, capacitors C1 and C2, a capacitor connection terminal CAP, a switching terminal SW, and a ground terminal PGND. The bidirectional DC / DC converter 92 according to the comparative technology differs from the bidirectional DC / DC converter 12 according to the above embodiment mainly in terms of control by the controller 920 and the configuration of the low-side switch unit 922.

[0083] The low-side switch section 922 according to the comparative technique includes low-side transistors ML91 and ML92 and low-side drivers DL91 and DL92. Here, the on-resistance of the low-side transistor ML92 is assumed to be smaller than the on-resistance of the low-side transistor ML91.

[0084] In the step-up mode, the controller 920 according to the comparative technique turns off the low-side transistor ML92 and operates only the low-side transistor ML91. In the step-down mode, the controller 920 turns off the low-side transistor ML91 and operates only the low-side transistor ML92 instead of the low-side transistor ML91. This achieves a higher current supply capability in the step-down mode than in the step-up mode.

[0085] In addition, the controller 920 can also realize a higher current supply capability in the step-down mode than in the step-up mode by operating both the low-side transistors ML91 and ML92 in the step-down mode.

[0086] 8 is a top view of the layout of a semiconductor chip of a low-side switch unit 922 according to the comparative technology. As shown in FIG. 8, the size of the low-side transistor ML92 is larger than that of the low-side transistor ML91. The sizes of the low-side drivers DL91 and DL92 correspond to the sizes of the corresponding low-side transistors ML91 and ML92.

[0087] In the low-side switch section 922 according to the comparative technology, the pair P91 of the low-side transistor ML91 and the low-side driver DL91 and the pair P92 of the low-side transistor ML92 and the low-side driver DL92 have different layouts, which requires a separate layout design for each of the pairs P91 and P92.

[0088] In contrast, in the low-side switch section 124 according to the above embodiment, the five pairs P1 to P5 have the same layout, which simplifies the layout design.

[0089] Furthermore, signal delays occur at the gates of the low-side transistors ML91 and ML92 due to parasitic capacitance and parasitic resistance. In the low-side switch unit 922 according to the comparative technology, the layout of each pair P91 and P92 is different, and therefore signal delays at the gates of the low-side transistors ML91 and ML92 are different. As a result, current may concentrate in one of the low-side transistors ML91 and ML92.

[0090] In contrast, the low-side switch section 124 according to the above embodiment uses pairs P1 to P5 with the same layout, which makes it possible to equalize the signal delays at the gates of the low-side transistors ML1 to ML5, thereby preventing current from concentrating in some of the low-side transistors and improving reliability.

[0091] (Variation 1) In the above embodiment, an example has been described in which one low-side transistor operates in each cycle in the boost mode. However, this is not limiting, and multiple low-side transistors may operate in each cycle in the boost mode. Note that the number of low-side transistors operating in each cycle in the boost mode is less than the total number of low-side transistors.

[0092] For example, two low-side transistors may be operated in each cycle in the voltage step-up mode. In this case, if all five low-side transistors ML1 to ML5 are operated in the voltage step-down mode, the combined resistance of the low-side transistors in the voltage step-down mode can be 1 / 2.5 of the combined resistance of the low-side transistors in the voltage step-up mode.

[0093] In this way, by operating multiple low-side transistors in each cycle in the boost mode, it becomes possible to finely adjust the ratio between the combined resistance of the low-side transistors in the buck mode and the combined resistance of the low-side transistors in the boost mode. Note that even when multiple low-side transistors are operated in the boost mode, the operating low-side transistors may be switched in each cycle.

[0094] (Second embodiment) 9 is a block diagram of a power-off protection circuit 30 for explaining the configuration of a bidirectional DC / DC converter 32 according to the second embodiment. The power-off protection circuit 30 according to the second embodiment differs from the power-off protection circuit 10 according to the first embodiment mainly in the configuration and operation of the semiconductor device 36. The power-off protection circuit 30 according to the second embodiment includes a bidirectional DC / DC converter 32 and a backup capacitor C STR Equipped with.

[0095] The bidirectional DC / DC converter 32 includes a controller 320, a high-side switch unit 322, a low-side switch unit 124, an inductor L1, and capacitors C1 and C2. A portion of the bidirectional DC / DC converter 32 may be monolithically integrated on a single semiconductor substrate. Specifically, a semiconductor device 36 including the controller 320, the high-side switch unit 322, and the low-side switch unit 124 may be monolithically integrated on a single semiconductor substrate. The semiconductor device 36 further includes a capacitor connection terminal CAP, a switching terminal SW, and a ground terminal PGND.

[0096] The controller 320 controls the operations of the high-side switch unit 322 and the low-side switch unit 124 based on the signal SP2 indicating that a cutoff of the power supply from the power supply 20 to the load 22 has been detected, the feedback signal SF2, and the like.

[0097] The high-side switch section 322 is provided between the capacitor connection terminal CAP and the switching terminal SW. The high-side switch section 322 includes a plurality of high-side transistors MH1 to MH5 connected in parallel and a plurality of high-side drivers DH1 to DH5 of the same type. Although the number of pairs of high-side transistors and low-side drivers in this embodiment is five, the number of pairs may be two to four, or may be six or more.

[0098] Each of the high-side transistors MH1 to MH5 according to this embodiment is configured as a transistor, specifically, an N-channel MOS transistor. The source of each of the high-side transistors MH1 to MH5 is connected to the switching terminal SW, and the drain of each of the high-side transistors MH1 to MH5 is connected to the capacitor connection terminal CAP.

[0099] Each of the high-side transistors MH1 to MH5 has an on-resistance that allows sufficient current supply capability in the step-up mode. Furthermore, when all of the high-side transistors MH1 to MH5 are on, they have a combined resistance that allows sufficient current supply capability in the step-down mode. Specifically, when all of the high-side transistors MH1 to MH5 are on, their combined resistance is one-fifth the on-resistance of a single low-side transistor.

[0100] In the boost mode, the controller 320 according to this embodiment controls the operation of the high-side switch unit 322 and the low-side switch unit 124 in a synchronous rectification manner. Specifically, the controller 320 alternately repeats a charging period and a discharging period to regulate the voltage V A2 is boosted to the backup capacitor C STR In the step-down mode, the controller 320 controls the operation of the high-side switch unit 322 and the low-side switch unit 124 so as to charge the backup capacitor C STR Charging voltage V STR2 and controls the operations of the high-side switch unit 322 and the low-side switch unit 124 so as to step down the voltage and supply the stepped-down voltage to the input / output line 13.

[0101] An example of the operation of the power cutoff protection circuit 30 according to this embodiment will now be described.

[0102] 10 is a timing chart for explaining an example of the operation when the bidirectional DC / DC converter 32 according to the second embodiment functions as a boost converter. STR Charging voltage V STR2 , the voltage V of the switching terminal SW SW2 , the gate-source voltages HG1 to HG5 of the high-side transistors MH1 to MH5, the sum of the gate-source voltages LG1 to LG5 of the low-side transistors ML1 to ML5 (LG_total), the sleep trigger SLEEP_TRG2, and the selection signal S HSEL The sleep trigger SLEEP_TRG2 and the selection signal S HSEL is an internal signal of the controller 320.

[0103] In this embodiment, in the boost mode, the voltages HG1 to HG5 and the voltages LG1 to LG5 are controlled so that the charging period Tc2 and the discharging period Td2 are alternately repeated. STR is charged, and during the discharge period Td2, the backup capacitor C STR is discharged naturally.

[0104] In this embodiment, the sleep trigger SLEEP_TRG2 alternates between high and low for each cycle T2 (=Tc2+Td2) of the charging period Tc2 and the discharging period Td2. While the sleep trigger SLEEP_TRG2 is low, the low-side transistors ML1 to ML5 are turned on and off. Furthermore, in the second embodiment, the controller 320 performs synchronous rectification control, so while the sleep trigger SLEEP_TRG2 is low, the high-side transistors MH1 to MH5 are also turned on and off alternately with the low-side transistors ML1 to ML5.

[0105] The controller 320 according to this embodiment operates one of the plurality of high-side transistors MH1 to MH5 during one cycle T2 of the charging period Tc2 and the discharging period Td2 in the boost mode. Specifically, during each cycle, one of the high-side transistors MH1 to MH5 is turned on and off. This prevents the high-side transistors MH1 to MH5 from operating more than necessary.

[0106] The high-side transistors MH1 to MH5 that are turned on and off are controlled by the selection signal S HSEL In FIG. 10, the selection signal S HSEL The number k (k is 1 to 5) shown in indicates the high-side transistor MHk (k is 1 to 5) that is turned on and off. The low-side transistors ML1 to ML5 may operate in the same manner as in the first embodiment.

[0107] In the boost mode, the controller 320 according to this embodiment switches which of the multiple high-side transistors MH1 to MH5 is operating for each cycle T2 of the charging period Tc2 and the discharging period Td2. This distributes the operating load among the high-side transistors MH1 to MH5, improving the lifespan of the high-side transistors MH1 to MH5 compared to when one high-side transistor is continuously operated.

[0108] Here, the multiple high-side transistors MH1 to MH5 are referred to as first to n-th (n is an integer equal to or greater than 2) high-side transistors. The controller 320 selects an operating high-side transistor one by one from the first to n-th high-side transistors in this order every cycle T2, and operates the selected high-side transistor. In this embodiment, n=5.

[0109] Specifically, as shown in Figure 10, in the cycle following one cycle T2 in which high-side transistor MH1 is turned on and off, high-side transistor MH2 is turned on and off. In the cycle following that, high-side transistor MH3 is turned on and off. In the cycle following one in which high-side transistor MH5 is turned on and off, high-side transistor MH1 is turned on and off. This makes it possible to more efficiently distribute the load on high-side transistors MH1 to MH5 and more effectively improve the lifespan of high-side transistors MH1 to MH5.

[0110] 11 is a timing chart for explaining in more detail the operation of the bidirectional DC / DC converter 32 functioning as a boost converter during the charging period Tc2. STR Charging voltage V STR2 , the voltage V of the switching terminal SW SW2 , the current I flowing through the inductor L1 L2 , the gate-source voltage HG1 of the high-side transistor MH1 and the gate-source voltage LG1 of the low-side transistor ML1 are shown. Current I L2 The direction from the input / output line 13 toward the switching terminal SW is defined as positive.

[0111] FIG. 11 shows the voltage HG1 between the gate and source of the high-side transistor MH1 and the voltage LG1 between the gate and source of the low-side transistor ML1. However, even if the voltage HG1 is replaced with the voltages HG2 to HG5, or the voltage LG1 is replaced with the voltages LG2 to LG5, the charging voltage V STR2 , voltage V SW2 and current I L2 progresses in a similar manner.

[0112] As shown in Figure 11, before timing t2 (discharge period), the switching terminal SW is in Hi-Z, and the voltage V SW2 is the voltage V of the input / output line 13 A2After timing t2, the high-side transistor MH1 and the low-side transistor ML1 are alternately turned on and off, and accordingly, the current I L2 At timing t3 when the high-side transistor MH1 turns on, STR Then, the charging period Tc2 starts.

[0113] In this embodiment, unlike the first embodiment, the high-side transistor HG1 operates in the boost mode. When the high-side transistor HG1 is in the on state (HG1 is high) and the low-side transistor ML1 is in the off state (LG1 is low), the voltage V SW2 is V STR2 This becomes:

[0114] 12 is a timing chart for explaining an example of the operation when the bidirectional DC / DC converter 32 according to the second embodiment functions as a step-down converter. A2 , the voltage V of the switching terminal SW SW2 , the gate-source voltage HGβ (β: 1 to 5) of the high-side transistor MHβ (β: 1 to 5), and the gate-source voltage LGα (α: 1 to 5) of the low-side transistor MLα (α: 1 to 5).

[0115] In the step-down mode, the controller 320 controls the operation of the high-side transistors MH1 to MH5 and the low-side transistors ML1 to ML5 in a synchronous rectification manner. Specifically, the controller 320 alternately turns on and off the high-side transistors MH1 to ML5 and the low-side transistors ML1 to ML5.

[0116] In the step-down mode, the controller 320 according to this embodiment synchronizes the operation of all of the high-side transistors MH1 to MH5. Specifically, the controller 320 simultaneously turns on and off the high-side transistors MH1 to MH5. This reduces the combined resistance of the high-side transistors MH1 to MH5 compared to when operating a single high-side transistor. As a result, the high-side transistors MH1 to MH5 can be operated more reliably in the linear region, improving the current supply capability of the high-side switch section 322.

[0117] Furthermore, in the step-down mode, the controller 320 according to this embodiment synchronizes and operates all of the low-side transistors ML1 to ML5, as in the first embodiment, thereby improving the current supply capability of the low-side switch section 124.

[0118] (supplement) Although the embodiments of the present disclosure have been described using specific terms, this description is merely an example to facilitate understanding and does not limit the scope of the present disclosure or the claims, and the scope of the present invention is defined by the claims. Furthermore, not only the embodiments but also embodiments, examples, and modifications not described herein are included in the scope of the present invention.

[0119] It is also possible to combine one or more elements of the first embodiment with one or more elements of the second embodiment. For example, it is also possible to lay out the high-side switch unit 322 according to the second embodiment in the same manner as the low-side switch unit 124 according to the first embodiment.

[0120] (Addendum) One aspect of the technology disclosed in this specification can be understood as follows.

[0121] (Item 1) 1. A bidirectional DC / DC converter, comprising: A high-side switch unit; A low-side switch unit; a controller that is switchable between a step-up mode and a step-down mode, and generates control signals to control operations of the high-side switch unit and the low-side switch unit so that the bidirectional DC / DC converter functions as a step-up converter in the step-up mode and functions as a step-down converter in the step-down mode; at least one of the high-side switch unit and the low-side switch unit includes a plurality of switching elements of the same type connected in parallel, the controller operates the plurality of switching elements of the same type in conjunction with one another in the voltage step-up mode or the voltage step-down mode; Bidirectional DC / DC converter.

[0122] (Item 2) the high-side switch unit includes a high-side transistor configured by a MOS transistor, the low-side switch unit includes a plurality of low-side transistors each configured with a MOS transistor of the same type and connected in parallel, the controller controls the operation of the high-side switch unit and the low-side switch unit so that, in the step-up mode, a charging period and a discharging period are alternately repeated to step up the voltage of an input / output line connected to a load and charge a backup capacitor, and in the step-down mode, the controller steps down the charging voltage of the backup capacitor and supplies the stepped-down voltage to the input / output line. Item 1. The bidirectional DC / DC converter according to item 1.

[0123] (Item 3) the controller operates one low-side transistor among the plurality of low-side transistors in one cycle of the charging period and the discharging period in the voltage step-up mode, and operates all of the plurality of low-side transistors in synchronization with each other in the voltage step-down mode. The bidirectional DC / DC converter according to item 2.

[0124] (Item 4) the controller switches an operating low-side transistor among the plurality of low-side transistors for each cycle between the charging period and the discharging period in the boost mode. Item 2 or 3. The bidirectional DC / DC converter according to item 2 or 3.

[0125] (Item 5) When the plurality of low-side transistors are first to m-th low-side transistors (m is an integer of 2 or more), the controller selects an operating low-side transistor one by one from the first to m-th low-side transistors in this order for each cycle in the voltage step-up mode, and operates the selected low-side transistor. Item 4. The bidirectional DC / DC converter according to item 4.

[0126] (Item 6) the high-side switch unit includes a plurality of high-side transistors each configured with a MOS transistor of the same type and connected in parallel, the low-side switch unit includes a low-side transistor configured by a MOS transistor, the controller controls the operation of the high-side switch unit and the low-side switch unit so that, in the step-up mode, a voltage of an input / output line connected to a load is boosted and a backup capacitor is charged by alternately repeating a charging period and a discharging period in a synchronous rectification manner, and in the step-down mode, the controller controls the operation of the high-side switch unit and the low-side switch unit so that the controller steps down the charging voltage of the backup capacitor and supplies the stepped-down voltage to the input / output line. Item 1. The bidirectional DC / DC converter according to item 1.

[0127] (Item 7) the controller operates one high-side transistor among the plurality of high-side transistors in one cycle of the charging period and the discharging period in the voltage step-up mode, and operates all of the plurality of high-side transistors in synchronization with each other in the voltage step-down mode. Item 6. The bidirectional DC / DC converter according to item 6.

[0128] (Item 8) the controller switches an operating high-side transistor among the plurality of high-side transistors for each cycle between the charging period and the discharging period in the boost mode. 8. The bidirectional DC / DC converter according to item 6 or 7.

[0129] (Item 9) When the plurality of high-side transistors are first to n-th (n is an integer of 2 or more) high-side transistors, the controller selects an operating high-side transistor one by one from the first to n-th high-side transistors in this order for each cycle in the voltage step-up mode, and operates the selected high-side transistor. Item 9. The bidirectional DC / DC converter according to item 8.

[0130] (Item 10) further comprising a plurality of drivers of the same type, each of which operates a corresponding one of the plurality of switching elements of the same type in response to the control signal; 10. The bidirectional DC / DC converter according to any one of items 1 to 9.

[0131] (Item 11) each of the plurality of same-type switching elements forms a pair with a corresponding one of the plurality of same-type drivers; Each of the pairs is arranged side by side in one direction with the same layout. Item 11. The bidirectional DC / DC converter according to item 10.

[0132] (Item 12) The bidirectional DC / DC converter according to any one of items 1 to 11, a backup capacitor; the controller controls the operation of the high-side switch unit and the low-side switch unit so that, in the step-up mode, the voltage of an input / output line connected to a load is stepped up to charge the backup capacitor, and in the step-down mode, the controller steps down the charging voltage of the backup capacitor and supplies the stepped-down voltage to the input / output line; The mode of the controller is switched to the step-down mode in response to detection of interruption of power supply from a power source to a load. Power cutoff protection circuit.

[0133] (Item 13) a capacitor connection terminal to which a backup capacitor is to be connected; an input / output terminal to be connected to an input / output line via an inductor; a ground terminal to be connected to ground; a high-side switch unit provided between the capacitor connection terminal and the input / output terminal; a low-side switch unit provided between the input / output terminal and the ground terminal; a controller that is switchable between a step-up mode and a step-down mode, and generates a control signal to control operations of the high-side switch unit and the low-side switch unit so that, in the step-up mode, the voltage of the input / output line is boosted to charge the backup capacitor, and, in the step-down mode, the voltage of the backup capacitor is lowered and the lowered voltage is supplied to the input / output line; at least one of the high-side switch unit and the low-side switch unit includes a plurality of switching elements of the same type connected in parallel, the controller operates the plurality of switching elements of the same type in conjunction with one another in the voltage step-up mode or the voltage step-down mode; Semiconductor device.

[0134] (Item 14) It is integrated on a single semiconductor substrate. Item 14. The semiconductor device according to item 13. [Explanation of symbols]

[0135] 1 System, 10, 30 Power supply interruption protection circuit, 12, 32 Bidirectional DC / DC converter, 13 Input / output line, 16, 36 Semiconductor device, 20 Power supply, 21 Transmission line, 22 Load, 120, 320 Controller, 122, 322 High-side switch section, 124 Low-side switch section, MH, MH1 to MH5 High-side transistor, ML1 to ML5 Low-side transistor, DH, DH1 to DH5 High-side driver, DL1 to DL5 Low-side driver, P1 to P5 pair, L1 inductor, C1, C2 capacitor, C STR Backup capacitor, CAP capacitor connection terminal, SW switching terminal, PGND ground terminal.

Claims

1. 1. A bidirectional DC / DC converter, comprising: A high-side switch unit; A low-side switch unit; a controller that is switchable between a step-up mode and a step-down mode, and generates control signals to control operations of the high-side switch unit and the low-side switch unit so that the bidirectional DC / DC converter functions as a step-up converter in the step-up mode and functions as a step-down converter in the step-down mode; at least one of the high-side switch unit and the low-side switch unit includes a plurality of switching elements of the same type connected in parallel, the controller operates the plurality of switching elements of the same type in conjunction with one another in the voltage step-up mode or the voltage step-down mode; Bidirectional DC / DC converter.

2. the high-side switch unit includes a high-side transistor configured by a MOS transistor, the low-side switch unit includes a plurality of low-side transistors each configured with a MOS transistor of the same type and connected in parallel, the controller controls the operation of the high-side switch unit and the low-side switch unit so that, in the step-up mode, a charging period and a discharging period are alternately repeated to step up the voltage of an input / output line connected to a load and charge a backup capacitor, and in the step-down mode, the controller steps down the charging voltage of the backup capacitor and supplies the stepped-down voltage to the input / output line.

2. The bidirectional DC / DC converter according to claim 1.

3. the controller operates one low-side transistor among the plurality of low-side transistors in one cycle of the charging period and the discharging period in the voltage step-up mode, and operates all of the plurality of low-side transistors in synchronization with each other in the voltage step-down mode.

3. The bidirectional DC / DC converter according to claim 2.

4. the controller switches an operating low-side transistor among the plurality of low-side transistors for each cycle between the charging period and the discharging period in the boost mode.

3. The bidirectional DC / DC converter according to claim 2.

5. When the plurality of low-side transistors are first to m-th low-side transistors (m is an integer of 2 or more), the controller selects an operating low-side transistor one by one from the first to m-th low-side transistors in this order for each cycle in the voltage step-up mode, and operates the selected low-side transistor.

5. The bidirectional DC / DC converter according to claim 4.

6. the high-side switch unit includes a plurality of high-side transistors each configured with MOS transistors of the same type and connected in parallel, the low-side switch unit includes a low-side transistor configured by a MOS transistor, the controller controls the operation of the high-side switch unit and the low-side switch unit so that, in the step-up mode, a voltage of an input / output line connected to a load is boosted and a backup capacitor is charged by alternately repeating a charging period and a discharging period in a synchronous rectification manner, and in the step-down mode, the controller controls the operation of the high-side switch unit and the low-side switch unit so that the controller steps down the charging voltage of the backup capacitor and supplies the stepped-down voltage to the input / output line.

2. The bidirectional DC / DC converter according to claim 1.

7. the controller operates one high-side transistor among the plurality of high-side transistors in one cycle of the charging period and the discharging period in the voltage step-up mode, and operates all of the plurality of high-side transistors in synchronization with each other in the voltage step-down mode.

7. The bidirectional DC / DC converter according to claim 6.

8. the controller switches an operating high-side transistor among the plurality of high-side transistors for each cycle between the charging period and the discharging period in the boost mode.

7. The bidirectional DC / DC converter according to claim 6.

9. When the plurality of high-side transistors are first to n-th (n is an integer of 2 or more) high-side transistors, the controller selects an operating high-side transistor from the first to n-th high-side transistors in this order for each cycle in the voltage step-up mode, and operates the selected high-side transistor.

9. The bidirectional DC / DC converter according to claim 8.

10. a plurality of drivers of the same type each operating a corresponding one of the plurality of switching elements of the same type in response to the control signal; 2. The bidirectional DC / DC converter according to claim 1.

11. each of the plurality of same-type switching elements forms a pair with a corresponding one of the plurality of same-type drivers; Each of the pairs is arranged side by side in one direction with the same layout.

11. The bidirectional DC / DC converter according to claim 10.

12. A bidirectional DC / DC converter according to any one of claims 1 to 11; a backup capacitor; the controller controls the operation of the high-side switch unit and the low-side switch unit so that, in the step-up mode, the voltage of an input / output line connected to a load is stepped up to charge the backup capacitor, and in the step-down mode, the controller steps down the charging voltage of the backup capacitor and supplies the stepped-down voltage to the input / output line; The mode of the controller is switched to the step-down mode in response to detection of interruption of power supply from a power source to a load. Power cutoff protection circuit.

13. a capacitor connection terminal to which a backup capacitor is to be connected; an input / output terminal to be connected to an input / output line via an inductor; a ground terminal to be connected to ground; a high-side switch unit provided between the capacitor connection terminal and the input / output terminal; a low-side switch unit provided between the input / output terminal and the ground terminal; a controller that is switchable between a step-up mode and a step-down mode, and generates a control signal to control operations of the high-side switch unit and the low-side switch unit so that, in the step-up mode, the voltage of the input / output line is boosted to charge the backup capacitor, and, in the step-down mode, the voltage of the backup capacitor is lowered and the lowered voltage is supplied to the input / output line; at least one of the high-side switch unit and the low-side switch unit includes a plurality of switching elements of the same type connected in parallel, the controller operates the plurality of switching elements of the same type in conjunction with one another in the voltage step-up mode or the voltage step-down mode; Semiconductor device.

14. It is configured by being monolithically integrated on a single semiconductor substrate. The semiconductor device according to claim 13.

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