Manufacturing method of multilayer substrate
The method addresses the cost and crack issues in multilayer substrate manufacturing by etching and laminating layers with insulating materials to form vias, using conductive paste vias, and adjusting metal thickness, achieving cost-effective and crack-free production.
Patent Information
- Application Number
- JP2024085026
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-05-24
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2044-05-24
AI Technical Summary
Existing methods for manufacturing multilayer substrates require large manufacturing equipment, increasing costs and pose risks of cracks due to gaps between support and metal foil, allowing chemicals to seep in.
A method involving etching metal foils to form patterned layers, laminating insulating layers, forming vias, and using conductive paste vias to create a multilayer substrate without increasing equipment size, preventing cracks by adjusting metal layer thickness and ensuring reliable bonding.
Manufactures multilayer substrates cost-effectively without equipment enlargement and prevents cracks, ensuring reliable bonding and planarization.
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Figure 2025177881000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a method for manufacturing a multilayer substrate. [Background technology]
[0002] 2. Description of the Related Art Circuit boards having a multilayer structure (hereinafter sometimes referred to as "multilayer boards") are generally well known.
[0003] For example, Patent Document 1 (JP 2023-136298 A) discloses a multilayer substrate having layers in multiple insulating layers that are connected to each other by plated vias and layers that are connected to each other by paste vias filled with conductive paste. This multilayer board is said to be able to reduce the resistance between layers and improve the allowable current value because it includes interlayer connections not only by conductive paste but also by plated vias.
[0004] Furthermore, the method for manufacturing a multilayer substrate described in Patent Document 1 discloses that a three-layer metal foil consisting of three layers of metal foil is adhered to both sides of a support body, and a substrate is then built up on the three-layer metal foil on both sides of the support body. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] Japanese Patent Application Publication No. 2023-136298 Summary of the Invention [Problem to be solved by the invention]
[0006] As mentioned above, the manufacturing method disclosed in Patent Document 1 employs a process in which a substrate is simultaneously fabricated from two three-layer metal foils adhered to both sides of a support, but this method has the problem of requiring large manufacturing equipment, which increases costs. Furthermore, the support and the three-layer metal foil need to be held in a vacuum, and if a gap were to form between the support and the three-layer metal foil, chemicals and other substances could easily seep into the gap, raising concerns that cracks could occur. [Means for solving the problem]
[0007] The present invention has been made to solve the above problems, and an object of the present invention is to provide a method for manufacturing a multilayer substrate that can be manufactured without increasing costs and without causing cracks during the manufacturing process.
[0008] That is, the disclosed method for manufacturing a multilayer board includes the steps of: etching a first foil constituting a three-layer metal foil to form a patterned first metal layer composed of the first foil; laminating a first insulating layer on the first metal layer so as to bury the first metal layer; laminating a flat metal layer on the first insulating layer; forming a first through hole that penetrates the flat metal layer and the first insulating layer and reaches the first metal layer; applying filling plating to the first through hole to form a first via that is a plated via; etching the flat metal layer to form a patterned second metal layer; and laminating a first insulating layer on the patterned second metal layer so as to bury the patterned second metal layer. a step of laminating a second insulating layer on the second insulating layer as shown in FIG. 1; a step of removing the second foil and the third foil constituting the three-layer metal foil; a step of laminating a third insulating layer and a resin film on the second insulating layer; a step of forming a second through hole that penetrates the third insulating layer, the resin film, and the second insulating layer and reaches the second metal layer; and a step of filling the second through hole with a conductive paste to form a second via that is a paste via; and a step of peeling off the resin film from a plurality of laminates, joining the first insulating layer of one laminate to the second insulating layer of another laminate, and curing the third insulating layer to obtain a multilayer substrate constituted by stacking a plurality of laminates. According to this method, it is possible to manufacture the substrate without increasing the size of the manufacturing equipment compared to the conventional technology, and it is also possible to prevent cracks from occurring in the substrate during the manufacturing process.
[0009] The method also includes a step of performing half etching to reduce the thickness of the second metal layer after the step of forming a plated via by filling the first via. According to this method, since the second metal layer becomes thick during filling plating, the second metal layer can be adjusted to an appropriate thickness before forming the patterned second metal layer.
[0010] In addition, after the step of laminating a second insulating layer on the patterned second metal layer so as to bury the patterned second metal layer, the steps of laminating a metal foil on the second insulating layer, pressing the semi-hardened second insulating layer to the second metal layer and the first insulating layer, and removing the metal foil after pressing are carried out. According to this method, the surface of the second insulating layer can be planarized, and the patterned second metal layer and the first insulating layer can be reliably bonded to each other to obtain a laminate. [Effects of the Invention]
[0011] According to the present invention, a method for manufacturing a multilayer substrate that does not cause cracks during the manufacturing process can be realized without increasing the size of the manufacturing equipment, thereby not increasing costs. [Brief explanation of the drawings]
[0012] [Figure 1] 1 is a schematic cross-sectional view showing an example of a multilayer substrate manufactured by a method for manufacturing a multilayer substrate according to an embodiment of the present invention. [Figure 2] 1 is a schematic cross-sectional view (part 1) illustrating an example of a method for manufacturing a multilayer substrate according to the present embodiment. [Figure 3] 4 is a schematic cross-sectional view (part 2) illustrating an example of a method for manufacturing a multilayer substrate according to the present embodiment. [Figure 4] 10 is a schematic cross-sectional view (part 3) illustrating an example of a method for manufacturing a multilayer substrate according to the present embodiment. [Figure 5] 10 is a schematic cross-sectional view (part 4) illustrating an example of a method for manufacturing a multilayer substrate according to the present embodiment. [Figure 6]5 is a schematic cross-sectional view (part 5) illustrating an example of a method for manufacturing a multilayer substrate according to the present embodiment. [Figure 7] 10 is a schematic cross-sectional view (part 6) illustrating an example of a method for manufacturing a multilayer substrate according to the present embodiment. [Figure 8] 10 is a schematic cross-sectional view (part 7) illustrating an example of a method for manufacturing a multilayer substrate according to the present embodiment. [Figure 9] 8 is a schematic cross-sectional view (part 8) showing an example of a method for manufacturing a multilayer substrate according to the present embodiment. FIG. [Figure 10] 9 is a schematic cross-sectional view (part 9) showing an example of a method for manufacturing a multilayer substrate according to the present embodiment. [Figure 11] 10 is a schematic cross-sectional view (part 10) showing an example of a method for manufacturing a multilayer substrate according to the present embodiment. FIG. [Figure 12] FIG. 11 is a schematic cross-sectional view (part 11) showing an example of a method for manufacturing a multilayer substrate according to the present embodiment. [Figure 13] 12 is a schematic cross-sectional view (part 12) showing an example of a method for manufacturing a multilayer substrate according to the present embodiment. FIG. [Figure 14] FIG. 13 is a schematic cross-sectional view (part 13) showing an example of a method for manufacturing a multilayer substrate according to the present embodiment. [Figure 15] FIG. 14 is a schematic cross-sectional view (part 14) showing an example of a method for manufacturing a multilayer substrate according to the present embodiment. [Figure 16] 15 is a schematic cross-sectional view (part 15) showing an example of a method for manufacturing a multilayer substrate according to the present embodiment. FIG. [Figure 17] 16 is a schematic cross-sectional view (part 16) showing an example of a method for manufacturing a multilayer substrate according to the present embodiment. FIG. [Figure 18] FIG. 17 is a schematic cross-sectional view (part 17) showing an example of a method for manufacturing a multilayer substrate according to the present embodiment. [Figure 19] 18 is a schematic cross-sectional view (part 18) showing an example of a method for manufacturing a multilayer substrate according to the present embodiment. [Figure 20] FIG. 19 is a schematic cross-sectional view (part 19) showing an example of a method for manufacturing a multilayer substrate according to the present embodiment. [Figure 21]20 is a schematic cross-sectional view (part 20) showing an example of a method for manufacturing a multilayer substrate according to the present embodiment. FIG. DETAILED DESCRIPTION OF THE INVENTION
[0013] The method for manufacturing the multilayer substrate 100 of this embodiment will be described in detail below with reference to the drawings. FIG. 1 shows a schematic cross-sectional view of a multilayer substrate 100 manufactured by the manufacturing method of this embodiment.
[0014] Furthermore, for convenience, the multilayer substrate 100 may be referred to as an "upper surface" or a "lower surface" based on the up-down direction in the drawings, but this also includes cases where the upper and lower surfaces of the multilayer substrate 100 do not match the actual up-down direction. Furthermore, the multilayer substrate 100 may be referred to as a "side surface," but the side surface means the side surface in contrast to the above-mentioned upper and lower surfaces.
[0015] (Multilayer board) 1, the multilayer substrate 100 of this embodiment has a configuration in which a plurality of laminates 56 are stacked one on top of the other. More specifically, the multilayer substrate 100 includes a plurality of laminates 56, a patterned metal layer 72 located in the uppermost layer, and a laminate 68 located in the lowermost layer.
[0016] Each laminate 56 has a first insulating layer 26, a second insulating layer 42 laminated on the first surface 26a side (top surface in Figure 1) of the first insulating layer 26, and a third insulating layer 48 laminated on the top surface of the second insulating layer 42.
[0017] In each laminate 56, a patterned second metal layer 40 is formed on a first surface 26a of a first insulating layer 26, and a patterned first metal layer 22 is formed on a second surface 26b of the first insulating layer 26. The second metal layer 40 is embedded in a second insulating layer 42 located on the upper surface of the first insulating layer 26, and the first metal layer 22 is embedded in the first insulating layer 26. The first via 34 that penetrates the first insulating layer 26 is a plated via that electrically connects the second metal layer 40 and the first metal layer 22 .
[0018] In addition, in each laminate 56, the second via 54 that penetrates the third insulating layer 48 and the second insulating layer 42 is a paste via filled with conductive paste, and electrically connects the second metal layer 40 to the first metal layer 22 of the other laminate 56. The third insulating layer 48 laminated on the upper surface of the second insulating layer 42 serves as an adhesive layer when another laminate 56 is laminated.
[0019] When the multilayer substrate 100 has an even number of metal layers, a laminate 68 different from the laminate 56 described above is laminated as the bottom layer.
[0020] As an example, the laminate 68 has a fourth insulating layer 64 having a patterned lower surface metal layer 74 formed on its lower surface, a fifth insulating layer 66 laminated on the fourth insulating layer 64, and a third via 58 formed to penetrate the fourth insulating layer 64 and the fifth insulating layer 66. The lower surface metal layer 74 is electrically connected to the first metal layer 22 on the lower surface of the laminate 56 directly above it via the third via 58.
[0021] The fifth insulating layer 66 serves as an adhesive layer when laminating the laminate 56 directly above it. The third via 58 may be a paste via filled with the same conductive paste as the second via 54 described above. The lower metal layer 74 is preferably exposed from the fourth insulating layer 64 .
[0022] When the multilayer substrate 100 has an odd number of metal layers, the above-described laminate 68 is not stacked, and the configuration of the lowest laminate 56 is different (not shown). That is, it is preferable that the first metal layer 22 of the lowest laminate 56 is exposed from the first insulating layer 26.
[0023] (Manufacturing method for multilayer board) The method for manufacturing the multilayer substrate 100 will now be described in detail.
[0024] As shown in Fig. 2, first, a three-layer metal foil 10 is prepared. As an example, the three-layer metal foil 10 is formed by laminating a copper foil 12, a metal foil 14 different from the copper foil 12, and a metal support (particularly, a copper support) 16 in this order. The metal foil 14 is not particularly limited as long as it is a metal that can be selectively etched with a selective etchant that does not react with the copper foil 12 or the copper support 16, and can be appropriately selected depending on the purpose. Note that, in the claims, the first foil corresponds to the copper foil 12, the second foil corresponds to the metal foil 14, and the third foil corresponds to the metal support 16.
[0025] Next, as shown in FIGS. 3 to 5, the first metal layer 22 is formed on the three-layer metal foil 10. Specifically, as shown in FIG. 3, a film-like dry film resist 18 is applied to the surface of the copper foil 12, and is exposed to light in a predetermined pattern corresponding to the pattern of the first metal layer 22 to remove unnecessary portions. Next, as shown in FIG. 4, the copper foil 12 is etched (half-etched) to form the first metal layer 22 in a predetermined pattern. Next, as shown in FIG. 5, the dry film resist 18 is removed from the surface of the first metal layer 22.
[0026] The first metal layer 22 is formed to a thickness of about 10 μm to 60 μm, for example, but is not limited to this and can be appropriately selected depending on the purpose. Furthermore, the surface of the first metal layer 22 may be roughened to enhance adhesion to the first insulating layer 26 when the first insulating layer 26 is laminated as described below.
[0027] 6, a first insulating layer 26 is laminated on the first metal layer 22 so as to bury the first metal layer 22. Next, a flat metal layer 28 is laminated on the first insulating layer 26.
[0028] The first insulating layer 26 is usually flat. The average thickness of the first insulating layer 26 may be, for example, 10 μm or more and 200 μm or less, or 30 μm or more and 100 μm or less, but is not particularly limited and can be appropriately selected depending on the purpose.
[0029] Furthermore, there are no particular limitations on first insulating layer 26, and it can be appropriately selected depending on the purpose, as long as it is an insulating layer used in a multilayer substrate. For example, first insulating layer 26 can be made of an inorganic base material such as an inorganic woven fabric or inorganic nonwoven fabric using glass cloth or the like, or a base material whose hardness is reinforced by an organic base material such as an organic woven fabric or organic nonwoven fabric.
[0030] More specifically, the first insulating layer 26 may be made of, for example, a glass epoxy substrate (a glass woven fabric substrate impregnated with epoxy resin, a glass nonwoven fabric substrate impregnated with epoxy resin), a glass woven fabric substrate impregnated with bismaleimide triazine resin, an aramid nonwoven fabric substrate impregnated with epoxy resin, or a glass woven fabric substrate impregnated with modified polyphenylene ether resin.
[0031] The flat metal layer 28 laminated on the first insulating layer 26 may be made of copper, for example.
[0032] Next, as shown in FIGS. 7 to 11, a first via 34 is formed in the first insulating layer 26. Specifically, first, as shown in FIG. 7, a film-like dry film resist 30 is attached to the surface of the metal layer 28, and the area corresponding to the opening of the first through hole 32 of the first via 34 is exposed to light to remove unnecessary portions. Next, as shown in FIG. 8, the portions of the metal layer 28 corresponding to the first through holes 32 are removed by etching (half etching), and the metal layer 28 is formed in areas other than the portions corresponding to the through holes 32. Next, as shown in FIG. 9, the dry film resist 30 is removed from the surface of the metal layer .
[0033] 10, a bottomed first through hole 32 is drilled through the first insulating layer 26 and has the first metal layer 22 as its bottom. As an example, the first through hole 32 can be formed by laser processing. The type of laser processing can be, but is not limited to, a CO2 laser, a YAG laser, or the like, and can be appropriately selected depending on the purpose.
[0034] Next, as shown in FIG. 11, the inside of the first through hole 32 and the metal layer 28 are filled with plating to form the first via 34, which is a plated via. Note that, since the metal layer 28 may become too thick due to the filling plating, it is preferable to perform half etching as shown in FIG. 12 to adjust the metal layer 28 to a predetermined thickness.
[0035] 13 and 14, a second metal layer 40 is formed on the first surface 26a of the first insulating layer 26. Specifically, as shown in Fig. 13, a film-like dry film resist 38 is attached to the surface of the metal layer 28 after half-etching, and is exposed to light in a predetermined pattern corresponding to the pattern of the second metal layer 40 to remove unnecessary portions. Next, as shown in FIG. 14, the metal layer 28 is formed into a second metal layer 40 having a predetermined pattern by etching (half etching), and the dry film resist 18 is removed from the surface of the second metal layer 40.
[0036] The second metal layer 40 is formed to a thickness of about 10 μm to 60 μm, for example, but is not limited to this and can be appropriately selected depending on the purpose. The surface of the second metal layer 40 may be roughened to enhance adhesion to the second insulating layer 42 when the second insulating layer 42 is laminated as described below.
[0037] 15, a second insulating layer 42 is laminated on the first insulating layer 26 so that the second metal layer 40 is buried. Furthermore, a metal layer 46 is laminated on the second insulating layer 42, and the first metal layer 26 and the second insulating layer 42 are pressure-bonded together with the metal layer 46 laminated thereon. This ensures the flatness of the second insulating layer 42, and improves the reliability of the multilayer board.
[0038] The average thickness of the second insulating layer 24 may be, for example, 10 μm or more and 200 μm or less, or 30 μm or more and 100 μm or less, but is not particularly limited and can be appropriately selected depending on the purpose.
[0039] The second insulating layer 42 is not particularly limited as long as it is an insulating layer used in a multilayer substrate, and can be appropriately selected depending on the purpose. For example, the second insulating layer 42 can be made of an inorganic base material such as an inorganic woven fabric or inorganic nonwoven fabric using glass cloth or the like, or a base material whose hardness is reinforced by an organic base material such as an organic woven fabric or organic nonwoven fabric.
[0040] More specifically, the second insulating layer 42 may be made of, for example, a glass epoxy substrate (a glass woven fabric substrate impregnated with epoxy resin, a glass nonwoven fabric substrate impregnated with epoxy resin), a glass woven fabric substrate impregnated with bismaleimide triazine resin, an aramid nonwoven fabric substrate impregnated with epoxy resin, or a glass woven fabric substrate impregnated with modified polyphenylene ether resin.
[0041] Next, as shown in Figure 16, the metal layer 46 and the metal support 16 located on the underside of the three-layer metal foil 10 are removed by etching, and then, as shown in Figure 17, the metal foil 14 located in the middle layer of the three-layer metal foil 10 is removed by etching.
[0042] 17, the first metal layer 22 is exposed downward, so that the first metal layer 22 may be subjected to a surface roughening treatment at this stage to improve adhesion when stacked with another laminate 56.
[0043] 18, a third insulating layer 48 is laminated on the second insulating layer 42. More specifically, the third insulating layer 48, which acts as an adhesive layer, and a resin film 50, which protects the surface of the third insulating layer 48, are laminated on the second insulating layer 42. The third insulating layer 48 and the resin film 50 may be pre-integrated into a sheet.
[0044] The third insulating layer 48 may be made of a thermosetting resin, such as a glass epoxy prepreg.
[0045] Next, as shown in FIGS. 19 and 20, second vias 54 are formed in the second insulating layer 42, the third insulating layer 48, and the resin film 50. As shown in FIGS. 19, a bottomed second through hole 52 is drilled through the second insulating layer 42, the third insulating layer 48, and the resin film 50, with the second metal layer 40 as the bottom. As an example, the second through hole 52 can be formed by laser processing. The type of laser processing can be, but is not limited to, a CO laser, a YAG laser, or the like, and can be appropriately selected depending on the purpose. Next, as shown in FIG. 20, the second through holes 52 are filled with a conductive paste, and then the resin film 50 is peeled off. Therefore, the second via 54 is formed as a paste via using the conductive paste 54, and by peeling off the resin film 50, the conductive paste protrudes above the third insulating layer 48 by the thickness of the resin film 50. Because the conductive paste protrudes from the third insulating layer 48, the conductive paste can be reliably bonded to the first metal layer 22 of another laminate 56. Through the steps up to this point, the laminate 56 is completed.
[0046] 21, multiple laminates 56 are stacked. More specifically, when the multilayer substrate 100 has an even number of layers (the multilayer substrate includes an even number of metal layers), the metal layer 70, multiple laminates 56, and laminate 68 are stacked in this order and thermocompression bonded. By thermocompression bonding, each third insulating layer 48 and the fifth insulating layer 66 of laminate 68 are hardened, and the laminates 56 and 68 are stacked between each other. The example shown in FIG. 21 is a case where the multilayer substrate 100 has an even number of layers.
[0047] Although the manufacturing method of the laminate 68 is not shown, it is manufactured by the following method. First, a fourth insulating layer 64 and a fifth insulating layer 66 are laminated on the upper surface of the metal layer 60. However, it is preferable to laminate a resin film (not shown) on the fifth insulating layer 66 in advance, and peel it off when laminating it with the laminate 56. A bottomed through hole is drilled through the fourth insulating layer 64 and the fifth insulating layer 66, with the metal layer 60 as the bottom, and then the through hole is filled with conductive paste to form a third via 58 as a paste via.
[0048] For example, the through holes can be formed by laser processing. The types of laser processing include CO2 laser, YAG laser, etc., but are not limited to these and can be appropriately selected depending on the purpose.
[0049] The fourth insulating layer 64 is not particularly limited and can be appropriately selected depending on the purpose as long as it is an insulating layer used in a multilayer substrate, similar to the first insulating layer 26 and the second insulating layer 42. For example, a substrate whose hardness is reinforced by an inorganic base material such as an inorganic woven fabric or inorganic nonwoven fabric using glass cloth or the like, or an organic base material such as an organic woven fabric or organic nonwoven fabric can be used.
[0050] More specifically, the fourth insulating layer 64 may be made of, for example, a glass epoxy substrate (a glass woven fabric substrate impregnated with epoxy resin, a glass nonwoven fabric substrate impregnated with epoxy resin), a glass woven fabric substrate impregnated with bismaleimide triazine resin, an aramid nonwoven fabric substrate impregnated with epoxy resin, or a glass woven fabric substrate impregnated with modified polyphenylene ether resin.
[0051] The fifth insulating layer 66 can be made of a thermosetting resin, and as an example, a glass epoxy prepreg can be used.
[0052] If the multilayer substrate 100 has an odd number of layers (the multilayer substrate includes an odd number of metal layers), the metal layer 70, the plurality of laminates 56, and a laminate (not shown) in which the pre-etched first metal layer 22 is exposed from the first insulating layer 26 are laminated in this order and thermocompression bonded. In either case, the second via 54 in one laminate 56 is electrically connected to the metal layer 70 or the first metal layer 22 in the other laminate 56.
[0053] Next, as already shown in FIG. 1, the metal layers 70 and 60 of the laminated (thermocompression bonded) multilayer substrate 100 are etched to form upper surface metal layers 72 and lower surface metal layers 74 in a predetermined pattern. In this way, the multilayer substrate 100 is completed.
[0054] The multilayer substrate 100 described above can also be used as a motherboard, an interposer, or a circuit board that constitutes a semiconductor element.
[0055] The present invention is not limited to the above-described embodiment, and various modifications are possible without departing from the scope of the present invention. [Explanation of symbols]
[0056] 10 3 layer metal foil 12 Copper foil 14 Metal foil 16 Metal support 18 Dry film resist 22 1st metal layer 26 First insulating layer 26a 1st surface 26b 2nd surface 28 Metal layer 30 Dry Film Resist 32 First through hole 34 First Via 38 Dry Film Resist 40 Second metal layer 42 Second insulating layer 46 Metal layer 48 Third insulating layer 50 Resin film 52 Second through hole 54 Second Via 56 Laminate 58 Third Via 60 metal layer 64 Fourth insulating layer 66 5th insulating layer 68 Laminate 70 metal layer 72 Top metal layer 74 Bottom metal layer 100 multilayer board
Claims
1. a step of etching a first foil constituting the three-layer metal foil to form a patterned first metal layer composed of the first foil; laminating a first insulating layer on the first metal layer so as to bury the first metal layer; laminating a flat metal layer on the first insulating layer; forming a first through hole that penetrates the flat metal layer and the first insulating layer and reaches the first metal layer; a step of forming a first via, which is a plated via, by filling plating the first through hole; etching the flat metal layer to form a patterned second metal layer; laminating a second insulating layer on the patterned second metal layer so as to bury the patterned second metal layer; a step of removing the second foil and the third foil constituting the three-layer metal foil; laminating a third insulating layer and a resin film on the second insulating layer; forming a second through hole that penetrates a third insulating layer, a resin film, and the second insulating layer and reaches the second metal layer; a step of filling the second through holes with a conductive paste to form second vias, which are paste vias; a step of peeling off the resin film from a plurality of laminates, bonding the first insulating layer of one laminate to the second insulating layer of another laminate, and curing the third insulating layer to obtain a multilayer substrate formed by stacking a plurality of laminates.
2. After the step of forming a plated via by filling the first via, 2. The method for manufacturing a multilayer substrate according to claim 1, further comprising the step of performing half etching to reduce the thickness of the second metal layer.
3. After a step of laminating a second insulating layer on the patterned second metal layer so as to bury the patterned second metal layer, 2. The method for manufacturing a multilayer substrate according to claim 1, further comprising the steps of: laminating a metal foil on the second insulating layer; pressing the semi-hardened second insulating layer to the second metal layer and the first insulating layer; and removing the metal foil after pressing.
Citation Information
Patent Citations
Multilayer board, multilayer board manufacturing method, and electronic device
JP2023136298A