Wired circuit board, semiconductor package board, electronic device, and manufacturing method of wired circuit board

Abstract

To provide a wired circuit board, a semiconductor package substrate, an electronic device, and a manufacturing method of the wired circuit board, in which connection reliability and conductivity are improved.SOLUTION: A printed circuit board includes a first conductor layer 130, an insulating layer 120, a second conductor layer 130, and a connection conductor 140. The insulating layer 120 is stacked on the first conductor layer 130 and has a connection opening 10 penetrating in a stacking direction. The second conductor layer 130 is laminated on the insulating layer 120. The connection conductor 140 is formed in the connection opening 10 of the insulating layer 120, and electrically connects the first conductor layer 130 and the second conductor layer 130. In a cross section parallel to the stacking direction, the connection opening 10 has a straight part 11 whose an inner peripheral surface is at least partially straight, and a skirt part 12 extending from an end part of the straight part 11 while spreading in a plane intersecting the stacking direction. In the stacking direction, a ratio of a thickness of the skirt part 12 to a thickness of the insulating layer 120 is 0.5 or less.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a printed circuit board, a semiconductor package substrate, an electronic device, and a method for manufacturing a printed circuit board. [Background technology]

[0002] Wired circuit boards are used to transmit electrical signals between multiple electronic components. For example, Patent Document 1 describes a wiring board with a multilayer structure. In this wiring board, multiple resin insulation layers are laminated. A conductor layer having an arbitrary conductor pattern is formed on each resin insulation layer. The conductor layer formed on at least one resin insulation layer is integrally formed with via conductors that penetrate the resin insulation layer and is electrically connected to the conductor layer on the opposite side of the resin insulation layer.

[0003] The uppermost conductor layer of the stacked conductor layers includes a conductor pad on which a metal post is formed. The metal post is separated from the conductor pad by a wedge-shaped insulating coating layer at the periphery of the portion where the metal post connects to the conductor pad. That is, the insulating coating layer is interposed in the gap between the metal post and the conductor pad at the periphery of the portion where the metal post and the conductor pad connect. The conductor pad is electrically connected via the metal post to a connection pad of an external electronic component such as a semiconductor element. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2022-15755 Summary of the Invention [Problem to be solved by the invention]

[0005] Patent Document 1 describes that the above structure effectively distributes stress between the metal post and the conductive pad, and effectively prevents defects such as peeling or cracks near the connection between the metal post and the conductive pad. It also describes that the adhesion between the coating insulating layer and the metal post and the conductive pad is increased, improving the adhesion between the coating insulating layer and the metal post and the conductive pad, thereby preventing peeling.

[0006] However, the reduction in the contact area between the metal post and the conductive pad reduces the connection reliability between the metal post and the conductive pad. Furthermore, the reduction in the contact area between the metal post and the conductive pad increases the electrical resistance between the metal post and the conductive pad, reducing the conductivity of the wiring circuit board. Therefore, there is a demand for a wiring circuit board with improved connection reliability and conductivity.

[0007] An object of the present invention is to provide a printed circuit board, a semiconductor package substrate, an electronic device, and a method for manufacturing a printed circuit board, which have improved connection reliability and conductivity. [Means for solving the problem]

[0008] A wired circuit board according to a first aspect of the present invention comprises a first conductor layer, an insulating layer stacked on the first conductor layer and having a connection opening penetrating in a stacking direction, a second conductor layer stacked on the insulating layer, and a connection conductor formed in the connection opening of the insulating layer and electrically connecting the first conductor layer and the second conductor layer, wherein the connection opening has, in a cross section parallel to the stacking direction, a straight line portion having at least a part of an inner circumferential surface that is straight, and a hem portion that extends and widens from an end of the straight line portion in a plane intersecting the stacking direction, and in the stacking direction, the ratio of the thickness of the hem portion to the thickness of the insulating layer is 0.5 or less.

[0009] A semiconductor package substrate according to a second aspect of the present invention includes the above-described printed circuit board.

[0010] An electronic device according to a third aspect of the present invention includes the above-described semiconductor package substrate.

[0011] A method for manufacturing a wired circuit board according to a fourth aspect of the present invention includes the steps of: laminating an insulating layer on a first conductor layer; forming a connection opening in the insulating layer, the connection opening penetrating the insulating layer in a lamination direction; laminating a second conductor layer on the insulating layer; and forming a connection conductor in the connection opening, the connection opening electrically connecting the first conductor layer and the second conductor layer, wherein the connection opening has, in a cross section parallel to the lamination direction, a straight line portion having at least a part of an inner circumferential surface that is straight, and a hem portion that extends and widens from an end of the straight line portion in a plane intersecting the lamination direction, and the ratio of the thickness of the hem portion to the thickness of the insulating layer in the lamination direction is 0.5 or less. [Effects of the Invention]

[0012] According to the present invention, the connection reliability and conductivity of the printed circuit board can be improved. [Brief explanation of the drawings]

[0013] [Figure 1] 1 is a longitudinal sectional view of an electronic device according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a vertical cross-sectional view of the rewiring board of FIG. [Figure 3] FIG. 10 is a partially enlarged cross-sectional view of a rewiring substrate for explaining the shape of a connection opening in an insulating layer. [Figure 4] 2A to 2C are schematic cross-sectional views for explaining an example of a method for manufacturing the rewiring substrate of FIG. 1. [Figure 5] 2A to 2C are schematic cross-sectional views for explaining an example of a method for manufacturing the rewiring substrate of FIG. 1. [Figure 6] 2A to 2C are schematic cross-sectional views for explaining an example of a method for manufacturing the rewiring substrate of FIG. 1. [Figure 7] 2A to 2C are schematic cross-sectional views for explaining an example of a method for manufacturing the rewiring substrate of FIG. 1. [Figure 8]2A to 2C are schematic cross-sectional views for explaining an example of a method for manufacturing the rewiring substrate of FIG. 1. [Figure 9] 2A to 2C are schematic cross-sectional views for explaining an example of a method for manufacturing the rewiring substrate of FIG. 1. [Figure 10] 2A to 2C are schematic cross-sectional views for explaining an example of a method for manufacturing the rewiring substrate of FIG. 1. [Figure 11] 2A to 2C are schematic cross-sectional views for explaining an example of a method for manufacturing the rewiring substrate of FIG. 1. [Figure 12] 2A to 2C are schematic cross-sectional views for explaining an example of a method for manufacturing the rewiring substrate of FIG. 1. [Figure 13] 2A to 2C are schematic cross-sectional views for explaining an example of a method for manufacturing the rewiring substrate of FIG. 1. [Figure 14] 2A to 2C are schematic cross-sectional views for explaining an example of a method for manufacturing the rewiring substrate of FIG. 1. [Figure 15] 2A to 2C are schematic cross-sectional views for explaining an example of a method for manufacturing the rewiring substrate of FIG. 1. [Figure 16] 2A to 2C are schematic cross-sectional views for explaining an example of a method for manufacturing the rewiring substrate of FIG. 1. [Figure 17] 2A to 2C are schematic cross-sectional views for explaining an example of a method for manufacturing the rewiring substrate of FIG. 1. [Figure 18] FIG. 10 is a vertical cross-sectional view of a rewiring substrate according to a second embodiment of the present invention. [Figure 19] 19A to 19C are schematic cross-sectional views for explaining an example of a method for manufacturing the rewiring substrate of FIG. 18. [Figure 20] 19 is a schematic cross-sectional view for explaining an example of a method for manufacturing the rewiring substrate of FIG. 18. FIG. [Figure 21] FIG. 10 is a vertical cross-sectional view of a rewiring substrate according to another embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0014] 1. First embodiment (1) Basic configuration of electronic devices Hereinafter, a printed circuit board, a semiconductor package substrate, an electronic device, and a method for manufacturing a printed circuit board according to an embodiment of the present invention will be described with reference to the drawings. A rewiring substrate will be described as an example of a printed circuit board. A rewiring substrate is disposed between an electronic component such as a semiconductor chip and another printed circuit board such as a rigid printed wiring circuit board (hereinafter abbreviated as a rigid board), and serves to convert the pitch between the fine patterns of the electronic component and the coarse patterns of the other printed circuit board. A rewiring substrate is also called an interposer substrate.

[0015] FIG. 1 is a longitudinal cross-sectional view of an electronic device according to a first embodiment of the present invention. As shown in FIG. 1, electronic device 500 includes rewiring substrate 100, semiconductor chip 200, and rigid substrate 300. Rewiring substrate 100 is a multilayer substrate in which multiple insulating layers and multiple conductor layers are stacked. Details of rewiring substrate 100 will be described later. In electronic device 500, the direction in which the multiple insulating layers and multiple conductor layers of rewiring substrate 100 are stacked is called the stacking direction. Rewiring substrate 100 is disposed between semiconductor chip 200 and rigid substrate 300 in the stacking direction.

[0016] The semiconductor chip 200 is, for example, a DRAM (Dynamic Random Access Memory), and has a plurality of bonding portions 210. The plurality of bonding portions 210 of the semiconductor chip 200 are bonded via solder 510 to a plurality of portions of a conductor layer exposed from one surface of the rewiring substrate 100 in the stacking direction. The semiconductor chip 200 is bonded to the rewiring substrate 100 and further sealed with resin, thereby forming a semiconductor package substrate 400.

[0017] Examples of the semiconductor package substrate 400 include a FC-CSP (Flip Chip-Chip Scale Package), a MIS-BGA (Molded Interconnect Substrate-Ball Grid Array) package, an ETS-BGA (Embedded Trace Substrate-Ball Grid Array) package, a Fan-out WLP (Wafer Level Package), a Fan-in WLP, a Fan-out PLP (Panel Level Package), a Fan-in PLP, an FC-BGA (Flip Chip-Chip, -Ball Grid Array), a high-end 2.5D package or a 3D package, etc.

[0018] The rigid substrate 300 has a plurality of electrode pads 310. The plurality of electrode pads 310 of the rigid substrate 300 are respectively bonded via solder 520 to a plurality of portions of the conductor layer exposed from the other surface of the rewiring substrate 100 in the stacking direction. In this way, a semiconductor package substrate 400 is mounted on the rigid substrate 300, and an electronic device 500 is configured. The electronic device 500 may be, for example, a mobile terminal such as a smartphone, a tablet terminal, or a wearable terminal. Alternatively, the electronic device 500 may be, for example, a desktop or notebook personal computer.

[0019] (2) Rewiring board configuration FIG. 2 is a longitudinal cross-sectional view of the rewiring substrate 100 of FIG. 1. As shown in FIG. 2, the rewiring substrate 100 includes a support layer 110, multiple insulating layers 120, multiple conductor layers 130, and multiple connecting conductors 140. The thickness of the support layer 110 is, for example, 10 μm or more and 100 μm or less. The support layer 110 has higher rigidity than the insulating layer 120. Specifically, the support layer 110 is formed of stainless steel. The support layer 110 may be formed of copper, a copper alloy, aluminum, titanium, or an alloy containing iron and nickel. Examples of alloys containing iron and nickel include invar, 42 alloy, 45 permalloy, and copal. Multiple openings 111 are formed in multiple portions of the support layer 110, penetrating the support layer 110 in the stacking direction.

[0020] In this example, the rewiring substrate 100 includes five insulating layers 120. The thickness of each insulating layer 120 is, for example, 3 μm or more and 20 μm or less. When distinguishing between the five insulating layers 120, the five insulating layers 120 are referred to as insulating layers 121 to 125, respectively. Each insulating layer 120 is formed of a photosensitive material. Examples of photosensitive materials that can be used include photosensitive resins such as acrylic resin, methacrylic resin, epoxy resin, polyamide resin, polybenzoxazole resin, polyvinyl chloride resin, and polyimide resin. In particular, the photosensitive resin for the insulating layers 121 to 123 preferably contains acrylic acid or methacrylic acid.

[0021] The insulating layer may or may not contain a filler. Examples of the filler include inorganic fillers and organic fillers. Examples of inorganic fillers include silicon oxide, silicon nitride, aluminum oxide, aluminum nitride, aluminum hydroxide, boron nitride, crystalline silica, barium sulfate, magnesium carbonate, and calcium carbonate.

[0022] The insulating layer may or may not contain glass fiber. An insulating layer containing glass fiber is formed by impregnating a glass fiber cloth with a synthetic resin, such as a glass epoxy represented by FR4 (Flame Retardant Type 4).

[0023] In this example, the rewiring substrate 100 includes five conductor layers 130. The thickness of each conductor layer 130 is, for example, 3 μm or more and 10 μm or less. When distinguishing between the five conductor layers 130, the five conductor layers 130 are referred to as conductor layers 131 to 135, respectively. Each conductor layer 130 is formed of a metal or alloy containing one or more of copper, gold, silver, platinum, lead, tin, nickel, cobalt, indium, rhodium, chromium, tungsten, ruthenium, and the like. Each of the conductor layers 131 to 135 is divided into a plurality of portions that are electrically insulated from one another.

[0024] The insulating layer 121 is formed on one surface of the support layer 110. The conductor layer 131 is formed on the insulating layer 121. The insulating layer 122 is formed on the insulating layer 121 so as to cover the conductor layer 131. The conductor layer 132 is formed on the insulating layer 122. The insulating layer 124 is formed on the insulating layer 122 so as to cover the conductor layer 132. A plurality of openings 20 are formed in the insulating layer 124, exposing a plurality of portions of the conductor layer 132, respectively. The portions of the conductor layer 132 exposed from the plurality of openings 20 are respectively joined to a plurality of joining portions 210 of the semiconductor chip 200 via solder 510 (see FIG. 1 ).

[0025] The conductor layer 133 is formed on the insulating layer 121 in a state where it is electrically insulated from the support layer 110 within the plurality of openings 111 in the support layer 110. The insulating layer 123 is formed on the insulating layer 121 so as to cover the support layer 110 and the conductor layer 133. The conductor layer 134 is formed on the insulating layer 123. The conductor layer 135 is formed on the conductor layer 134. The insulating layer 125 is formed on the insulating layer 123 so as to cover the conductor layers 134 and 135. The insulating layer 125 has a plurality of openings 30 formed therein, each exposing a plurality of portions of the conductor layer 135. The portions of the conductor layer 135 exposed from the plurality of openings 30 are respectively bonded to a plurality of electrode pads 310 of the rigid substrate 300 via solder 520 (see FIG. 1 ).

[0026] As described above, the rewiring substrate 100 serves to convert the pitch between the fine pattern of the semiconductor chip 200 and the coarse pattern of the rigid substrate 300. Therefore, in a plan view, the area of ​​the portion of the conductor layer 135 exposed from each opening 30 is larger than the area of ​​the portion of the conductor layer 132 exposed from each opening 20. Furthermore, in a plan view, the pitch between two conductor layers 135 exposed from two adjacent openings 30 is larger than the pitch between two conductor layers 132 exposed from two adjacent openings 20.

[0027] Each connection conductor 140 is made of a metal or alloy containing one or more of copper, gold, silver, platinum, lead, tin, nickel, cobalt, indium, rhodium, chromium, tungsten, ruthenium, etc. Each connection conductor 140 may be made of the same material as the conductor layer 130. A plurality of connection openings 10 are formed in each of the insulating layers 121 to 123, penetrating the insulating layers in the stacking direction. The shape of the connection openings 10 will be described later. Each connection conductor 140 is formed in one of the connection openings 10, and electrically connects a portion of one conductor layer 130 to a portion of another conductor layer 130.

[0028] Specifically, the connection conductors 140 formed in each connection opening 10 of the insulating layer 121 are called connection conductors 141. The connection conductors 140 formed in each connection opening 10 of the insulating layer 122 are called connection conductors 142. The connection conductors 140 formed in each connection opening 10 of the insulating layer 123 are called connection conductors 143. Each connection conductor 141 electrically connects a portion of the conductor layer 131 to a portion of the conductor layer 133. Each connection conductor 142 electrically connects a portion of the conductor layer 131 to a portion of the conductor layer 132. Each connection conductor 143 electrically connects a portion of the conductor layer 133 to a portion of the conductor layer 134.

[0029] FIG. 3 is a partially enlarged cross-sectional view of the rewiring substrate 100 for explaining the shape of the connection opening 10 in the insulating layer 120. Note that in FIG. 3, the rewiring substrate 100 is illustrated with an aspect ratio other than 1:1 to facilitate understanding of the shape of the connection opening 10. As shown in FIG. 3, the insulating layer 120 has two surfaces facing in opposite directions in the stacking direction. One surface of the insulating layer 120 in the stacking direction is referred to as the front surface 120A, and the other surface of the insulating layer 120 is referred to as the back surface 120B. A cross section of the insulating layer 120 virtually cut along a plane that passes through the center of the connection opening 10 and is parallel to the stacking direction is referred to as a longitudinal cross section of the insulating layer 120.

[0030] The connection opening 10 is formed to penetrate from the front surface 120A to the back surface 120B of the insulating layer 120. The connection opening 10 has a straight portion 11 and a bottom portion (undercut portion) 12. The straight portion 11 is a region of the connection opening 10 where at least a portion of the inner circumferential surface is linear in a longitudinal cross section of the insulating layer 120, and in this example, is continuous with the front surface 120A of the insulating layer 120. In this example, the straight portion 11 has a tapered shape in which the diameter gradually decreases from the front surface 120A to the back surface 120B, but the embodiment is not limited to this. The straight portion 11 may not have a tapered shape, and the diameter of the straight portion 11 may be constant. Furthermore, the boundary between the front surface 120A of the insulating layer 120 and the straight portion 11 may be curved.

[0031] In the longitudinal cross section of the insulating layer 120, the skirt portion 12 is a region of the connection opening 10 whose inner circumferential surface is curved, and it widens from the end of the straight portion 11 while extending toward the back surface 120B of the insulating layer 120. Therefore, the diameter of the skirt portion 12 rapidly increases from the end of the straight portion 11 toward the back surface 120B of the insulating layer 120. Here, the boundary between the straight portion 11 and the skirt portion 12 in the connection opening 10 is called the boundary portion 13. In addition, in the longitudinal cross section of the insulating layer 120, the portion where a straight line that passes through the outermost periphery of the skirt portion 12 and is parallel to the back surface 120B of the insulating layer 120 intersects with a virtual extension of the straight portion 11 is called the intersection portion 14.

[0032] The thickness of insulating layer 120 is defined as a. The thickness of skirt 12 (the distance between the outermost periphery of skirt 12 of insulating layer 120 in the stacking direction and boundary 13) is defined as b. The maximum amount of skirt 12 extending outward from straight portion 11 in a plane parallel to the stacking direction is defined as c. If straight portion 11 has a tapered shape, c is the distance between the outermost periphery of the end of skirt 12 and intersection 14. The thickness of conductor layer 130 formed on surface 120A of insulating layer 120 is defined as d. In this case, skirt 12 is formed so that b / a is 0.5 or less.

[0033] The skirt 12 may be formed so that b / c is 0.8 or more. With this configuration, even when the connection opening 10 has the skirt 12, the connection conductor 140 can be easily formed in the connection opening 10 in a short time so as to be in close contact with the insulating layer 120. The skirt 12 may also be formed so that c / d is 0.5 or more. With this configuration, when the conductor layer 130 and the connection conductor 140 on the front surface 120A are formed simultaneously, the conductor layer 130 and the connection conductor 140 that are in close contact with each other can be easily formed in a short time by electrolytic plating or the like.

[0034] (3) Manufacturing method of rewiring substrate 4 to 17 are schematic cross-sectional views illustrating an example of a method for manufacturing the rewiring substrate 100 of FIG. 1. First, as shown in FIG. 3, a support layer 110 is prepared. In this embodiment, the rewiring substrate 100 may be manufactured by, for example, a roll-to-roll method. In this case, the step of FIG. 4 is performed by unwinding the support layer 110 from a winding roll around which the support layer 110 is wound.

[0035] Next, as shown in FIG. 5, an insulating layer 121 having a plurality of connection openings 10 is formed on one surface of the support layer 110. Specifically, as shown in FIG. 6, a film-like photosensitive resin precursor 120X containing acrylic acid or methacrylic acid is laminated on one surface of the support layer 110. The photosensitive resin precursor 120X may not be in film form, but may be in varnish form. Subsequently, exposure light from an exposure light source (not shown) is irradiated onto the resin precursor 120X through a mask 150 having a predetermined pattern, thereby exposing a portion of the resin precursor 120X.

[0036] In this case, cured portions and uncured portions are formed in the resin precursor 120X. The cured portions are portions of the resin precursor 120X that have been exposed to light. The uncured portions are portions of the resin precursor 120X that have not been exposed to light because they are shielded by the mask 150. In this example, the uncured portions have a tapered shape in which the diameter gradually decreases from the surface of the resin precursor 120X that faces the light source toward the rear surface on the opposite side.

[0037] Subsequently, the cured portion of the resin precursor 120X is treated with an aqueous solution containing divalent ions (for example, magnesium sulfate) to form an insulating layer 120 (insulating layer 121 in this example) as shown in Fig. 7. In the insulating layer 120, the portion from which the uncured portion of the resin precursor 120X has been removed becomes the connection opening 10. By performing the steps of Figs. 6 and 7, the step of Fig. 5 is completed.

[0038] 8, a plurality of connection conductors 141 are formed in the plurality of connection openings 10 of the insulating layer 121, and a conductor layer 131 having a predetermined pattern is formed on the insulating layer 121. Specifically, a seed layer is formed on the inner circumferential surface of each connection opening 10 and in a predetermined region on the insulating layer 121, and then electrolytic plating is performed on the seed layer to form the plurality of connection conductors 141 and the conductor layer 131. The plurality of conductor layers 131 and the plurality of connection conductors 141 may be integrally formed in the same process.

[0039] Next, as shown in Fig. 9, an insulating layer 122 is formed on the insulating layer 121, covering the conductor layer 131 and having a plurality of connection openings 10 that overlap a plurality of portions of the conductor layer 131. The procedure for forming the insulating layer 122 may be the same as the procedure for forming the insulating layer 121. Subsequently, as shown in Fig. 10, a plurality of connection conductors 142 are formed in the plurality of connection openings 10 of the insulating layer 122, and a conductor layer 132 having a predetermined pattern is formed on the insulating layer 122. The procedure for forming the connection conductors 142 and the conductor layer 132 may be the same as the procedure for forming the connection conductors 141 and the conductor layer 131.

[0040] 11 , an insulating layer 124 is formed on the insulating layer 122, covering the conductor layer 132 and having a plurality of openings 20 that overlap with a plurality of portions of the conductor layer 132. The procedure for forming the insulating layer 124 may be the same as or different from the procedure for forming the insulating layer 121. For example, after the insulating layer 124 is formed by exposing a resin precursor to light, the plurality of openings 20 may be formed in the insulating layer 124 by laser processing.

[0041] Next, as shown in FIG. 12, a plurality of openings 111 are formed in the support layer 110 by, for example, etching. A ferric chloride solution is used as an etching solution. A plurality of connection conductors 141 are exposed from the plurality of connection openings 10. Subsequently, as shown in FIG. 13, a conductor layer 133 is formed in the plurality of openings 111 in the support layer 110. The conductor layer 133 may be formed by sequentially forming a seed layer and electrolytic plating. A plurality of portions of the conductor layer 133 are electrically connected to the plurality of connection conductors 141, respectively, and are electrically insulated from the support layer 110.

[0042] Next, as shown in Fig. 14 , an insulating layer 123 is formed on the insulating layer 121, covering the support layer 110 and the conductor layer 133 and having a plurality of connection openings 10 that overlap a plurality of portions of the conductor layer 133. The procedure for forming the insulating layer 123 may be the same as the procedure for forming the insulating layer 121. Subsequently, as shown in Fig. 15 , a plurality of connection conductors 143 are formed in the plurality of connection openings 10 of the insulating layer 123, and a conductor layer 134 having a predetermined pattern is formed on the insulating layer 123. The procedure for forming the connection conductors 143 and the conductor layer 134 may be the same as the procedure for forming the connection conductors 141 and the conductor layer 131.

[0043] Thereafter, as shown in FIG. 16, a conductor layer 135 is formed on the conductor layer 134. The procedure for forming the conductor layer 135 may be the same as the procedure for forming the conductor layer 133. Finally, as shown in FIG. 17, an insulating layer 125 is formed on the insulating layer 123, covering the conductor layer 135 and having a plurality of openings 30 that overlap with a plurality of portions of the conductor layer 135. The procedure for forming the insulating layer 125 may be the same as the procedure for forming the insulating layer 124. In this way, the rewiring substrate 100 is completed.

[0044] (4) Divalent ion content In the method for manufacturing the rewiring substrate 100 according to the present embodiment, the insulating layer 120 is treated with an aqueous solution containing divalent ions in the step of Fig. 7. Therefore, divalent ions may remain at the boundary surface between the connection opening 10 of the insulating layer 120 and the connection conductor 140.

[0045] In this case, when observing the boundary between the connection opening 10 and the connection conductor 140, the total content of divalent ions relative to all elements detected is preferably 0.5% or less. This configuration sufficiently prevents ion migration even when the rewiring substrate 100 is used for a long period of time. This makes it possible to maintain electrical insulation between the connection conductors 140 or between portions of the conductor layer 130.

[0046] As an example of evaluation conditions, the insulating layer 120 is developed with a sodium carbonate aqueous solution with a concentration of 1% by weight, and then treated with magnesium sulfate with a concentration of 25 ppm for 90 seconds. In this example, the divalent ions contained in the aqueous solution are magnesium sulfate, but the divalent ions are not limited to magnesium sulfate. The concentration of the divalent ions is also adjusted as appropriate. Next, the insulating layer 120 is washed with water and then dried. Subsequently, the connection conductor 140 is formed in the connection opening 10 of the insulating layer 120, and the boundary between the connection opening 10 and the connection conductor 140 is observed by EDX (energy dispersive X-ray analysis). The observation device used is, for example, an XFlash FlatQUAD manufactured by Bruker, and the acceleration voltage for generating X-rays is, for example, 5 kV.

[0047] (5) Effects In the rewiring substrate 100 according to the present embodiment, an insulating layer 120 is stacked on one conductor layer 130. A connection opening 10 is formed in the insulating layer 120, penetrating the insulating layer 120 in the stacking direction. Another conductor layer 130 is stacked on the insulating layer 120. A connection conductor 140 that electrically connects the conductor layers 130 is formed in the connection opening 10 of the insulating layer 120. Here, the connection opening 10 has a straight portion 11 and a skirt portion 12. In a cross section parallel to the stacking direction, at least a portion of the inner circumferential surface of the straight portion 11 has a straight shape. The skirt portion 12 extends from the end of the straight portion 11 while widening in a plane intersecting the stacking direction. In the stacking direction, the ratio of the thickness of the skirt portion 12 to the thickness of the insulating layer 120 is 0.5 or less.

[0048] In this configuration, the connection conductor 140 can be formed in the connection opening 10 so as to be in close contact with the insulating layer 120. In addition, the bottom portion 12 of the connection opening 10 has a relatively small thickness and a larger diameter than the straight portion 11. Therefore, the portion of the connection conductor 140 formed in the bottom portion 12 of the connection opening 10 is connected to the conductor layer 130, thereby improving the connection reliability and conductivity between the connection conductor 140 and the conductor layer 130.

[0049] The bottom portion 12 of the connection opening 10 has a curved inner peripheral surface in a longitudinal cross section. In this case, the connection conductor 140 can be easily formed in the connection opening 10. For example, when the connection conductor 140 is formed by electrolytic plating, the seed layer and the plating can each be easily formed.

[0050] The insulating layers 121 to 123 contain at least one of acrylic acid and methacrylic acid. In this case, the connection opening 10 having the skirt portion 12 can be easily formed. For example, in the step of forming the insulating layer 120, the connection opening 10 having the skirt portion 12 can be easily formed by converting a part of the resin precursor 120X into a sol using a predetermined developer and then treating it with an aqueous solution containing divalent ions.

[0051] 2. Second embodiment (1) Structure of the rewiring board The rewiring substrate 100 according to the second embodiment of the present invention will be described with respect to differences from the rewiring substrate 100 according to the first embodiment. FIG. 18 is a longitudinal cross-sectional view of the rewiring substrate 100 according to the second embodiment of the present invention. As shown in FIG. 18, the rewiring substrate 100 according to this embodiment does not include a conductor layer 133. Furthermore, each connecting conductor 143 has a thickness greater than each connecting conductor 143 in the first embodiment.

[0052] Specifically, the multiple connection conductors 143 extend into the multiple support layers 110. In this configuration, the connection openings 10 in the insulating layer 121 and the connection openings 10 in the insulating layer 123 are continuous with their foot portions 12 (FIG. 3) continuing together. Therefore, the portions of the connection conductors 141 formed in the foot portions 12 of the multiple connection openings 10 in the insulating layer 121 contact with the portions of the connection conductors 143 formed in the foot portions 12 of the multiple connection openings 10 in the insulating layer 123. This electrically connects the multiple connection conductors 141 and the multiple connection conductors 143 to each other.

[0053] That is, in the first embodiment, the conductor layer 131 and the conductor layer 134 are electrically connected via the connecting conductor 141, the conductor layer 133, and the connecting conductor 143. In contrast, in the present embodiment, the conductor layer 131 and the conductor layer 134 are electrically connected via the connecting conductor 141 and the connecting conductor 143.

[0054] (2) Manufacturing method of rewiring substrate 19 and 20 are schematic cross-sectional views for explaining an example of a method for manufacturing the rewiring substrate 100 of Fig. 18. In the method for manufacturing the rewiring substrate 100 according to the present embodiment, the steps of Figs. 4 to 12 in the first embodiment are carried out in order.

[0055] 12, as shown in Fig. 19, an insulating layer 123 is formed on the insulating layer 121, covering the support layer 110 and having a plurality of connection openings 10 respectively overlapping the plurality of connection conductors 141. The depth of each connection opening 10 in the insulating layer 123 formed in this embodiment is greater than the depth of each connection opening 10 in the insulating layer 123 formed in the step of Fig. 14 in the first embodiment.

[0056] 20, a plurality of connection conductors 143 are formed in the plurality of connection openings 10 of the insulating layer 123, and a conductor layer 134 having a predetermined pattern is formed on the insulating layer 123. As described above, the thickness of each connection conductor 143 formed in this embodiment is greater than the thickness of each connection conductor 143 formed in the step of FIG. 15 in the first embodiment.

[0057] 16 and 17 are then sequentially performed. In this case, a conductor layer 135 is formed on the conductor layer 134. Furthermore, an insulating layer 125 is formed on the insulating layer 123, covering the conductor layer 135 and having a plurality of openings 30 that overlap a plurality of portions of the conductor layer 135. This completes the rewiring substrate 100 of FIG. 18.

[0058] (3) Effects In the rewiring substrate 100 according to this embodiment, even when the conductor layer 131 and the conductor layer 134 are separated by a relatively large distance in the thickness direction, the conductor layer 131 and the conductor layer 134 can be electrically connected by the connection conductors 141 and 143 without the conductor layer 133. Furthermore, in this example, the connection opening 10 of the insulating layer 121 and the connection opening 10 of the insulating layer 123 are continuous with their bottoms 12 connected to each other, so that the contact area between the connection conductors 141 and 143 is kept large. This makes it possible to improve the connection reliability and conductivity between the connection conductors 141 and 143.

[0059] 3. Other embodiments (1) In the above embodiment, the rewiring substrate 100 includes the support layer 110, but the embodiment is not limited to this. The rewiring substrate 100 is a flexible wired circuit board having flexibility. Therefore, the rewiring substrate 100 does not necessarily have to include the support layer 110.

[0060] (2) In the above embodiment, the conductor layer 130 and the connecting conductor 140 are formed by electrolytic plating, but the embodiment is not limited to this. The conductor layer 130 and the connecting conductor 140 may be formed by other methods, such as electroless plating.

[0061] (3) In the above embodiment, the connection openings 10 are formed by exposing and developing the resin precursor 120X, but the embodiment is not limited to this. The connection openings 10 may be formed by mechanical processing such as laser processing of the insulating layers 121 to 123. In this case, the insulating layers 121 to 123 may not contain acrylic acid or methacrylic acid.

[0062] (4) In the above embodiment, the total content of divalent ions relative to all elements detected at the boundary between the connection opening 10 and the connection conductor 140 is set to 0.5% or less, but the embodiment is not limited to this. If ion migration hardly occurs even after long-term use of the rewiring substrate 100, the total content of divalent ions relative to all elements detected at the boundary between the connection opening 10 and the connection conductor 140 may be greater than 0.5%.

[0063] (5) In the above embodiment, the bottom 12 of the connection opening 10 has a curved inner circumferential surface in vertical cross section, but the embodiment is not limited to this. The bottom 12 of the connection opening 10 may have a linear inner circumferential surface in vertical cross section, as long as the connection conductor 140 can be formed in the connection opening 10. Similarly, the bottom 12 may be formed so that b / c is less than 0.8, or so that c / d is less than 0.5, as long as the connection conductor 140 can be formed in the connection opening 10.

[0064] (6) In the second embodiment, the connection opening 10 in the insulating layer 121 and the connection opening 10 in the insulating layer 123 are continuous with their bottom portions 12 connected to each other, but the embodiment is not limited to this. As long as the connection opening 10 in the insulating layer 121 and the connection opening 10 in the insulating layer 123 are continuous with each other, their bottom portions 12 do not have to be continuous with each other. Therefore, for example, the bottom portion 12 of the connection opening 10 in the insulating layer 121 and the linear portion 11 of the connection opening 10 in the insulating layer 123 may be continuous with each other.

[0065] Alternatively, connection opening 10 of insulating layer 121 or insulating layer 123 may not include bottom hem 12. FIG. 21 is a longitudinal cross-sectional view of rewiring substrate 100 according to another embodiment. In the example of FIG. 21, connection opening 10 of insulating layer 123 includes straight portion 11 but does not include bottom hem 12. Even in this case, connection opening 10 of insulating layer 121 and connection opening 10 of insulating layer 123 are continuous with each other, so that conductor layer 131 and conductor layer 134 can be electrically connected by connecting conductors 141 and 143 without conductor layer 133 even when conductor layer 131 and conductor layer 134 are spaced apart relatively far from each other in the thickness direction.

[0066] 4. Correspondence between each element of the claims and each part of the embodiment Below, examples of correspondence between each element of the claims and each element of the embodiments will be described, but the present invention is not limited to the following examples. Various other elements having the configuration or function described in the claims can also be used as each element of the claims.

[0067] In the above embodiment, the connection opening 10 of each insulating layer 120 is an example of a connection opening, the straight line portion 11 is an example of a straight line portion, and the bottom portion 12 is an example of a bottom portion. Also, the conductor layer 131 is an example of a first conductor layer, the insulating layer 122 is an example of an insulating layer, the conductor layer 132 is an example of a second conductor layer, and the connecting conductor 142 is an example of a connecting conductor.

[0068] Alternatively, in the first embodiment, conductor layer 133 is an example of a first conductor layer, insulating layer 121 or insulating layer 123 is an example of an insulating layer, conductor layer 131 or conductor layer 134 is an example of a second conductor layer, and connecting conductor 141 or connecting conductor 143 is an example of a connecting conductor. In the second embodiment, conductor layer 131 is an example of a first conductor layer, insulating layer 121 is an example of a first insulating layer, insulating layer 123 is an example of a second insulating layer, conductor layer 134 is an example of a second conductor layer, connecting conductor 141 is an example of a first connecting conductor, and connecting conductor 143 is an example of a second connecting conductor.

[0069] 5. Summary of the embodiment (Item 1) The printed circuit board according to item 1 is a first conductor layer; an insulating layer stacked on the first conductor layer and having a connection opening penetrating in the stacking direction; a second conductor layer laminated on the insulating layer; a connection conductor formed in the connection opening of the insulating layer and electrically connecting the first conductor layer and the second conductor layer; The connection opening is In a cross section parallel to the stacking direction, at least a part of the inner circumferential surface has a linear shape; a skirt portion extending from an end of the linear portion while widening in a plane intersecting the stacking direction, In the stacking direction, the ratio of the thickness of the bottom portion to the thickness of the insulating layer is 0.5 or less.

[0070] In this wired circuit board, the connection conductor can be formed in the connection opening so as to be in close contact with the insulating layer. The base of the connection opening has a relatively small thickness and a larger diameter than the linear portion. Therefore, the portion of the connection conductor formed in the base of the connection opening is connected to the conductor to be connected, thereby improving the connection reliability and conductivity between the connection conductor and the connection object.

[0071] (Item 2) In the wired circuit board according to item 1, The ratio of the thickness of the skirt portion to the maximum amount of expansion of the skirt portion from the linear portion within the plane may be 0.8 or more.

[0072] According to this configuration, even when the connection opening has a bottom, the connection conductor can be easily formed in the connection opening in a short time so as to be in close contact with the insulating layer.

[0073] (Item 3) In the wired circuit board according to item 1 or 2, The bottom portion of the connection opening may have a curved inner circumferential surface in the cross section.

[0074] In this case, the connecting conductor can be formed more easily.

[0075] (Item 4) In the wired circuit board according to any one of items 1 to 3, The ratio of the maximum spreading amount of the skirt portion from the linear portion in the plane to the thickness of the second conductor layer may be 0.5 or more.

[0076] According to this configuration, when the second conductor layer and the connecting conductor are formed simultaneously, the second conductor layer and the connecting conductor that are in close contact with each other can be easily formed in a short time.

[0077] (Item 5) In the wired circuit board according to any one of items 1 to 4, The insulating layer may contain at least one of acrylic acid and methacrylic acid.

[0078] In this case, a connection opening having a bottom portion can be easily formed.

[0079] (Item 6) In the wired circuit board according to any one of items 1 to 5, The ratio of the total content of divalent ions to the content of all elements detected at the boundary surface between the connection opening and the connection conductor may be 0.5% or less.

[0080] According to this configuration, even when the printed circuit board is used for a long period of time, the occurrence of ion migration is sufficiently prevented.

[0081] (Item 7) In the wired circuit board according to any one of items 1 to 6, The insulating layer is a first insulating layer in which a first connection opening is formed as the connection opening; a second insulating layer stacked on the first insulating layer and having a second connection opening formed therein and penetrating in the stacking direction; the first connection opening and the second connection opening are continuous with each other, The connecting conductor is a first connection conductor formed in the first connection opening of the first insulating layer; The semiconductor device may include a second connection conductor formed in the second connection opening of the second insulating layer and electrically connected to the first connection conductor.

[0082] According to this configuration, even if the first conductor layer and the second conductor layer are separated by a relatively large distance in the thickness direction, the first connecting conductor and the second connecting conductor can electrically connect the first conductor layer and the second conductor layer.

[0083] (Item 8) The semiconductor package substrate according to item 8 is The wired circuit board according to any one of items 1 to 7 is included.

[0084] This semiconductor package substrate can improve the connection reliability and conductivity between the connection conductor of the printed circuit board and the connection target.

[0085] (Article 9) The electronic equipment referred to in paragraph 9 is The semiconductor package substrate according to claim 8 is included.

[0086] According to this electronic device, it is possible to improve the connection reliability and conductivity between the connection conductor of the semiconductor package substrate and the connection target.

[0087] (Item 10) The method for manufacturing a printed circuit board according to item 10 includes: laminating an insulating layer on the first conductor layer; forming a connection opening in the insulating layer that penetrates the insulating layer in a stacking direction; laminating a second conductor layer on the insulating layer; forming a connection conductor in the connection opening to electrically connect the first conductor layer and the second conductor layer; The connection opening is In a cross section parallel to the stacking direction, the inner circumferential surface has a linear portion having a linear shape at least in part, and a skirt portion extending while widening from an end of the linear portion within a plane intersecting the stacking direction, In the stacking direction, the ratio of the thickness of the bottom portion to the thickness of the insulating layer is 0.5 or less.

[0088] According to this method for manufacturing a wired circuit board, the connection conductor can be formed in the connection opening so as to be in close contact with the insulating layer. Furthermore, the base of the connection opening has a relatively small thickness and a larger diameter than the linear portion. Therefore, the portion of the connection conductor formed in the base of the connection opening is connected to the conductor to be connected, thereby improving the connection reliability and conductivity between the connection conductor and the connection object. [Explanation of symbols]

[0089] 10...connection opening, 11...straight portion, 12...hem portion, 13...boundary portion, 14...intersection portion, 20, 30, 111...opening portion, 100...rewiring substrate, 110...support layer, 120-125...insulating layer, 120A...surface, 120B...back surface, 120X...resin precursor, 130-135...conductor layer, 140-143...connection conductor, 150...mask, 200...semiconductor chip, 210...joint portion, 300...rigid substrate, 310...electrode pad, 400...semiconductor package substrate, 500...electronic device, 510, 520...solder

Claims

1. a first conductor layer; an insulating layer stacked on the first conductor layer and having a connection opening penetrating in the stacking direction; a second conductor layer laminated on the insulating layer; a connection conductor formed in the connection opening of the insulating layer and electrically connecting the first conductor layer and the second conductor layer; The connection opening is In a cross section parallel to the stacking direction, at least a part of the inner circumferential surface has a linear shape; a skirt portion extending from an end of the linear portion while widening in a plane intersecting the stacking direction, A printed circuit board, wherein the ratio of the thickness of the bottom portion to the thickness of the insulating layer in the stacking direction is 0.5 or less.

2. 2. The printed circuit board according to claim 1, wherein a ratio of the thickness of said bottom portion to the maximum extent of said bottom portion extending from said straight portion in said plane is 0.8 or more.

3. 3. The printed circuit board according to claim 1, wherein the bottom portion of the connection opening has a curved inner peripheral surface in the cross section.

4. 3. The printed circuit board according to claim 1, wherein a ratio of a maximum spread of said skirt portion from said linear portion in said plane to a thickness of said second conductor layer is 0.5 or more.

5. 3. The printed circuit board according to claim 1, wherein said insulating layer contains at least one of acrylic acid and methacrylic acid.

6. 3. The printed circuit board according to claim 1, wherein the ratio of the total content of divalent ions to the total content of all elements detected at the boundary surface between said connection opening and said connection conductor is 0.5% or less.

7. The insulating layer is a first insulating layer in which a first connection opening is formed as the connection opening; a second insulating layer stacked on the first insulating layer and having a second connection opening formed therein and penetrating in the stacking direction; the first connection opening and the second connection opening are continuous with each other, The connecting conductor is a first connection conductor formed in the first connection opening of the first insulating layer; 3. The printed circuit board according to claim 1, further comprising a second connection conductor formed in the second connection opening of the second insulating layer and electrically connected to the first connection conductor.

8. A semiconductor package substrate comprising the wired circuit board according to claim 1 or 2.

9. An electronic device comprising the semiconductor package substrate according to claim 8.

10. laminating an insulating layer on the first conductor layer; forming a connection opening in the insulating layer that penetrates the insulating layer in a stacking direction; laminating a second conductor layer on the insulating layer; forming a connection conductor in the connection opening to electrically connect the first conductor layer and the second conductor layer; The connection opening is In a cross section parallel to the stacking direction, the inner circumferential surface has a linear portion having a linear shape at least in part, and a skirt portion extending while widening from an end of the linear portion within a plane intersecting the stacking direction, a ratio of the thickness of the bottom portion to the thickness of the insulating layer in the stacking direction is 0.5 or less.

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