Pixel circuit and driving method thereof

Abstract

To provide a pixel circuit and a driving method thereof for improving display uniformity.SOLUTION: The pixel circuit includes: a data writing unit that controls an input of a data signal; a first energy storage unit, which stores the data signal output from the data writing unit, where a first end of the first energy storage unit is connected with an output end of the data writing unit; a second energy storage unit, which stores the data signal together with the first energy storage unit, where a first end of the second energy storage unit is connected with a high potential VDD, and a second end of the second energy storage unit is connected with a second end of the first energy storage unit; a light-emitting unit that performs light emission display; a driving unit, where an input end of the driving unit is connected with the high potential VDD, a control end of the driving unit is input with a control signal, and an output end of the driving unit provides a light-emitting current to the light-emitting unit; and a light-emitting control transistor, where an input end of the light-emitting control transistor is connected with the output end of the driving unit, a control end of the light-emitting control transistor is connected with the first end of the first energy storage unit, and an output end of the light-emitting control transistor is connected with the light-emitting unit.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to the field of display technology, and in particular to a pixel circuit and a driving method thereof. [Background technology]

[0002] Organic light-emitting diodes (OLEDs) are currently one of the hot topics in flat panel display research. Compared with liquid crystal displays (LCDs), OLEDs have the advantages of low power consumption, low production costs, self-luminance, wide viewing angles, and fast response times. Currently, OLEDs are gradually replacing traditional LCDs in flat panel displays such as smartphones, PDAs, and digital cameras. The design of the driving circuit is a key technology for realizing display functionality.

[0003] The driving circuit generally includes a scanning driving circuit, a light emitting control circuit, a data driving circuit, a pixel circuit, etc. The design of the pixel circuit is the core technology of OLED displays and has important research significance.

[0004] With the development of display technology, the demand for display effects is increasing. However, due to the differences in the physical structure and electrical characteristics of semiconductor devices between different pixels, the substrate bias voltage has a significant impact on device performance, especially in MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors). How to optimize the substrate bias effect is a challenge that needs to be solved to improve display uniformity. Summary of the Invention [Problem to be solved by the invention]

[0005] To solve the problems of the existing technology, the present invention provides a pixel circuit and a driving method thereof. [Means for solving the problem]

[0006] The present invention provides a pixel circuit, comprising: a data writing unit for controlling input of a data signal; a first energy storage unit, the first end of which is connected to the output end of the data writing unit, for storing the data signal output from the data writing unit; a second energy storage unit, the first end of which is connected to a high potential VDD and the second end of which is connected to the second end of the first energy storage unit, for storing a data signal together with the first energy storage unit; a light-emitting unit for performing a light-emitting display; a driving unit, the input terminal of which is connected to a high potential VDD, the control terminal of which receives a control signal, and the output terminal of which provides a light-emitting current to the light-emitting unit; a light-emitting control transistor having an input terminal connected to the output terminal of the driving unit, a control terminal connected to the first terminal of the first energy storage unit, and an output terminal connected to the light-emitting unit, for controlling the conduction between the driving unit and the light-emitting unit; a compensation unit having an output terminal connected to the first terminal of the first energy storage unit, an input terminal connected to the output terminal of the light-emitting control transistor, and a control terminal to which a compensation control signal is input.

[0007] Optionally, the pixel circuit further includes a reset unit connected to an input end of the light-emitting unit for resetting the light-emitting unit.

[0008] Optionally, the data write unit includes a first PMOS transistor having a source connected to a data signal.

[0009] Optionally, the first energy storage unit includes a first capacitor having a first end connected to an output end of the data writing unit.

[0010] Optionally, the second energy storage unit includes a second capacitor having a first end connected to a high potential VDD and a second end connected to a second end of the first capacitor.

[0011] Optionally, the driving unit includes a second PMOS transistor having a source connected to a high potential VDD and a gate connected to second ends of the first capacitor and the second capacitor.

[0012] Optionally, the compensation unit includes a fourth PMOS transistor, the drain of which is connected to the first end of the first capacitor and the gate of which is connected to the compensation control signal.

[0013] Optionally, the emission control transistor is a PMOS transistor, the source of which is connected to the drain of the second PMOS transistor and the gate of which is connected to the first end of the first capacitor.

[0014] Optionally, the input terminal of the light-emitting unit is connected to the source of the fourth PMOS transistor and the drain of the light-emitting control transistor.

[0015] Optionally, the reset unit includes a third PMOS transistor, the source of which is connected to the output terminal of the compensation unit, the gate of which is connected to the reset signal, and the drain of which is grounded.

[0016] Optionally, the pixel circuit further includes a G-point initialization unit, the G-point initialization unit being connected to a first end of the first energy storage unit and configured to adjust a G-point voltage.

[0017] Optionally, the G point initialization unit includes a sixth PMOS transistor having a gate connected to an initialization control signal, a source connected to an initialization signal, and a drain connected to the first end of the first energy storage unit.

[0018] The present invention also provides a driving method for a pixel circuit, the driving method for the pixel circuit sequentially including an initialization step, a self-discharge step, an information writing step, and an emission step, wherein the self-discharge step includes adjusting the operation time of the compensation unit to adjust the threshold voltage of the emission control transistor.

[0019] Optionally, the driving method of the pixel circuit comprises: an initialization start step in which the driving unit and the data writing unit are turned on; an initialization end step in which the data writing unit and the driving unit are turned off; a self-discharge starting step in which, at time t (t=t1+t2), the compensation unit is turned on, and after time t1, the compensation unit is turned off, and the reset unit is turned on, and after time t2, the reset unit is turned off; an information writing step in which the data writing unit is turned on; a light emitting step in which the data writing unit is turned off and the driving unit is turned on.

[0020] Optionally, if a=b, then t1=0, t2=t, and a=b / (1-b) 2 , b=C2 / (C1+C2), then t1=t, t2=0, where a is the substrate bias coefficient, C1 is the first capacitor value, and C2 is the second capacitor value.

[0021] Optionally, in the initialization stage, the first PMOS transistor, the second PMOS transistor and the light-emitting control transistor are all turned on, and the data signal is set to Vofs to initialize the G point.

[0022] Optionally, a is b and b / (1-b) 2 If it is between t1=t*f[b,b / (1-b) 2 ], where the function f is adjusted during panel operation.

[0023] Optionally, the function f is a linear function, a quadratic function, or an exponential function.

[0024] Optionally, within time t1, the fourth PMOS transistor is turned on, the source potential of the light-emitting control transistor decreases, thereby increasing the gate potential; at the same time, the threshold voltage of the light-emitting control transistor increases due to the substrate bias effect; when the voltage difference between the source and the gate becomes equal to the threshold voltage of the light-emitting control transistor, the light-emitting control transistor is turned off.

[0025] Optionally, during time t1: |V TH_EF |=a*(VDD-Vs)+|V TH |=Vs-Vg; (VDD-VS)*C2+[(VDD-Vofs)-(Vs-Vg)]*C1=(Vg-Vofs)*C1*C2 / (C1+C2); where V TH_EF is the equivalent threshold voltage of the light-emitting control transistor, V TH is the threshold voltage of the light-emitting control transistor, Vofs is the initialization voltage, Vs1={[a-(1+x) 2 ]VDD+Vofs+|V TH |} / [1+a-(1+x) 2 ] Vg1=(1+a)Vofs-(VDD-|V TH |)(1+x) 2} / [1+a-(1+x) 2 ] Here, a is a substrate bias coefficient, x=C2 / C1, Vs1 is the source voltage of the light-emitting control transistor, and Vg1 is the gate voltage of the light-emitting control transistor.

[0026] Optionally, within the time t1, the formula for calculating the threshold voltage compensation of the light-emitting control transistor is as follows: (VDD-Vs1)*C2+[(VDD-Vofs)-(Vs1-Vg1)]*C1=(Vg1-Vofs)*C1*C2 / (C1+C2)=Q Within time t1, ΔVs1 is the amount of change in the source voltage of the light-emitting control transistor, and ΔVg1 is the amount of change in the gate voltage of the light-emitting control transistor, as follows: ΔVg1=Vg1-Vofs=Q*(C1+C2) / (C1*C2); ΔVs1=Vs1-VDD=Q*C1 / C2*(C1+C2); ΔVs1 / ΔVg1=(1-b) 2 The current through the TD is: I=β*(Vs1-Vg1-|V TH_EF |) 2 where β is a constant.

[0027] Optionally, within time t1: VDD is 3 to 6V, and Vofs is 1 to 3V. [Effects of the Invention]

[0028] The present invention proposes a pixel circuit and its driving method applicable to Micro OLED, which can improve the display quality of the panel by compensating for the difference in transistor threshold voltage characteristics between different pixels. [Brief explanation of the drawings]

[0029] In order to more clearly describe the technical solutions included in the embodiments of the present invention, the following briefly introduces the drawings necessary for describing the embodiments. The drawings included in the following description are only some embodiments of the present invention, and it is obvious that those skilled in the art can obtain other drawings based on these drawings without any creative efforts. [Figure 1] FIG. 2 is a structural schematic diagram of a pixel circuit in one embodiment of the present invention. [Figure 2] FIG. 2 is a circuit diagram of a pixel circuit according to an embodiment of the present invention. [Figure 3] FIG. 3 is a timing diagram of a method for driving the pixel circuit shown in FIG. [Figure 4] FIG. 10 is a circuit diagram of a pixel circuit according to another embodiment of the present invention. [Figure 5] FIG. 5 is a timing diagram of a method for driving the pixel circuit shown in FIG. DETAILED DESCRIPTION OF THE INVENTION

[0030] The preferred embodiments of the present invention will be described in more detail below. However, the present invention may be embodied in various forms and should not be limited to the embodiments described herein.

[0031] In this invention, unless otherwise specified, directional terms (e.g., "upper" and "lower") generally refer to the upper and lower sides of the device in its normal use state, and "inner" and "outer" refer to the device's contours. Furthermore, terms such as "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying the relative importance or number of the designated technical features. Therefore, a feature qualified by "first," "second," or "third" can explicitly or implicitly include one or more of the feature. In describing this invention, "plurality" means two or more unless otherwise clearly and specifically limited. Because this invention is an electrical device, all connections and interconnections refer to conductive interconnections. Because the drawings illustrate the same device, identical reference numerals throughout the drawings represent the same parts.

[0032] In this embodiment, the pixel circuit is formed using a semiconductor substrate, such as a silicon substrate, to which a constant bias voltage is typically applied. This voltage affects the threshold voltage, leakage current, and other electrical characteristics of the semiconductor device. Changing the substrate bias voltage changes the threshold voltage of the device. For example, in a MOSFET, increasing the substrate bias voltage increases the threshold voltage. This is because the bias voltage changes the potential difference between the substrate and the source / drain junction, affecting the junction capacitance between the source and substrate.

[0033] The substrate bias effect coefficient (BBC) refers to the degree of change in pixel performance parameters (e.g., voltage, sensitivity, noise, etc.) caused by changes in the substrate bias voltage. This coefficient can be obtained through experimental measurements and modeling. Specifically, the BBC of a pixel is an important parameter that quantitatively describes the impact of changes in the substrate bias voltage on pixel performance. For example, in terms of sensitivity, changes in the substrate bias voltage can alter the voltage characteristics of the photodiode, affecting the pixel's photoresponse and sensitivity. In terms of noise, the BBC affects the device's leakage current and noise characteristics. Different substrate bias voltages can increase or decrease the pixel's dark current noise. In terms of dynamic range, adjusting the BBC voltage can optimize the pixel's dynamic range and ensure good performance under different lighting conditions. In image sensor design and optimization, understanding and controlling this coefficient helps improve sensor performance, including increasing sensitivity, reducing noise, and widening the dynamic range. These optimizations are particularly important for high-performance imaging applications such as scientific imaging, medical imaging, and high-end photography.

[0034] Hereinafter, specific examples of the present invention will be described in more detail with reference to the drawings. Fig. 1 is a structural schematic diagram of a pixel circuit in one embodiment of the present invention. As shown in Fig. 1, the pixel circuit of the present invention includes: a data writing unit for controlling input of a data signal; a first energy storage unit, the first end of which is connected to the output end of the data writing unit, for storing the data signal output from the data writing unit; a second energy storage unit, the first end of which is connected to a high potential VDD and the second end of which is connected to the second end of the first energy storage unit, for storing a data signal together with the first energy storage unit; a light-emitting unit for performing a light-emitting display; a driving unit, the input terminal of which is connected to a high potential VDD, the control terminal of which receives a control signal, and the output terminal of which provides a light-emitting current to the light-emitting unit; a light-emitting control transistor having an input terminal connected to the output terminal of the driving unit, a control terminal connected to the first terminal of the first energy storage unit, and an output terminal connected to the light-emitting unit, for controlling the conduction between the driving unit and the light-emitting unit; a compensation unit having an output terminal connected to the first terminal of the first energy storage unit, an input terminal connected to the output terminal of the light-emitting control transistor, and a control terminal to which a compensation control signal is input.

[0035] In this embodiment, the pixel circuit further includes a reset unit, which is connected to the input end of the light-emitting unit and is used to reset the light-emitting unit.

[0036] FIG. 2 is a circuit diagram of a pixel circuit according to an embodiment of the present invention. As shown in FIG. 2, in this embodiment, the data writing unit includes a first PMOS transistor T1, the source of which is connected to a data signal. The first energy storage unit includes a first capacitor C1, the first terminal of which is connected to the output terminal of the data writing unit. The second energy storage unit includes a second capacitor C2, the first terminal of which is connected to a high potential VDD and the second terminal of which is connected to the second terminal of the first capacitor. The driving unit includes a second PMOS transistor T2, the source of which is connected to a high potential VDD and the gate of which is connected to the second terminals of the first capacitor and the second capacitor. The compensation unit includes a fourth PMOS transistor T4, the drain of which is connected to the first terminal of the first capacitor and the gate of which is connected to the compensation control signal. In this embodiment, the light-emitting control transistor TD is a PMOS transistor, the source of which is connected to the drain of the second PMOS transistor and the gate of which is connected to the first terminal of the first capacitor. The input terminal of the light-emitting unit is connected to the source of the fourth PMOS transistor and the drain of the light-emitting control transistor.

[0037] In this embodiment, the reset unit of the pixel circuit includes a third PMOS transistor T3, the source of which is connected to the drain of the fourth PMOS transistor, the gate of which is connected to a reset signal, and the drain of which is grounded.

[0038] The present invention also provides a method for driving a pixel circuit, the method for driving a pixel circuit comprising: an initialization start step in which the driving unit and the data writing unit are turned on; an initialization end step in which the data writing unit and the driving unit are turned off; a self-discharge start step in which the compensation unit is turned on, the compensation unit is turned off after a time t1, the reset unit is turned on, and the reset unit is turned off after a time t2; an information writing step in which a data writing unit is turned on; a light emitting step in which the data writing unit is turned off and the driving unit is turned on.

[0039] Figure 3 is a timing diagram of the driving method of the pixel circuit shown in Figure 2. Below, the driving method of the pixel circuit shown in Figure 2 will be described in combination with a specific operation process.

[0040] First, in the initialization (init) stage, the driving unit and the data writing unit are turned on. Specifically, referring to Figure 3, in the initialization stage, T1, T2, T3, and TD are all turned on, and DATA=Vofs is set to initialize point G. Then, the initialization stage ends, and the data writing unit and the driving unit are turned off.

[0041] Next, the self-discharging phase begins. During this phase, the compensation unit turns on within time t1, turns off after time t1, and turns on the reset unit. After time t2, the reset unit turns off. In the actual operating process, the potential at point G drops due to the coupling effect caused by the potential drop at point S, while the potential rises due to the inflow of charge into point G. The schematic diagram shows that the drop effect is dominant.

[0042] Specifically, within time t1, T4 becomes conductive, the potential at point S drops, and the source potential of the light-emitting control transistor drops, causing its gate potential (i.e., the potential at point G) to rise. At the same time, the substrate bias effect increases the threshold voltage of the TD transistor, and when the voltage difference between SG becomes equal to the threshold voltage of TD, TD turns off. At this stage, only T4 is conductive, so the charge flowing in from the source of TD is equal to the charge flowing out from the drain of TD.

[0043] This is explained by the following formula: |V TH_EF |=a*(VDD-Vs)+|V TH |=Vs-Vg------------(1) (VDD-V S )*C2+[(VDD-Vofs)-(Vs-Vg)]*C1=(Vg-Vofs)*C1*C2 / (C1+C2)---------(2) where V TH_EF is the effective / equivalent threshold voltage of the TD transistor, V TH is the threshold voltage of the TD transistor, and Vofs is the initialization voltage. Through equations (1) and (2), the voltages at points S and G during time t1 are as follows: Vs1={[a-(1+x) 2 ]VDD+Vofs+|V TH |} / [1+a-(1+x) 2 ]-----------------------(3) Vg1=(1+a)Vofs-(VDD-|V TH |)(1+x) 2} / [1+a-(1+x) 2 ]-------(4) Here, a is a substrate bias coefficient, x=C2 / C1, Vs1 is the source voltage of the light-emitting control transistor, and Vg1 is the gate voltage of the light-emitting control transistor.

[0044] In some embodiments, VDD is 3-6V and Vofs is 1-3V.

[0045] The equation for threshold voltage compensation in the self-discharge phase t1 is as follows: Equation (2) is defined as: (VDD-Vs1)*C2+[(VDD-Vofs)-(Vs1-Vg1)]*C1=(Vg1-Vofs)*C1*C2 / (C1+C2)=Q, Therefore, the voltage change amounts at points G and S within time t1, that is, the gate voltage change amount (ΔVg1) and source voltage change amount (ΔVs1) of the light-emitting control transistor, are as follows: ΔVg1=Vg1-Vofs=Q*(C1+C2) / (C1*C2) ΔVs1=Vs1-VDD=Q*C1 / C2*(C1+C2) ΔVs1 / ΔVg1=(1-b) 2 -------(5) Here, b = C2 / (C1 + C2), and this equation is valid at any time within time t1.

[0046] The current flowing through TD during time t1 is: I=β*(Vs1-Vg1-|V TH_EF |) 2 -------(6) where β is a constant and the following holds:

[0047]

number

[0048] By combining equations (1), (6), and (7), we obtain the following equation:

[0049]

number

[0050] where: m=b 2 -2b+a*(b-1) 2 , p=(1+a)*Vinit-(1+a)*(b 2 -2b)*Vofs-|V TH| Vinit=VDD-Vofs Solving differential equation (8) and considering the condition that t1=0 and ΔVg=Vg-Vofs=0, we obtain: Vg1=1 / {1 / [m / (p+m*Vofs)-β*m*t / b / C1]}-p / m-------------------(9) At this time, the voltage difference between points S and G is as follows: Vsg=Vs1-Vg1=VDD+ΔVs1-Vofs-ΔVg1=VDD-Vofs+(b 2 -2b)*ΔVg1=Vinit'----------(10) Here, ΔVg1=(9)-Vofs During time t2, T3 turns on to initialize the OLED anode. Specifically, capacitors C1 and C2 self-discharge through TD and T3. At this time, point G is in a floating state, so the SG voltage difference remains constant at this stage. As the voltage at point S decreases, the threshold voltage of TD increases and reaches a new equilibrium state. The voltage difference between point S and point G during time t2 is as follows: Vs2-Vg2=a*(VDD-Vs3)+|V TH |=Vinit' The voltages at points S and G in this stage are calculated as follows: Vs2=VDD-(Vinit'-|V TH |) / a-------(11) Vg2=Vs2-Vinit'------(12) Next, the information writing stage begins, and the data writing unit is turned on. Specifically, in the data writing stage, T1 is turned on, and the Data voltage changes from Vofs1 to the grayscale voltage Vdata. The potential at point G becomes Vdata, and the potential at point S changes, and the voltage at point G is coupled to point S through C1: ΔVs=(1-b)ΔVg, ΔVs3=(1-b)*ΔVg3--------(13) ΔVg3=Vdata-Vg3 In this case, Vs3-Vg3=Vs2+(13)-Vdata-----(14) Finally, the light-emitting stage begins, the data writing unit is turned off, and the driving unit is turned on. Specifically, T2 and TD are turned on, and the OLED starts to emit light. Since point G is in a floating state, the SG voltage difference is maintained as in the information writing stage. At this time, the potential at point S changes to VDD, and the voltage of the TD transistor becomes |VTH|. In this case: Vsg-|V TH |=(b / a-1)*Vofs-b*Vdata+(b / a-1)|V TH |+(1-bb / a)*(b 2 -2b)*ΔVg1------(15) where: ΔVg1=(13)-Vofs=1 / {1 / [m / (p+m*Vofs)-β*m*t / b / C1]}-p / m-Vofs----(16) Let us consider equation (15) using equation (16).

[0051] When t1=t=0, the self-discharge stage is completely completed within t2. In this case, ΔVg1=0 in equation (15), and |V TH The compensation effect of | is as follows: (b / a-1)-------(17) If t1=t=sufficiently large, the self-discharge phase is completely completed within time t1. At this time, the compensation effect of |VTH| in equation (15) is as follows: (b / a-1)+(1-bb / a)*(b 2 -2b) / [b 2 -2b+a*(b-1) 2 ]=ba*(1-b) 2 / [b 2 -2b+a*(b-1) 2 ]--------(18) From equations (17) and (18), the optimal process conditions are a=b and a=b / (1-b), respectively. 2 In other words, as a approaches b, t1 approaches 0, and a becomes b / (1-b) 2The closer to , the larger t1 becomes. In the actual process, after the panel manufacturing is completed, TEG / testkey electrical testing is performed to measure the ID~VG curves at different Vs voltages, and the curves are analyzed to determine the corresponding |V TH_EF | is calculated, and then the substrate bias coefficient a is fitted using equation (1). Therefore, once panel manufacturing is completed, a and b are completely fixed, and since it is difficult to meet the circuit requirement of b=a in each process, t1 is variable. Specifically, b is fixed, and t1=t*f[b,b / (1-b) 2 Here, the function f is not limited to a linear function, a quadratic function, an exponential function, etc., and can be adjusted during panel operation to obtain an optimal display effect.

[0052] Therefore, the substrate bias coefficient a is b and b / (1-b) 2 If it is in the range, the length of the t1 time can be adjusted to adjust the operation time of the compensation unit, and the degree of self-discharge can be controlled to achieve the optimal compensation effect, thereby achieving the optimal display effect.

[0053] In some other embodiments, the pixel circuit further includes a G-point initialization unit. Figure 4 shows a circuit diagram of a pixel circuit in another embodiment of the present invention. The G-point initialization unit is connected to the first end of the first energy storage unit and is used to adjust the G-point voltage. Specifically, referring to Figure 4, the G-point initialization unit includes a sixth PMOS transistor (T6) having a gate connected to the initialization control signal, a source connected to the initialization signal, and a drain connected to the first end of the first energy storage unit.

[0054] Figure 5 is a timing diagram of the driving method of the pixel circuit shown in Figure 4. Compared with the technical solution shown in Figure 3, the difference of this technical solution is that T6, which is dedicated to initializing the G point, is added. During the initialization stage, the G point initialization unit is turned on, and the other operation processes are the same as those of the technical solution shown in Figure 3, so they will not be repeated here.

[0055] The above description is merely an embodiment of the present invention and does not limit the scope of the patent of the present invention. Any conversion of an equivalent structure or equivalent flow made by using the contents of the specification and drawings of the present invention, such as the mutual combination of technical features between the embodiments, or direct or indirect application to other related technical fields, is included in the patent protection scope of the present invention.

Claims

1. 1. A pixel circuit comprising: a data writing unit for controlling input of a data signal; a first energy storage unit, the first end of which is connected to the output end of the data writing unit, for storing the data signal output from the data writing unit; a second energy storage unit, the first end of which is connected to a high potential VDD and the second end of which is connected to the second end of the first energy storage unit, for storing a data signal together with the first energy storage unit; a light-emitting unit for performing a light-emitting display; a driving unit, the input terminal of which is connected to a high potential VDD, the control terminal of which receives a control signal, and the output terminal of which provides a light-emitting current to the light-emitting unit; a light-emitting control transistor, the input terminal of which is connected to the output terminal of the driving unit, the control terminal of which is connected to the first terminal of the first energy storage unit, and the output terminal of which is connected to the light-emitting unit, for controlling the conduction between the driving unit and the light-emitting unit; a compensation unit having an output terminal connected to the first terminal of the first energy storage unit, an input terminal connected to the output terminal of the light-emitting control transistor, and a control terminal to which a compensation control signal is input.

2. 2. The pixel circuit according to claim 1, further comprising a reset unit connected to an input terminal of the light-emitting unit for resetting the light-emitting unit.

3. 2. The pixel circuit of claim 1, wherein the data writing unit includes a first PMOS transistor having a source connected to a data signal.

4. 2. The pixel circuit according to claim 1, wherein the first energy storage unit includes a first capacitor having a first end connected to the output end of the data writing unit.

5. 5. The pixel circuit of claim 4, wherein the second energy storage unit includes a second capacitor having a first terminal connected to a high potential VDD and a second terminal connected to the second terminal of the first capacitor.

6. 6. The pixel circuit of claim 5, wherein the driving unit includes a second PMOS transistor having a source connected to a high potential VDD and a gate connected to the second ends of the first capacitor and the second capacitor.

7. 7. The pixel circuit of claim 6, wherein the compensation unit comprises a fourth PMOS transistor, the drain of which is connected to the first end of the first capacitor and the gate of which is connected to a compensation control signal.

8. 8. The pixel circuit of claim 7, wherein the light-emitting control transistor is a PMOS transistor, the source of which is connected to the drain of the second PMOS transistor and the gate of which is connected to the first end of the first capacitor.

9. 9. The pixel circuit as claimed in claim 8, wherein the input terminal of the light-emitting unit is connected to the source of the fourth PMOS transistor and the drain of the light-emitting control transistor.

10. 3. The pixel circuit according to claim 2, wherein the reset unit comprises a third PMOS transistor having a source connected to the output terminal of the compensation unit, a gate connected to a reset signal, and a drain grounded.

11. 2. The pixel circuit according to claim 1, further comprising a G-point initialization unit, wherein the G-point initialization unit is connected to the first end of the first energy storage unit and is used to adjust a G-point voltage.

12. 12. The pixel circuit of claim 11, wherein the G point initialization unit includes a sixth PMOS transistor, the gate of which is connected to an initialization control signal, the source of which is connected to an initialization signal, and the drain of which is connected to the first end of the first energy storage unit.

13. A method for driving a pixel circuit according to any one of claims 1 to 12, comprising: The method includes an initialization step, a self-discharge step, an information writing step, and a light emitting step, in that order; 10. The method for driving a pixel circuit, wherein the self-discharge step includes adjusting an operation time of a compensation unit to adjust a threshold voltage of a light-emitting control transistor.

14. an initialization start step in which the driving unit and the data writing unit are turned on; an initialization end step in which the data writing unit and the driving unit are turned off; At time t (t=t1+t2), the compensation unit is turned on, and after time t1, the compensation unit is turned off, and the reset unit is turned on, and after time t2, the reset unit is turned off; a self-discharge starting step; an information writing step in which the data writing unit is turned on; 14. The driving method of claim 13, further comprising a light emitting step in which the data writing unit is turned off and the driving unit is turned on.

15. When a = b, t1 = 0 and t2 = t, a=b / (1-b) 2 , when b=C2 / (C1+C2), t1=t, t2=0, 15. The driving method of the pixel circuit of claim 14, wherein a is a substrate bias coefficient, C1 is a first capacitor value, and C2 is a second capacitor value.

16. 16. The driving method of claim 15, wherein in the initialization step, the first PMOS transistor, the second PMOS transistor, and the light-emitting control transistor are all turned on, and the data signal is set to Vofs to initialize the G point.

17. a is b and b / (1-b) 2 If it is between t1=t*f[b,b / (1-b) 2 17. The method of claim 16, wherein the function f is adjusted during panel operation.

18. 18. The method of driving a pixel circuit according to claim 17, wherein the function f is a linear function, a quadratic function, or an exponential function.

19. 18. The driving method for the pixel circuit of claim 17, wherein within a time period t1, the fourth PMOS transistor is turned on, the source potential of the light-emitting control transistor decreases, and therefore the gate potential increases. At the same time, the threshold voltage of the light-emitting control transistor increases due to the substrate bias effect, and when the voltage difference between the source and gate becomes equal to the threshold voltage of the light-emitting control transistor, the light-emitting control transistor is turned off.

20. Within t1 hour, |V TH_EF |=a*(VDD-Vs)+|V TH |=Vs-Vg (VDD-V S )*C2+[(VDD-Vofs)-(Vs-Vg)]*C1=(Vg-Vofs)*C1*C2 / (C1+C2) Here, V ＴＨ＿ＥＦ is the equivalent threshold voltage of the light-emitting control transistor, V ＴＨ is the threshold voltage of the light-emitting control transistor, Vofs is the initialization voltage, Vs1={[a-(1+x) 2 ]VDD+Vofs+|V TH |} / [1+a-(1+x) 2 ] Vg1=(1+a)Vofs-(VDD-|V TH |)(1+x) 2 } / [1+a-(1+x) 2 ] 18. The driving method of the pixel circuit of claim 17, wherein a is a substrate bias coefficient, x=C2 / C1, Vs1 is a source voltage of the light-emitting control transistor, and Vg1 is a gate voltage of the light-emitting control transistor.

21. Within the time t1, the formula for calculating the threshold voltage compensation of the light-emitting control transistor is as follows: (VDD-Vs1)*C2+[(VDD-Vofs)-(Vs1-Vg1)]*C1=(Vg1-Vofs)*C1*C2 / (C1+C2)=Q Within time t1, ΔVs1 is the amount of change in the source voltage of the light-emitting control transistor, and ΔVg1 is the amount of change in the gate voltage of the light-emitting control transistor, as follows: ΔVg1=Vg1-Vofs=Q*(C1+C2) / (C1*C2); ΔVs1=Vs1-VDD=Q*C1 / C2*(C1+C2); ΔVs1 / ΔVg1=(1-b) 2 The current through the TD is: I=β*(Vs1-Vg1-|V TH_EF |) 2 21. The method of claim 20, wherein β is a constant.

22. 22. The driving method for a pixel circuit as claimed in claim 21, wherein within a time t1: VDD is 3-6V, and Vofs is 1-3V.

Images