Display device
The display device addresses Vth variation issues by using a pixel circuit with p-channel transistors and low-resistance wiring for stable source potential, achieving high-quality and cost-effective display with wide Vth correction.
Patent Information
- Application Number
- JP2025168603
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2020-08-12
- Filing Date
- 2025-10-06
- Publication Date
- 2025-12-25
AI Technical Summary
Display devices using light-emitting devices face non-uniformity in displayed images due to variations in the threshold voltage (Vth) of drive transistors, which are not effectively corrected across a wide range, limiting display quality and increasing manufacturing costs.
A display device with a pixel circuit incorporating specific transistors and a capacitor, including p-channel and n-channel transistors, allows for wide-range threshold voltage correction by maintaining discharge even when Vth varies from positive to negative values, using a p-channel transistor as the driving transistor and stabilizing source potential with low-resistance wiring.
The solution enables high-quality display with wide Vth correction range, reducing manufacturing costs and power consumption while ensuring reliable and stable image display.
Smart Images

Figure 2025188122000001_ABST
Abstract
Description
[Technical Field]
[0001] One aspect of the present invention relates to a display device.
[0002] Note that one embodiment of the present invention is not limited to the above-mentioned technical field. The technical field of one embodiment of the invention disclosed in this specification relates to an object, a method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, a manufacture, or a composition of matter. Therefore, more specific examples of the technical field of one embodiment of the present invention disclosed in this specification include semiconductor devices, display devices, liquid crystal display devices, light-emitting devices, lighting devices, power storage devices, memory devices, imaging devices, and operation methods thereof or manufacturing methods thereof.
[0003] Note that in this specification and the like, a semiconductor device refers to any device that can function by utilizing semiconductor characteristics. A transistor and a semiconductor circuit are examples of a semiconductor device. In addition, a memory device, a display device, an imaging device, and an electronic device may include a semiconductor device. [Background technology]
[0004] Techniques for constructing transistors using metal oxides formed on a substrate have been attracting attention. For example, Patent Documents 1 and 2 disclose techniques for using transistors using zinc oxide or In-Ga-Zn oxide as switching elements for pixels of display devices. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-123861 [Patent Document 2] Japanese Patent Application Laid-Open No. 2007-96055 Summary of the Invention [Problem to be solved by the invention]
[0006] In a display device using a light-emitting device (also called a light-emitting element), a drive transistor is connected to one electrode of the light-emitting device, and the luminance of the light-emitting device is controlled by the current flowing through the drive transistor.
[0007] In a display device, variations in the threshold voltage (Vth) of the drive transistor are one factor that cause non-uniformity in the displayed image, so it is preferable to incorporate a function for correcting the Vth of the drive transistor into the pixel.
[0008] Vth correction in a pixel involves turning on the drive transistor, making the gate-drain conductive, supplying image data from the source side, and charging or discharging the gate until the gate-source voltage (Vgs) reaches Vth. This operation allows image data to be written to the gate and Vth to be extracted.
[0009] However, the above charging or discharging ends when the drain-source voltage (Vds) reaches 0V, even if the drive transistor is on, so the change in Vgs stops at 0V. Therefore, if the drive transistor is a p-channel transistor, Vth can be extracted if it is in the range from a negative value to 0V, but it cannot be extracted if it is a positive value. Also, if the drive transistor is an n-channel transistor, Vth can be extracted if it is in the range from a positive value to 0V, but it cannot be extracted if it is a negative value.
[0010] The larger the display area, the greater the range of variation in Vth of the drive transistor tends to be, so it is preferable that the Vth correction function be able to handle a wide range of Vth variation.
[0011] Therefore, an object of one embodiment of the present invention is to provide a display device having a threshold voltage correction function that can accommodate a wide range of variations in threshold voltage, to provide a display device with excellent display characteristics, or to provide an inexpensive display device.
[0012] Another object is to provide a display device with low power consumption. Another object is to provide a display device with high reliability. Another object is to provide a novel display device or the like. Another object is to provide a method for operating the display device. Another object is to provide a novel semiconductor device or the like.
[0013] Note that the description of these problems does not preclude the existence of other problems. Note that one embodiment of the present invention does not necessarily solve all of these problems. Note that problems other than these will become apparent from the description of the specification, drawings, claims, etc., and it is possible to extract other problems from the description of the specification, drawings, claims, etc. [Means for solving the problem]
[0014] One embodiment of the present invention relates to a display device having a wide range of threshold voltage correction functions.
[0015] One embodiment of the present invention is a display device having a pixel including a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a capacitor, and a light-emitting device, in which the fourth transistor is a p-channel transistor, one of a source or a drain of the first transistor is electrically connected to one of a source or a drain of the second transistor and one electrode of the capacitor, the other of the source or the drain of the second transistor is electrically connected to one of a source or a drain of the third transistor and a gate of the fourth transistor, the source of the fourth transistor is electrically connected to the other electrode of the capacitor and one of a source or a drain of the fifth transistor, and the drain of the fourth transistor is electrically connected to an anode of the light-emitting device.
[0016] The first transistor and the third transistor are n-channel transistors, the second transistor is a p-channel transistor, and the gate of the first transistor can be electrically connected to the gate of the second transistor and the gate of the third transistor.
[0017] The first transistor and the third transistor preferably have a metal oxide in a channel formation region, and the metal oxide preferably contains In, Zn, and M (M is one or more elements selected from Al, Ti, Ga, Ge, Sn, Y, Zr, La, Ce, Nd, and Hf).
[0018] The sixth transistor may further be included, and one of the source and drain of the sixth transistor may be electrically connected to the drain of the fourth transistor.
[0019] The light-emitting device can be an organic EL element or a micro LED.
[0020] Another embodiment of the present invention provides a method for operating a display device including a first transistor, a second transistor, a capacitor, and a light-emitting device, wherein the first transistor is a p-channel transistor, one electrode of the capacitor is electrically connected to a source of the first transistor, the other electrode of the capacitor is electrically connected to one of a source and a drain of the second transistor, the other of the source and the drain of the second transistor is electrically connected to a gate of the first transistor, and the drain of the first transistor is electrically connected to an anode of the light-emitting device, the method including: turning off the second transistor to turn on the first transistor; a first potential to turn on a first transistor, a second potential to the source of the first transistor, a third potential to the source of the first transistor by discharging the first transistor, a fourth potential to the other electrode of the capacitor, a fifth potential that is the difference between the fourth potential and the third potential to be held in the capacitor, the other electrode of the capacitor is floated to turn on the second transistor, a fifth potential is held between the gate and source of the first transistor, a second potential is supplied to the source of the first transistor, and a current according to the fifth potential is passed to cause the light-emitting device to emit light.
[0021] The second potential may be a potential higher than the sum of the potential of the cathode of the light emitting device and the forward voltage of the light emitting device.
[0022] The third potential may be a potential corresponding to a difference between the first potential and a threshold voltage of the first transistor, and the fourth potential may be image data. [Effects of the Invention]
[0023] By using one embodiment of the present invention, a display device having a threshold voltage correction function that can accommodate a wide range of variations in threshold voltage can be provided, or a display device with excellent display characteristics can be provided. Alternatively, an inexpensive display device can be provided.
[0024] Alternatively, a display device with low power consumption can be provided. Alternatively, a display device with high reliability can be provided. Alternatively, a novel display device or the like can be provided. Alternatively, a method for operating the display device can be provided. Alternatively, a novel semiconductor device or the like can be provided. [Brief explanation of the drawings]
[0025] [Figure 1] FIG. 1 is a diagram illustrating a pixel circuit. [Figure 2] 2A and 2B are diagrams illustrating a pixel circuit. [Figure 3] 3A and 3B are diagrams illustrating a conventional threshold voltage correction operation. [Figure 4] 4A and 4B are diagrams illustrating a conventional threshold voltage correction operation. [Figure 5] 5A and 5B are diagrams illustrating a conventional threshold voltage correction operation. [Figure 6] 6A and 6B are diagrams illustrating a conventional threshold voltage correction operation. [Figure 7] FIG. 7 is a timing chart illustrating the operation of the pixel. [Figure 8] 8A and 8B are diagrams illustrating the threshold voltage correction operation. [Figure 9] 9A and 9B are diagrams illustrating the threshold voltage correction operation. [Figure 10] 10A and 10B are diagrams illustrating a pixel circuit. [Figure 11] FIG. 11 is a diagram illustrating a display device. [Figure 12] FIG. 12 is a diagram illustrating the pixels used in the simulation. [Figure 13] 13A and 13B are diagrams illustrating the simulation results. [Figure 14] 14A and 14B are diagrams illustrating the simulation results. [Figure 15]15A to 15C are diagrams illustrating a display device. [Figure 16] 16A and 16B are diagrams illustrating a touch panel. [Figure 17] FIG. 17 is a diagram illustrating a display device. [Figure 18] FIG. 18 is a diagram illustrating a display device. [Figure 19] 19A to 19C are diagrams illustrating transistors. [Figure 20] 20A to 20C are diagrams illustrating transistors. [Figure 21] 21A and 21B are diagrams illustrating a transistor. [Figure 22] 22A to 22F are diagrams illustrating an electronic device. DETAILED DESCRIPTION OF THE INVENTION
[0026] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be readily understood by those skilled in the art that various modifications in form and detail may be made without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments shown below. In the configuration of the invention described below, the same parts or parts having similar functions will be designated by the same reference numerals in different drawings, and repeated description thereof may be omitted. In addition, hatching of the same elements constituting the drawings may be omitted or changed as appropriate in different drawings.
[0027] Furthermore, even if a circuit diagram shows a single element, that element may be configured as multiple elements as long as there is no functional problem. For example, multiple transistors operating as switches may be connected in series or parallel. Also, a capacitor may be divided and placed in multiple locations.
[0028] Furthermore, a single conductor may have multiple functions, such as wiring, an electrode, and a terminal, and in this specification, multiple names may be used for the same element. Also, even when elements are shown as being directly connected to each other on a circuit diagram, in reality, the elements may be connected via one or more conductors, and in this specification, such a configuration is also included in the category of direct connection.
[0029] (Embodiment 1) In this embodiment, a display device which is one embodiment of the present invention will be described with reference to drawings.
[0030] One embodiment of the present invention is a display device having a pixel including a light-emitting device, and having a Vth correction function for a driving transistor. The Vth range for which correction is possible is wide, from positive voltage to negative voltage under certain conditions, so that the display device can handle even large Vth variations. Therefore, high-quality display can be achieved. Furthermore, the yield in the manufacturing process can be increased, thereby reducing manufacturing costs.
[0031] Generally, the Vth of a drive transistor is corrected by charging or discharging the gate, and then extracting Vth between the gate and source when the charging or discharging is complete. However, because charging or discharging occurs along the source-drain-gate path, the charging or discharging ends when the source-drain voltage (Vds) reaches 0V. As a result, Vth may not be extracted. In this case, if Vth varies from positive to negative voltages, the number of transistors that can be corrected is limited.
[0032] In one embodiment of the present invention, a p-channel transistor is used as the driving transistor, and a constant voltage is supplied to the gate while discharging through the source-drain path, thereby extracting Vth between the gate and source. Furthermore, by setting the drain potential to the sum of the forward voltage and the cathode potential of the light-emitting device or a sufficiently low potential, discharge can be continued even if Vth is a positive voltage. In other words, correction can be performed even when Vth varies from positive voltage to negative voltage.
[0033] 1 is a circuit diagram of a pixel included in a display device of one embodiment of the present invention. A pixel 10 includes a transistor 101, a transistor 102, a transistor 103, a transistor 104, a transistor 105, a capacitor 106, and a light-emitting device 108. Here, the transistors 101 and 103 can be n-channel transistors, and the transistors 102, 104, and 105 can be p-channel transistors.
[0034] One of the source or drain of transistor 101 is electrically connected to one electrode of capacitor 106 and one of the source or drain of transistor 102. The other of the source or drain of transistor 102 is electrically connected to one of the source or drain of transistor 103 and the gate of transistor 104. The other of the source or drain of transistor 104 is electrically connected to the other electrode of capacitor 106 and one of the source or drain of transistor 105. The other of the source or drain of transistor 104 is electrically connected to the anode of light-emitting device 108. The gate of transistor 101 is electrically connected to the gate of transistor 102 and the gate of transistor 103.
[0035] The other of the source and the drain of the transistor 101 is electrically connected to a wiring 121. The other of the source and the drain of the transistor 103 is electrically connected to a wiring 128. The other of the source and the drain of the transistor 105 is electrically connected to a wiring 122. The cathode of the light-emitting device 108 is electrically connected to a wiring 129. The gates of the transistors 101, 102, and 103 are electrically connected to a wiring 123. The gate of the transistor 105 is electrically connected to a wiring 124.
[0036] Wiring 121 is a source line that connects pixel 10 to a source driver that supplies image data. Wiring 122 and wiring 129 are power supply lines, with wiring 122 being a high-potential power supply line (also called an anode wiring) and wiring 129 being a low-potential power supply line (also called a cathode wiring, cathode electrode, or common electrode). Wiring 128 is a wiring that supplies a constant potential. Wiring 123 and wiring 124 are gate lines that control the operation of the transistors connected to them.
[0037] Here, the transistor 101, the transistor 102, the transistor 103, and the transistor 105 function as switches. The transistor 104 functions as a driving transistor for the light-emitting device 108. The capacitor 106 functions as a storage capacitor.
[0038] Although the transistor 105 is illustrated as a p-channel transistor in FIG. 1, it may be an n-channel transistor as shown in FIG. 2A.
[0039] 1 illustrates the transistor 102 as a p-channel transistor, it may be an n-channel transistor as shown in FIG 2B In this case, the gate of the transistor 102 is electrically connected to a wiring 125 that functions as a gate line.
[0040] 2B, the transistor 105 may be an n-channel transistor, and the transistors 101, 102, and 103 may be p-channel transistors.
[0041] In order to operate the transistors 101 and 103 such that their on and off states are opposite to each other, the transistors 102 and 101 and 103 may be n-channel transistors and the transistor 102 may be a p-channel transistor, as shown in Figure 1, so that the gate wiring can be shared. Alternatively, the transistors 101 and 103 may be p-channel transistors and the transistor 102 may be an n-channel transistor.
[0042] Here, since transistors 101, 102, 103, and 105 operate as switches, either n-channel or p-channel conductivity types can be applied, but it is more preferable that transistor 104, which operates as a driving transistor, be a p-channel transistor.
[0043] The display device has a plurality of light-emitting devices 108, the cathodes of which are connected to wiring 129. Here, if a transparent conductive film (such as indium tin oxide) having a higher resistance than metal is used for the wiring 129, a voltage drop may occur in the wiring 129 when a large current flows for high-gradation (high-brightness) display. Since the light-emitting device 108 also operates as a constant-voltage element when emitting light, a change in the potential of the wiring 129 (the potential of the cathode) also changes the potential of the anode.
[0044] When an n-channel transistor is used for the transistor 104, the source is electrically connected to the anode of the light-emitting device 108. When the wiring 129 is subjected to potential fluctuations due to a voltage drop, the source potential fluctuates. This causes a problem in that the gate-source voltage (Vgs) changes and the desired brightness cannot be obtained. Furthermore, in order to write an ideal Vgs, it is necessary to provide a transistor for supplying a reset potential to the source.
[0045] On the other hand, if the transistor 104 is a p-channel transistor, the source is electrically connected to the wiring 122 (anode wiring) via the transistor 105. The wiring 122 (anode wiring) can be made of a low-resistance metal wiring or the like, which makes it difficult for a voltage drop to occur. Therefore, the source potential can be stabilized, and fluctuations in Vgs can be suppressed. Furthermore, a transistor for supplying a reset potential to the source is not required.
[0046] Next, conventional Vth correction will be described. Figures 3A, 3B, 4A, and 4B are diagrams illustrating an example in which p-channel transistors are used as drive transistors. Transistors other than the drive transistor TrP are illustrated as switches SW1 to SW5.
[0047] The switch SW1 has a function of supplying a voltage ini to the gate of the drive transistor TrP. The switch SW2 has a function of connecting the gate and drain of the drive transistor TrP. The switch SW3 has a function of supplying image data (Vdata) to the source of the drive transistor TrP. The switch SW4 has a function of supplying a potential Vano to the source of the drive transistor TrP. The switch SW5 has a function of connecting the drain of the drive transistor TrP and the anode of the light-emitting device LED.
[0048] First, the switch SW1 is turned on, and the gate voltage (Vg) of the drive transistor TrP is set to voltage Vini (see FIG. 3A). Here, voltage Vini is the voltage that turns on the drive transistor TrP. In FIG. 3A, S stands for source, D stands for drain, and G stands for gate.
[0049] Next, switch SW1 is turned off, and switches SW2 and SW3 are turned on (see FIG. 3B). At this time, the drive transistor TrP is on, so the gate is charged via the drain. If the Vth of the drive transistor is 0 V or less, charging ends when Vgs reaches Vth. At this time, Vg = Vdata + Vth.
[0050] Next, the switches SW2 and SW3 are turned off, and the switches SW4 and SW5 are turned on (see FIG. 4A). At this time, the potential Vano is supplied to the source of the drive transistor TrP, and since Vg=Vdata+Vth, Vgs=Vdata+Vth-Vano.
[0051] The general formula for the drain current Id in the saturation region of a transistor is Id=1 / 2β(Vgs-Vth) 2 (β is a coefficient). When Vgs at the time of the operation of FIG. 4A is substituted into this equation, Id=1 / 2β(Vdata+Vth-Vano-Vth) 2 =1 / 2β(Vdata-Vano) 2 In other words, since the Vth term disappears, the drain current Id becomes a current that does not depend on Vth, and Vth correction has been performed.
[0052] The above is the case where Vth of the driving transistor TrP is 0V or less. Next, the case where Vth of the driving transistor TrP is greater than 0V will be described.
[0053] After the steps described in FIG. 3A, switch SW1 is turned off, and switches SW2 and SW3 are turned on (see FIG. 4B). At this time, the drive transistor TrP is on, so the gate is charged via the drain. Even if Vth of the drive transistor is greater than 0 V, the gate remains on until Vgs reaches Vth.
[0054] However, when Vg = Vd = Vdata, the source-drain voltage (Vds) becomes 0 V and charging ends. At this time, Vgs = 0 V, so this method can only correct Vth up to 0 V. In other words, if the Vth of the drive transistor TrP is a positive voltage, correction is not possible.
[0055] Next, a conventional method for Vth correction in a pixel when an n-channel transistor is used as the driving transistor will be described with reference to Figures 5A, 5B, 6A, and 6B. The functions of switches SW1 to SW5 are the same as those described above.
[0056] First, the switch SW1 is turned on, and the gate voltage (Vg) of the drive transistor TrN is set to voltage Vini (see FIG. 5A). Here, voltage Vini is a voltage that turns on the drive transistor TrN. Note that instead of voltage Vini, switches SW2 and SW4 may be turned on to supply potential Vano to the gate. Also, in FIG. 5A, S represents source, D represents drain, and G represents gate.
[0057] Next, switch SW1 is turned off, and switches SW2 and SW3 are turned on (see FIG. 5B). At this time, the drive transistor TrN is in the on state, so the gate is discharged via the drain. If Vth of the drive transistor is 0 V or higher, the discharge ends when Vgs reaches Vth. At this time, Vg = Vdata + Vth.
[0058] Next, switches SW2 and SW3 are turned off, and switches SW4 and SW5 are turned on (see FIG. 6A). At this time, potential Vano is supplied to the drain of the drive transistor TrN, and the source voltage (Vs) becomes a potential higher than the cathode potential (Vcat) of the light-emitting device LED by the forward voltage of the light-emitting device LED. Here, since Vg = Vdata + Vth, Vgs = Vdata + Vth - Vs.
[0059] The general formula for the drain current Id in the saturation region of a transistor is Id=1 / 2β(Vgs-Vth) 2 (β is a coefficient) Substituting Vgs at the time of operation in Figure 6A, Id = 1 / 2β(Vdata + Vth - Vs - Vth) 2 =1 / 2β(Vdata-Vs) 2 In other words, since the Vth term disappears, the drain current Id becomes a current that does not depend on Vth, and Vth correction has been performed.
[0060] The above is the case where Vth of the driving transistor TrN is 0V or more, and the case where Vth of the driving transistor TrN is less than 0V will be explained next.
[0061] After the steps described in FIG. 5A, switch SW1 is turned off, and switches SW2 and SW3 are turned on (see FIG. 6B). At this time, the drive transistor TrN is on, so the gate is discharged through the drain. Even if the Vth of the drive transistor is less than 0 V, the gate remains on until Vgs reaches Vth.
[0062] However, when Vg = Vd = Vdata, the source-drain voltage (Vds) becomes 0 V and discharge ends. At this time, Vgs = 0 V, so this method can only correct Vth up to 0 V. In other words, if the Vth of the drive transistor TrN is a negative voltage, correction is not possible.
[0063] Next, Vth correction in the pixel 10 shown in Fig. 1 will be described with reference to the timing chart shown in Fig. 7. In the figure, 1H means one horizontal period. In the following description, a high potential that turns an n-channel transistor on and a p-channel transistor off is referred to as "H," and a low potential that turns an n-channel transistor off and a p-channel transistor on is referred to as "L."
[0064] A potential Vano is supplied to the wiring 122, a potential V0 is supplied to the wiring 128, and a potential Vcat is supplied to the wiring 129. Here, the potential Vano is a high potential, the potential Vcat is a low potential, and the potential Vano is a potential higher than the sum of the potential Vcat and the forward voltage of the light-emitting device 108. The potential V0 is a potential that can turn on the transistor 104.
[0065] The following description will be made with reference to the circuit operation diagrams shown in Figures 8A, 8B, 9A, and 9B. Note that in each diagram, ◯ indicates that a transistor is conductive, and × indicates that a transistor is non-conductive.
[0066] The period T0 is a light emission (image display) period according to the image data written in the previous horizontal period. At this time, the potential of the wiring 123 is "L" and the potential of the wiring 124 is "L".
[0067] In the period T1, image data (Vdata) is supplied to the wiring 121. The potential of the wiring 123 becomes "H", the potential of the wiring 124 becomes "L", and the transistors 101, 103, and 105 are turned on (see FIG. 8A).
[0068] When the transistor 101 is turned on, the potential of one electrode of the capacitor 106 becomes Vdata. When the transistor 103 is turned on, the gate voltage (Vg) of the transistor 104, which is a driving transistor, becomes V0.
[0069] Furthermore, when the transistor 105 is turned on, the source voltage (Vs) becomes Vano, and Vgs = V0 - Vano. This period can also be called an initialization period for Vg and Vs of the transistor 104. At this time, the light-emitting device 108 emits light, but by making the period T1 extremely short, the impact on visibility can be suppressed.
[0070] Next, in a period T2, the potential of the wiring 124 becomes "H" and the transistor 105 becomes non-conductive (see FIG. 8B).
[0071] At this time, the source of transistor 104 is discharged via light-emitting device 108. The discharge ends when Vgs=Vth. Therefore, Vs=V0-Vth. Furthermore, since the potential of the other electrode of capacitor 106 becomes V0-Vth, capacitor 106 holds Vdata-V0+Vth.
[0072] Next, in a period T3, the potential of the wiring 123 becomes "L," the transistors 101 and 103 become non-conductive, and one electrode of the capacitor 106 becomes floating. In addition, the transistor 102 becomes conductive (see FIG. 9A).
[0073] At this time, the charge held in capacitor 106 is distributed to the gate of transistor 104, and Vg=Vdata. Also, Vgs=Vdata-V0+Vth. In reality, Vg will have a different value from Vdata, but if the capacitance of capacitor 106 is sufficiently larger than the gate capacitance of transistor 104, Vg can be set to a value very close to Vdata.
[0074] Next, in a period T4, the potential of the wiring 124 becomes "L" and the transistor 105 becomes conductive (see FIG. 9B).
[0075] At this time, Vs = Vano, and due to the capacitive coupling of capacitor 106, Vg = Vdata + X (X corresponds to the change in Vs), but Vgs = Vdata - V0 + Vth is maintained. Therefore, substituting the above Vgs into the general formula for the drain current Id in the saturation region of the transistor (Id = 1 / 2β(Vgs - Vth) 2 (β is a coefficient)), we get Id = 1 / 2β(Vdata - V0 + Vth - Vth) 2 = 1 / 2β(Vdata - V0) 2 That is, since the term of Vth disappears, the drain current Id becomes a current independent of Vth, which means that Vth correction can be performed.
[0076] Here, the range of Vth correction will be described. Since Vth is extracted as Vgs, the range that Vgs can take is the correction range of Vth. The start of the discharge of the source of transistor 104 is the point when transistor 105 shown in Fig. 8B is non-conductive. Therefore, Vgs = V0 - Vano shown in Fig. 8A, which is the state immediately before that, is the lower limit of the correction range.
[0077] Also, the end of the discharge is a state where Vds = 0V, that is, the drain voltage (Vd) = Vs. Here, since Vd is a voltage higher than the potential of wiring 129 (cathode potential) by the forward voltage (Vf) of light-emitting device 108, it becomes Vcat + Vf. That is, when Vs reaches Vcat + Vf, the discharge ends. At this time, Vgs = V0 - Vcat - Vf is the upper limit of the correction range.
[0078] Therefore, the Vth correction range of the pixel according to one aspect of the present invention is V0 - Vano or more and V0 - Vcat - Vf or less. For example, when V0 = +8V, Vano = +10V, Vcat = -2V, and Vf = +5V, if the variation range of Vth is -2V < Vth < +5V, Vth correction is possible. As shown in Fig. 4B or Fig. 6B, in the conventional Vth correction, the lower limit or the upper limit becomes 0V. Thus, it can be seen that the Vth correction function according to one aspect of the present invention can cope with a wide range of Vth variations and is excellent.
[0079] Note that from FIG. 8A to FIG. 8B, although light emission unrelated to image data occurs in the light-emitting device 108, as described above, if the period T1 is made extremely short, the influence on visual recognition can be suppressed. In particular, in a display device with high definition and a large number of pixel rows, since one horizontal period becomes short, the above light-emitting period also becomes short.
[0080] For example, in the case of a display device having 4K2K pixels, since the number of pixel rows is 2160, even if the above light emission continues during one horizontal period, the light-emitting time in unit time becomes 1 / 2160, and the remaining 2159 / 2160 of the time becomes the display period of a normal image. Since the actual above light-emitting period is even shorter, the display state of a normal image is dominant as a whole, and the influence of the above light emission on visual recognition can be suppressed.
[0081] Note that as shown in FIG. 10A, by adding the transistor 107, a similar Vth correction operation can be performed without the above light emission. One of the source or drain of the transistor 107 is electrically connected to the drain of the transistor 104. The other of the source or drain of the transistor 107 is electrically connected to the wiring 127. The gate of the transistor 107 is electrically connected to the wiring 123.
[0082] Here, the wiring 127 can be, for example, a wiring that supplies a low potential V1 (V1 < Vcat + Vf). Also, since the operation of the transistor 107 is common to the transistors 101 and 103, the gate lines can be shared. The conductivity type of the transistor 107 may be the same as that of the transistors 101 and 103.
[0083] FIG. 10A shows the operation in the period T1 of the timing chart shown in FIG. 7 and corresponds to the operation equivalent to FIG. 8A. In the configuration shown in FIG. 10A, since current flows from the transistor 104 to the wiring 127 through the transistor 107, the light emission of the light-emitting device 108 can be suppressed. Also, the discharge of the source of the transistor 104 in the period T2 can also be performed through the transistor 107.
[0084] Note that the Vth correction range described above is slightly different in the configuration shown in FIG. 10A. In the configuration shown in FIG. 10A, Vd=V1 during discharge, and so discharging ends when Vs=V1 is reached. At this time, Vgs=V0-V1 is the upper limit of the correctable range. Therefore, the Vth correction range is greater than or equal to V0-Vano and less than or equal to V0-V1.
[0085] Transistors having metal oxide in their channel formation regions (hereinafter referred to as OS transistors) are preferably used as the n-channel transistors 101 and 102. OS transistors have a large energy gap in their semiconductor layers, and therefore can exhibit extremely low off-state current of several yA / μm (current value per μm of channel width).
[0086] The low off-state current of the OS transistor allows the gate potential of the transistor 104 to be held for a long time. Therefore, an image can be held even if the frame frequency is lowered. For example, the power consumption of the display device can be reduced by using a first frame frequency (e.g., 60 Hz or higher) for displaying moving images and switching to a second frame frequency (e.g., about 1 to 10 Hz) lower than the first frame frequency for displaying still images.
[0087] The semiconductor material used for an OS transistor can be a metal oxide with an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. A typical example is an oxide semiconductor containing indium, such as CAAC-OS or CAC-OS, which will be described later. CAAC-OS has stable atoms constituting the crystal, making it suitable for transistors that prioritize reliability. Furthermore, CAC-OS exhibits high mobility, making it suitable for transistors that operate at high speed.
[0088] OS transistors have characteristics that differ from transistors with silicon in the channel region (hereinafter referred to as Si transistors), such as being free from impact ionization, avalanche breakdown, and short-channel effects, and can form highly reliable circuits. Furthermore, OS transistors are less susceptible to variations in electrical characteristics caused by non-uniformity in crystallinity, which is a problem with Si transistors.
[0089] The semiconductor layer of the OS transistor can be, for example, a film represented by an In-M-Zn oxide containing indium, zinc, and M (metal such as aluminum, titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium, or hafnium). The In-M-Zn oxide can typically be formed by a sputtering method. Alternatively, it may be formed by an atomic layer deposition (ALD) method.
[0090] The atomic ratio of the metal elements in a sputtering target used to form an In-M-Zn-based oxide by sputtering preferably satisfies In≧M and Zn≧M. Preferred atomic ratios of the metal elements in such sputtering targets are In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4.1, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5:1:8, etc. The atomic ratios of the semiconductor layer to be formed each have a variation of ±40% of the atomic ratio of the metal elements contained in the sputtering target.
[0091] The semiconductor layer is made of an oxide semiconductor with a low carrier concentration. For example, the semiconductor layer has a carrier concentration of 1×10 17 / cm 3 Less than 1 × 10 15 / cm 3 or less, more preferably 1 × 10 13 / cm 3 Less than or equal to 1×10 11 / cm3 or less, more preferably 1 × 10 10 / cm 3 Less than 1 x 10 -9 / cm 3 An oxide semiconductor having a carrier concentration above this level can be used. Such an oxide semiconductor is called a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor. The oxide semiconductor has a low density of defect states and stable characteristics.
[0092] Note that the present invention is not limited to these, and an appropriate composition may be used depending on the required semiconductor characteristics and electrical characteristics (field-effect mobility, threshold voltage, etc.) of the transistor. In order to obtain the required semiconductor characteristics of the transistor, it is preferable to appropriately set the carrier concentration, impurity concentration, defect density, atomic ratio of metal element to oxygen, interatomic distance, density, and the like of the semiconductor layer.
[0093] When silicon or carbon, which is one of the group 14 elements, is contained in the oxide semiconductor constituting the semiconductor layer, oxygen vacancies increase, resulting in n-type conductivity. Therefore, the concentration of silicon or carbon in the semiconductor layer (concentration obtained by secondary ion mass spectrometry) is set to 2×10 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following applies.
[0094] In addition, when an alkali metal or alkaline earth metal is bonded to an oxide semiconductor, it may generate carriers, which may increase the off-state current of a transistor. Therefore, the concentration of the alkali metal or alkaline earth metal in the semiconductor layer (concentration obtained by secondary ion mass spectrometry) is set to 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 Do the following:
[0095] Furthermore, if nitrogen is contained in the oxide semiconductor that constitutes the semiconductor layer, electrons acting as carriers are generated, increasing the carrier concentration and making the semiconductor layer more likely to be n-type. As a result, transistors using oxide semiconductors that contain nitrogen tend to have normally-on characteristics. Therefore, the nitrogen concentration in the semiconductor layer (concentration obtained by secondary ion mass spectrometry) is 5×10 18 atoms / cm 3 It is preferable to do the following:
[0096] Furthermore, if hydrogen is contained in an oxide semiconductor constituting a semiconductor layer, it may react with oxygen bonded to metal atoms to form water, which may form oxygen vacancies in the oxide semiconductor. If oxygen vacancies are present in the channel formation region of an oxide semiconductor, the transistor may exhibit normally-on characteristics. Furthermore, defects in which hydrogen enters the oxygen vacancies may function as donors and generate electrons that serve as carriers. Furthermore, some of the hydrogen may bond with oxygen that is bonded to metal atoms to generate electrons that serve as carriers. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen is likely to exhibit normally-on characteristics.
[0097] A defect in which hydrogen is introduced into an oxygen vacancy can function as a donor in an oxide semiconductor. However, it is difficult to quantitatively evaluate such defects. Therefore, oxide semiconductors are sometimes evaluated using carrier concentration instead of donor concentration. Therefore, in this specification and the like, a carrier concentration assuming a state in which no electric field is applied may be used as a parameter of an oxide semiconductor instead of donor concentration. In other words, the "carrier concentration" described in this specification and the like may be rephrased as "donor concentration."
[0098] Therefore, it is preferable that the hydrogen concentration in the oxide semiconductor be reduced as much as possible. Specifically, the hydrogen concentration in the oxide semiconductor measured by secondary ion mass spectrometry (SIMS) is 1×10 20 atoms / cm 3 Less than 1 x 10 19atoms / cm 3 less than 5 × 10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 When an oxide semiconductor in which impurities such as hydrogen are sufficiently reduced is used for a channel formation region of a transistor, stable electrical characteristics can be obtained.
[0099] The semiconductor layer may also have a non-single-crystal structure. Examples of the non-single-crystal structure include a c-axis aligned crystalline oxide semiconductor (CAAC-OS) having crystals oriented along the c-axis, a polycrystalline structure, a microcrystalline structure, and an amorphous structure. Among non-single-crystal structures, the amorphous structure has the highest density of defect states, and the CAAC-OS has the lowest density of defect states.
[0100] An amorphous oxide semiconductor film has, for example, a disordered atomic arrangement and does not contain any crystalline components, or an amorphous oxide film has, for example, a completely amorphous structure and does not contain any crystalline parts.
[0101] The semiconductor layer may be a mixed film having two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single-crystal structure region. The mixed film may have a single layer structure or a multilayer structure including two or more of the above-mentioned regions.
[0102] The following describes the structure of a cloud-aligned composite (CAC)-OS, which is one type of non-single-crystal semiconductor layer.
[0103] CAC-OS is a material in which, for example, elements constituting an oxide semiconductor are unevenly distributed in a size range of 0.5 nm to 10 nm, preferably 1 nm to 2 nm, or in the vicinity thereof. Note that hereinafter, a state in which one or more metal elements are unevenly distributed in an oxide semiconductor and regions containing the metal elements are mixed in a size range of 0.5 nm to 10 nm, preferably 1 nm to 2 nm, or in the vicinity thereof, is also referred to as a mosaic or patch state.
[0104] The oxide semiconductor preferably contains at least indium, particularly indium and zinc, and may further contain one or more elements selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and the like.
[0105] For example, CAC-OS in In-Ga-Zn oxide (In-Ga-Zn oxide among CAC-OS may be particularly referred to as CAC-IGZO) is an indium oxide (hereinafter referred to as InO X1 (X1 is a real number greater than 0) or indium zinc oxide (hereinafter referred to as In X2 Zn Y2 O Z2 (X2, Y2, and Z2 are real numbers greater than 0.) and gallium oxide (hereinafter referred to as GaO X3 (X3 is a real number greater than 0) or gallium zinc oxide (Ga X4 Zn Y4 O Z4 (X4, Y4, and Z4 are real numbers greater than 0).) The material is separated into mosaics, and the mosaic InO X1 , or In X2 Zn Y2 O Z2 However, the structure is such that the particles are uniformly distributed in the film (hereinafter also referred to as a cloud-like structure).
[0106] In other words, CAC-OS is X3 The region where In is the main component and X2 Zn Y2 O Z2 , or InO X1 In this specification, for example, when the atomic ratio of In to element M in the first region is greater than the atomic ratio of In to element M in the second region, the first region is said to have a higher In concentration than the second region.
[0107] IGZO is a common name and may refer to a compound made of In, Ga, Zn, and O. A typical example is InGaO3(ZnO). m1 (m1 is a natural number), or In (1+x0) Ga (1-x0) O3(ZnO) m0 (-1≦x0≦1, m0 is an arbitrary number).
[0108] The crystalline compounds have a single crystal structure, a polycrystalline structure, or a CAAC structure, where multiple IGZO nanocrystals are connected together with their c-axis orientation and no orientation in the ab plane.
[0109] On the other hand, CAC-OS refers to the material structure of an oxide semiconductor. CAC-OS is a material structure containing In, Ga, Zn, and O, in which some regions observed as nanoparticles mainly composed of Ga and some regions observed as nanoparticles mainly composed of In are randomly dispersed in a mosaic pattern. Therefore, the crystal structure is a secondary element in CAC-OS.
[0110] Note that CAC-OS does not include a stacked structure of two or more films with different compositions, such as a two-layer structure consisting of a film mainly containing In and a film mainly containing Ga.
[0111] In addition, GaO X3The region where In is the main component and X2 Zn Y2 O Z2 , or InO X1 In some cases, a clear boundary between the region where the main component is the chromatic aberration and the region where the chromatic aberration is the main component may not be observed.
[0112] When one or more elements selected from aluminum, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium are contained instead of gallium, the CAC-OS has a structure in which some regions observed to be nanoparticles containing the metal element as the main component and some regions observed to be nanoparticles containing In as the main component are randomly dispersed in a mosaic pattern.
[0113] The CAC-OS can be formed, for example, by a sputtering method under conditions where the substrate is not intentionally heated. When the CAC-OS is formed by a sputtering method, one or more of an inert gas (typically argon), oxygen gas, and nitrogen gas may be used as the deposition gas. The lower the flow rate ratio of oxygen gas to the total flow rate of deposition gas during deposition, the better. For example, the flow rate ratio of oxygen gas is preferably 0% or more and less than 30%, and more preferably 0% or more and 10% or less.
[0114] CAC-OS has the characteristic that no clear peaks are observed when measured using the θ / 2θ scan by the out-of-plane X-ray diffraction (XRD) method, which indicates that the ab-plane and c-axis orientations of the measured region are not observed.
[0115] In addition, in the electron beam diffraction pattern obtained by irradiating CAC-OS with an electron beam (also called nanobeam electron beam) with a probe diameter of 1 nm, a ring-shaped region of high brightness (ring region) and multiple bright spots are observed in the ring region. Therefore, the electron beam diffraction pattern indicates that the crystal structure of CAC-OS has an nc (nano-crystal) structure that does not have orientation in the planar and cross-sectional directions.
[0116] For example, in the case of CAC-OS made of In-Ga-Zn oxide, EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX) revealed that GaO X3 The region where In is the main component and X2 Zn Y2 O Z2 , or InO X1 It can be seen that the region where the main component is the crystalline silicon is unevenly distributed and mixed.
[0117] CAC-OS has a different structure from IGZO compounds, in which metal elements are uniformly distributed, and has different properties from IGZO compounds. X3 The region where In is the main component. X2 Zn Y2 O Z2 , or InO X1 The structure is such that the regions are separated into a mosaic of regions each containing one of the elements as the main component and a region each containing one of the elements as the main component.
[0118] Here, In X2 Zn Y2 O Z2 , or InO X1 The region where is the main component is GaO X3 This region has higher conductivity than the region where In is the main component. X2 Zn Y2 O Z2 , or InO X1 When carriers flow through the region where In is the main component, the conductivity of the oxide semiconductor is exhibited.X2 Zn Y2 O Z2 , or InO X1 When the region mainly composed of is distributed in a cloud-like shape in the oxide semiconductor, a high field-effect mobility (μ) can be achieved.
[0119] On the other hand, GaO X3 The region where the main components are In X2 Zn Y2 O Z2 , or InO X1 This region has higher insulating properties than the region where GaO is the main component. X3 When a region containing the above as a main component is distributed in the oxide semiconductor, leakage current can be suppressed and good switching operation can be achieved.
[0120] Therefore, when CAC-OS is used in semiconductor devices, GaO X3 Insulation due to X2 Zn Y2 O Z2 , or InO X1 The conductivity due to the gate insulating layer and the gate insulating layer work in a complementary manner, resulting in a high on-state current (I on ), and high field-effect mobility (μ) can be achieved.
[0121] Furthermore, semiconductor devices using CAC-OS have high reliability, making them suitable as a constituent material for various semiconductor devices.
[0122] When an OS transistor is used as the n-channel transistor, a back gate may be provided as shown in FIG. 10B. The on-state current can be increased by supplying the same potential as the front gate to the back gate. Alternatively, a constant potential may be supplied to the back gate. The threshold voltage can be controlled by supplying a constant potential to the back gate.
[0123] The p-channel transistors 102, 104, and 105 are preferably transistors having silicon in a channel formation region.
[0124] The channel formation region of a Si transistor can be made of amorphous silicon, microcrystalline silicon, polycrystalline silicon, single crystal silicon, etc. When a transistor is provided on an insulating surface such as a glass substrate, polycrystalline silicon is preferably used.
[0125] High-quality polycrystalline silicon can be easily obtained by using a laser crystallization process or the like, and high-mobility transistors can be formed even in p-channel transistors. High-quality polycrystalline silicon can also be obtained by a solid-phase epitaxy method in which a metal catalyst such as nickel or palladium is added to amorphous silicon and then heated. Polycrystalline silicon formed by a solid-phase epitaxy using a metal catalyst may be further irradiated with a laser to enhance crystallinity. Because the metal catalyst remains in the polycrystalline silicon and deteriorates the electrical characteristics of the transistor, it is preferable to provide a region other than the channel formation region to which phosphorus or a noble gas is added, and to capture the metal catalyst in that region.
[0126] To obtain the effect of one embodiment of the present invention, the above structure is not limitative, and all the transistors included in a pixel may be formed using Si transistors or OS transistors.
[0127] 11 is a diagram illustrating a display device according to one embodiment of the present invention. The display device includes a pixel array 11, a source driver 20, and a gate driver 30. The pixel array 11 includes pixels 10 arranged in a column direction and a row direction. The pixels 10 have a Vth correction function for the driving transistor described in this embodiment. Note that the wiring is illustrated simply, and wirings connected to the elements included in the pixel 10 according to one embodiment of the present invention are provided.
[0128] The source driver 20 and the gate driver 30 may be implemented using sequential circuits such as shift registers.
[0129] The source driver 20 and the gate driver 30 may be formed by externally attaching IC chips using a COF (chip on film) method, a COG (chip on glass) method, a TCP (tape carrier package) method, etc. Alternatively, the source driver 20 and the gate driver 30 may be fabricated on the same substrate as the pixel array 11 using transistors fabricated using the same process as the pixel array 11.
[0130] Although an example in which the gate driver 30 is arranged on one side of the pixel array 11 is shown, two gate drivers 30 may be arranged facing each other across the pixel array 11 to divide the driving rows.
[0131] Next, we will explain the results of a simulation of pixel operation. Figure 12 shows the configuration of the pixel PIX used in the simulation. The pixel PIX has the same pixel circuit as that shown in Figure 1, with transistors Tr1 and Tr3 being n-channel OS transistors, and transistors Tr2, Tr4, and Tr5 being p-channel Si transistors.
[0132] The parameters in the simulation are as follows. The transistor sizes are W / L = 3μm / 3μm (transistors Tr1, Tr2, Tr3, Tr5), W / L = 3μm / 30μm (transistor Tr4: driving transistor), the capacitance value of capacitor CAP is 60 fF, the forward voltage Vf of light-emitting device LED is +5V, the voltage applied to the gate of the transistor is +15V as "H" and -5V as "L", the anode potential (Vano) is +10V, the cathode potential (Vcat) is -2V or -6V, the voltage V0 is +8V or +4V, the image data Vdata is from 0V to +8V, and the horizontal period is 8.3 μs. Note that SPICE was used for the circuit simulation software. Also, for the operation without Vth correction, the simulation was performed by changing the circuit configuration so that the voltage V0 is not input to the gate.
[0133] Fig. 13A shows the simulation results without Vth correction when Vano = +10V and Vcat = -2V. Here, the horizontal axis is the shift amount (ΔVth) considering the variation from the reference Vth (-0.2V), and the vertical axis is Vgs-Vth (the value during the light-emitting period) which is proportional to the drain current Id. Also, the image data Vdata was calculated in 9 steps (1V step) from 0V to +8V. As described above, Vgs includes the Vth extracted by the Vth correction operation. Therefore, ideally, Vgs-Vth does not depend on ΔVth and has a flat tendency. It can be seen that without Vth correction, Vgs-Vth changes significantly when the absolute value of ΔVth is large.
[0134] Fig. 13B shows the simulation results when Vth correction is performed with V0 = +8V. In the theoretical correction range (-2V < Vth < +5V), the slope is smaller compared to without Vth correction, and the effect of Vth correction is recognized. Note that on the negative side of ΔVth, the slope becomes slightly larger, which is considered to be because Vgs (the difference between V0 and Vano) is small from the initial stage of operation, and sufficient discharge is not performed for a certain period.
[0135] FIG. 14A shows the simulation results when Vth correction is performed with V0 = +4V to increase Vgs. Under this condition, in the theoretical correction range (-6V < Vth < +1V), the slope can be reduced even when ΔVth is on the negative side. The reason why the slope becomes slightly larger when ΔVth is on the positive side is considered to be that as the discharge progresses, Vds becomes smaller and the discharge amount decreases.
[0136] FIG. 14B shows the simulation results when Vth correction is performed with V0 = +4V and Vcat = -6V so that Vds does not decrease. Under this condition, it can be seen that good correction results are obtained in the theoretical correction range (-6V < Vth < +5V).
[0137] Based on the above simulation results, the effect of one aspect of the present invention could be confirmed.
[0138] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments.
[0139] (Embodiment 2) In this embodiment, a configuration example of a display device using a light-emitting device will be described. In this embodiment, the description of the elements, operations, and functions of the display device described in Embodiment 1 will be omitted.
[0140] The pixel 10 described in Embodiment 1 can be applied to the display device described in this embodiment. The scanning line driving circuit described below corresponds to a gate driver, and the signal line driving circuit corresponds to a source driver.
[0141] FIGS. 15A to 15C are diagrams showing the configuration of a display device to which one aspect of the present invention can be applied.
[0142] In FIG. 15A, a sealing material 4005 is provided so as to surround the display portion 215 provided on the first substrate 4001, and the display portion 215 is sealed by the sealing material 4005 and the second substrate 4006.
[0143] 15A, the scan line driver circuit 221a, the signal line driver circuit 231a, the signal line driver circuit 232a, and the common line driver circuit 241a each include a plurality of integrated circuits 4042 provided on a printed board 4041. The integrated circuits 4042 are formed using a single crystal semiconductor or a polycrystalline semiconductor. The common line driver circuit 241a has a function of supplying a specified potential to the wirings 122, 127, 128, and 129 described in Embodiment 1.
[0144] Various signals and potentials are supplied to the scanning line driving circuit 221a, the common line driving circuit 241a, the signal line driving circuit 231a, and the signal line driving circuit 232a via an FPC (Flexible printed circuit) 4018.
[0145] The integrated circuits 4042 included in the scan line driver circuit 221a and the common line driver circuit 241a have a function of supplying selection signals to the display portion 215. The integrated circuits 4042 included in the signal line driver circuit 231a and the signal line driver circuit 232a have a function of supplying image data to the display portion 215. The integrated circuits 4042 are mounted in a region on the first substrate 4001 that is different from a region surrounded by the sealant 4005.
[0146] The method for connecting the integrated circuit 4042 is not particularly limited, and methods such as wire bonding, COF (Chip On Film), COG (Chip On Glass), and TCP (Tape Carrier Package) can be used.
[0147] 15B shows an example in which the integrated circuit 4042 included in the signal line driver circuit 231a and the signal line driver circuit 232a is mounted by the COG method. In addition, a part or the whole of the driver circuit can be integrally formed on the same substrate as the display unit 215 to form a system-on-panel.
[0148] 15B shows an example in which the scanning line driving circuit 221a and the common line driving circuit 241a are formed on the same substrate as the display unit 215. By forming the driving circuits simultaneously with the pixel circuits in the display unit 215, the number of components can be reduced, thereby improving productivity.
[0149] 15B, a sealant 4005 is provided to surround the display portion 215, the scanning line driver circuit 221a, and the common line driver circuit 241a, which are provided on a first substrate 4001. A second substrate 4006 is provided on the display portion 215, the scanning line driver circuit 221a, and the common line driver circuit 241a. Therefore, the display portion 215, the scanning line driver circuit 221a, and the common line driver circuit 241a are sealed together with the display device by the first substrate 4001, the sealant 4005, and the second substrate 4006.
[0150] 15B shows an example in which the signal line driver circuit 231a and the signal line driver circuit 232a are formed separately and mounted on the first substrate 4001, but this configuration is not limiting. The scanning line driver circuit may be formed separately and mounted, or a part of the signal line driver circuit or a part of the scanning line driver circuit may be formed separately and mounted. Furthermore, as shown in FIG. 15C, the signal line driver circuit 231a and the signal line driver circuit 232a may be formed on the same substrate as the display unit 215.
[0151] Furthermore, a display device may include a panel in which a display device is sealed, and a module in which an IC including a controller and the like are mounted on the panel.
[0152] The display portion and the scan line driver circuit provided over the first substrate include a plurality of transistors, and the Si transistor or the OS transistor described in Embodiment 1 can be used as the transistors.
[0153] The transistors included in the peripheral driver circuit and the transistors included in the pixel circuits of the display area may have the same structure or different structures. The transistors included in the peripheral driver circuit may all have the same structure, or may have two or more types of transistors. Similarly, the transistors included in the pixel circuits may all have the same structure, or may have two or more types of transistors.
[0154] For example, an input device 4200 (see FIG. 16B) described later can be provided over the second substrate 4006. The display device illustrated in FIGS. 15A to 15C provided with the input device 4200 can function as a touch panel.
[0155] There is no limitation on the sensing device (also referred to as a sensor element) included in the touch panel of one embodiment of the present invention. Various sensors that can detect the proximity or contact of a sensed object such as a finger or a stylus can be used as the sensing device.
[0156] As the sensor type, various types can be used, such as a capacitance type, a resistive film type, a surface acoustic wave type, an infrared type, an optical type, and a pressure sensitive type.
[0157] In this embodiment, a touch panel having a capacitance type detection device will be described as an example.
[0158] The capacitance type includes a surface capacitance type, a projected capacitance type, etc. The projected capacitance type includes a self-capacitance type, a mutual capacitance type, etc. The mutual capacitance type is preferable because it enables simultaneous multi-point detection.
[0159] The touch panel of one embodiment of the present invention can have various configurations, such as a configuration in which a display device and a detection device that are separately manufactured are attached to each other, or a configuration in which electrodes that constitute a detection device are provided on one or both of a substrate that supports a display device and an opposing substrate.
[0160] An example of a touch panel is shown in Figures 16A and 16B. Figure 16A is a perspective view of a touch panel 4210. Figure 16B is a perspective schematic view of an input device 4200. For clarity, only representative components are shown.
[0161] The touch panel 4210 has a configuration in which a display device and a detection device that are separately manufactured are bonded together.
[0162] The touch panel 4210 has an input device 4200 and a display device, which are provided one on top of the other.
[0163] The input device 4200 has a substrate 4263, an electrode 4227, an electrode 4228, a plurality of wirings 4237, a plurality of wirings 4238, and a plurality of wirings 4239. For example, the electrode 4227 can be electrically connected to the wiring 4237 or the wiring 4239. Furthermore, the electrode 4228 can be electrically connected to the wiring 4239. The FPC 4272b is electrically connected to each of the plurality of wirings 4237 and the plurality of wirings 4238. The FPC 4272b can be provided with an IC 4273b.
[0164] Alternatively, a touch sensor may be provided between the first substrate 4001 and the second substrate 4006 of the display device. When a touch sensor is provided between the first substrate 4001 and the second substrate 4006, an optical touch sensor using a photoelectric conversion element may be used in addition to a capacitive touch sensor.
[0165] Fig. 17 is a cross-sectional view of the portion indicated by the chain line N1-N2 in Fig. 16B. Fig. 17 shows an example of a display device using a light-emitting device as a display device. The display device has an electrode 4015, which is electrically connected to a terminal of an FPC 4018 via an anisotropic conductive layer 4019. In Fig. 17, the electrode 4015 is electrically connected to a wiring 4014 through openings formed in insulating layers 4112, 4111, and 4110.
[0166] The electrode 4015 is formed from the same conductive layer as the first electrode layer 4030 , and the wiring 4014 is formed from the same conductive layer as the gate electrodes of the transistor 4010 and the transistor 4011 .
[0167] The display portion 215 and the scanning line driver circuit 221a provided over the first substrate 4001 each include a plurality of transistors, and a transistor 4010 included in the display portion 215 and a transistor 4011 included in the scanning line driver circuit 221a are shown as examples. Note that although top-gate transistors are shown as examples of the transistors 4010 and 4011 in FIG. 17, bottom-gate transistors may also be used.
[0168] An insulating layer 4112 is provided over the transistor 4010 and the transistor 4011. A partition wall 4510 is formed over the insulating layer 4112.
[0169] The partition wall 4510 is formed using an organic insulating material or an inorganic insulating material. In particular, it is preferable to form an opening over the first electrode layer 4030 using a photosensitive resin material so that the side surface of the opening becomes an inclined surface having a continuous curvature.
[0170] The display device also includes a capacitor 4020. In this example, the capacitor 4020 includes an electrode 4021 formed in the same process as the gate electrode of the transistor 4010, an insulating layer 4110, an insulating layer 4111, and electrodes formed in the same process as the source electrode and the drain electrode of the transistor 4010. The structure of the capacitor 4020 is not limited thereto, and the capacitor 4020 may be formed using other conductive layers and insulating layers.
[0171] The display device also includes an insulating layer 4111 and an insulating layer 4104. Insulating layers that are less permeable to impurity elements are used as the insulating layer 4111 and the insulating layer 4104. By sandwiching the semiconductor layer of the transistor between the insulating layer 4111 and the insulating layer 4104, it is possible to prevent impurities from entering from the outside.
[0172] The transistor 4010 provided in the display portion 215 is electrically connected to a display device. A light-emitting device can be used as the display device. For example, an EL device that uses electroluminescence can be used as the light-emitting device. The EL device has a layer containing a light-emitting compound between a pair of electrodes (also referred to as an "EL layer"). When a potential difference greater than the threshold voltage of the EL device is generated between the pair of electrodes, holes are injected into the EL layer from the anode side and electrons are injected from the cathode side. The injected electrons and holes recombine in the EL layer, and the light-emitting compound contained in the EL layer emits light.
[0173] As the EL device, for example, an organic EL device (also called an organic EL element) or an inorganic EL device (also called an inorganic EL element) can be used. Note that an LED (including a micro LED) that uses a compound semiconductor as a light-emitting material is also one type of EL element, and an LED can also be used.
[0174] In addition to the light-emitting compound, the EL layer may contain a substance with high hole-injection properties, a substance with high hole-transport properties, a hole-blocking material, a substance with high electron-transport properties, a substance with high electron-injection properties, or a bipolar substance (a substance with high electron-transport properties and high hole-transport properties).
[0175] The EL layer can be formed by a method such as a vapor deposition method (including a vacuum deposition method), a transfer method, a printing method, an inkjet method, or a coating method.
[0176] Inorganic EL devices are classified into dispersion-type inorganic EL devices and thin-film inorganic EL devices based on their element structure. Dispersion-type inorganic EL devices have an emitting layer in which particles of emitting material are dispersed in a binder, and their emission mechanism is donor-acceptor recombination emission, which utilizes donor and acceptor levels. Thin-film inorganic EL devices have a structure in which an emitting layer is sandwiched between dielectric layers, which are in turn sandwiched between electrodes, and their emission mechanism is localized emission, which utilizes inner-shell electron transitions of metal ions. Note that here we will use an organic EL device as the light-emitting device to explain.
[0177] The light-emitting device requires that at least one of the pair of electrodes is transparent in order to extract light. The transistor and light-emitting device are formed on a substrate, and the structure can be a top-emission structure in which light is extracted from the surface opposite the substrate, a bottom-emission structure in which light is extracted from the surface facing the substrate, or a dual-emission structure in which light is extracted from both surfaces.
[0178] If necessary, optical members (optical substrates) such as a black matrix (light-shielding layer), a colored layer (color filter), a polarizing member, a phase difference member, and an anti-reflection member may be provided as appropriate.
[0179] Materials that can be used for the light-shielding layer include carbon black, titanium black, metals, metal oxides, and composite oxides containing solid solutions of multiple metal oxides. The light-shielding layer may be a film containing a resin material or a thin film of an inorganic material such as a metal. The light-shielding layer may also be a laminated film of films containing the material of the colored layer. For example, a laminated structure may be used in which a film containing the material used for a colored layer that transmits light of one color and a film containing the material used for a colored layer that transmits light of another color. Using a common material for the colored layer and the light-shielding layer is preferred because it allows for the use of common equipment and simplifies the process.
[0180] Materials that can be used for the colored layer include metal materials, resin materials, resin materials containing pigments or dyes, etc. The light-shielding layer and the colored layer can be formed, for example, by using an inkjet method or the like.
[0181] A light-emitting device 4513, which is a display device, is electrically connected to a transistor 4010 provided in the display portion 215. Note that the light-emitting device 4513 has a stacked structure of a first electrode layer 4030, a light-emitting layer 4511, and a second electrode layer 4031, but is not limited to this structure. The structure of the light-emitting device 4513 can be changed as appropriate depending on the direction of light extracted from the light-emitting device 4513, etc.
[0182] The light-emitting layer 4511 may be configured as either a single layer or a stack of multiple layers.
[0183] The color of light emitted from the light-emitting device 4513 can be white, red, green, blue, cyan, magenta, yellow, or the like, depending on the material that makes up the light-emitting layer 4511 .
[0184] There are two methods for achieving color display: combining a light-emitting device 4513 that emits white light with a colored layer, and providing a light-emitting device 4513 that emits a different color for each pixel. The former method is more productive than the latter. On the other hand, the latter method requires a different light-emitting layer 4511 to be produced for each pixel, making it less productive than the former method. However, the latter method can produce an emitted color with higher color purity than the former method. In addition to the latter method, the color purity can be further improved by providing a microcavity structure to the light-emitting device 4513.
[0185] The light-emitting layer 4511 may contain an inorganic compound such as quantum dots. For example, quantum dots can be used in the light-emitting layer to function as a light-emitting material.
[0186] A protective layer may be formed over the second electrode layer 4031 and the partition wall 4510 to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting device 4513. The protective layer can be made of silicon nitride, silicon nitride oxide, aluminum oxide, aluminum nitride, aluminum oxynitride (oxygen content > nitrogen content), aluminum nitride oxide (nitrogen content > oxygen content), DLC (Diamond Like Carbon), or the like. A filler 4514 is provided in the space sealed by the first substrate 4001, the second substrate 4006, and the sealant 4005 to seal the space. In this way, it is preferable to package (enclose) the light-emitting device 4513 with a highly airtight protective film (such as a lamination film or an ultraviolet-curable resin film) or a cover material that is less susceptible to outgassing so as not to expose it to the outside air.
[0187] In addition to an inert gas such as nitrogen or argon, ultraviolet curing resin or thermosetting resin can be used as filler 4514, and PVC (polyvinyl chloride), acrylic resin, polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral), EVA (ethylene vinyl acetate), etc. can be used. Also, filler 4514 may contain a desiccant.
[0188] A glass material such as glass frit, a curable resin that cures at room temperature such as a two-component mixed resin, a photocurable resin, or a thermosetting resin can be used for the sealant 4005. The sealant 4005 may also contain a desiccant.
[0189] If necessary, an optical film such as a polarizing plate, a circular polarizing plate (including an elliptical polarizing plate), a retardation plate (λ / 4 plate, λ / 2 plate), or a color filter may be provided on the light-emitting surface of the light-emitting device. An anti-reflection film may also be provided on the polarizing plate or circular polarizing plate. For example, an anti-glare treatment can be applied to the surface, which diffuses reflected light by using unevenness to reduce glare.
[0190] Furthermore, by using a microcavity structure for the light-emitting device, it is possible to extract light with high color purity. Furthermore, by combining the microcavity structure with a color filter, it is possible to reduce glare and improve the visibility of the displayed image.
[0191] The translucency and reflectivity of the first and second electrode layers (also called pixel electrode layers, common electrode layers, counter electrode layers, etc.) that apply voltage to the display device can be selected depending on the direction of the light to be extracted, the location where the electrode layers are provided, and the pattern structure of the electrode layers.
[0192] For the first electrode layer 4030 and the second electrode layer 4031, a light-transmitting conductive material such as indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide to which silicon oxide is added can be used.
[0193] In addition, the first electrode layer 4030 and the second electrode layer 4031 can be formed using one or more metals such as tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), cobalt (Co), nickel (Ni), titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), silver (Ag), or alloys thereof, or metal nitrides thereof.
[0194] The first electrode layer 4030 and the second electrode layer 4031 can be formed using a conductive composition containing a conductive polymer. As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. Examples of the conductive polymer include polyaniline or a derivative thereof, polypyrrole or a derivative thereof, polythiophene or a derivative thereof, and a copolymer of two or more of aniline, pyrrole, and thiophene or a derivative thereof.
[0195] Figure 18 shows an example of a display device using a micro LED as a display device. Elements identical to those in Figure 17 are designated by the same reference numerals. Here, LED chips with a side dimension exceeding 1 mm are referred to as macro LEDs, those greater than 100 μm but not exceeding 1 mm are referred to as mini LEDs, and those 100 μm or less are referred to as micro LEDs. The micro LED 4600 includes a semiconductor layer 4610, a light-emitting layer 4620, and a semiconductor layer 4630.
[0196] Light-emitting layer 4620 is sandwiched between semiconductor layer 4610 and semiconductor layer 4630. In light-emitting layer 4620, electrons and holes combine to emit light. A p-type semiconductor layer can be used for semiconductor layer 4610, and an n-type semiconductor layer can be used for semiconductor layer 4630. Furthermore, light-emitting layer 4620 can be an n-type, i-type, or p-type semiconductor layer.
[0197] The stacked layer structure including the semiconductor layer 4610, the light-emitting layer 4620, and the semiconductor layer 4630 is formed to emit light of red, green, blue, blue-violet, purple, ultraviolet, or the like. For example, a compound including a Group 13 element and a Group 15 element (also referred to as a Group 3-5 compound) can be used for the stacked layer structure. Examples of Group 13 elements include aluminum, gallium, and indium. Examples of Group 15 elements include nitrogen, phosphorus, arsenic, and antimony.
[0198] For example, a pn junction or a pin junction can be formed using gallium phosphide compounds, gallium arsenide compounds, gallium aluminum arsenide compounds, aluminum gallium indium phosphide compounds, gallium nitride, indium gallium nitride compounds, selenium zinc compounds, etc., to fabricate a light-emitting diode that emits the desired light. Note that compounds other than those listed above may also be used.
[0199] Furthermore, the pn junction or pin junction may be not only a homojunction but also a heterojunction or a double heterojunction. Additionally, an LED having a quantum well junction, an LED using nanocolumns, or the like may be used.
[0200] For example, light-emitting diodes that emit light in the ultraviolet to blue wavelength range can use materials such as gallium nitride. Light-emitting diodes that emit light in the ultraviolet to green wavelength range can use materials such as indium gallium nitride compounds. Light-emitting diodes that emit light in the green to red wavelength range can use materials such as aluminum gallium indium phosphide compounds or gallium arsenide compounds. Light-emitting diodes that emit light in the infrared wavelength range can use materials such as gallium arsenide compounds.
[0201] If multiple micro LEDs 4600 arranged on the same surface are configured to emit light of different colors, such as R (red), G (green), and B (blue), color images can be displayed without using a color conversion layer. This eliminates the need for a process for forming a color conversion layer, thereby reducing the manufacturing cost of the display device.
[0202] Alternatively, all the micro LEDs 4600 arranged on the same surface may emit light of the same color. In this case, the light emitted from the light-emitting layer 4620 is extracted to the outside of the display device via one or both of a color conversion layer and a colored layer. For example, quantum dots can be used for the color conversion layer.
[0203] The semiconductor layer 4630 is electrically connected to a wiring layer 4730 via a wiring layer 4710 and a wiring layer 4720. The wiring layer 4730 can supply a cathode potential.
[0204] In addition, since the transistor is easily damaged by static electricity, etc., it is preferable to provide a protection circuit for protecting the driver circuit, and the protection circuit is preferably configured using a nonlinear element.
[0205] This embodiment mode can be implemented in appropriate combination with any of the structures described in the other embodiment modes.
[0206] (Embodiment 3) In this embodiment, examples of transistors that can be used in place of the transistors described in the above embodiment modes will be described with reference to the drawings.
[0207] The display device of one embodiment of the present invention can be manufactured using various types of transistors such as bottom-gate transistors and top-gate transistors, and therefore, the materials of the semiconductor layers and the transistor structures used can be easily replaced to suit existing manufacturing lines.
[0208] [Bottom-gate transistor] 19A is a cross-sectional view in the channel length direction of a channel protective transistor 810, which is a type of bottom-gate transistor. In FIG. 19A, the transistor 810 is formed over a substrate 771. The transistor 810 has an electrode 746 over the substrate 771 with an insulating layer 772 interposed therebetween. The transistor 810 also has a semiconductor layer 742 over the electrode 746 with an insulating layer 726 interposed therebetween. The electrode 746 can function as a gate electrode. The insulating layer 726 can function as a gate insulating layer.
[0209] The semiconductor device also has an insulating layer 741 over a channel formation region of the semiconductor layer 742. An electrode 744a and an electrode 744b are formed over the insulating layer 741 and in contact with part of the semiconductor layer 742. The electrode 744a can function as either a source electrode or a drain electrode. The electrode 744b can function as the other of the source electrode and the drain electrode. Part of the electrode 744a and part of the electrode 744b are formed over the insulating layer 741.
[0210] The insulating layer 741 can function as a channel protective layer. Providing the insulating layer 741 over the channel formation region can prevent the semiconductor layer 742 from being exposed when the electrodes 744a and 744b are formed. Therefore, the channel formation region of the semiconductor layer 742 can be prevented from being etched when the electrodes 744a and 744b are formed.
[0211] The transistor 810 further includes an insulating layer 728 over the electrode 744 a, the electrode 744 b, and the insulating layer 741 , and an insulating layer 729 over the insulating layer 728 .
[0212] When an oxide semiconductor is used for the semiconductor layer 742, it is preferable to use a material that can remove oxygen from a part of the semiconductor layer 742 and generate oxygen vacancies in at least portions of the electrode 744a and the electrode 744b that are in contact with the semiconductor layer 742. The carrier concentration in the region where oxygen vacancies occur in the semiconductor layer 742 increases, and the region becomes n-type, forming an n-type region (n + Therefore, the region can function as a source region or a drain region. When an oxide semiconductor is used for the semiconductor layer 742, examples of a material that can remove oxygen from the semiconductor layer 742 and cause oxygen vacancies include tungsten and titanium.
[0213] The formation of the source and drain regions in the semiconductor layer 742 can reduce contact resistance between the semiconductor layer 742 and the electrodes 744a and 744b, and can improve the electrical characteristics of the transistor, such as field-effect mobility and threshold voltage.
[0214] When a semiconductor such as silicon is used for the semiconductor layer 742, a layer functioning as an n-type semiconductor or a p-type semiconductor is preferably provided between the semiconductor layer 742 and the electrode 744a and between the semiconductor layer 742 and the electrode 744b. The layer functioning as an n-type semiconductor or a p-type semiconductor can function as a source region or a drain region of a transistor.
[0215] The insulating layer 729 is preferably formed using a material that has a function of preventing or reducing diffusion of impurities into the transistor from the outside. Note that the insulating layer 729 can be omitted as necessary.
[0216] An electrode 723 that can function as a back gate electrode is provided over the insulating layer 729. The electrode 723 can be formed using a material and a method similar to those of the electrode 746. Note that a structure in which the electrode 723 is not provided is also possible.
[0217] Generally, a back gate electrode is formed of a conductive layer and is arranged so that the gate electrode and the back gate electrode sandwich the channel formation region of the semiconductor layer. Therefore, the back gate electrode can function in the same way as a gate electrode. The potential of the back gate electrode may be the same as that of the gate electrode, or may be the ground potential (GND potential), or any other potential. In addition, the threshold voltage of the transistor can be changed by changing the potential of the back gate electrode independently of the gate electrode.
[0218] The electrode 746 and the electrode 723 can both function as gate electrodes. Thus, the insulating layers 726, 728, and 729 can each function as a gate insulating layer. Note that the electrode 723 may be provided between the insulating layers 728 and 729.
[0219] Note that when one of the electrode 746 and the electrode 723 is referred to as a "gate electrode," the other is referred to as a "back gate electrode." For example, when the electrode 723 of the transistor 810 is referred to as a "gate electrode," the electrode 746 is referred to as a "back gate electrode." When the electrode 723 is used as a "gate electrode," the transistor 810 can be considered as a type of top-gate transistor. Furthermore, one of the electrode 746 and the electrode 723 may be referred to as a "first gate electrode," and the other may be referred to as a "second gate electrode."
[0220] By providing the electrode 746 and the electrode 723 with the semiconductor layer 742 therebetween and further by setting the electrode 746 and the electrode 723 to the same potential, the region through which carriers flow in the semiconductor layer 742 becomes larger in the film thickness direction, thereby increasing the amount of carrier movement. As a result, the on-state current and the field-effect mobility of the transistor 810 become larger.
[0221] Therefore, the transistor 810 has a large on-state current relative to the area it occupies. That is, the area occupied by the transistor 810 can be made small relative to the required on-state current.
[0222] In addition, since the gate electrode and the back gate electrode are formed of conductive layers, they have the function of preventing an electric field generated outside the transistor from acting on the semiconductor layer where the channel is formed (particularly, an electric field shielding function against static electricity, etc.) Note that the electric field shielding function can be enhanced by forming the back gate electrode larger than the semiconductor layer and covering the semiconductor layer with the back gate electrode.
[0223] Furthermore, by forming the back gate electrode using a conductive film having a light-shielding property, it is possible to prevent light from entering the semiconductor layer from the back gate electrode side, thereby preventing light degradation of the semiconductor layer and deterioration of electrical characteristics such as a shift in the threshold voltage of the transistor.
[0224] 19B is a cross-sectional view in the channel length direction of a channel protective transistor 820 having a different configuration from that shown in FIG. 19A. The transistor 820 has a structure similar to that of the transistor 810, except that an insulating layer 741 covers an edge of a semiconductor layer 742. The semiconductor layer 742 and an electrode 744a are electrically connected to each other through an opening formed by selectively removing a portion of the insulating layer 741 that overlaps with the semiconductor layer 742. The semiconductor layer 742 and an electrode 744b are electrically connected to each other through another opening formed by selectively removing a portion of the insulating layer 741 that overlaps with the semiconductor layer 742. The region of the insulating layer 741 that overlaps with the channel formation region can function as a channel protective layer.
[0225] The insulating layer 741 can prevent the semiconductor layer 742 from being exposed when the electrodes 744a and 744b are formed, and thus can prevent the semiconductor layer 742 from being thinned when the electrodes 744a and 744b are formed.
[0226] Furthermore, in the transistor 820, the distance between the electrode 744a and the electrode 746 and the distance between the electrode 744b and the electrode 746 are longer than in the transistor 810. Therefore, the parasitic capacitance generated between the electrode 744a and the electrode 746 can be reduced. Furthermore, the parasitic capacitance generated between the electrode 744b and the electrode 746 can be reduced.
[0227] 19C is a cross-sectional view in the channel length direction of a channel-etched transistor 825, which is a bottom-gate transistor. In the transistor 825, the electrodes 744a and 744b are formed without using the insulating layer 741. Therefore, part of the semiconductor layer 742 that is exposed during the formation of the electrodes 744a and 744b may be etched. On the other hand, since the insulating layer 741 is not provided, productivity of the transistor can be improved.
[0228] [Top-gate transistor] 20A is a top-gate transistor. The electrodes 744a and 744b are electrically connected to the semiconductor layer 742 in openings formed in the insulating layers 728 and 729.
[0229] Furthermore, by removing a portion of the insulating layer 726 that does not overlap with the electrode 746 and introducing impurities into the semiconductor layer 742 using the electrode 746 and the remaining insulating layer 726 as a mask, an impurity region can be formed in a self-aligned manner in the semiconductor layer 742. The transistor 842 has a region in which the insulating layer 726 extends beyond the end of the electrode 746. The impurity concentration in the region of the semiconductor layer 742 into which impurities are introduced via the insulating layer 726 is lower than that in the region into which impurities are introduced without the insulating layer 726. Therefore, an LDD (Lightly Doped Drain) region is formed in the region of the semiconductor layer 742 that overlaps with the insulating layer 726 but does not overlap with the electrode 746.
[0230] The transistor 842 further includes an electrode 723 formed over a substrate 771. The electrode 723 has a region overlapping with the semiconductor layer 742 with an insulating layer 772 interposed therebetween. The electrode 723 can function as a backgate electrode. Note that the electrode 723 does not necessarily have to be provided.
[0231] 20B, the insulating layer 726 may be entirely removed from a region that does not overlap with the electrode 746. Alternatively, the insulating layer 726 may be left as in a transistor 846 shown in FIG.
[0232] FIG. 21A shows a cross-sectional view of a transistor 810 in the channel width direction, and FIG. 21B shows a cross-sectional view of a transistor 842 in the channel width direction.
[0233] 21A and 21B, the gate electrode and the back gate electrode are connected to each other, and the gate electrode and the back gate electrode have the same potential. Also, the semiconductor layer 742 is sandwiched between the gate electrode and the back gate electrode.
[0234] The length in the channel width direction of each of the gate electrode and the back gate electrode is longer than the length in the channel width direction of the semiconductor layer 742, and the entire channel width direction of the semiconductor layer 742 is covered by the gate electrode or the back gate electrode with each insulating layer sandwiched between them.
[0235] With this structure, the semiconductor layer 742 included in the transistor can be electrically surrounded by the electric fields of the gate electrode and the back gate electrode.
[0236] A device structure of a transistor in which the electric fields of the gate electrode and back gate electrode electrically surround the semiconductor layer 742 in which the channel formation region is formed can be called a surrounded channel (S-channel) structure.
[0237] The S-channel structure allows an electric field for inducing a channel to be effectively applied to the semiconductor layer 742 by one or both of the gate electrode and the back gate electrode, thereby improving the current driving capability of the transistor and enabling high on-state current characteristics. Furthermore, since the on-state current can be increased, the transistor can be miniaturized. Furthermore, the S-channel structure allows the mechanical strength of the transistor to be increased.
[0238] Note that the gate electrode and the back gate electrode may not be connected to each other and different potentials may be supplied to them. For example, the threshold voltage of the transistor can be controlled by supplying a constant potential to the back gate electrode.
[0239] This embodiment mode can be implemented in appropriate combination with any of the structures described in the other embodiment modes.
[0240] (Fourth embodiment) Examples of electronic devices that can use the display device according to one embodiment of the present invention include display devices, personal computers, image storage devices or image playback devices equipped with a recording medium, mobile phones, game consoles including portable devices, portable data terminals, e-book terminals, cameras such as video cameras and digital cameras, goggle-type displays (head-mounted displays), navigation systems, audio playback devices (car audio, digital audio player, etc.), copiers, facsimiles, printers, printer-combined machines, automated teller machines (ATMs), vending machines, etc. Specific examples of these electronic devices are shown in FIGS.
[0241] 22A shows a digital camera including a housing 961, a shutter button 962, a microphone 963, a speaker 967, a display portion 965, operation keys 966, a zoom lever 968, a lens 969, and the like. The display device of one embodiment of the present invention can be used for the display portion 965.
[0242] 22B shows a portable data terminal, which includes a housing 911, a display portion 912, a speaker 913, operation buttons 914, a camera 919, and the like. Data can be input and output using a touch panel function of the display portion 912. The display device of one embodiment of the present invention can be used for the display portion 912.
[0243] 22C shows a mobile phone including a housing 951, a display portion 952, operation buttons 953, an external connection port 954, a speaker 955, a microphone 956, a camera 957, and the like. The mobile phone includes a touch sensor in the display portion 952. Any operation, such as making a call or inputting text, can be performed by touching the display portion 952 with a finger or a stylus. The housing 951 and the display portion 952 are flexible and can be folded as shown in the figure. The display device of one embodiment of the present invention can be used for the display portion 952.
[0244] 22D shows a drive recorder, which includes a housing 931, a display portion 932, operation buttons 933, a microphone 934, a lens 935, an attachment portion 936, and the like. By attaching the drive recorder to a windshield or the like of a vehicle via the attachment portion 936, a view ahead while the vehicle is traveling can be recorded. The display portion 932 can display a recorded image. The display device of one embodiment of the present invention can be applied to the display portion 932.
[0245] 22E illustrates a television including a housing 971, a display portion 973, operation buttons 974, a speaker 975, a communication connection terminal 976, an optical sensor 977, and the like. A touch sensor is provided in the display portion 973, and an input operation can be performed. The display device of one embodiment of the present invention can be used for the display portion 973.
[0246] 22F illustrates a digital signage having a large display portion 922. In the digital signage, for example, the large display portion 922 is attached to the side surface of a pillar 921. The display device of one embodiment of the present invention can be used for the display portion 922.
[0247] This embodiment mode can be implemented in appropriate combination with any of the structures described in the other embodiment modes. [Explanation of symbols]
[0248] SW1: switch, SW2: switch, SW3: switch, SW4: switch, SW5: switch, Tr1: transistor, Tr2: transistor, Tr3: transistor, Tr4: transistor, Tr5: transistor, 10: pixel, 11: pixel array, 20: source driver, 30: gate driver, 101: transistor, 102: transistor, 103: transistor, 104: transistor, 105: transistor, 106: capacitor, 107: transistor, 108: light-emitting device, 121: wiring, 122: wiring, 123: wiring, 124: Wiring, 125: wiring, 127: wiring, 128: wiring, 129: wiring, 215: display unit, 221a: scanning line driving circuit, 231a: signal line driving circuit, 232a: signal line driving circuit, 241a: common line driving circuit, 723: electrode, 726: insulating layer, 728: insulating layer, 729: insulating layer, 741: insulating layer, 742: semiconductor layer, 744a: electrode, 744b: electrode, 746: electrode, 771: substrate, 772: insulating layer, 810: transistor, 820: transistor, 825: transistor, 842: transistor, 844: transistor, 846: transistor, 911: housing, 912: display unit, 913: speaker, 914: operation button, 919: camera, 921: pillar, 922: display unit, 931: housing, 932: display unit, 933: operation button, 934: microphone, 935: lens, 936: parts, 951: housing, 952: display unit, 953: operation button, 954: external connection port, 955: speaker, 956: microphone, 957: camera, 961: housing, 962: shutter button, 963: microphone, 965: display unit, 966: operation key, 967: speaker, 968: zoom lever, 969: lens, 971: housing, 973: display unit, 97 4: operation button, 975: speaker, 976: communication connection terminal, 977: optical sensor, 4001: substrate, 4005: sealing material, 4006: substrate, 4010: transistor, 4011: transistor, 4014: wiring, 4015: electrode, 4018: FPC, 4019: anisotropic conductive layer, 4020: capacitor, 4021: electrode, 4030: electrode layer, 4031: electrode layer, 4041: printed circuit board, 4042: integrated circuit, 4104: insulating layer, 4110: insulating layer, 4111: insulating layer, 4112: insulating layer, 4200: input device, 4210: touch panel, 4227: electrode,4228: Electrode, 4237: Wiring, 4238: Wiring, 4239: Wiring, 4263: Substrate, 4272b: FPC, 4273b: IC, 4510: Partition, 4511: Light-emitting layer, 4513: Light-emitting device, 4514: Filler, 4600: Micro LED, 4610: Semiconductor layer, 4620: Light-emitting layer, 4630: Semiconductor layer, 4710: Wiring layer, 4720: Wiring layer, 4730: Wiring layer,
Claims
[Claim 1] A display device including a pixel including a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a capacitor, and a light-emitting device, the fourth transistor is a p-channel transistor, one of a source or a drain of the first transistor is electrically connected to one of a source or a drain of the second transistor and one electrode of the capacitor; the other of the source or the drain of the second transistor is electrically connected to one of the source or the drain of the third transistor and to the gate of the fourth transistor; a source of the fourth transistor is electrically connected to the other electrode of the capacitor and one of the source and the drain of the fifth transistor; The drain of the fourth transistor is electrically connected to the anode of the light-emitting device.
Citation Information
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