Method and system having conductive polymer coating for electrostatic discharge applications - Patents.com
A conductive polymer coating with low metal content and specific application processes addresses static charge issues in semiconductor devices, ensuring safety and cleanliness standards are met, enhancing device performance and reliability.
Patent Information
- Application Number
- JP2024537106
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2021-12-22
- Filing Date
- 2022-12-21
- Publication Date
- 2025-01-28
AI Technical Summary
Semiconductor processing devices are susceptible to static electricity accumulation, leading to potential damage and safety hazards due to static discharge, which existing conductive polymer coatings fail to address effectively while meeting cleanliness standards.
A conductive polymer coating with a total extractable metal content of less than 400 ng/g, providing a thin film layer on device surfaces to dissipate static charge without altering the material's characteristics, using a conjugated polymer like PEDOT:PSS, which is applied through a process involving dipping and acid washing to ensure adherence to semiconductor purity requirements.
The coating effectively reduces static charge accumulation, meeting cleanliness standards by maintaining low gas release and metal extraction levels, ensuring stable conductivity and adherence, thus enhancing device safety and performance in semiconductor processing.
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Figure 2025502686000001_ABST
Abstract
Description
[Technical field]
[0001] The present disclosure relates to semiconductor processing and to apparatus used in semiconductor processing. More specifically, the present disclosure relates to conductive polymer coatings on substrates of apparatus used in semiconductor processing to provide electrostatic discharge mitigation.
[0002] Priority This disclosure claims priority to U.S. Provisional Patent No. 63 / 292,927, having a filing date of December 22, 2021, which is incorporated herein by reference. [Background technology]
[0003] Equipment used in semiconductor processing includes equipment for protecting, manufacturing, transporting and delivering wafers, reticles and other substrates, and for preventing degradation and contamination (e.g., chemicals, particulate matter, gases, etc.) during their manufacture and transport. Such equipment includes, but is not limited to, front-opening integrated pods (FOUPs), reticle pods, wafer carriers, other containers and boxes used in semiconductor processing, robotic arms, load / unload ports, and fluid handling pipes, filters, valves and connectors.
[0004] However, the equipment used in semiconductor processing is essentially electrically insulating material and susceptible to static charge buildup that can lead to damage to the semiconductor processing system. Thus, preventing electrostatic discharge (ESD) is a key technical challenge in semiconductor processing systems and other technology applications. For example, frictional contact between fluids and the surfaces of various operating components (e.g., carriers, transport devices, tubes or pipes, valves, fittings, etc.) in semiconductor processing systems can result in the generation and accumulation of static charges. The extent of charge generation depends on various factors, including but not limited to the nature of the components, the type of contact between the components, the relative humidity, the path to ground, and the surface area. Furthermore, as the fluid flows through the system, the charge may be carried downstream in a phenomenon called streaming charge, where the charge may accumulate beyond the location where the charge was generated. A sufficient buildup of charge can cause discharges on pipe walls, on the surfaces of components, or even on substrates or wafers at various process steps.
[0005] The accumulation of static electricity can result in harmful side effects such as sparks and shorts that make affected components dangerous or difficult to work on, and a sudden discharge can damage electronic components or cause an explosion. Furthermore, many semiconductor devices are highly sensitive to the presence of static electricity. For example, semiconductor substrates are very sensitive and such discharge can lead to damage or destruction of the substrate, e.g., circuitry on the substrate can be destroyed and photoactive compounds can be activated before normal exposure to light. Furthermore, accumulated static charge can discharge from within the operating components of the fluid management system to the external environment, potentially damaging components within the piping (e.g., tubes, fittings, vessels, filters, etc.), resulting in leakage, spillage, and reduced performance of components of fluids within the system, which can result in fires and / or explosions. There is a need to find solutions to dissipate static charge in semiconductor processing systems in general to improve production yields, reduce manufacturing costs, and improve product quality and product reliability. Summary of the Invention
[0006] The present disclosure relates to semiconductor processing and to apparatus used in semiconductor processing. More specifically, the present disclosure relates to conductive polymer coatings on substrates of apparatus used in semiconductor processing to provide electrostatic discharge mitigation.
[0007] In one embodiment, a semiconductor processing apparatus is provided that includes a substrate having a polymeric material layer, a conductive polymer coating layer coating at least a portion of the polymeric material layer of the substrate, wherein the conductive polymer coating layer comprises a conjugated polymer, the conductive polymer coating layer has less than 400 ng / g total extractable metals, and the conductive polymer coating layer is configured to discharge static electricity buildup in the semiconductor processing apparatus when connected to a semiconductor processing system.
[0008] In another embodiment, a method is provided for coating semiconductor processing equipment for controlling electrostatic discharge in a semiconductor processing process, comprising: coating at least a portion of at least one of a substrate or semiconductor support structure of the semiconductor processing equipment with a conductive polymer coating layer, wherein the substrate and / or semiconductor support structure comprises a polymeric material layer, and the conductive polymer coating layer comprises a conjugated polymer; drying the substrate and / or semiconductor support structure having the conductive polymer coating layer; immersing the dried substrate and / or semiconductor support structure having the conductive polymer coating layer in a 5% aqueous HCl solution; removing the substrate and / or semiconductor support structure having the conductive polymer coating layer from the 5% aqueous HCl solution; rinsing and / or immersing the substrate and / or semiconductor support structure having the conductive polymer coating layer in deionized water; and drying the substrate and / or semiconductor support structure having the conductive polymer coating layer, wherein the conductive polymer coating layer has less than 400 ng / g of total extractable metals. [Brief description of the drawings]
[0009] [Figure 1]1 is a front perspective view of a container having a conductive polymer coating layer in accordance with at least one example embodiment. [Diagram 2] 1 is a schematic diagram of a conductive polymer coating layer according to at least one example embodiment. [Diagram 3] 11 is a front perspective view of a container having a conductive polymer coating layer in accordance with at least one other example embodiment. [Figure 4] 1 is a flowchart illustrating a conductive polymer coating method in accordance with at least one example embodiment. [Diagram 5] 1 is a table illustrating outgassing for a comparative example and at least one example embodiment. [Figure 6] 1 is a table showing total extractable metals for comparative examples and at least one example embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0010] Like reference characters refer to like features.
[0011] As used in this specification and the appended claims, the singular forms "a," "an," and "the" include plural referents unless the content clearly dictates otherwise. As used in this specification and the appended claims, the term "or" is generally utilized in its sense including "and / or" unless the content clearly dictates otherwise. As used herein, the term "about" is generally used to include ±5% of the value it encompasses.
[0012] Although specific embodiments of the present disclosure are described herein with reference to the accompanying drawings, it should be understood that the disclosed embodiments are merely examples of the present disclosure that may be embodied in various forms. Well-known functions or structures are not described in detail to avoid obscuring the present disclosure in unnecessary detail. Therefore, specific structural and functional details disclosed herein should not be interpreted as limiting, but merely as a basis for claims and as a representative basis for teaching those skilled in the art to utilize the present disclosure in various ways in substantially any appropriately detailed structure. In this specification and drawings, like-referenced numbers represent elements that can perform the same, similar, or equivalent functions.
[0013] The scope of the present disclosure should be determined by the appended claims and their legal equivalents, rather than by the examples given herein. For example, the steps recited in any method claim may be performed in any order and are not limited to the order set forth in the claims. Further, no element is essential to the practice of the present disclosure unless expressly indicated herein as "critical" or "essential."
[0014] The present disclosure relates to semiconductor processing and apparatus used in semiconductor processing. More specifically, the present disclosure relates to conductive polymer coatings on substrates for operating components used in semiconductor processing to provide electrostatic discharge mitigation.
[0015] To meet the high purity requirements of semiconductor processing, the equipment of the semiconductor processing system provides FOUPs, reticle pods, wafer carriers, other containers and boxes, robot arms, load / unload ports, tubing, fittings, valves and other elements made from polymers, such as electrically inert polymers. These electrically inert polymers can include, but are not limited to, polycarbonate, polyethylene, such as high density polyethylene (HDPE) and ultra-high molecular weight polyethylene (UPE), polypropylene, polyolefins, polyetheretherketone (PEEK), or combinations thereof. However, these materials are inherently electrically insulating materials and are susceptible to the accumulation of static charges that can lead to damage to the semiconductor processing system.
[0016] Since static electricity is understood to be a problem of surface charges where the charge imbalance is on the surface of a material, static dissipative materials have been used to prevent the buildup of static charges. Some static dissipative materials are produced by compounding a polymeric resin, such as polycarbonate, polypropylene, fluoropolymers such as perfluoroalkoxyalkanes, and conductive fillers, such as metal particles, which are then molded into the final semiconductor processing equipment and / or components thereof. However, it has been found that compounding the polymeric resin with conductive fillers can affect the material properties of the polymeric resin, e.g., increasing the brittleness of the product, as well as result in a product that does not meet the purity limits for at least some of the cleanliness requirements of the semiconductor processing, e.g., outgassing, extractable metals, etc. For example, it is understood that many materials constantly outgas molecular contamination and also absorb chemicals from the air that may be released during semiconductor processing. Similarly, metal inclusions imparted to the substrate can have a detrimental effect on device performance and yield, e.g., by reducing the integrity of the gate oxide, introducing mobile charge, resulting in center recombination, junction leakage, or dark current, etc.
[0017] Although conductive polymer coatings have been widely used in many different industries for ESD applications, prior conductive polymer coatings also do not meet at least some of the cleanliness standards set for semiconductor processing, which can lead to unacceptable contamination of products, such as wafers, reticles, etc., and therefore have typically been unusable in semiconductor processing. For example, U.S. Patent No. 10,731,041 to Heraeus Medical Components LLC discloses a conductive polymer coating suitable for application to three-dimensional substrates and / or substrate surfaces having a high degree of flexibility. While the conductive polymer coating provides electrical conductivity, durability, and wear resistance, it does not meet at least some of the cleanliness requirements of semiconductor processing, such as unacceptable levels of outgassing and extractable metal content.
[0018] While static dissipative materials produced from blending polymer resins with carbon black, carbon nanotubes, etc. are a solution to the above deficiencies, the present disclosure relates to an apparatus used in semiconductor processing that overcomes the deficiencies of the prior art by having a thin layer of conductive polymer coating to provide electrostatic discharge mitigation that meets the cleanliness requirements of semiconductor processing. Specifically, the conductive polymer coating is provided as a thin surface coating layer on the surface of the apparatus used in semiconductor processing. The conductive polymer coating meets the cleanliness requirements by outgassing at least less than 2 μg / g, preferably less than 1 μg / g, most preferably less than 0.5 μg / g, and having less than 400 ng / g, preferably less than 200 ng / g, most preferably less than 100 ng / g total extractable metals. By providing a conductive polymer coating on the substrate surface, the ESD function can be achieved without changing the properties of the product material itself, the blending process is eliminated, cleanliness control is improved, it is cost-effective as coating the substrate is less expensive than blending and molding, and the color is translucent or light blue. It will be understood that the conductive polymer may be a homogenous conductive polymer layer consisting essentially of the conductive polymer, or the conductive polymer may be provided as particles and / or compounds in a binder, as a surface layer, or may be blended with a substrate material to provide electrostatic discharge mitigation.
[0019] In some embodiments, the conductive polymer coating layer is configured to continuously dissipate static buildup to ground, as discussed further below, so that certain components within the semiconductor processing equipment are grounded to reduce static charge buildup, mitigating static buildup within the system.
[0020] In this application, a "conductive polymer" is an organic polymer that conducts electricity. Without wishing to be bound by theory, a conductive polymer is an organic polymer that is 2 It is understood to have a backbone of hybridized carbon centers. One valence electron on each center is perpendicular to the other three sigma bonds. z orbitals. All p zThe orbitals combine with each other, resulting in a collection of delocalized orbitals throughout the molecule. The electrons in these delocalized orbitals become more mobile when the material is "doped" by oxidation, which removes some of these delocalized electrons. Thus, the conjugated p orbitals form a one-dimensional electronic band, and the electrons in this band become mobile when the band becomes partially vacant. These same materials may also be doped by reduction, which adds electrons to otherwise unfilled bands. In practice, most organic conductors are oxidatively doped to obtain p-type materials.
[0021] In one embodiment, the conductive polymer comprises a conjugated polymer. The term "conjugated polymer" refers to an organic polymer characterized by a backbone chain of alternating double and single bonds. The overlapping p orbitals create a system of delocalized π electrons, resulting in electronic properties.
[0022] Conductive polymers can include polymers such as polyacetylene, poly(fluorene), polyphenylene, polyphenylenevinylene, polypyrene, polyazulene, polynaphthalene, poly(pyrrole), polycarbazole, polyindole, polyazepine, polyaniline, polyacene, polythiophene, polythiophenevinylene, poly(p-phenylene sulfide), polypyridine, or functionalized derivatives, precursors, or combinations thereof.
[0023] For example, in a non-limiting example, the conductive polymer may include polymers such as:
[0024] TIFF2025502686000002.tif31170
[0025] PEDOT:PSS
[0026] TIFF2025502686000003.tif118170
[0027] In a preferred embodiment, the conductive polymer is a conjugated polymer that includes a main chain containing an aromatic ring and has a heteroatom containing nitrogen (N) or sulfur (S), where the N or S heteroatom is either in the aromatic ring or outside the aromatic ring. For example, the polymer with a heteroatom containing N in the aromatic ring includes polypyrrole, polycarbazole, polyindole and polyazepine, and the polymer with a heteroatom containing N outside the aromatic ring is polyaniline. The polymer with a heteroatom containing S in the aromatic ring includes polythiophene and poly(3,4-ethylenedioxythiophene), and the polymer with a heteroatom containing S outside the aromatic ring is poly(p-phenylene sulfide).
[0028] Typically, the conductive polymer is cationic. Thus, in some embodiments, a primary counterion is provided that substantially neutralizes the charged functional groups attached to the conductive polymer. The primary counterion can include one or more repeating units with negatively charged functional groups. FIG. 1 is a perspective view of a container 1 according to an embodiment. As shown in FIG. 1, the container 1 includes a front door 4 and a shell 6. The front door 4 is received within and blocks the front opening of the shell 6. The shell 6 defines an interior space of the container, in which a wafer or reticle may be housed. The container 1 may be accessed by moving (e.g., opening, removing) the door 4. For example, the door 4 of FIG. 1 is received in the shell 6 by inserting the door 4 into the shell 6. In one embodiment, one or more of the door 4 and the shell 6 can include a locking mechanism (not shown) to prevent the door 4 from being accidentally removed. The container 1 can be a container for reticles, such as, for example, a front opening integrated pod (FOUP) or a reticle pod.
[0029] The shell 6 includes a first side wall, a second side wall, a back wall, and a top wall and a bottom wall. The first side wall faces the second side wall, and the top wall faces the bottom wall. The vessel 1 may include an equipment connection at the top wall of the shell 6. In one embodiment, the equipment connection allows a standard automated attachment (not shown) for moving the vessel 1, such as, but not limited to, an automated robotic arm, to be connected to the vessel 1. For example, an automated robotic arm may be used to move the vessel 1 between different processing equipment. In one embodiment, the vessel 1 may include one or more handles (not shown) to allow a user (e.g., a technician, etc.) to manually move the vessel 1. The vessel 1 may include multiple inlet purge ports and / or outlet purge ports at the bottom wall corresponding to the inlets and / or outlets of the vessel 1. The multiple inlet purge ports (and outlet purge ports) may be connected to a purge flow distribution system for purging and discharging purge gas from the vessel 1.
[0030] The container 1 may include a number of wafer or reticle support structures, such as shelves, for holding wafers or reticles (not shown) within the interior space. The shelves may be inserted into rails or slots and are sized to hold wafers or reticles (not shown), respectively, within the interior space. For example, the shelves in the embodiments are sized to hold wafers or reticles of a particular size (e.g., 150 mm wafers, 200 mm wafers, etc.). The container 1 may be loaded and / or unloaded from a load / unload port for loading wafers or reticles into the container 1 and / or for processing wafers or reticles within the container 1.
[0031] The container 1 may be made of a polymer, such as an electrically inactive polymer, which may include, but is not limited to, polycarbonate, polyethylene, high density polyethylene (HDPE), polypropylene, polyolefin, cyclic olefin copolymer, polyetheretherketone (PEEK), or combinations thereof.
[0032] FIG. 2 shows that in one embodiment, a conductive polymer coating layer 220 may be coated on at least a portion 210 of the container 1, including, in a non-limiting manner, the exterior and / or interior surfaces of the side, back, top and bottom walls, the door, the substrate support structure, or a combination thereof. The conductive polymer coating layer 220 may coat the entire surface, or only a portion thereof, such that the conductive polymer coating layer can provide a path to ground for discharging static electricity that has built up in the container. For example, the conductive polymer coating layer 220 may be provided as a coating strip along the exterior surfaces of the top, side and bottom walls of the container, and / or may coat the entire surface thereof. Thus, when the container 1 is loaded into the load / unload port, a path to ground is provided through the conductive polymer coating layer 220 and the ground provided in the load / unload port.
[0033] In one embodiment, it is understood that the conductive polymer coating layer 220 having a thickness of 50 nanometers to 50 micrometers, preferably 200 nanometers to 10 micrometers, more preferably 200 nanometers to 500 nanometers, may be coated on the surface layer of the container 1. The desired thickness of the conductive polymer coating layer is not limited thereto, since it depends on the application of the device and the conditions of use of the device. Since the conductive polymer coating layer 220 is provided as a thin coating layer on the surface layer of the substrate, some advantages are provided. For example, since the conductive polymer coating layer is provided on the surface layer of the substrate, the conductive polymer coating layer is a surface active material and does not change the physical and / or mechanical properties of the underlying substrate while providing electrical conductivity equal to or greater than that of the compounded polymer resin with conductive fillers of the preceding ESD material. Furthermore, since the conductive polymer coating layer is a separate layer coated on the substrate, it is easier to control the cleanliness of the conductive polymer coating layer, since the materials used to provide the conductive polymer coating layer are limited to the conductive polymer and, optionally, additives, binders, solvents, surfactants, etc., used with the conductive polymer. Furthermore, because the static dissipative material is a coating of a conductive polymer rather than produced from a blend of polymer resin and conductive metal fillers, it will be appreciated that the conductive polymer coating layer can be provided as a translucent or blue coating layer to impart different coloring to the substrate.
[0034] In one embodiment, the conductive polymer coating layer 220 may include a conjugated polymer with overlapping p-orbitals, where conjugated polymer refers to an organic polymer characterized by a backbone chain of alternating double and single bonds. For example, the conjugated polymer may include a backbone containing an aromatic ring and a nitrogen (N) or sulfur (S) containing heteroatom, where the N or S heteroatom is either in the aromatic ring or outside the aromatic ring. Polymers with N containing heteroatoms in the aromatic ring include polypyrrole, polycarbazole, polyindole, and polyazepine, and polymers with N containing heteroatoms outside the aromatic ring include polyaniline. Polymers with S containing heteroatoms in the aromatic ring include polythiophene and poly(3,4-ethylenedioxythiophene), and polymers with S containing heteroatoms outside the aromatic ring include poly(p-phenylene sulfide). The conductive polymer coating layer 220 may also include additives such as methacrylate, acrylate, and / or acrylamide based monomers, vinyl based monomers, photoactive binders or photopolymers, stabilizers such as 2,2,6,6-tetramethylpiperidine and its derivatives, benzophenones, benzofuranones, oxanilides, p-phenylenediamine, N-(1,3-dimethylbutyl)-N'-phenyl-p-phenylenediamine, N-isopropyl-N'-phenyl-p-phenylenediamine, 6-ethoxy-2,2,4-trimethyl-1,2-dihydroquinoline, ethylenediurea, hindered phenols, aromatic amines, benzotriazoles, and hydroxyphenyltriazines, thickeners, solvents, surfactants, crosslinkers, binders to position and bind the materials of the coating layer and provide adhesion, durability, flexibility, gloss, etc. It is therefore understood that the conductive polymer coating layer 220 consists essentially of a polymer to provide electrical conductivity for discharging static electricity buildup within the device, and does not include conductive fillers, such as metals, to provide electrical conductivity for the layer.
[0035] In one embodiment, the conjugated polymer is PEDOT:PSS, made by aqueous oxidative polymerization of the monomer 3,4-ethylenedioxythiophene (EDOT) in the presence of polystyrene sulfonic acid (PSS or PSSA). It is understood that the PSS in the complex functions as a counterion to the cationic conductive PEDOT, forming a stable and easy-to-process dispersion of PEDOT:PSS polymer gel particles. These gel particles, which consist of approximately 90-95% water in the dispersion, have excellent film-forming properties and are easily processable into thin coatings of conductive polymer coating layers on a variety of substrates.
[0036] It is understood that the conjugated polymer of the conductive polymer coating layer 220 does not include water molecules attached to the polymer, and therefore the conductive polymer coating layer does not depend on the relative humidity in the system. That is, while some conductive polymers include ionomers consisting of a hydrophobic backbone and a small amount of ionic sites attached to the polymer backbone or at the ends of the polymer backbone, and / or copolymers copolymerized with polyester-ether or other hydrophilic groups, where the conductivity is based on water molecules or metal ions absorbed by the ionic or ether groups of these polymers, the conductive polymer of the present invention is a conjugated polymer whose conductivity is not dependent on the relative humidity in the environment, e.g., whose conductivity is less affected by relative humidity. For example, without wishing to be bound by theory, it is understood that the conjugated polymer includes a backbone chain of alternating double and single bonds, where overlapping p orbitals create a system of delocalized π electrons, resulting in the conductivity of the conductive polymer and not relying on water molecules and / or metal ions for such conductivity.
[0037] Additionally, the conductive polymer coating layer 220 has a surface resistivity between E+5 and E+9 Ωcm. The conductive polymer coating layer 220 also meets the cleanliness requirements for semiconductor processing by outgassing less than 4 μg / g, preferably less than 2 μg / g, and most preferably less than 0.5 μg / g, and having total extractable metals less than 400 ng / g, preferably less than 200 ng / g, and most preferably less than 100 ng / g. It is understood that the cleanliness requirements of the conductive polymer coating layer 220 can only be achieved by using specific conductive polymers and specific processes, as discussed below.
[0038] FIG. 3 is a perspective view of a container 300 with a front door 304 removed, according to another embodiment. As shown in FIG. 3, the container 300 includes a front door 304 and a shell 306, and is similar in construction and materials to the container 1 of FIG. 1. The front door 304 is received within and blocks the front opening of the shell 306. The shell 306 defines an interior space of the container, where wafers or reticles may be stored in the interior space of the container 300. The container 300 may be accessed by moving (e.g., opening, removing) the door 304. For example, the door 304 of FIG. 3 is received in the shell 306 by inserting the door 304 into the shell 306. In one embodiment, one or more of the door 304 and the shell 306 may include a locking mechanism (not shown) to prevent the door 304 from being accidentally removed. Container 300 may be, for example, a container for a reticle, such as a front opening integrated pod (FOUP) or a reticle pod.
[0039] The container 300 may include a number of wafer or reticle support structures 308, such as shelves, for holding wafers or reticles (not shown) within the interior space. The shelves 308 may be inserted into rails or slots, each sized to hold a wafer or reticle (not shown) within the interior space. For example, the shelves 308 in one embodiment are sized to hold a particular size wafer or reticle (e.g., 150 mm wafers, 200 mm wafers, etc.). The container 300 may be loaded and / or unloaded from a load / unload port for loading wafers or reticles into the container 300 and / or for processing wafers or reticles within the container 300.
[0040] In this embodiment, the entire interior and / or exterior of the housing of the container 300 is not coated with the conductive polymer coating layer, but instead, the conductive polymer coating layer 320 is provided as a strip along at least the inner surface of the container 300. The conductive polymer coating layer 320 may be provided as a path to ground through the bottom wall of the container 300. It is understood that the conductive polymer coating layer 320 can be provided along the sidewalls and / or support structure 308 to provide a continuous path to ground through the bottom wall of the container 300. After the container 300 is loaded into the load / unload port, the path to ground is completed, thereby allowing static electricity built up in or around the container 300 to be discharged. Although this embodiment shows a strip of conductive polymer coating 320 along the inner surface, it is understood that a strip can also be provided along the outer surface for additional static electricity discharge provided alone or in combination with the conductive polymer coating layer along the inner surface.
[0041] 4 is a flow chart of a method 400 of coating semiconductor handling equipment to control electrostatic discharge, according to one embodiment. For example, method 400 may be used to coat a container 1, as described above and in FIG. 1. In one embodiment, container 1 is a FOUP or a reticle container.
[0042] The operational or process flow chart 400 may include one or more operations, acts, or functions illustrated by one or more blocks 410, 420, 430, 440, and 450. Although illustrated as separate blocks, various blocks may be divided into additional blocks, combined into fewer blocks, or eliminated depending on the desired implementation. As a non-limiting example, the blocks of the flow chart 400 may be executed by any suitable controller having, for example, a processor and / or memory. The method 400 may begin at either block 410 or block 420 or block 430. It is understood that block 410 may precede block 420, or vice versa.
[0043] At 410, at least a portion of a substrate for a housing of a semiconductor processing equipment or a semiconductor support structure is coated with a conductive polymer coating layer. The housing and / or the semiconductor support structure includes at least a polymer material layer, and the conductive polymer coating layer coats at least the polymer material layer and includes a conjugated polymer. It is understood that the conductive polymer conductive material layer may be coated with the conductive polymer coating layer only in portions or the entire housing and / or the semiconductor support structure. The substrate may be treated before coating. For example, the substrate may be cleaned using water, organic solvents, plasma, ozone, alcohol, acid, etc., and dried before coating the substrate. The coating may be applied using a dip coating process in which the substrate is immersed in a coating precursor solution. If only a portion of the substrate is to be coated, a masking step may be used to mask the portions of the substrate that are not to be coated. The method 400 then proceeds to 420.
[0044] At 420, the housing and / or semiconductor support structure with the conductive polymer coating layer is dried at a temperature between 80° C. and 160° C. After each dip, the substrate is baked for a short period of time to solidify the most recently applied coating layer. Typically, the substrate is baked for about 2 minutes to about 30 minutes between coatings, usually at a temperature between about 80° C. and about 160° C.
[0045] After the final dip, once the desired coating thickness has been achieved, the coated substrate can be heat cured. The heat curing step involves baking the substrate at an elevated temperature for a period of time significantly longer than the relatively short baking periods after each dip. For example, the heat curing step typically involves baking the substrate at a temperature of about 80° C. to about 160° C. for about 15 minutes to about 4 hours.
[0046] It is also understood that the coating step can include other means for coating, such as spray coating, vapor deposition, chemical and electrochemical coating, spin coating, roll-to-roll coating, bar coating, etc., and combinations thereof. If the conductive polymer includes a polymer that can be polymerized using UV-initiated polymerization, the method can also include a UV-initiated polymerization step.
[0047] At 430, the dried housing and / or semiconductor support structure with the conductive polymer coating layer is immersed in a 5% HCl aqueous solution.
[0048] At 440, the housing and / or semiconductor supporting structure with the conductive polymer coating layer is removed from the 5% HCl aqueous solution, and the housing and / or semiconductor supporting structure with the conductive polymer coating layer is rinsed and / or soaked in deionized water.
[0049] The housing and / or semiconductor support structure with the conductive polymer coating layer is dried at 450. The resulting conductive polymer coating layer has less than 200 ng / g, preferably less than 100 ng / g, of total extractable metals. EXAMPLES
[0050] In semiconductor processing, the following properties of the conductive polymer coating should be achieved: - ESD target: E +5 ~E +9 Surface resistivity in Ωcm. - ESD stability of the coating: stable at different temperatures (up to 100°C) and different relative humidities. - Coating cleanliness: a. Outgassing <4 μg / g, preferably <2 μg / g, most preferably <0.5 μg / g b. Total extractable metals <400ng / g, preferably <200ng / g, most preferably <100ng / g - Coating durability a. Tape adhesion test to determine the bond stability of the coating. The tape adhesion test is based on modified ASTM D3359 Method B (Cross Cut). The test is performed by scribing the coating to the substrate with a sharp knife blade in a cross-cut grid pattern created by two cuts in each direction. Once the incisions are made, a GLTL ASTM D3359 Cross Hatch Adhesion Test Tape is applied over the incisions and pressed into place using an eraser. After a short "recovery" period of approximately 60 seconds, the tape is removed by grasping the free end and rapidly bending it at an angle as close to 180° as possible and pulling it off. After the tape is removed, the amount of coating that has peeled from the substrate and the backside of the tape is examined. The adhesion is evaluated based on the scale specified in the ASTM D3359 standard. A conductive polymer coating layer passes the tape adhesion test if there is no peeling or flaking of the coating. a.Other application requirements such as grain shedding and wafer insertion testing.
[0051] It is understood that in one embodiment, the surface resistivity can be determined by the following method: 1) The conductive polymer coated polymer plaque is first wiped and cleaned. Cleaning can be done using water and / or soap, organic solvents, hydrogen peroxide, acid or etching solutions, plasma cleaning / etching, etc. 2) The resistivity of the plaque is then measured using a surface resistivity meter, for example, two probes from a PRS-801 Resistivity System.
[0052] It is understood that in one embodiment, outgassing may be determined by the following method: 1) Take 0.1 to 0.2 grams of substrate sample and place it into an empty thermal desorption (TD) tube. 2) Separate the gases from the substrate sample using thermal desorption for 30 min on the substrate sample in a TD tube at a temperature of 100 or 200 °C. 3) Analyze the released gases in the TD tube using gas chromatography and mass spectrometry.
[0053] It is understood that in one embodiment, the extractable metals may be determined by the following method: 1) Take 20 grams of a substrate sample, place the substrate sample in a bottle, for example a clean PFA bottle, and add 20 ml of 5% HNO3. 2) Leach the substrate sample with 5% HNO3 at 70°C for 4 hours. 3) Remove the leachate into a bottle, e.g., a clean PFA bottle, and analyze the leachate using inductively coupled plasma mass spectrometry. 4) A blank of 20 ml of 5% HNO3 may be subtracted from the results.
[0054] With the above characteristics and testing procedures for the conductive polymer coatings in mind, the following examples are provided to further illustrate various embodiments of the present disclosure.
[0055] Comparative Example 1: A substrate comprising polycarbonate (PC) or ultra-high molecular weight polyethylene (UPE) is prepared. The PC and UPE substrates are then dip coated in a precursor coating composition comprising an aqueous oxidative polymerization of the monomer 3,4-ethylenedioxythiophene (EDOT) in the presence of polystyrene sulfonic acid (PSS or PSSA). The precursor coating composition is about 90-95% water. The substrate is coated with the precursor coating composition until the conductive polymer coating layer reaches a desired thickness, for example, about 200 nm to 10 μm, and dried at a temperature of 80 ° C to 160 ° C to solidify the coating composition. During coating of the substrate, the substrate can be dipped multiple times until the desired thickness is reached. After each dip, the substrate can be dried to solidify the coating layer.
[0056] Comparative Example 2: Substrates comprising polycarbonate (PC) or ultra-high molecular weight polyethylene (UPE) are prepared similarly to Comparative Example 1. However, before dip coating, the PC and UPE substrates are pre-cleaned. Cleaning includes, but is not limited to, rinsing with water and / or soap, using organic solvents, hydrogen peroxide, acids or etching solutions, plasma cleaning / etching, and the like. The PC and UPE substrates are then dip coated in a precursor coating composition comprising an aqueous oxidative polymerization of the monomer 3,4-ethylenedioxythiophene (EDOT) in the presence of polystyrene sulfonic acid (PSS or PSSA). The substrates are coated with the precursor coating composition until the conductive polymer coating layer reaches a desired thickness, for example, about 200 nm to 10 μm, and dried at a temperature between 80 ° C and 160 ° C to solidify the coating composition. During coating of the substrate, the substrate can be dipped multiple times until the desired thickness is reached. After each dip, the substrate can be dried to solidify the coating layer.
[0057] Example embodiment 1: A substrate comprising polycarbonate (PC) or ultra-high molecular weight polyethylene (UPE) is prepared in the same manner as in Comparative Example 2. For example, the PC and UPE substrates are pre-cleaned prior to dip coating. The PC and UPE substrates are then dip coated in a precursor coating composition comprising an aqueous oxidative polymerization of the monomer 3,4-ethylenedioxythiophene (EDOT) in the presence of polystyrene sulfonic acid (PSS or PSSA). The substrate is coated with the precursor coating composition until the conductive polymer coating layer reaches a desired thickness, for example, about 200 nm to 10 μm, and dried at a temperature between 80 ° C and 160 ° C to solidify the coating composition. During coating of the substrate, the substrate can be dipped multiple times until the desired thickness is reached. After each dip, the substrate can be dried to solidify the coating layer. However, after the dip coating step, the PC and UPE substrates are acid washed. Specifically, the dried PC and UPE substrates are immersed in a 5% HCl aqueous solution for at least about 10 hours, preferably about 15 hours. The PC and UPE substrates are then rinsed with deionized water and immersed in deionized water for at least about 4 hours, preferably about 8 hours, and most preferably about 10 hours. Finally, the PC and UPE substrates are dried at a temperature between 80° C. and 160° C. to solidify the coating composition and dry the PC and UPE substrates.
[0058] result Comparative Examples 1 and 2 and Example 1 had some similar results, e.g., the conductive polymer coating layer was uniform and translucent or light blue in color.
[0059] Furthermore, as can be seen in Table 1, the PC and UPE substrates having the conductive polymer coating layers of Comparative Examples 1 and 2 and Example 1 have a low E +5 From E +9The target surface resistivity for semiconductor processing was met by being between Ωcm. It is understood that the conductive polymer coating layer having the conjugated polymer is more advantageous than other ESD polymers, such as ionomeric ESD polymers. For example, the conductive polymer coating layer having the conjugated polymer has a stable surface resistivity even at high temperatures, such as 100°C, and in high humidity conditions, such as when submerged in water.
[0060] TIFF2025502686000004.tif48170
[0061] Additionally, the PC and UPE substrates having conductive polymer coating layers with the conjugated polymers of Comparative Examples 1 and 2 and Example 1 passed the tape test as there was no peeling or flaking of the conductive polymer coating layer during testing. It is understood that the UPE substrate may be pretreated using ozone to obtain a more robust coating and this may be used in any of the examples.
[0062] The PC and UPE substrates having conductive polymer coating layers with conjugated polymers of Comparative Examples 1 and 2 and Example 1 met the surface resistivity, coating stability, and coating robustness properties for semiconductor processing, but the substrates having conductive polymer coating layers of Comparative Examples 1 and 2 did not meet all of the cleanliness targets for semiconductor processing, as discussed below.
[0063] As can be seen in Figure 5, the substrate with the conductive polymer coating of Comparative Example 1 did not meet the coating cleanliness criteria for outgassing. Rather, the substrate with the conductive polymer coating of Comparative Example 1 outgassed at about 4.3 μg / g, which is higher than 0.5 μg / g. However, the substrates with the conductive polymer coating of Comparative Example 2 and Example Embodiment 1 met the target outgassing level of less than 0.5 μg / g.
[0064] As can be seen in FIG. 6, neither of the substrates having the conductive polymer coating of Comparative Example 1 and 2 met the coating cleanliness criteria for total extractable metals. Instead, the substrate having the conductive polymer coating of Comparative Example 1 had a conductive polymer coating layer with a total extractable metal of about 1190 ng / g, while the substrate having the conductive polymer coating of Comparative Example 2 had a conductive polymer coating layer with a total extractable metal of about 820 ng / g. It was surprisingly found that when the substrate having the conductive polymer coating of Comparative Example 2 was acid washed as in Example 1, the total extractable metals of the conductive polymer coating layer were reduced to about 350 ng / g. Thus, only the substrates having the conductive polymer coating prepared as in Example 1, including, for example, acid washing, resulted in a conductive polymer coating layer with less than 400 ng / g, preferably less than 200 ng / g, most preferably less than 100 ng / g of total extractable metals, meeting the cleanliness goal of total extractable metals for semiconductor processing.
[0065] As seen in Figure 6, it has been surprisingly discovered that the combination of selecting a precursor coating composition that includes a binder and / or surfactant, e.g., a neutral surfactant, with low or no amounts of certain metals, and an acid wash step results in a conductive polymer coating that meets or exceeds the outgassing and total extractable metals cleanliness standards of semiconductor processing. That is, while the acid wash step reduces a portion of the total extractable metals in the conductive polymer coating layer, the combination of preparing a substrate with a conductive polymer coating of Example 1 surprisingly more than additively reduced the total extractable metals in the conductive polymer coating layer by having less than 100 ng / g of total extractable metals.
[0066] In view of the above, it is understood that the conductive polymer coating layers discussed herein meet or exceed the properties of conductive polymer coatings for semiconductor processing. Thus, the embodiments disclosed herein can improve electrostatic discharge dissipation in semiconductor processing systems, thus improving the life, yield, etc. of various equipment and substrates used in semiconductor processing systems, and mitigating defects and / or damage and / or safety issues associated with the accumulation of electrostatic charge.
[0067] Embodiments. It should be noted that any of embodiments 1-15 can be combined with any one of embodiments 16-17, and vice versa.
[0068] Aspect 1. A semiconductor processing apparatus comprising: a substrate comprising a polymeric material layer; a conductive polymer coating layer coating at least a portion of the polymeric material layer of the substrate, wherein the conductive polymer coating layer comprises a conjugated polymer, the conductive polymer coating layer has less than 400 ng / g total extractable metals, and the conductive polymer coating layer is configured to discharge static electricity buildup within the semiconductor processing apparatus when connected to a semiconductor processing system.
[0069] Embodiment 2. The semiconductor processing apparatus of embodiment 1, wherein the conductive polymer coating layer consists essentially of a polymer.
[0070] Embodiment 3. The semiconductor processing apparatus of any of embodiments 1 and 2, wherein the conductive polymer coating layer is semi-transparent.
[0071] Aspect 4. The semiconductor processing apparatus of any of aspects 1 to 3, wherein the substrate comprises a polymer, the polymer being at least one of polycarbonate, polyethylene, high density polyethylene (HDPE), polypropylene, polyolefin, cyclic olefin copolymer, polyether ether ketone (PEEK), or a combination thereof.
[0072] Embodiment 5. The semiconductor processing apparatus of any one of embodiments 1 to 4, wherein the conductive polymer coating layer has a surface resistivity of E+5 to E+9 Ωcm.
[0073] Embodiment 6. The semiconductor processing apparatus of any of embodiments 1 to 5, wherein the conductive polymer coating layer outgases less than 4 μg / g, preferably less than 0.5 μg / g.
[0074] Embodiment 7. The semiconductor processing device of any of embodiments 1 to 6, wherein the conductive polymer coating layer has less than 200 ng / g, preferably less than 100 ng / g, of total extractable metals.
[0075] Embodiment 8. The semiconductor processing apparatus of any one of embodiments 1 to 7, wherein the conductive polymer coating layer has a thickness between 200 nm and 10 micrometers.
[0076] Example 9. The semiconductor processing apparatus of any one of Examples 1 to 8, wherein the conductive polymer coating layer is a surface-active material.
[0077] Embodiment 10. The semiconductor processing apparatus of any one of embodiments 1 to 9, wherein the conductive polymer coating layer comprises at least one of polyacetylene, poly(fluorene), polyphenylene, polyphenylene vinylene, polypyrene, polyazulene, polynaphthalene, poly(pyrrole), polycarbazole, polyindole, polyazepine, polyaniline, polyacene, polythiophene, polythiophene vinylene, poly(p-phenylene sulfide), polypyridine, or functionalized derivatives, precursors, or combinations thereof.
[0078] Embodiment 11. The semiconductor processing device of embodiment 10, wherein the conjugated polymer comprises a nitrogen-containing or sulfur-containing heteroatom.
[0079] Embodiment 12. The semiconductor processing equipment of any of embodiments 1 to 11, selected from the group consisting of a front-opening integrated pod, wafer carrier, reticle carrier, or similar container or box for semiconductor processing.
[0080] Aspect 13. The semiconductor processing apparatus of aspect 12, further comprising a semiconductor support structure configured to accommodate one or more semiconductor substrates, the conductive polymer coating layer coating at least a portion of the semiconductor support structure.
[0081] Aspect 14. A semiconductor processing device as described in aspect 13, wherein the conductive polymer coating layer is configured to discharge static electricity buildup by providing a path to ground when the semiconductor processing device is connected to a load port of a semiconductor processing system.
[0082] Aspect 15. A semiconductor processing apparatus according to any of aspects 1 to 14, wherein the conductive polymer coating layer does not contain water molecules attached to the polymer such that the conductive polymer coating layer is independent of the relative humidity in the system.
[0083] Embodiment 16. A method for coating semiconductor processing equipment to control electrostatic discharge, comprising: coating at least a portion of at least one of a substrate or semiconductor support structure of the semiconductor processing equipment with a conductive polymer coating layer, wherein the substrate and / or semiconductor support structure comprises a polymeric material layer, and wherein the conductive polymer coating layer comprises a conjugated polymer; drying the substrate and / or semiconductor support structure having the conductive polymer coating layer; immersing the dried substrate and / or semiconductor support structure having the conductive polymer coating layer in a 5% aqueous HCl solution; removing the substrate and / or semiconductor support structure having the conductive polymer coating layer from the 5% aqueous HCl solution; rinsing and / or immersing the substrate and / or semiconductor support structure having the conductive polymer coating layer in deionized water; and drying the substrate and / or semiconductor support structure having the conductive polymer coating layer, wherein the conductive polymer coating layer has less than 400 ng / g of total extractable metals.
[0084] Embodiment 17. A method for coating semiconductor processing equipment according to embodiment 16, wherein the coating further comprises coating the entire substrate and / or semiconductor support structure with a conductive polymer coating layer.
[0085] Thus, although some exemplary embodiments of the present disclosure have been described, those skilled in the art will readily appreciate that still other embodiments may be made and used within the scope of the claims appended hereto. Numerous advantages of the present disclosure encompassed by this document have been set forth in the foregoing description. It will be understood, however, that the present disclosure is in many respects merely illustrative. Changes may be made in details, particularly in matters of shape, size, and arrangement of parts, without exceeding the scope of the present disclosure. Naturally, the scope of the present disclosure is defined in the language in which the appended claims are expressed.
Claims
1. a substrate comprising a layer of polymeric material; and A conductive polymer coating layer coating at least a portion of the polymer material layer of the substrate. A semiconductor processing apparatus comprising: the conductive polymer coating layer comprises a conjugated polymer; the conductive polymer coating layer having less than 400 ng / g total extractable metals; 13. A semiconductor processing apparatus, the semiconductor processing apparatus comprising: a conductive polymer coating layer configured to discharge static electricity build-up within the semiconductor processing apparatus when connected to a semiconductor processing system.
2. The semiconductor processing apparatus of claim 1 , wherein the conductive polymer coating layer consists essentially of a polymer.
3. The semiconductor processing apparatus of claim 1 , wherein the conductive polymer coating layer is semi-transparent.
4. 10. The semiconductor processing apparatus of claim 1, wherein the substrate comprises a polymer, the polymer being at least one of polycarbonate, polyethylene, high density polyethylene (HDPE), polypropylene, polyolefin, cyclic olefin copolymer, polyetheretherketone (PEEK), or combinations thereof.
5. 10. The semiconductor processing apparatus of claim 1, wherein the conductive polymer coating layer has a surface resistivity of between E+5 and E+9 Ω cm.
6. 2. The semiconductor processing apparatus of claim 1, wherein the conductive polymer coating layer outgases less than 4 μg / g, preferably less than 0.5 μg / g.
7. 2. The semiconductor processing apparatus of claim 1, wherein the conductive polymer coating layer has a total extractable metals content of less than 200 ng / g, preferably less than 100 ng / g.
8. The semiconductor processing apparatus of claim 1 , wherein the conductive polymer coating layer has a thickness between 200 nm and 10 micrometers.
9. The semiconductor processing apparatus of claim 1 , wherein the conductive polymer coating layer is a surface-active material.
10. 2. The semiconductor processing apparatus of claim 1, wherein the conductive polymer coating layer comprises at least one of polyacetylene, poly(fluorene), polyphenylene, polyphenylene vinylene, polypyrene, polyazulene, polynaphthalene, poly(pyrrole), polycarbazole, polyindole, polyazepine, polyaniline, polyacene, polythiophene, polythiophene vinylene, poly(p-phenylene sulfide), polypyridine, or functionalized derivatives, precursors, or combinations thereof.
11. The semiconductor processing apparatus of claim 10 , wherein the conjugated polymer comprises a nitrogen-containing or sulfur-containing heteroatom.
12. 10. The semiconductor processing equipment of claim 1, selected from the group consisting of a front-opening integrated pod, wafer carrier, reticle carrier, or similar container or box for semiconductor processing.
13. The semiconductor processing apparatus of claim 12 , further comprising a semiconductor support structure configured to house one or more semiconductor substrates, the conductive polymer coating layer coating at least a portion of the semiconductor support structure.
14. 14. The semiconductor processing equipment of claim 13, wherein the conductive polymer coating layer is configured to discharge static electricity build-up by providing a path to ground when the semiconductor processing equipment is connected to a load port of a semiconductor processing system.
15. 10. The semiconductor processing apparatus of claim 1, wherein the conductive polymer coating layer does not contain water molecules attached to the polymer such that the conductive polymer coating layer is independent of the relative humidity in the system.
16. 1. A method for coating semiconductor processing equipment to control electrostatic discharge, comprising: coating at least a portion of at least one of a substrate or a semiconductor supporting structure of a semiconductor processing equipment with a conductive polymer coating layer, wherein the substrate and / or the semiconductor supporting structure comprises a polymer material layer, and the conductive polymer coating layer comprises a conjugated polymer; drying the substrate and / or semiconductor supporting structure having the conductive polymer coating layer; immersing the dried substrate and / or semiconductor supporting structure having a conductive polymer coating layer in a 5% aqueous HCl solution; removing the substrate and / or semiconductor supporting structure with the conductive polymer coating layer from the 5% HCl aqueous solution and rinsing and / or immersing the substrate and / or semiconductor supporting structure with the conductive polymer coating layer in deionized water; and Drying the substrate and / or semiconductor support structure having a conductive polymer coating layer Including, A method for coating semiconductor processing equipment, wherein the conductive polymer coating layer has less than 400 ng / g of total extractable metals.
17. 20. The method for coating semiconductor processing equipment of claim 16, wherein coating further comprises coating the entire substrate and / or semiconductor supporting structure with a conductive polymer coating layer.
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