Improving the coherence of superconducting qubits

Abstract

A method for enhancing the coherence of a superconducting qubit with an electric field is disclosed, the method including providing at least one qubit electrode containing a detrimental defect and an intrinsic qubit resonance, and applying an intrinsic parameter of the electric field to the qubit electrode to move the defect away from the qubit resonance such that the energy relaxation time T1 of the qubit is increased.

Description

[Technical field]

[0001] This description relates generally to methods for enhancing the coherence of superconducting quantum bits (qubits) and methods for determining optimization of the enhancement of coherence of superconducting quantum bits. [Background technology]

[0002] Superconducting integrated circuits are evolving into a powerful architecture for creating artificial quantum systems. In cutting-edge experiments, tens of qubits are coherently operated as quantum simulators and universal processors, while access to prototype devices is provided via the cloud, accelerating the development of practical quantum algorithms. Mitigating decoherence remains one of the central challenges ahead, as it impedes further upscaling and implementation of quantum error correction.

[0003] Known processors typically use transmon qubits based on discrete energy levels in nonlinear LC resonators formed by capacitively branched Josephson junctions. Decoherence in such qubits is largely due to dielectric losses in the native surface oxide of the capacitor electrodes. The losses show a pronounced structural frequency dependence due to individual resonances of quasi-atomic tunneling defects. Summary of the Invention

[0004] Methods for enhancing the coherence of superconducting quantum bits (qubits) and methods for determining an optimization for enhancing the coherence of superconducting quantum bits are disclosed.

[0005] In particular, a method for enhancing the coherence of a superconducting quantum bit (qubit) is described that includes providing at least one qubit electrode that contains a deleterious defect and an intrinsic qubit resonance, and applying intrinsic parameters of an electric field to the qubit electrode to tune the defect to avoid the qubit resonance.

[0006] In an embodiment, a method is presented to extend the energy relaxation time T1 of a superconducting transmon qubit. In this embodiment, the qubit electrodes can be exposed to a DC electric field that is tuned to move the most detrimental TLS defects away from the qubit resonance. Averaged over the operating frequency of the qubit and a time interval of 30 minutes, the T1 time was improved by at least 23% compared to no applied electric field.

[0007] In one embodiment, the intrinsic parameter is the electric field strength.

[0008] In one embodiment, the detrimental defect is a parasitic two-level quantum system (TLS).

[0009] In particular, a method for determining the enhancement of coherence of a superconducting quantum bit (qubit) is described, the method comprising the steps of: a) providing at least one qubit electrode, the qubit electrode including a deleterious defect, an intrinsic qubit energy relaxation time (T1), and a qubit operating frequency; b) applying different values ​​of an intrinsic parameter of an electric field to the qubit electrode; and c) determining the qubit energy relaxation time (T1) over time for each of the different values.

[0010] In one embodiment, these steps are used at different qubit operating frequencies for optimization.

[0011] In one embodiment, the electric field is a DC electric field.

[0012] In one embodiment, the method further includes quantifying the improvement in coherence by determining a qubit energy relaxation time (T1) and comparing the determined qubit energy relaxation time to a qubit energy relaxation time determined at zero applied electric field.

[0013] In one embodiment, the quantification of the improvement was at least 23% of all determined values, i.e., at least 20% of 46% of determined values, or preferably at least 10% of 67% of determined values, of all tested qubit resonant frequencies.

[0014] In one embodiment, the qubit energy relaxation time (T1) is determined within a time frame of 30 minutes. Depending on the strength of the applied electric field, different time frames may be applicable. That is, the higher the electric field strength, the shorter the time frame may be.

[0015] These and other aspects, features, and implementations may be expressed as methods, apparatus, systems, components, program products, means or steps for performing a function, and in other forms.

[0016] These and other aspects, features, and embodiments will become apparent from the following description, including the claims. [Brief description of the drawings]

[0017] [Figure 1a] FIG. 13 is a cross-sectional view of a sample housing for an example qubit electrode. [Figure 1b] 1 is a photograph of an XMon qubit sample used in one embodiment. [Figure 1c] 13 is a plot of an exemplary measurement of a decaying qubit population after a long excitation microwave pulse (see inset) to determine the energy relaxation time (T1). [Figure 1d] 1 is a plot showing resonances of an individual two-level quantum system (TLS). [Diagram 2] 11 a and 11 b are a series of plots showing benchmarking of optimization algorithms. [Figure 3a] 1 is a plot showing the qubit relaxation time T1 (qubit T1) before and after optimization of the electric field. [Figure 3b] 13 is a plot showing the relative improvement of qubit T1 after optimization. [Figure 3c] is a plot showing the time-varying intensity of the qubit relaxation time (T1). [Figure 4a] FIG. 1 is a schematic diagram of a top view of two exemplary XMon qubits. [Figure 4b] 1 is a schematic diagram illustrating a cross section of an exemplary flip chip stack. [Figure 4c] 1 is a heat map showing simulated electric field strengths used in an exemplary flip-chip stack. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0018] In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to those skilled in the art that the subject matter of the present disclosure may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form in order to avoid unnecessarily obscuring the subject matter of the present disclosure.

[0019] However, it should be understood by those skilled in the art that the particular order or arrangement of schematic elements in the drawings does not imply that a particular order or sequence of processes or separation of processes is required. Moreover, the inclusion of schematic elements in the drawings is not intended to imply that such elements are required in all embodiments or that features represented by such elements may not be included in or combined with other elements in some embodiments.

[0020] Several features are described below, each of which can be used independently of one another or in any combination with the other features. However, individual features may not address any of the problems mentioned above, or may only address any one of the problems mentioned above. Some of the problems discussed above may not be fully addressed by any of the features described herein. Although headings are provided, information related to a particular heading, but not found in the section having that heading, may also be found elsewhere in this specification. Embodiments are described herein according to the following general outline. 1. TLS electric field adjustment 2. Methods for optimizing the qubit relaxation time T 3. Benchmarking methods of optimization routines 4. Integration with quantum processors 5. Conclusion

[0021] TLS electric field adjustment The overall concept of the disclosed subject matter is to provide a method for enhancing qubit coherence and a method for determining the enhancement of qubit coherence to provide an optimization routine for determining the energy relaxation time (T1). To enhance the qubit coherence, an electric field is applied to the qubit electrodes to tune them to avoid the effects of deleterious defects in the qubit electrodes from resonating with the qubit. By avoiding the defects from resonating with the qubit, the energy relaxation time (T1) of the qubit is increased, which greatly enhances the coherence of the qubit. This provides a great advantage in the applicability and reliability of qubits in quantum computer operations.

[0022] For our experiments, a transmon qubit sample was fabricated according to the so-called "XMon" design by Barends et al., as shown in Fig. 1b. It should be noted that qubit samples other than transmon qubits are also applicable. As shown in Fig. 1a, the electric field for TLS tuning was generated by DC electrodes attached to the lid of the sample housing, located 0.9 mm above the surface of the qubit chip. The electrodes in this example were made of copper foil insulated from the housing by Kapton foil. To improve the uniformity of the electric field near the qubit, the electrodes were made of a similar size to the qubit chip.

[0023] The response of the TLS to the applied electric field was observed by measuring the qubit energy relaxation time T1 as a function of the qubit frequency, which exhibits a Lorentzian minimum whenever a sufficiently strongly interacting TLS is tuned to resonate. A detailed image of the abundant TLS spectrum shown in Figure 1d was obtained using swap spectroscopy. Using this protocol, TLS were detected by the resonant decrease in the excited state population of the qubit after tuning for fixed time intervals to various probing frequencies. In the studied samples, only a single TLS was observed that did not couple to the applied electric field. This indicates that the TLS is likely to reside within the tunnel barrier of the submicron-sized qubit junction, where no DC electric field is present. This confirms that small-area Josephson junctions typically exhibit only a few resonating TLS, and that the dielectric loss is primarily due to defects in the qubit-electrode interface. This is true as long as the qubits are fabricated in a way that avoids the formation of large-area floating Josephson junctions, which are known to contribute many additional defects.

[0024] In Fig. 1d, we observed some TLSs exhibiting strong fluctuations or telegraphic switching of their resonant frequencies upon interaction with thermally activated low-energy TLSs. TLSs may also interact with conventional bistable charge flexuators, whose switching rates between states are very small. These flexuators may also be tuned by the applied electric field, so that the state of the flexuator, and thus the resonant frequency of the high-energy TLS, may depend on the history of the applied electric field, leading to the appearance of hysteresis effects in the electric field sweep. An example of such an interacting TLS-fluctuator system is marked by a circle in Fig. 1d, where the resonant frequency of the TLS changes abruptly.

[0025] Methods for optimizing the qubit relaxation time T1 As is evident from Fig. 1d, for each qubit operation frequency there was a preferred electric field bias at which most of the dominant TLS were tuned off the qubit resonance and the T1 time was maximized. In the following, a routine is described that can automatically determine the optimal electric field bias.

[0026] The method for determining the optimization involves the qubit T1 time being measured for a range of applied electric fields. Here, the T1 time is measured using the common protocol shown in the inset of Fig. 1c and is obtained from an exponential fit to the probability distribution of the decaying qubit state after excitation with a microwave pulse. Figure 2a shows the field dependence of T1 (cross data points) for applied voltages ranging from -10 to 10 V, measured at various qubit resonance frequencies (rows I-III). These data are then smoothed by nearest-neighbor averaging (black curve in Fig. 2a), averaging out individual dips and peaks in order to amplify a broader maximum where a more stable improvement can be expected.

[0027] Then, set the electric field to the value where the T1 time was maximized. For example, for the measurements made in Fig. 2a, the circle indicates where the T1 time was maximized. Now, it is recommended to approach the optimum electric field found from the same value where the previous electric field sweep was started. This helps to avoid the aforementioned hysteresis effects in the TLS resonance frequency, which may occur when coupled to a metastable field-tunable TLS whose state depends on the history of the applied electric field. Finally, perform a second pass sweeping the electric field in finer steps around the previously determined optimum value, until the obtained T1 time is close to the maximum value observed in the previous sweep. This allows better compensation of hysteresis effects, and the finer steps help to avoid sharp dips that were not resolved in the first pass.

[0028] Method benchmarking of optimization routines To test the efficiency of the optimization routine, first the qubit T1 was repeatedly observed for 30 min without any applied field as a reference (black shaded data in Fig. 2b). The optimization routine was then applied to search for the field that maximizes the qubit's coherence time by obtaining the data shown in Fig. 2a. The results were then checked by monitoring the T1 time at the found optimal field for another 30 min (light shaded data in Fig. 2b). Clearly, for most of this time the T1 time obtained after optimization was higher than the reference value obtained without any applied field.

[0029] To measure the average improvement of the optimization routine, the benchmarking protocol was repeated at a variety of qubit resonant frequencies (59 in total). Figures 3a and 3b summarize the absolute and relative improvements in qubit T1 times at all qubit resonant frequencies investigated. In most cases (85%), the routine improved the average qubit T1 time over a 30-minute period. At 67% of the different frequencies investigated, T1 improved by 10% or more, and at 46% of the different frequencies investigated, T1 improved by 20% or more. Averaged across all qubit resonant frequencies tested, the improvement in T1 time was about 23%.

[0030] To see to what extent the optimization routine affects the strength of the time fluctuations in the T1 time of the qubits, we compared the standard deviation of the T1 times observed in 30-minute intervals before and after optimization. The results are shown in Figure 3c. In slightly more than half of the cases (59%), the T1 time fluctuations, i.e., the standard deviation, increased after optimization. This could be mitigated by strengthening the optimization algorithm to favor broader T1 time peaks that are less sensitive to TLS frequency fluctuations, and by including as a criterion the strength of the T1 fluctuations at the detected peaks.

[0031] Methods for optimizing the qubit relaxation time T1 If each qubit in the processor is coupled to a dedicated local gate electrode, the optimization routine can be applied to all qubits simultaneously. This tuning process proceeds smoothly if no crosstalk of gate electrodes to neighboring qubits occurs. Furthermore, the generated electric field must be strong enough along all of the edges of the qubit island and the opposing ground planes to allow δε to be tuned at 100 MHz or higher to decouple all associated TLS from the qubits. Assuming a relatively small coupled TLS dipole moment component p=0.1 eÅ, this corresponds to the required electric field strength E=δε / p=40 kV / m. Given the typical distance between the DC electrode and the qubit electrode being less than 1 mm, such an electric field can be easily obtained by applying a bias voltage of a few volts to the DC electrode.

[0032] Figure 4 shows an example implementation of gate electrode array 1200, located on a separate wiring chip that is bump bonded to the qubit-carrying chip in a flip-chip configuration. A top view of two Xmon qubits is shown in Figure 4a, with the gate electrode 1202 over the left qubit shown in orange. The electrodes 1202 extend slightly beyond the edges of the opposing ground planes of the qubit island to ensure tunability of the TLS in this region.

[0033] A cross section of the chip stack is illustrated in FIG. 4 b , showing that the gate electrode 1202 is separated from the ground plane 1204 of the wiring chip 1200 by a thin film insulator 1206 .

[0034] The simulated electric field strength in this region is drawn to scale in Figure 4c, for the case where the left electrode is biased at 1 V while the other metal parts (including the qubit island 1208) are held at zero potential. If we assume that the qubits are surrounded by a ground plane 1204, and that the wiring chip also has a ground plane, the induced electric field strength decays on a length scale that corresponds roughly to the distance between the two chips. Thus, for the inter-qubit separation of d>100 μm used in the simulations shown, the crosstalk is 10 -4 It can be seen that it is less than

[0035] Alternatively, the local electrodes can be placed on the backside of the qubit chip. In this case, the thickness of the substrate determines the horizontal electric field shielding length, and stronger crosstalk can be expected. However, finite element modeling (FEM) simulations of the induced electric fields in a given processor layout can sufficiently compensate for this crosstalk.

[0036] conclusion An experimental setup and automated routine are presented to extend the energy relaxation time T1 of a superconducting transmon qubit. The idea is to expose the qubit electrodes to a DC electric field that is tuned to move the most detrimental TLS defects out of resonance with the qubit. Averaged over the qubit's operating frequency and a 30-minute time interval (limited by time constraints), the T1 time is improved by 23% compared to no applied electric field.

[0037] The optimization benefit may diminish or disappear over time due to variations in the TLS resonance frequency. For example, the frequency shift of the TLS may remain below 10 MHz for at least 10 days after application of the electric field, consistent with the notion that each TLS can only interact with a limited number of thermally activated defects in its vicinity. Thus, the optimization routine may be further improved by repeatedly running the optimization process over hours or days to identify an electric field bias that protects the qubit on long timescales from interacting with strongly bound TLS.

[0038] In further experiments, the optimization routine took less than 10 minutes (approximately 60 measurements of the qubit T1 value at multiple fields). However, the data shown in FIG. 2a suggests that the range of applied fields could be reduced, and together with further optimization such as less averaging of individual T1 time measurements, the optimization time could be reduced to less than 2 or 3 minutes.

[0039] Analysis of the raw data as shown in FIG. 2 suggests that variations of the above algorithm may provide additional stability in some situations. For example, in one variation, it may be desirable to base the peak width in T1 versus electric field next to the peak height. Those skilled in the art will recognize that other variations and modifications are applicable to specific situations. Furthermore, the degradation of the average qubit T1 time over 30 minutes by the optimization routine, which occurred in a few cases (15%) in these tests, can be avoided by averaging over multiple electric field sweeps. This may better explain why TLS exhibits strong resonance frequency fluctuations. Also, a feedback mechanism may be employed to periodically readjust the electric field bias based on the qubit error rate obtained during the quantum algorithm.

[0040] Being able to tune the TLS out of resonance with the qubits is particularly beneficial for processors implementing fixed frequency qubits. Even when using tunable qubits, the individual resonance frequencies still need to be balanced against each other to avoid crosstalk and maximize gate fidelity, and this is greatly simplified if the qubit coherence can be optimized at all frequencies by independently controlling the TLS buses. Also, to improve two-qubit gates that require frequency excursions of the qubits, the optimization procedure may be tuned to minimize the number of TLSs that have resonance in the frequency interval traversed.

[0041] Simulations show that it is easy to equip each qubit in the processor with a local gate electrode, making it possible to improve the T1 of all qubits simultaneously.

[0042] Embodiments of the subject matter and operations described herein may be implemented in digital electronic circuitry, analog electronic circuitry, suitable quantum circuitry, or more generally, quantum computing systems, tangibly embodied software or firmware, computer hardware, including the structures disclosed herein and structural equivalents thereof, or one or more combinations thereof. The term "quantum computing system" may include, but is not limited to, a quantum computer, a quantum information processing system, a quantum cryptography system, or a quantum simulator.

[0043] Embodiments of the subject matter described herein may be implemented as one or more computer programs, i.e., one or more modules of computer program instructions encoded in a tangible non-transitory storage medium for execution by or control of the operation of a data processing apparatus. The computer storage medium may be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory device, one or more qubits, or a combination of one or more thereof. Alternatively, or in addition, the program instructions may be encoded in an artificially generated propagated signal capable of encoding digital and / or quantum information, e.g., a machine-generated electrical, optical, electromagnetic signal, etc., that is generated to encode digital and / or quantum information for transmission to a suitable receiving device for execution by the data processing apparatus.

[0044] The terms quantum information and quantum data refer to information or data conveyed, held, or stored by a quantum system, with the smallest non-trivial system being a qubit, i.e., a system that defines a unit of quantum information. The term "qubit" is understood to encompass all quantum systems that can be appropriately approximated as a two-level system in the corresponding context. Such quantum systems may include, for example, multi-level systems having more than two levels. By way of example, such systems may include atoms, electrons, photons, ions, or superconducting qubits. In many implementations, the computational basis states are specified to be the ground state and the first excited state, although it is understood that other setups are possible in which the computational states are specified to be higher level excited states.

[0045] The device may also be or include special purpose logic circuits, such as an FPGA (field programmable gate array), an ASIC (application specific integrated circuit), or a quantum simulator, i.e., a quantum data processing device designed to simulate or generate information about a particular quantum system. In particular, a quantum simulator is a special purpose quantum computer that does not have the ability to perform universal quantum computation. In addition to the hardware, the device may also optionally include code that creates an execution environment for digital and / or quantum computer programs, such as code that constitutes a processor firmware, a protocol stack, a database management system, an operating system, or one or more combinations thereof.

[0046] A digital computer program may also be referred to or described as a program, software, software application, module, software module, script, or code, and may be written in any form of programming language, including compiled or interpreted languages, declarative or procedural languages, and may be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a digital computing environment. A quantum computer program may also be referred to as a program, software, software application, module, software module, script, or code, and may be written in any form of programming language, including compiled or interpreted languages, declarative or procedural languages, and may be converted into a suitable quantum programming language or written in a quantum programming language, e.g., QCL or Quipper.

[0047] A computer program may correspond to a file in a file system, but this is not necessarily the case. A program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple associated files (e.g., files that store one or more modules, subprograms, or portions of code). A computer program can be deployed to run on one computer, or on multiple computers located at one location or distributed across multiple locations and interconnected by a digital and / or quantum data communication network. A quantum data communication network is understood to be a network that can transmit quantum data using quantum systems, e.g., qubits. In general, a digital data communication network cannot transmit quantum data, but a quantum data communication network can transmit both quantum data and digital data.

[0048] A system of one or more computers "configured to" perform a particular operation or action means that the system has installed thereon software, firmware, hardware, or a combination thereof that, during operation, causes the system to perform the operation or action. A system of one or more computer programs configured to perform a particular operation or action means that the one or more programs contain instructions that, when executed by a data processing device, cause the device to perform the operation or action. For example, a quantum computer may receive instructions from a digital computer that, when executed by a quantum computing device, cause the device to perform an operation or action.

[0049] A computer suitable for executing a computer program can be based on a general-purpose or special-purpose processor, or any other type of central processing unit. In general, the central processing unit receives instructions and data from a read-only memory, a random access memory, or a quantum system suitable for transmitting quantum data, e.g. photons, or a combination thereof.

[0050] Elements of a computer include a central processing unit for performing or executing instructions, and one or more memory devices for storing instructions and data. The central processing unit and memory may be supplemented by, or incorporated in, special purpose logic circuitry or quantum simulators. Typically, a computer also includes, or is operatively coupled to receive data from, or transfer data to, one or more mass storage devices for storing data, such as, for example, magnetic disks, magneto-optical disks, optical disks, or quantum systems suitable for storing quantum information. However, a computer need not have such devices.

[0051] Quantum circuit elements (also called quantum computing circuit elements) include circuit elements for performing quantum processor operations. That is, quantum circuit elements are configured to exploit quantum mechanical phenomena such as superposition and entanglement to perform operations on data in a non-deterministic manner. Certain quantum circuit elements, such as qubits, can be configured to represent and operate on information in multiple states simultaneously. Examples of superconducting quantum circuit elements include circuit elements such as quantum LC oscillators, qubits (e.g., flux qubits, phase qubits, or charge qubits), and superconducting quantum interference devices (SQUIDs) (e.g., RF-SQUIDs or DC-SQUIDs), among others.

[0052] In contrast, classical circuit elements generally process data in a deterministic manner. Classical circuit elements can be configured to collectively execute instructions of a computer program by performing basic arithmetic, logical, and / or input / output operations on data, where the data is represented in analog or digital form. In some implementations, classical circuit elements can be used to transmit data to and / or receive data from quantum circuit elements through electrical or electromagnetic connections. Examples of classical circuit elements include circuit elements based on CMOS circuitry, rapid single flux quantum (RSFQ) devices, reciprocal quantum logic (RQL) devices, and ERSFQ devices, which are energy-efficient versions of RSFQ that do not use bias resistors.

[0053] In certain cases, some or all of the quantum and / or classical circuit elements may be implemented using, for example, superconducting quantum and / or classical circuit elements. Fabrication of superconducting circuit elements may involve deposition of one or more materials, such as superconductors, dielectrics, and / or metals. Depending on the materials selected, these materials may be deposited using deposition processes such as chemical vapor deposition, physical vapor deposition (e.g., evaporation or sputtering), or epitaxial techniques, among other deposition processes. Processes for fabricating circuit elements described herein may involve removing one or more materials from a device during fabrication. Depending on the material to be removed, the removal process may include, for example, wet etching techniques, dry etching techniques, or lift-off processes. Materials forming the circuit elements described herein may be patterned using known lithography techniques (e.g., photolithography or electron beam lithography).

[0054] During operation of a quantum computing system using superconducting quantum circuit elements and / or superconducting classical circuit elements, such as those described herein, the superconducting circuit elements are cooled in a cryostat to a temperature at which the superconducting material can exhibit superconducting properties. A superconductor (alternatively superconducting) material can be understood as a material that exhibits superconducting properties below a superconducting critical temperature. Examples of superconducting materials include aluminum (superconducting critical temperature 1.2 Kelvin) and niobium (superconducting critical temperature 9.3 Kelvin). Thus, superconducting structures such as superconducting traces and superconducting ground planes are formed from materials that exhibit superconducting properties below a superconducting critical temperature.

[0055] In certain implementations, control signals for quantum circuit elements (e.g., qubits and qubit couplers) may be provided using classical circuit elements that are electrically and / or electromagnetically coupled to the quantum circuit elements. The control signals may be provided in digital and / or analog form.

[0056] Computer readable media suitable for storing computer program instructions and data include all forms of non-volatile digital and / or quantum memories, media, and memory devices, including, by way of example, semiconductor memory devices (e.g., EPROM, EEPROM, flash memory devices), magnetic disks (e.g., internal hard disks or removable disks), magneto-optical disks, CD-ROM and DVD-ROM disks, and quantum systems (e.g., trapped atoms or electrons). Quantum memories are understood to be devices capable of storing quantum data with high fidelity and efficiency for long periods of time, such as light-matter interfaces where light is used for transmission and matter is used for storage and preservation of quantum properties of the quantum data, such as superposition or quantum coherence.

[0057] Control of the various systems, or portions thereof, described herein may be implemented in a computer program product that includes instructions stored on one or more non-transitory machine-readable storage media and executable on one or more processing devices. The systems described herein, or portions thereof, may be implemented as an apparatus, method, or system, each of which may include one or more processing devices and memories that store executable instructions for performing the operations described herein.

[0058] Although the present specification contains many specific implementation details, these should not be construed as limiting the scope of what may be claimed, but rather as descriptions of features that may be specific to a particular embodiment. Certain features described in the context of separate embodiments herein may also be implemented in combination in a single embodiment. Conversely, various features of the invention described in the context of a single embodiment may also be provided in multiple embodiments separately or in any suitable subcombination. Furthermore, even if features described above as functioning in a particular combination are initially claimed as such, one or more features of the claimed combination may be deleted from the combination, and the claimed combination may be directed to a subcombination or a variation of the subcombination.

[0059] Similarly, although operations are shown in a particular order in the figures, it should not be understood that these operations need to be performed in the particular order or sequential order shown, or that all of the illustrated operations need to be performed to achieve desirable results. In certain situations, multitasking and parallel processing may be advantageous. Furthermore, the separation of various system modules and components in the above-described embodiments should not be understood as requiring such separation in all embodiments, and it should be understood that the program components and systems described above may generally be integrated into a single software product or packaged into multiple software products.

[0060] Specific embodiments of the present invention have been described. Other embodiments are within the scope of the following claims. For example, the actions recited in the claims may be performed in a different order and still achieve desirable results. Further, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In certain situations, multitasking and parallel processing may be advantageous.

Claims

1. 1. A computer-implemented method for increasing qubit coherence, comprising: providing at least one qubit electrode containing a deleterious defect and an intrinsic qubit resonance; applying intrinsic parameters of an electric field to the qubit electrodes to tune the defect away from the qubit resonance; The method comprising:

2. The method of claim 1 , wherein the intrinsic parameter is the strength of the electric field.

3. The method of claim 1 , wherein the detrimental defect is a parasitic two-level quantum system (TLS).

4. The method of claim 1 , wherein the qubit is a superconducting qubit.

5. 1. A method for determining an improvement in coherence of a qubit, comprising: providing at least one qubit electrode, the qubit electrode including deleterious defects and an intrinsic qubit energy relaxation time (T1); providing a qubit operating frequency; applying different values ​​of an intrinsic parameter of an electric field to the qubit electrodes; determining the qubit energy relaxation time (T1) over time for each of the different values; The method comprising:

6. The method of claim 5 , wherein the steps are used with different qubit operating frequencies for optimization.

7. The method of claim 5 , wherein the intrinsic parameter of the electric field is the strength of the electric field.

8. The method of claim 5 , wherein the electric field is a DC electric field.

9. The method of claim 5 , wherein the detrimental defect is a parasitic two-level quantum system (TLS).

10. determining the intrinsic qubit energy relaxation time at zero applied electric field; comparing the determined qubit energy relaxation time (T1) to the intrinsic qubit energy relaxation time; Quantifying the improvement in coherence by: The method of claim 5 further comprising:

11. 11. The method of claim 10, wherein said quantification of improvement is at least 23% of all determined values, preferably at least 20% of 46% of determined values, preferably at least 10% of 67% of determined values.

12. 6. The method of claim 5, wherein the qubit energy relaxation time (T1) is determined within a 30 minute time frame.

13. The method of claim 5 , wherein the qubit is a superconducting qubit.

14. Use of a qubit in a quantum computing system or device after carrying out a method according to any one of claims 6 to 13.

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