SYSTEM, METHOD, AND PROGRAM PRODUCT FOR IMPROVING ACCURACY OF PHOTOMASK-BASED COMPENSATION IN FLAT PANEL DISPLAY LITHOGRAPHY - Patent application

Abstract

A method of manufacturing a photomask, comprising: determining a first contour associated with at least one pattern expected to result from writing the photomask based on initial photomask design data; and determining a second contour associated with the at least one pattern expected to result from etching the written photomask based on the first contour. The second contour is an expected actual contour of the at least one pattern. The initial photomask data is optical proximity corrected using the second contour to generate corrected photomask design data. In some embodiments, the photomask blank comprises at least three layers, and the blank is processed according to the corrected photomask design data to minimize etching skew effects.

Description

[Technical field]

[0001] Related Applications This application claims priority to and the benefit of U.S. Provisional Patent Application No. 63 / 268,144, entitled “SYSTEM, METHOD AND PROGRAM PRODUCT FOR IMPROVIING ACCURACY OF PHOTOMASK BASED COMPENSATION IN FLAT PANEL DISPLAY LITHOGRAPHY,” filed February 17, 2022, the entire contents of which are incorporated herein by reference.

[0002] The present invention relates generally to photomask manufacturing, and more particularly to photomask manufacturing correction techniques used in flat panel display (FPD) lithography. [Background technology]

[0003] Photomask technology has contributed to the capabilities and productivity of integrated circuit (IC) and flat panel display (FPD) manufacturing, including implementation of masks that improve process capability, margins, and yields. Such masks include advanced binary or multi-tone masks and phase-shifting masks, to name a few. These masks are primarily composed of a transparent substrate and patterned absorbing films (e.g., CrOx, CrON) and phase-shifting films (e.g., MoSi, SiN) to provide and maintain the optical, physical, and mechanical requirements of the mask. Therefore, in mask fabrication, the optimal mask process conditions for processing these films and their controllability affect the mask patterning quality and performance in the lithography process.

[0004] Furthermore, the lithography process in FPD determines the performance and output capability of flat panel products. In general, when light passes through the mask and is imaged onto the panel substrate by the exposure lithography tool, the panel device patterns, as well as the various shapes of those patterns and the proximity effect of those patterns to the photomask, affect the lithography quality. The exposure tool acts as a low-pass filter and can thus reduce the fidelity and quality of the panel device patterns transferred to the mask during imaging. To compensate for this loss of image fidelity, various mask correction methods have been used to improve the fidelity of the printed mask image for integrated circuit applications. For example, the use of selective feature bias and optical proximity correction (OPC) has been introduced into IC manufacturing and is now a common operation to apply these adjustments or corrections to the mask pattern to compensate the lithography imaging process.

[0005] However, for FPD panel processes, the designs and processes are very different from conventional IC products and require special dedicated solutions. For example, state-of-the-art panel product designs have features of significantly larger dimensions that are patterned over significantly larger areas, and the geometry family of such features is often different compared to advanced IC designs. Most importantly, the photomasks used in even the most advanced FPD lithography processes are constructed using only laser-based mask writing and wet chemical etching, as opposed to the high-resolution e-beam writing and dry etching methods prevalent in advanced IC masks. Thus, techniques typically employed in IC lithography, such as selective feature bias and optical proximity correction, which have a significant impact on ICs, are much less effective when used in flat panel lithography. This is because they rely on the fundamentally high-performance mask making process in ICs, which does not exist in flat panel mask making. Thus, new comprehensive correction methods are needed that are applicable to the special needs of flat panel mask making and also lithography for advanced flat panel display applications. Summary of the Invention [Means for solving the problem]

[0006] In some exemplary embodiments, the systems and methods according to the present invention combine key techniques of mask pattern shape manipulation, mask blank characteristics, and mask manufacturing to create an ideally optimized correction system for masks used to benefit FPD lithography. In some embodiments, these techniques can be used individually or in combination to induce optimal corrections.

[0007] According to an exemplary embodiment of the present invention, a method of manufacturing a photomask includes receiving initial photomask design data associated with one or more patterns to be formed on the photomask; determining a first contour associated with at least one of the one or more patterns that is expected to result from writing the photomask based on the initial photomask design data; determining a second contour associated with at least one of the one or more patterns that is expected to result from etching the written photomask based on the first contour, where the second contour is an expected actual contour of the at least one of the one or more patterns; performing optical proximity correction on the initial photomask data using the second contour associated with the at least one of the one or more patterns; and generating corrected photomask design data based on the optical proximity corrected initial photomask design data.

[0008] In some exemplary embodiments, the step of determining the first contour is performed using a smoothing model.

[0009] In some exemplary embodiments, the smoothing model is a Gaussian model.

[0010] In some exemplary embodiments, determining the second contour is performed by determining a propagation vector extending from the first contour.

[0011] In some exemplary embodiments, the propagation vector is based on at least one of an etch skew and an etch process parameter.

[0012] In some exemplary embodiments, the method further includes providing a mask blank comprising at least three layers disposed over the substrate.

[0013] In some exemplary embodiments, the method further includes processing a mask blank using the corrected photomask design data to form a photomask for use in a lithography process.

[0014] In some exemplary embodiments, the photomask is a large photomask for use in lithography processes to manufacture flat panel displays (FPDs).

[0015] In some exemplary embodiments, the photomask blank comprises a substrate, a first layer that is a phase shift layer disposed over the substrate, a second layer that is an etch stop layer disposed over the first layer, and a third layer that is an absorber layer disposed over the second layer.

[0016] In some exemplary embodiments, the step of processing the mask blank includes exposing and developing a first photoresist disposed on the third layer to form a pattern of exposed portions of the third layer, etching the exposed portions of the third layer to form a pattern of exposed portions of the second layer, etching the exposed portions of the second layer to form a pattern of exposed portions of the first layer, depositing a second photoresist on the first layer, the etched second layer, and the etched third layer, exposing and developing the second photoresist to form a pattern of exposed portions of the first layer, and etching the exposed portions of the first layer to form a pattern of exposed portions of the substrate.

[0017] In some exemplary embodiments, the first layer comprises Cr.

[0018] In some exemplary embodiments, the second layer comprises MoSi.

[0019] In some exemplary embodiments, the third layer comprises Cr.

[0020] According to an exemplary embodiment of the present invention, a method for manufacturing a photomask includes two or more of the following steps (A), (B), and (C).

[0021] (A) generating a photomask pattern design, the generating step including: (1) receiving initial photomask design data associated with one or more patterns to be formed on a photomask; (2) determining a first contour associated with at least one of the one or more patterns expected to result from writing the photomask based on the initial photomask design data; (3) determining a second contour associated with at least one of the one or more patterns expected to result from etching the written photomask based on the first contour, the second contour being an expected actual contour of the at least one of the one or more patterns; (4) performing optical proximity correction on the initial photomask data using the second contour associated with the at least one of the one or more patterns; and (5) generating corrected photomask design data based on the optical proximity corrected initial photomask design data; (C) providing a mask blank comprising at least three layers disposed on the substrate; a first layer being a phase shift layer disposed on the substrate; a second layer being an etch stop layer disposed on the first layer; and a third layer being an absorber layer disposed on the second layer, the processing steps including: (1) exposing and developing a first photoresist disposed on the third layer to form a pattern of exposed portions of the third layer; (2) etching the exposed portions of the third layer to form a pattern of exposed portions of the second layer; (3) etching the exposed portions of the second layer to form a pattern of exposed portions of the first layer; (4) depositing a second photoresist on the first layer, the etched second layer, and the etched third layer; (5) exposing and developing the second photoresist to form a pattern of exposed portions of the first layer; and (6) etching the exposed portions of the first layer to form a pattern of exposed portions of the substrate.

[0022] In some exemplary embodiments, the method includes steps (A) and (B).

[0023] In some exemplary embodiments, the method includes steps (A), (B), and (C).

[0024] In some exemplary embodiments, the photomask is a large photomask for use in lithography processes to manufacture flat panel displays (FPDs).

[0025] According to some exemplary embodiments of the present invention, a method for forming a flat panel display includes a step of irradiating light from a light energy source onto a glass plate substrate through a large photomask formed according to the method of claim 14 in a photolithography process, wherein at least one circuit pattern is transferred from the large photomask to the glass plate substrate.

[0026] In some exemplary embodiments, the flat panel display is a liquid crystal display, an active matrix liquid crystal display, an organic light emitting diode, a light emitting diode, a plasma display panel, or an active matrix organic light emitting diode.

[0027] These and other features and advantages of the present invention will be presented in more detail in the following detailed description and the accompanying drawings, which illustrate, by way of example, the principles of the invention.

[0028] Various exemplary embodiments of the present invention will be described in detail with reference to the following figures. [Brief description of the drawings]

[0029] [Figure 1] FIG. 1 is a cross-sectional view of a conventionally manufactured FPD mask showing etch skew. [Diagram 2] FIG. 1 is a simplified block diagram of one embodiment of a flat panel display (FPD) manufacturing system and associated FPD manufacturing flow, in accordance with an exemplary embodiment of the present invention. [Diagram 3]1 is a schematic diagram of an exemplary mask enhancer system for enhancing a photomask layout in accordance with an exemplary embodiment of the present invention. [Figure 4] FIG. 2 is a block diagram of a computer system associated with a mask enhancer system in accordance with an exemplary embodiment of the present invention. [Figure 5A] FIG. 1 illustrates one degree of pattern correction that can be made to a photomask. [Figure 5B] 1A-1C illustrate different degrees of pattern correction that can be made to a photomask. [Figure 5C] 1A-1C illustrate different degrees of pattern correction that can be made to a photomask. [Figure 6] FIG. 1 illustrates the component of mismatch between a desired mask shape and a desired feature due to skew. [Figure 7] FIG. 13 illustrates a propagation vector starting from a point on a Gaussian contour and having an end point on the actual mask pattern contour due to etch skew, in accordance with an exemplary embodiment of the present invention. [Figure 8] FIG. 2 illustrates a process for mask design correction according to an exemplary embodiment of the present invention. [Figure 9] (A) is a cross-sectional view of one type of mask including materials and a stacking sequence; (B) is a cross-sectional view of another type of mask including materials and a stacking sequence; (C) is a cross-sectional view of another type of mask including materials and a stacking sequence; (D) is a cross-sectional view of another type of mask including materials and a stacking sequence showing a cross-section according to an exemplary embodiment of the present invention; and (E) is a cross-sectional view of another type of mask including materials and a stacking sequence. [Figure 10] FIG. 1 illustrates a mask creation flow according to an exemplary embodiment of the present invention that minimizes the skew parameter in a three-film stack. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0030] A flat panel display (FPD) is an electronic viewing technology used to display content (e.g., still images, video, text, or other visual material) in a variety of entertainment, consumer electronics, personal computers, and mobile devices, as well as many types of medical, transportation, and industrial equipment. Current types of FPD include, for example, LCD (liquid crystal display), AMLCD (active matrix liquid crystal display), OLED (organic light emitting diode), LED (light emitting diode), PDP (plasma display panel), and AMOLED (active matrix OLED).

[0031] During FPD manufacturing, the FPD lithography system shines light onto a photomask that contains the original thin-film transistor (TFT) circuit pattern, and the light passes through a lens to expose the pattern onto a glass plate substrate. For large glass plates, the exposure process is repeated several times to form the pattern across the entire plate.

[0032] To apply optical proximity correction or feature bias, the edges of the mask features need to be adjusted so that when the mask is printed on the flat panel display substrate by the lithography scanner, the printed mask features will best match the corrected design features. To accurately reproduce the edge adjustment of the mask features, the combination of the mask blank and process must be inherently low bias or skew. That is, if an edge needs to be adjusted by an amount X on the mask pattern to meet the requirements of the mask pattern correction scheme, but the mask blank and process cannot reproduce the amount X due to a mask process with a high skew or high bias of Y, the mask correction will be less effective, and in the worst case, completely ineffective or counterproductive. Figure 1 shows a cross-sectional view of a manufactured FPD mask, where Y=a+b, to illustrate this important point. As long as Y is overwhelmingly larger than the desired mask edge correction amount X or inaccurately represents the amount X, the optimal correction method will be impossible.

[0033] Therefore, to realize optimal benefits from a mask pattern correction scheme, exemplary embodiments of the present invention may employ at least one of three elements to provide superior FPD mask correction performance that optimizes panel lithography. In some embodiments, the three elements include:

[0034] 1. Algorithm optimized for the high skew nature of mask making for FPD applications ("Element 1").

[0035] 2. A mask making blank that uses a structural film composition to minimize skew levels ("Element 2").

[0036] 3. A mask etch process that uses process etch parameters to minimize skew levels ("element 3").

[0037] In some exemplary embodiments, each of these elements may be employed independently in forming an optimized mask correction system, or alternatively, two or more of these elements may be used together as part of an overall mask correction system, in certain exemplary embodiments, all three elements are used together.

[0038] 2 is a simplified block diagram of one embodiment of a flat panel display (FPD) manufacturing system 100 and associated FPD manufacturing flow, according to an exemplary embodiment of the present invention. The FPD manufacturing system 100 includes multiple entities, such as a design house 120, a mask house 130, and an FPD manufacturer 150 (i.e., a factory), that interact with each other in the design, development, and manufacturing cycle and / or services related to the production of an FPD device 160. The multiple entities may be connected by a communications network, which may be a single network or a variety of different networks, such as an intranet or the Internet, and may include wired and / or wireless communication channels. Each entity may interact with the other entities and may provide services to and / or receive services from the other entities. In some embodiments, one or more of the design house 120, mask house 130, and FPD manufacturer 150 may have a common owner, may coexist in a common facility, and may even use common resources.

[0039] In various embodiments, design house 120, which may include one or more design teams, generates FPD design layout 122. FPD design layout 122 may include various geometric patterns designed for the manufacture of FPD device 160. By way of example, the geometric patterns may correspond to patterns of metal, oxide, or semiconductor layers that make up various components of FPD device 160 to be manufactured. The various layers combine to form various features of FPD device 160, such as thin film transistors (TFTs). For example, various portions of FPD design layout 122 may include features such as active areas, gate electrodes, source and drain regions, metal lines or vias for metal interconnects, openings for bond pads, and other features known in the art to be formed in an FPD glass substrate and various material layers disposed on the glass substrate. In an exemplary embodiment, design house 120 implements a design procedure to form FPD design layout 122. The design procedure may include logical design, physical design, and / or place and route. FPD design layout 122 may be represented in one or more data files that contain information related to the geometric patterns to be used to fabricate FPD device 160. In some embodiments, FPD design layout 122 may be represented in a variety of formats, such as the Open Artwork System Interchange Standard (OASIS) file format, the GDSII file format, or the DFII file format, to name a few.

[0040] In some embodiments, the design house 120 can transmit the FPD design layout 122 to the mask house 130, for example via a network connection as described above. The mask house 130 can then use the FPD design layout 122 to manufacture one or more masks to be used in fabricating various layers of the FPD device 160 according to the FPD design layout 122. In various examples, the mask house 130 performs mask data preparation 132, in which the FPD design layout 122 is converted into a form that can be physically written by a mask writer, and further performs mask fabrication 144, in which the design layout prepared by the mask data preparation 132 is modified to suit a particular mask writer and / or mask manufacturer and then fabricated. In the example of FIG. 2, the mask data preparation 132 and the mask fabrication 144 are shown as separate elements. However, in some embodiments, the mask data preparation 132 and the mask fabrication 144 may be collectively referred to as mask data preparation.

[0041] In some embodiments, mask data preparation 132 includes application of one or more resolution enhancement techniques (RET) to compensate for potential lithography errors, such as those that may result from diffraction, interference, or other process effects. In some embodiments, optical proximity correction (OPC) may be used to adjust line widths depending on the density of surrounding geometric features, add "dog-bone" end caps to the ends of lines to prevent shortening of the line ends, correct for electron beam (e-beam) proximity effects, or achieve other purposes. For example, OPC techniques may add sub-resolution assist features (SRAFs), which may include, for example, adding scattering bars, serifs, and / or hammerheads to the FPD design layout 122 according to an optical model or rule, thereby refining the final pattern on the glass substrate after the lithography process to improve resolution and accuracy. Mask data preparation 132 may also include additional RET, such as off-axis illumination (OAI), phase shift masks (PSM), other suitable techniques, or combinations thereof.

[0042] In some embodiments, mask data preparation 132 may include mask process correction (MPC) that is used to correct errors introduced during the mask making process. For example, MPC can be used to correct for effects of the mask making process, such as fogging, development and etch loads, and e-beam proximity effects. In some embodiments, the MPC process modifies the post-OPC design layout to compensate for limitations that may occur during mask fabrication 144.

[0043] In some embodiments, mask data preparation 132 may include a lithography process check (LPC) that simulates the processing performed by FPD manufacturer 150 to create FPD device 160. The LPC may simulate this processing based on FPD design layout 122 to produce a simulated manufactured device, such as FPD device 160. The processing parameters in the LPC simulation may include parameters associated with various processes in the FPD manufacturing cycle, parameters associated with tools used to manufacture the FPD, and / or other aspects of the manufacturing process. By way of example, the LPC may take into account various factors, such as aerial image contrast, depth of focus (DOF), mask error emphasis factor (MEEF), other suitable factors, or a combination thereof.

[0044] In some embodiments, after the simulated manufactured device is created by LPC, if the simulated device layout is not close enough to the geometry to meet the design rules, certain steps of mask data preparation 132, such as OPC and MPC, may be repeated to further refine the IC design layout 122.

[0045] It should be understood that the above description of mask data preparation 132 has been simplified for purposes of clarity and that data preparation may also include additional functions such as logic operations (LOPs) to modify the FPD design layout in accordance with manufacturing rules. Additionally, the processes applied to the FPD design layout 122 during data preparation 132 may be performed in a variety of different orders.

[0046] After mask data preparation 132, during mask fabrication 144, a mask or group of masks can be fabricated based on the modified FPD design layout. In some embodiments, an electron beam (e-beam) or multiple e-beams mechanism is used to form a pattern on a mask (photomask or reticle) based on the modified FPD design layout. In some embodiments, the mask pattern includes opaque and transparent regions. A radiation beam, such as an ultraviolet (UV) beam used to expose a radiation sensitive material layer (e.g., photoresist) coated on the wafer, is blocked by the opaque regions and transmitted through the transparent regions. In some embodiments, a binary mask includes a transparent substrate (e.g., fused quartz) and an opaque material (e.g., chrome) coated on the opaque regions of the mask. In some embodiments, the mask is formed using phase shifting techniques. In a phase shift mask (PSM), various features of a pattern formed on the mask are configured to have a pre-set phase difference to enhance image resolution and imaging quality. In some embodiments, the phase shift mask can be an attenuated PSM or an alternating PSM.

[0047] In some embodiments, FPD manufacturer 150 can use a mask (or masks) produced by mask house 130 to transfer one or more mask patterns to product glass substrate 152, thus producing FPD devices 160 on product glass substrate 152. FPD manufacturer 150 can include an FPD manufacturing facility, which can include multiple manufacturing facilities for producing a variety of different FPD products. For example, FPD manufacturer 150 can include a first manufacturing facility for front-end fabrication (i.e., front-end-of-line (FEOL) fabrication) of multiple FPD products, a second manufacturing facility can provide back-end fabrication (i.e., back-end-of-line (BEOL) fabrication) for interconnection and packaging of FPD products, and a third manufacturing facility can provide other services. In various embodiments, product FPD 152 in and / or on which FPD devices 160 are produced can include a glass substrate, where the type of glass can be, for example, aluminosilicate glass, borosilicate glass, or fused silica, to name a few. In some embodiments, the large photomask may be appropriately sized to accommodate the photolithographic processing of the glass plate substrate used to form the FPD.

[0048] In some exemplary embodiments, mask data preparation may include the use of a mask enhancer system. In this regard, FIG. 3 illustrates a schematic diagram of an exemplary mask enhancer system 204 for enhancing a photomask layout in accordance with some embodiments. Some embodiments of the mask enhancer system 204 include an OPC enhancer 222 that receives the mask layout M generated by the design house 120 and generates an OPC-processed (e.g., corrected) mask layout M. As described above, OPC is a lithography technique used to correct or enhance the mask layout M and create improved imaging effects to reproduce the original layout drawn by the FPD design house 120 on a glass substrate. For example, OPC can be used to compensate for imaging distortions due to optical diffraction. In some embodiments, the mask layout M is a data file that includes information of a geometric pattern to be generated on a substrate, and the OPC enhancer 222 modifies the data file and generates a corrected data file representing the corrected mask layout M′.

[0049] In some exemplary embodiments, the mask projection apparatus 230 may be applied to the corrected mask layout M to generate a projected mask layout 238 onto the wafer. In some embodiments, the corrected mask layout M is a data file, and the mask projection apparatus 230 simulates the projection of the corrected mask layout M′ onto the wafer to generate a simulated projected mask layout 238. The defect detector 232 of the mask enhancer 204 inspects the projected mask layout 238 and finds defect regions 236 in the projected mask layout 238. Although the corrected mask layout M′ is OPC processed, defect regions may be generated when the corrected mask layout M′ is projected onto the substrate 208.

[0050] In some embodiments, the defect corrector 234 of the mask enhancer 204 may receive the defect regions 236 and the corrected mask layout M' and perform further corrections, e.g., enhancements, on the corrected mask layout M', thereby generating an enhanced mask layout M". In some embodiments, the defect detector 232 may be coupled to the defect corrector 234 to produce a layout detection and correction system 233 that receives the projected mask layout 238 and the corrected mask layout M' and provides an enhanced mask layout M".

[0051] In some exemplary embodiments, the mask enhancer system 204 includes specialized hardware components, software components, and / or a combination of both hardware and software components to perform various procedures related to photomask enhancement and correction as part of the FPD manufacturing process. In this regard, FIG. 4 illustrates an exemplary computer system associated with a mask enhancer system according to various embodiments of the present invention. In some embodiments, the computer system includes a server 401, a display 402, one or more input interfaces 403, and one or more output interfaces 404, all of which are conventionally coupled by one or more buses 405. Examples of suitable buses include, for example, PCI-Express, AGP, PCI, ISA, etc., to name a few.

[0052] A computer system may include any number of graphics processors. The graphics processor may reside on a motherboard, such as integrated with a motherboard chipset. One or more graphics processors may reside on external boards connected to the system via a bus, such as an ISA bus, a PCI bus, an AGP port, a PCI Express, or other system bus, to name a few. The graphics processors may be on separate boards, each connected to a bus, such as a PCI Express bus, connected to each other, and connected to the rest of the system. Additionally, there may be separate buses or connections (e.g., Nvidia SLI® or ATI CrossFire® connections, to name two) over which the graphics processors can communicate with each other. This separate bus or connection may be used in addition to or instead of the system bus.

[0053] The server 401 may include one or more CPUs 406, one or more GPUs 407, and one or more memory modules 412. Each CPU and GPU may be a single-core or multi-core unit. Examples of suitable CPUs include Intel Pentium®, Intel Core™ 2 Duo, AMD Athlon® 64, AMD Opteron®, to name a few. Examples of suitable GPUs include Nvidia GeForce®, ATI Radeon®, to name a few. The input interface 403 may include a keyboard 408 and a mouse 409. The output interface 404 may include a printer 410.

[0054] In some embodiments, communication interface 411 is a network interface that allows the computer system to communicate over a wireless or wired network. Communication interface 411 may be coupled to a network transmission line, a transmission medium (not shown), such as twisted pair, coaxial cable, fiber optic cable, to name a few. In another embodiment, communication interface 411 provides a wireless interface, i.e., communication interface 411 uses a wireless transmission medium. Examples of other devices that can be used to access the computer system via communication interface 411 include mobile phones, PDAs, personal computers, to name a few (not shown).

[0055] The memory module 412 may generally include different modalities, such as semiconductor memory, such as random access memory (RAM), disk drives, etc. In various embodiments, the memory module 412 stores an operating system 413, data structures 414, instructions 415, applications 416, and procedures 417.

[0056] Storage devices include high capacity disk drives, floppy disks, magnetic disks, optical disks, magneto-optical disks, fixed disks, hard disks, CD-ROMs, recordable CDs, DVDs, recordable DVDs (e.g., DVD-R, DVD+R, DVD-RW, DVD+RW, HD-DVD, or Blu-ray Discs), flash and other non-volatile solid state storage (e.g., USB flash drives), battery backed volatile memory, tape storage, readers, and other similar media, and combinations thereof.

[0057] In various embodiments, the specific software instructions, data structures, and data implementing various embodiments of the invention are typically embodied in server 401. In general, an embodiment of the invention is tangibly embodied using a computer readable medium, e.g., a memory, and includes instructions, applications, and procedures that, when executed by a processor, cause a computer system to utilize the invention, e.g., collect and analyze data, pixelate structures, determine edge placement error, move edge fragments, optimize edge fragment placement, etc. The memory can store software instructions, data structures, and data for any of the operating systems, data collection applications, data aggregation applications, data analysis procedures, etc., in semiconductor memory, disk memory, or a combination thereof.

[0058] A computer-implemented or computer-executable version of the invention may be embodied using, stored on, or associated with a computer-readable medium. A computer-readable medium may include any medium that participates in providing instructions to one or more processors for execution. Such media may take many forms, including but not limited to non-volatile media, volatile media, and transmission media. Non-volatile media include, for example, flash memory, or optical or magnetic disks. Volatile media include static or dynamic memory, such as cache memory or RAM. Transmission media include coaxial cables, copper wire, fiber optic lines, and wires arranged in a bus. Transmission media may also take the form of electromagnetic, radio frequency, acoustic, or light waves, such as those generated during radio wave or infrared data communications.

[0059] For example, a binary, machine-executable version of the software of the present invention may be stored or reside in RAM or cache memory or a mass storage device. The source code of the software of the present invention may also be stored or reside in a mass storage device (e.g., a hard disk, magnetic disk, tape, or CD-ROM). As a further example, the code of the present invention may be transmitted over wires, radio waves, or a network such as the Internet.

[0060] The operating system may be implemented by any conventional operating system, including Windows® (a registered trademark of Microsoft Corporation), Unix® (a registered trademark of the Open Group in the United States and other countries), Mac OS® (a registered trademark of Apple Computer, Inc.), Linux® (a registered trademark of Linus Torvalds), and other operating systems not expressly enumerated herein.

[0061] In various embodiments, the invention may be implemented as a method, system, or article of manufacture using standard programming or engineering techniques, or both, to generate software, firmware, hardware, or any combination thereof. The term "article of manufacture" (or alternatively "computer program product") as used in this application is intended to encompass a computer program accessible from any computer-readable device, carrier, or media. Furthermore, the software in which the various embodiments are implemented may be accessible via a transmission medium, for example, over a network from a server. The article of manufacture in which the code is implemented also includes transmission media, such as network transmission lines and wireless transmission media. Thus, the article of manufacture also includes the medium in which the code is embedded. Those skilled in the art will recognize that many modifications can be made to this configuration without departing from the scope of the invention.

[0062] The computer system illustrated in Figure 4 is not intended to be limiting of the present invention, as other alternative hardware and / or software environments may be used without departing from the scope of the present invention.

[0063] For FPD mask making, pattern correction algorithms for feature bias and compensation must take into account the high skew nature of the mask making process. Specifically, the mask making process includes a laser writing step and an etching step. As described above with reference to FIG. 1, high skew can result in inconsistent or undesirable patterns from the etching step. In some embodiments, Element 1 applies a more accurate and practical model to represent the panel design layout and features in the panel mask process. When applied to simulation, panel OPC, and any other predictive software, the Element 1 model can more accurately predict the results in the process and manufacturing.

[0064] As shown in Figures 5A-5C, different degrees of pattern correction can be applied to the mask, ranging from no correction (Figure 5A), to light correction (Figure 5B), to even heavy correction (Figure 5C). Figure 5C shows the addition of assist features, which can be rim-type features for a rim PSM mask.

[0065] FIG. 6 shows the components of the mismatch between the desired mask shape and the desired features due to skew. These mismatches get worse on a percentage basis as the correction features get smaller, as shown in the heavy OPC example in FIG. 5C. Specifically, the mask exhibits a more rounded profile rather than the desired rectangular or square shape. The first rounding step is due to laser writing and developing, and the second rounding step is due to additional skew bias from wet etching. In an exemplary embodiment of the invention, the first rounding step is fitted to a Gaussian model and the second rounding step is fitted to a contour propagation model.

[0066] In some embodiments, the skew model may be based on a calculated point-to-point propagation vector that bridges between the Gaussian contour and the actual mask pattern contour with skew. The propagation vector varies depending on the etch skew of the material and the process conditions. Thus, in some embodiments, a different propagation vector model must be calculated for each combination of material and conditions. More specifically, FIG. 7 shows a propagation vector d starting from a point a(X1,Y1) on the Gaussian contour and having an end point b(X2,Y2) on the actual mask pattern contour due to the etch skew. In some embodiments, the propagation vector runs in a direction of 90 degrees to the tangent of the point on the Gaussian contour. In some embodiments, the actual mask pattern with skew may be contoured using, for example, so-called descent, cell, or ray tracing type models, to name a few. The descent model follows a high intensity concentration to a lower level. In ray tracing, a line is drawn from one contour to the next contour, usually perpendicular to the first contour, to generate the next contour. In some embodiments, ray tracing is closest to real-world wet etching applications and is also very fast and easy to compute. In the cell model, a more complex direction vector can be generated that takes into account the intensity inside the cell and the direction of the previous contour, indicated by a line perpendicular to the contour.

[0067] In some embodiments, element 1 involves the use of contour fitting using a Gaussian or similar type of smoothing model to represent the mask writing step, and a second component for wet etching that accounts for contour propagation. By combining these components and feeding the results into the bias and OPC models of a mask correction tool, superior correction can be achieved since the physical mask process is now represented in the correction scheme.

[0068] 8 shows a process for mask design correction according to an exemplary embodiment of the present invention. At step S01 of the process, a mask correction tool may receive or otherwise acquire data related to the original design layers, and at optional step S03, mask process correction (MPC) may be performed to correct errors introduced during the mask making process. For example, MPC may be used to correct for effects of the mask making process, such as fogging, development and etch loads, and e-beam proximity effects.

[0069] In step S05, the mask correction tool receives the original design layer data and optionally the MPC data as input to a shape fitting algorithm to calculate a first contour resulting from laser writing and developing the mask. The shape fitting algorithm may be based on a smoothing model, such as Gaussian contour fitting. More specifically, in some exemplary embodiments, the shape fitting algorithm may be based on, for example, single or multiple weighted overlapping Gaussian models, a circular morphological filter that averages groups of adjacent pixels, a Lorentzian function, or an Airy disk function in the case of optical systems, to name a few.

[0070] In step S07, the mask correction tool receives the first contour determined in step S05 as input to an algorithm and calculates a second contour resulting from the wet etch. In some embodiments, the algorithm in step S07 can use data related to etch characteristics and materials as further inputs to determine propagation vectors extending from points on the contour determined in step S05. A series of propagation vectors can be calculated to determine a second contour representing the actual mask pattern contour resulting from the etch skew.

[0071] In step S09, data related to the second contour calculated in step S07 is obtained as an input to an optical proximity correction model. The OPC model modified based on the second contour data provides a more accurate correction scheme compared to one that does not consider the actual contour resulting from the etching skew. As a result, proximity correction data related to the final design layer can be presented in step S11 to provide a more effective mask design.

[0072] As previously mentioned, in some embodiments, element 2 comprises a mask making blank that uses structural film composition to minimize skew levels. In this regard, Figures 9(A)-9(E) show cross-sectional views of several types of masks, including materials and stacking sequences. The cross-sectional profiles show the various process biases and profiles that affect pattern formation in panel lithography processes. In particular, the images show that skew levels vary significantly between different mask types.

[0073] In some embodiments, it is highly advantageous to use a mask structure with the lowest stage 2 (e.g., wet etch) skew effect in cooperation with element 1 to maximize the benefit of element 1. In this regard, FIG. 9(D) shows a multi-layer film structure according to an exemplary embodiment of the present invention, generally designated by reference numeral 900. Film structure 900 is composed of three films with different wet etch properties. In general, according to an exemplary embodiment of the present invention, the low skew benefit is realized in an N-layer film stack, where N is greater than 2, and the low skew benefit is added as N is increased. In some embodiments, the N layers may be multiple distinct base film materials, or a single base film material with material modifications during the base film deposition process to become N effective layers. These films may be combined in any manner to realize a binary, phase shift, or multi-tone type mask.

[0074] In the specific example shown in Figure 9(D), the film is composed of two Cr layers and one MoSi layer disposed between the two Cr layers. The bottom layer of Cr may or may not have phase shifting properties, as it does not impact the desired low skew characteristics. The images in Figures 9(B) and 9(D) show the significant improvement in skew levels achieved according to an exemplary embodiment of the present invention over that of a two-layer film stack.

[0075] In some embodiments, element 1 can be combined with element 2, thereby going for low skew and not having to overtax mask pattern correction to achieve greater correction improvement.

[0076] As previously mentioned, in some embodiments, element 3 includes the use of a mask etch process that uses process etch parameters to minimize skew levels. In particular, the film etching step can be optimized to take advantage of the multiple films of element 2. Thus, according to some exemplary embodiments, the middle film in a three-film stack acts as an etch stop layer, and a second photomask coating is applied and etched to minimize the final skew effect.

[0077] 10(A)-10(I) show a mask fabrication flow according to an exemplary embodiment of the present invention for minimizing the skew parameter in a three-film stack consisting of a MoSi layer and a Cr layer. As shown in FIG. 10(A), a mask blank is provided, the blank consisting of a substrate, a Cr phase shift layer disposed on the substrate, a MoSi etch stop layer disposed on the Cr phase shift layer, a Cr absorber layer disposed on the MoSi etch stop layer, and a first photoresist disposed on the Cr absorber layer. As shown in FIG. 10(B), a first level exposure and development step removes a portion of the first photoresist, thereby exposing a corresponding portion of the Cr absorber layer. The exposed portion of the Cr absorber layer and the portion undercutting the first photoresist are removed by an etching step (FIG. 10(C)), thereby exposing a corresponding portion of the MoSi etch stop layer. The exposed portions of the MoSi etch stop layer are then etched away (FIG. 10(D)), thereby exposing the corresponding portions of the Cr phase shift layer, and the first photoresist is stripped (FIG. 10(E)). A second photoresist is then placed over the Cr absorber layer, the MoSi etch stop layer, and the exposed portions of the Cr phase shift layer (FIG. 10(F)). A second level exposure and development step removes portions of the second photoresist, thereby exposing the corresponding portions of the Cr phase shift layer again, as shown in FIG. 10(G). The exposed portions of the Cr phase shift layer, and the portions that undercut the second photoresist, are removed by an etching step (FIG. 10(H)), thereby exposing the corresponding portions of the underlying substrate. The second photoresist is then stripped (FIG. 10(I)). In this case, the central MoSi acts as an etch stop layer, and a second photomask coating is applied and etched to minimize the final skew effect.

[0078] Although the foregoing specification provides a detailed description of particular embodiments of the invention, it should be understood that many of the details described herein may be significantly modified by those skilled in the art without departing from the spirit and scope of the invention.

Claims

1. 1. A method for manufacturing a photomask, comprising: receiving initial photomask design data associated with one or more patterns to be formed on a photomask; determining a first contour associated with at least one of the one or more patterns that is expected to result from writing the photomask based on the initial photomask design data; determining a second contour associated with the at least one of the one or more patterns that is expected to result from etching of the written photomask based on the first contour, the second contour being an expected actual contour of the at least one of the one or more patterns; performing optical proximity correction on the initial photomask data using the second contour associated with the at least one of the one or more patterns; generating corrected photomask design data based on the optical proximity effect corrected initial photomask design data; The method includes:

2. The method of claim 1 , wherein the step of determining a first contour is performed using a smoothing model.

3. The method of claim 2 , wherein the smoothing model is a Gaussian model.

4. The method of claim 1 , wherein the step of determining a second contour is performed by determining a propagation vector extending from the first contour.

5. The method of claim 4 , wherein the propagation vector is based on at least one of an etch skew and an etch process parameter.

6. The method of claim 1 , further comprising providing a mask blank comprising at least three layers disposed over a substrate.

7. 10. The method of claim 1, further comprising processing a mask blank using the corrected photomask design data to form a photomask for use in a lithography process.

8. 8. The method of claim 7, wherein the photomask is a large photomask for use in a lithography process to manufacture flat panel displays (FPDs).

9. The photomask blank comprises: A substrate; a first layer disposed over the substrate, the first layer being a phase shift layer; a second layer disposed on the first layer, the second layer being an etch stop layer; a third layer disposed on the second layer, the third layer being an absorbent layer; The method of claim 8 comprising:

10. The step of processing the mask blank further comprises: exposing and developing a first photoresist disposed on the third layer to form a pattern of exposed portions of the third layer; etching the exposed portions of the third layer to form a pattern in the exposed portions of the second layer; etching the exposed portions of the second layer to form a pattern in the exposed portions of the first layer; depositing a second photoresist over the first layer, the etched second layer, and the etched third layer; exposing and developing the second photoresist to form a pattern of exposed portions of the first layer; and Etching the exposed portions of the first layer to form a pattern in the exposed portions of the substrate.

10. The method of claim 9, comprising:

11. The method of claim 9 , wherein the first layer comprises Cr.

12. The method of claim 9 , wherein the second layer comprises MoSi.

13. The method of claim 9 , wherein the third layer comprises Cr.

14. (A) generating a photomask pattern design, (1) receiving initial photomask design data relating to one or more patterns to be formed on a photomask; (2) determining a first contour associated with at least one of the one or more patterns that is expected to result from writing the photomask based on the initial photomask design data; (3) determining a second contour associated with the at least one of the one or more patterns that is expected to result from etching of the written photomask based on the first contour, the second contour being an expected actual contour of the at least one of the one or more patterns; (4) performing optical proximity correction on the initial photomask data using the second contour associated with the at least one of the one or more patterns; and (5) generating corrected photomask design data based on the optical proximity effect corrected initial photomask design data; generating, (B) providing a mask blank comprising at least three layers disposed over a substrate; (C) processing a mask blank comprising a substrate, a first layer disposed on the substrate, the first layer being a phase shift layer, a second layer disposed on the first layer, the second layer being an etch stop layer, and a third layer disposed on the second layer, the third layer being an absorber layer, comprising: (1) exposing and developing a first photoresist disposed on a third layer to form a pattern of exposed portions of the third layer; (2) etching the exposed portions of the third layer to form a pattern in the exposed portions of the second layer; (3) etching the exposed portions of the second layer to form a pattern in the exposed portions of the first layer; (4) depositing a second photoresist over the first layer, the etched second layer, and the etched third layer; (5) exposing and developing the second photoresist to form a pattern of exposed portions of the first layer; and (6) Etching the exposed portions of the first layer to form a pattern in the exposed portions of the substrate. a processing step including: A method for manufacturing a photomask, comprising two or more steps of:

15. The method of claim 14 comprising steps (A) and (B).

16. 15. The method of claim 14, comprising steps (A), (B), and (C).

17. 15. The method of claim 14, wherein the photomask is a large photomask for use in a lithography process to manufacture flat panel displays (FPDs).

18. 15. A method for forming a flat panel display, comprising the steps of irradiating a glass plate substrate with light from an optical energy source through a large photomask formed according to the method of claim 14 in a photolithography process, wherein at least one circuit pattern is transferred from the large photomask to the glass plate substrate.

19. 20. The method of claim 18, wherein the flat panel display is a liquid crystal display, an active matrix liquid crystal display, an organic light emitting diode, a light emitting diode, a plasma display panel, or an active matrix organic light emitting diode.

Images