Cavity-enhanced waveguide photodetectors

JP2025508341AActive Publication Date: 2025-03-26ADVANCED MICRO FOUNDRY PTE LTD
View PDF 5 Cites 0 Cited by

Patent Information

Application Number
JP2024545167
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2022-03-01
Publication Date
2025-03-26
Estimated Expiration
2042-03-01

Smart Images

  • Figure 2025508341000001_ABST
    Figure 2025508341000001_ABST
Patent Text Reader

Abstract

An integrated cavity enhanced photodetector for visible photonics is provided. The photodetector includes a waveguide, an absorbing layer, a set of metal contacts, and a phase shifter, and can be used in multi-material integration flows and low-loss visible photonics.
Need to check novelty before this filing date? Find Prior Art

Description

[Technical field]

[0001] The present invention relates generally to photodetectors, and more particularly to integrated cavity enhanced photodetectors for visible photonics with multi-material integrated flow and low loss. [Background technology]

[0002] This section is intended only to provide background information relative to the present invention and may be used solely to enhance the understanding of the present invention, and not as an admission of prior art.

[0003] Silicon is essential for photonics applications at telecommunication wavelengths. It is also the material of choice for visible light detection due to its high absorption. However, the very high absorption of silicon makes it unsuitable for low-loss waveguiding of visible light by itself. Therefore, a multi-material integration flow is required to realize low-loss photonics components along with efficient optical detection of visible light. However, achieving low-loss coupling and sensitive detection of visible light in such hybrid photonics platforms without sacrificing device speed remains a challenge.

[0004] Silicon nitride (SiN)-on-silicon-on-insulator (SOI) and silicon nitride-on-silicon dioxide (SiO2) are the primary photonic platforms operating in the visible / near-infrared (VIS / NIR) band. -There are on-silicon (Si) photonic integrated circuits (PICs). Hybrid photonic devices using grating structures, intralayer / intralayer evanescent couplers, and end-to-end couplers to transfer light from a waveguide material to an absorbing material have also been developed. Grating-assisted coupling schemes are used to couple normally incident light into an absorbing waveguide material by lateral diffraction of light, increasing the light penetration depth for a given absorbing film thickness. In configurations where the input light propagates in a waveguide, designs with two interlayer grating couplers are used to couple light between different layers. However, optical detection using this scheme has not yet been demonstrated, and furthermore, the fabrication of double-grating structures requires tight process control to vertically and horizontally align the two grating couplers at different layers.

[0005] End-coupling schemes can suffer from high insertion losses at the coupling interface due to surface scattering and Fresnel reflections. Moreover, the integration flow for same-layer SiN and Si deposition is not compatible with standard CMOS processes. On the other hand, evanescently coupled photodetectors require very long coupling lengths to achieve efficient optical coupling between the waveguides because the optical modes are confined within the waveguide core at visible wavelengths, making the evanescent tail very weak compared to longer communication wavelengths. This ultimately sets up a trade-off between responsivity and bandwidth. The responsivity can be improved by resonant cavity enhancement of the optical field in the optical absorption region, and such cavity-enhanced photodetectors have been recently reported in the literature.

[0006] In related work, SiN microring resonators (MRRs) have been in-plane integrated with Si metal-semiconductor-metal (MSM) PDs for NIR operation, as shown in Figures 1A-1C, to significantly improve the responsivity. However, the device in Figures 1A-1C suffers from a low optical-to-electrical (OE) bandwidth of 7.5 GHz due to charge carrier transit time limitations. Since the charge carrier transport axis of this device is parallel to the light propagation direction, lengthening the device to improve the responsivity also increases the charge transport time, ultimately limiting its OE bandwidth. It is well known that MSM PDs can operate with OE bandwidths well above 100 GHz, and an OE bandwidth of about 30 GHz is easily achievable with conventional Si waveguide PDs. Specifically, Figures 1A to 1C show the cross-sectional views of the SiN MRR layer and the Si absorption layer in the same layer at different planes, which allows the same layer material deposition of the absorption photodetector layer 101 and the SiN MRR layer 105 to have the carrier transport axis parallel to the light propagation direction. Summary of the Invention [Problem to be solved by the invention]

[0007] Therefore, as discussed above, there is a need for device designs that enable highly responsive photodetection of VIS / NIR light without compromising device speed.

[0008] Various embodiments described herein provide cavity-enhanced photodetectors for visible photonics. [Means for solving the problem]

[0009] In a first aspect, an integrated cavity-enhanced photodetector for visible light is provided, comprising a low-loss waveguide including a bus layer and a microring resonator (MRR) layer for input light, a photodetector layer formed below the MRR layer, a set of metal contacts connected to edges of the photodetector layer that serve as external contacts of the photodetector, and a phase shifter coupled to the MRR layer and connected to the set of metal contacts.

[0010] In an embodiment of the first aspect, the bus layer and the MRR layer further comprise a low-loss silicon nitride (SiN) material.

[0011] In one embodiment of the first aspect, the photodetector layer comprises a silicon device layer of a silicon-on-insulator (SOI) wafer, or a silicon layer on silicon oxide deposited on a silicon wafer.

[0012] In one embodiment of the first aspect, the phaser is a thermo-optic phaser made of resistive titanium nitride (TiN) material.

[0013] In an embodiment of the first aspect, the photodetector has a single body traveling wave geometry or a traveling wave photodetector array (TWPDA) structure.

[0014] In one embodiment of the first aspect, the light propagation axis of the MRR layer is perpendicular to the charge carrier transport axis of the photodetector layer.

[0015] In a second aspect, a method for fabricating an integrated cavity-enhanced photodetector for visible light includes forming a photodetector layer, forming a low-loss waveguide including a bus layer and an MRR layer, forming a first metal contact layer, forming a phase shifter, and forming a second metal contact layer, wherein an optical propagation axis of the MRR layer is orthogonal to a charge carrier transport axis of the absorption layer.

[0016] In one embodiment of the second aspect, the bus layer and the MRR layer comprise low-loss silicon nitride (SiN).

[0017] In an embodiment of the second aspect, the photodetector layer comprises a silicon material.

[0018] In one embodiment of the second aspect, the phaser is a thermo-optic phaser made of resistive titanium nitride (TiN) material.

[0019] In one embodiment of the second aspect, the photodetector has a single traveling wave geometry or a traveling wave photodetector array (TWPDA) structure.

[0020] These and other aspects of the embodiments herein will be better understood and appreciated when considered in conjunction with the following description and the accompanying drawings. It should be understood, however, that the following description, while indicating preferred embodiments and many specific details thereof, is given by way of illustration and not by way of limitation. Many changes and modifications can be made within the scope of the embodiments herein without departing from the spirit thereof, and the embodiments herein include all such modifications. [Brief description of the drawings]

[0021] Other objects, features and advantages of the present embodiments will become apparent from the following description taken in conjunction with the accompanying drawings. In the drawings, like reference numerals designate corresponding parts throughout the several views.

[0022] Other objects, features and advantages will become apparent to those skilled in the art from the following description of the preferred embodiments and the accompanying drawings.

[0023] [Figure 1A] Shown are isometric views of a conventional cavity-enhanced PD consisting of a SiN MRR and a Si absorber layer in the same layer (1A) with cross-sectional views in different planes (1B and 1C). [Figure 1B] Shown are isometric views of a conventional cavity-enhanced PD consisting of a SiN MRR and a Si absorber layer in the same layer (1A) with cross-sectional views in different planes (1B and 1C). [Figure 1C] Shown are isometric views of a conventional cavity-enhanced PD consisting of a SiN MRR and a Si absorber layer in the same layer (1A) with cross-sectional views in different planes (1B and 1C).

[0024] [Figure 2A]2A shows a top view in the xz plane (2A), a cross-sectional view in the xy plane (2B), and a cross-sectional view in the zy plane (2C) of a cavity-enhanced single-body traveling-wave photodetector with a thermo-optic phase shifter according to an embodiment of the present specification. [Figure 2B] 2A shows a top view in the xz plane (2A), a cross-sectional view in the xy plane (2B), and a cross-sectional view in the zy plane (2C) of a cavity-enhanced single-body traveling-wave photodetector with a thermo-optic phase shifter according to an embodiment of the present specification. [Figure 2C] 2A shows a top view in the xz plane (2A), a cross-sectional view in the xy plane (2B), and a cross-sectional view in the zy plane (2C) of a cavity-enhanced single-body traveling-wave photodetector with a thermo-optic phase shifter according to an embodiment of the present specification.

[0025] [Diagram 3] FIG. 1 illustrates a top view of a cavity-enhanced traveling wave photodetector array (TWPDA) structure according to an embodiment herein.

[0026] [Figure 4A] 4A-4B show isometric views of a portion of an MRR layer and an absorbing layer, consisting of (4A) a silicon channel waveguide and (4B) a silicon rib waveguide, according to one embodiment herein. [Figure 4B] 4A-4B show isometric views of a portion of an MRR layer and an absorbing layer, consisting of (4A) a silicon channel waveguide and (4B) a silicon rib waveguide, according to one embodiment herein.

[0027] [Figure 5A] 1 shows a doping profile for forming an APD device. [Figure 5B] 1 shows a doping profile for forming an APD device. [Figure 5C] 5A-5C show profiles for forming an MSM PD device, (5A) P+-IP-N+-N++ doping profile, or (5B) P++-P-N+-N++ doping profile, according to an embodiment of the present specification.

[0028] [Figure 6] FIG. 1 shows an isometric view of a cavity-enhanced PD consisting of different layers of SiN MRR and Si absorption layers, showing the light propagation axis and carrier transport axis, according to an embodiment herein.

[0029] [Figure 7] 1 is a process flow for the fabrication of a photodetector as disclosed herein.

[0030] [Figure 8] 8 is a process flow for the fabrication of a photodetector as disclosed herein, with additional intermediate steps relative to the process shown in FIG. 7.

[0031] To facilitate understanding, like reference numerals have been used where possible to indicate like elements that are common to the figures. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0032] In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific embodiments which may be practiced. The embodiments are described in sufficient detail to enable one skilled in the art to practice them, it being understood that logical, mechanical, and other changes may be made without departing from the scope of the embodiments. The following detailed description, therefore, is not to be taken in a limiting sense.

[0033] Conventional photodetectors suffer from the following problems that the photodetector disclosed herein seeks to solve: 1) The butt coupling used in conventional PDs suffers from high insertion loss. 2) MRR cavity-enhanced photodetectors (PDs) for the NIR have non-orthogonal orientations of the carrier transport axis and the light propagation axis, limiting their OE bandwidth. 3) Interlayer grating-assisted PD reports no photodetection capability in the coupling region. 4) Grating-assisted PD is not suitable for high-density photonic integrated circuits. 5) Microring resonator-enhanced PDs with silicon input waveguides experience significant propagation losses when operated at visible wavelengths. When the absorption region contains germanium, the device suffers from a high dark current compared to silicon absorption regions due to its smaller bandgap.

[0034] This disclosure proposes the implementation of an integrated cavity-enhanced silicon nitride-on-silicon photodetector as shown in FIGS. 2A-2C and 3. FIG.

[0035] In one embodiment, the photodetector 100 may include a low loss waveguide, a photodetector layer 101 (ie, an absorbing waveguide layer), a set of metal contacts 102 , 107 , and a phase shifter 103 .

[0036] In one embodiment, the waveguide can include two layers: a bus layer 104 for input light routing and a micro-ring resonator (MRR) layer 105 for resonant cavity enhancement effects. The bus waveguide and MRR can be made of SiN material that has low loss at visible wavelengths. Such low loss material increases the cavity lifetime of photons, which can evanescently couple into the silicon absorbing layer underneath during multiple passes.

[0037] In one embodiment, the bus layer 104 can have a width (w1) in the range of about 0.3-0.6 μm. In one embodiment, the MRR layer 105 can have a width (w2) in the range of about 0.3-0.6 μm.

[0038] In one embodiment, the bus layer 104 and the MRR layer 105 may have a thickness (t1) in the range of approximately 0.15-0.25 μm.

[0039] In one embodiment, the bus layer 104 and the MRR layer 105 can be bonded to one another and fabricated on the photodetector layer 101. In particular, the MRR layer can be disposed adjacent to the bus layer within a distance (d1) that separates the layers with a silicon oxide cladding material 106. In one embodiment, the distance (d1) can be in the range of approximately 0.25 to 0.40 μm.

[0040] In one embodiment, an interlayer dielectric (IDL) may be included between the bus layer 104 and the MRR layer 105. The interlayer dielectric (IDL) may be fabricated from silicon oxide.

[0041] As shown in Figures 2A and 3, the MRR layer 105 can form a photonic resonator. In one embodiment, the radius (r1) of the microring structure can range from about 20 μm to 100 μm. As will be appreciated, the MRR layer 105 can also be other shapes and types of photonic resonator structures, such as racetracks, arc bends, disk resonators, and photonic crystal cavities.

[0042] In one embodiment, photodetector layer 101 can be formed below MRR layer 105. Thus, MRR layer 105 is above photodetector layer 101, and they are not in the same layer, in contrast to the conventional designs of Figures 1A-1C.

[0043] In one embodiment, the photodetector layer 101 can be fabricated from a silicon device layer of a silicon-on-insulator (SOI) wafer or from a silicon layer on silicon oxide deposited on a silicon wafer. Doping is performed on this photodetector layer 101, and doped regions (p++, p+, p, n, n+, n++) and undoped regions (i.e., intrinsic) are shown in FIG. 2B as layers 101a-e. Layer 101 includes all these regions. The doping profile is 101a as a p++ ohmic contact, 101b as a p-doped region, 101c as an intrinsic region, and 101d as an n-doped region, and 101e as an n++ ohmic contact.

[0044] In one embodiment, the photodetector layer may have a width (w9) of about 2 μm or greater.

[0045] The photodetector layer can be in a slab shape without rib portions, as shown in Figure 4A. In one embodiment, the photodetector layer can have a thickness (t5) of about 0.22 μm.

[0046] As shown in FIG. 4B, the photodetector layer can be a rib waveguide structure centered with respect to the MRR layer. In one embodiment, the rib portion 112 can have a width (w10) of about 0.15 μm. In one embodiment, the rib portion can have a thickness (t8) of about 0.13 μm with a thickness (t9) of about 0.09 μm. In one embodiment, when interlayer coupling is performed between a SiN waveguide and a Si waveguide, if the effective refractive indexes of the optical modes in these two waveguides do not match, reflections will occur due to the refractive index mismatch. Compared to a simple channel waveguide, the rib waveguide geometry can provide more freedom through additional design parameters such as rib etch depth (t8), rib width (w10), etc., to tune the effective refractive index of the silicon waveguide to match that of the SiN waveguide.

[0047] In one embodiment, the photodetector layer 101 can include one or more doped P regions, an intrinsic region, and one or more doped N regions. In one embodiment, the photodetector layer can include a combination of regions selected from a heavily doped P region (p++), a moderately doped P region (p+), a lightly doped P region (p), an intrinsic region, a lightly doped N region (n), a moderately doped N region (n+), and a heavily doped N region (n++). In one embodiment, as shown in FIG. 5A, the photodetector layer 101 can be a separate absorption, charge, and multiplication (SACM) type doping profile, where light absorption occurs in the intrinsic region 101b, charge multiplication occurs at a junction formed by the p-doped 101c and n+-doped 101d regions, and the p++-doped 101a region and the n++-doped region 101e serve as ohmic contacts to the junction. In one embodiment, as shown in FIG. 5B, the photodetector layer 101 may be a pn junction formed by p-doped region 101b and n+ doped region 101c, and an ohmic contact formed by heavily doped p++ 101a and n++ 101d regions.

[0048] In one embodiment, the photodetector layer 101 may be a metal-semiconductor-metal photodetector formed by two Schottky contacts on the edges, as shown in FIG. 5C.

[0049] In one embodiment, each region of the photodetector layer 101 may have a width in the range of about 0.15-0.50 μm. In one embodiment, the p-doped and n-doped regions may have widths (w4, w5, w7, w8) of about 0.50 μm, and the intrinsic region may have a width (w6) of about 0.15-0.50 μm, as shown in FIG. 2B.

[0050] In one embodiment, the photodetector layer can be bonded and positioned adjacent to the MRR layer. In particular, the MRR layer can be adjacent to the silicon oxide cladding material 106 that overlies the photodetector layer and separates the layers by a distance (d2). In one embodiment, the distance (d2) can be in the range of approximately 0.15 to 0.25 μm.

[0051] In one embodiment, a first set of metal contacts having contact points can be connected to the photodetector layer 101 and serve as the external contacts for the photodetector.

[0052] In one embodiment, the set of metal contacts may include a first metal layer 107 and a second metal layer 102. In one embodiment, the first metal layer 107 may have a thickness (t3) of about 0.75 μm and the second metal layer 102 may have a thickness (t2) of about 2 μm.

[0053] In one embodiment, the phaser 103 can be a resistive metal heater. In one embodiment, the phaser can be coupled to the MRR layer 105 and connected to the second metal contact 102 of the set.

[0054] In one embodiment, the phase shifter 103 can be adjacently coupled onto the MRR layer 105, such that a distance (d3) separates the phase shifter 103 and the MRR layer 105. In one embodiment, the distance (d3) can be about 0.80 μm. In this regard, the phase shifter 103 and the MRR layer 105 are separated by a clad silicon oxide material 106.

[0055] The phase shifter 103 can be coupled adjacent to the MRR layer 105 for post-fabrication tuning of the spectral optical response of the photodetector by changing the resonant wavelength via the thermo-optic effect. In one embodiment, the phase shifter can be a thermo-optic phase shifter constructed of titanium nitride (TiN). Other types of resistive materials besides titanium nitride (TiN) include, but are not limited to, nickel silicide (NiSi) and chromium gold (Cr-Au) in SOI.

[0056] In one embodiment, a metal layer may be formed on the TiN layer to provide power for the thermo-optic tuning effect.

[0057] In one embodiment, the phaser 103 may have a width (w3) of about 2 μm or greater. In one embodiment, the phaser 103 may have a thickness (t7) of about 0.12 μm.

[0058] In one embodiment, a cladding layer 106 may be included for the bus layer 104 and the MRR layer 105. This upper cladding layer 106 may be fabricated from silicon oxide.

[0059] In one embodiment, the cladding layer 106 may have a thickness (t4) of about 2 μm.

[0060] Thus, in one embodiment, the integrated cavity-enhanced photodetector disclosed herein can include a waveguide including a bus layer and a microring resonator (MRR) layer for input light, a photodetector layer formed below the MRR layer, a set of first metal contacts connected to the photodetector layer to serve as external contacts for the photodetector, and a phase shifter coupled to the MRR layer and connected to a set of second metal contacts.

[0061] 2B, the photodetector layer 101 disclosed herein may be formed on a silicon device layer 110 that may have a thickness of about 220 nm. The silicon device layer 110 may be formed on a buried oxide (BOX) layer 108 that may have a thickness (t6) of about 2-3 μm, and a silicon handle substrate 109 below the BOX layer 108. In one example, the thickness of the silicon handle substrate may be 725 μm.

[0062] 2A-2C, the photodetectors are configured in a single traveling wave geometry for optical detection targeting applications such as optical power monitoring or analyte sensing, while in FIG. 3, the photodetectors are configured as a traveling wave photodetector array (TWPDA) with pre-compensated delay lines for high saturation power and high speed optical detection targeting applications such as short-range optical interconnects, visible light communications, and LIDAR.

[0063] Thus, in one embodiment, the device can have a single traveling wave electrode (FIG. 2A) or traveling wave photodetector array (TWPDA) structure (FIG. 3), which differs from the single PD configuration in that it includes an array of smaller photodetectors. The traveling wave photodetector array (TWPDA) with precompensated delay line allows high saturated power operation while maintaining the high OE bandwidth achieved by the reduced depletion capacitance region.

[0064] 2B, a first metal contact 107 can be fabricated on the heavily doped P region 101a and another first metal contact 107 can be fabricated on the heavily doped N region 101e, together forming an ohmic contact to the photodetector layer 101. A second metal contact 102 can then be fabricated on and above the first metal contact 107, exposed to external device connections. In one embodiment, both metal contacts can be fabricated in pairs.

[0065] The photodetectors disclosed herein can also cover other photonic structures, such as where low-loss waveguiding is performed by another material instead of silicon nitride (stoichiometric Si3N4 or non-stoichiometric SixNy). In one embodiment, the waveguiding material is titanium oxide (TiO 2) , Aluminum Nitride (AlN), and Aluminum Oxide (Al2O3) materials.

[0066] The photodetectors disclosed herein can be compatible with photonic devices fabricated on a CMOS-compatible SiN-on-SOI platform.

[0067] Photodetectors disclosed herein can include: (1) a PIN photodiode, as shown in FIG. 2B; (2) an avalanche photodiode (APD), as shown in FIGS. 5A and 5B; and (3) an MSM photodetector, as shown in FIG. 5C.

[0068] As shown in Figures 5A and 5B, the doping profile of the photodetector layers can be modified for APD devices. In particular, Figure 5A shows an IP-N+ doping profile, and Figure 5B shows a P-N+ doping profile where P++ and N++ form ohmic contacts in both device configurations. Optionally, if ion implantation is not feasible, a simpler metal-semiconductor-metal (MSM) photodetector can be formed as shown in Figure 5C.

[0069] APDs can be realized by changing the width of the doped regions and changing the doping concentration therein. For example, in FIG. 5A, a conventional separated absorption, charge and multiplication (SACM) type APD device can be realized by an I (101b) -P (101c) -N+ (101d) doping profile, where ohmic contacts are formed through the heavily doped P++ (101a) and N++ (101e) regions. Here, a SiN MRR layer 105 can be placed on top of the intrinsic region (101b), and photogenerated electrons pass through the multiplication region formed by the P (101c) -N+ (101d) junction. Alternatively, in Figure 5B, a simpler APD device in which light absorption and multiplication occur within the same depletion region can be realized with a P-N+ (101b-101c) doping profile, where ohmic contact is realized via heavily doped P++ (101a) and N++ (101d) regions, where the SiN MRR layer 105 can be placed asymmetrically on the p-n+ junction such that the majority of the light absorption occurs mostly within the depleted p region.

[0070] In one embodiment, the photodetector disclosed herein can include SiN MRR layers and Si absorber layers in different layers and planes, where the light propagation axis of the MRR layers is orthogonal to the carrier transport axis of the absorber layers, resulting in a transit-time limited OE bandwidth that is independent of the length of the photodetector.

[0071] FIG. 6 shows an isometric view of a cavity-enhanced photodetector disclosed herein, where the SiN MRR layer and Si absorber layer are formed in different layers exhibiting the light propagation axis and the charge carrier transport axis. In this embodiment, a monolithic Si absorber layer is formed below the MRR layer, and a set of metal contacts are oriented such that the charge carrier transport axis is perpendicular to the light propagation direction. This orientation allows for long coupling lengths to be accommodated to achieve high responsivity without reducing device speed, since the photogenerated charge carriers are collected across the short axis rather than along the light propagation direction, as shown in FIG. 1. In addition, this design allows for low voltage operation, since the depletion region width can be reduced to the order of the photodetector width. This makes it possible to achieve avalanche photodiodes (APDs) with low operating voltages. Additionally, the smaller active device volume also reduces dark carrier generation.

[0072] Unlike the same-layer Si and SiN integration flow of Fig. 1A of conventional designs, the interlayer Si and SiN integration flow of the embodiments disclosed herein allows for the achievement of gaps on the order of tens of nanometers between the waveguides by controlled thin film deposition and subsequent etching steps, thus improving the optical coupling from the SiN waveguide to the Si absorption waveguide and enhancing the device responsivity.

[0073] Due to the interlayer coupling structure of the photodetector and the device orientation disclosed herein, the length of the photodetector does not determine the transit time limited bandwidth. Therefore, high responsivity can be achieved while maintaining a high OE bandwidth. Also, the length of the photodetector can be made arbitrarily long to meet the required coupling condition of the MRR-photodetector combination system until the RC limited bandwidth becomes dominant.

[0074] In this embodiment, we propose a PIN photodetector formed 0.15 μm below the width of a SiN channel waveguide, as shown in Figure 2(B). The photodetector has a depletion region width W of ~0.5 μm, the same length as the intrinsic region 101c of the PIN diode, and its electrodes are 3 μm apart. Electrons are driven by an electric field strength in silicon of |E|=1×10 at room temperature. 5 Saturation velocity v in V / cm d =~1×10 7 To reach the maximum velocity of 1000 Hz, the photodetector must be biased at a reverse voltage of V B Can be operated at <10V.

[0075] Assuming a PIN photodetector, the transit time is τ tr =w / v d = ~5ps, and the pass-time limited bandwidth f tr =0.443 / τ tr This structural specification means that the pass-time limited bandwidth is improved by an order of magnitude or more compared to conventional photodetectors that lack such an orthogonality principle.

[0076] Unlike optical communication wavelength bands (e.g., O-band, C-band), there are no standard wavelength bands defined in the visible spectrum. In this regard, the integrated cavity-enhanced photodetector structures disclosed herein can be equipped with thermo-optic phase shifters in the MRR section to tune the spectral responsivity of the photodetector. This is particularly useful for integrated wavelength division multiplexing (WDM) circuits for short-distance optical interconnects, lab-on-a-chip applications where different analytes have different absorption spectra, and integrated quantum photonics where different quantum emitters emit photons at different wavelengths. Such post-fabrication tunability allows the same device to be utilized for different photodetection needs.

[0077] The present invention uses SiN waveguides for low-loss optical guiding and passive functions for VIS / NIR light, and couples light underneath the Si absorption layer via thermally tunable SiN MRRs when on-chip photodetection is required.

[0078] In one embodiment, a process for fabricating an integrated cavity enhanced photodetector for visible photonics is provided. As shown in FIG. 7, the process can include the following general steps:

[0079] In step 200, the photodetector layer can be patterned. The photodetector layer can be defined as a Si slab using photolithography (PL) and inductively coupled plasma (ICP) etching. Further, a Si rib portion can be formed using lithography and ICP etching with an oxide hard mask to pattern the Si rib portion. The photodetector layer can be formed on a silicon device layer of a silicon-on-insulator (SOI) substrate.

[0080] In step 202, the photodetector layer can be formed using ion implantation and subsequent dopant activation steps. Specifically, a pad oxide can be deposited by PECVD, followed by photolithography (PL) and subsequent ion implantation steps to form p-type and n-type regions. Similarly, p++ and n++ ohmic contacts can be formed, followed by rapid thermal anneal (RTA) dopant activation. Then, a PECVD oxide can be deposited as the first interlayer dielectric (ILD1), followed by PL and dry etching steps to form vias (connectors).

[0081] In step 204, a first metal contact layer can be fabricated. Specifically, after wet cleaning, the first metal contact layer can be formed by TaN / Al / TaN deposition, followed by PL and dry etching steps. The first metal contact layer contacts the photodetector layer in the p++ and n++ doped regions, followed by PECVD oxide deposition and CMP for planarization.

[0082] In step 206, a low loss waveguide including the bus layer and the MRR layer can be fabricated. Specifically, prior to SiN deposition, an oxide etch step is performed to remove the oxide covering the Si absorber region. PECVD SiN deposition can be performed, followed by PL and ICP etch steps to pattern the SiN bus layer and the MRR layer.

[0083] In step 208, the phase shifter can be fabricated. Specifically, TiN is deposited using the following PL and dry etching steps to form a resistive phase shifter. The phase shifter can be formed to bond with the MRR layer and can be connected with a metal contact layer. A second interlayer dielectric (ILD2) is deposited and vias (connectors) are formed using PL and dry etching steps.

[0084] In step 210, a second metal contact layer can be fabricated. In particular, the second metal contact layer can be formed by TaN / Al deposition, followed by PL and etching steps. An oxide layer can be deposited as a passivation layer. PL and dry etching steps can follow for bond pad opening for the external contacts of the photodetector.

[0085] Thus, in one embodiment, a process is provided for fabricating integrated cavity-enhanced photodetectors for visible photonics that may include the following steps: form a photodetector layer, dope the photodetector layer by ion implantation, form a first metal contact layer, form a low-loss waveguide including a bus layer and an MRR layer, form a phase shifter, and form a second metal contact layer, where the light propagation axis of the MRR layer is orthogonal to the carrier transport axis of the absorption layer.

[0086] As shown in FIG. 8, the process outlined in FIG. 7 may include additional intermediate steps such as:

[0087] In step 300, a wafer (SOI) can first be obtained. Specifically, an 8 inch SOI wafer with a 220 nm Si device layer and a 3 μm buried oxide (BOX) layer can be used.

[0088] In step 302, a photodetector layer can be formed in a silicon device layer of an SOI wafer. The photodetector layer can be defined as a Si slab using photolithography (PL) and inductively coupled plasma (ICP) etching. Further, lithography with an oxide hard mask and ICP etching can be used to form and pattern a Si rib portion.

[0089] In step 304, a pad oxide may be deposited by PECVD on the photodetector layer prior to ion implantation. This is followed by boron and phosphorus implants to form p-type and n-type regions, respectively, in the photodetector layer. Similarly, p++ and n++ ohmic contacts may be formed with similar ion implantation steps.

[0090] In step 306, dopant activation of the doped regions of the photodetector layer is performed by rapid thermal annealing (RTA), followed by removal of the pad oxide using dilute hydrofluoric acid etchant (DHF).

[0091] In step 308, oxide is deposited by PECVD as the first interlayer dielectric (ILD1), followed by PL and dry etching steps to form the vias (connectors).

[0092] In step 310, a first metal contact layer is fabricated. In particular, after wet cleaning, the first metal contact layer is formed by TaN / Al / TaN deposition and subsequent PL and dry etching steps. A first metal contact layer contacts the photodetector layer in the p++ and n++ doped regions, followed by oxide deposition by PECVD and planarization by CMP.

[0093] Prior to SiN deposition, an oxide etch step is performed to remove the oxide covering the relevant photodetector areas in step 312. SiN is then deposited by PECVD.

[0094] The SiN waveguide, including the bus layer and the MRR layer, is fabricated in step 314. In particular, the SiN film can be patterned to form the SiN bus waveguide and the MRR layer by PL and ICP etching steps.

[0095] In step 316, oxide is deposited by PECVD, followed by a backside SiN etch and a blanket oxide etch step, followed by CMP for oxide planarization.

[0096] In step 318, a thermo-optic phase shifter can be fabricated. In particular, TiN can be deposited with subsequent PL and dry etching steps to form a resistive phase shifter. The phase shifter can be formed to bond with the MRR layer and can be connected with a metal contact layer.

[0097] In step 320, a PECVD oxide is deposited as a second interlayer dielectric (ILD2), followed by PL and dry etch steps can be used to form vias (connectors).

[0098] In step 322, a second metal contact layer can be fabricated. In particular, the second metal contact layer can be formed by TaN / Al deposition, followed by PL and etching steps. A PECVD oxide layer can be deposited as a passivation layer. PL and dry etching steps can follow to open up bond pads. The second metal contact layer is connected to the first metal contact layer such that both of these metal contacts function as external contacts of the photodetector.

[0099] In step 324, deep trenches may be formed to form edge couplers.

[0100] It is to be understood that the terms used herein are for purposes of description and not of limitation. Thus, while the embodiments herein have been described in terms of preferred embodiments, those skilled in the art will recognize that the embodiments herein can be practiced with modification within the spirit and scope of the claims.

Claims

1. 1. An integrated cavity enhanced photodetector for visible photonics, comprising: a waveguide including a bus layer for input light and a microring resonator (MRR) layer; a photodetector layer formed below and coupled to the MRR layer; a set of first metal contacts connected to the photodetector layer and serving as external contacts; a phase shifter coupled to the MRR layer and connected to a set of second metal contacts; A photodetector comprising:

2. The photodetector of claim 1 , wherein the bus layer and the MRR layer further comprise a low-loss silicon nitride (SiN) material.

3. The photodetector of claim 1 , wherein the photodetector layer comprises a silicon material.

4. The photodetector of claim 1 , wherein the phase shifter is a thermo-optic phase shifter made of resistive titanium nitride (TiN) material.

5. The photodetector of claim 1 having a single traveling wave structure or a traveling wave photodetector array (TWPDA) structure.

6. 2. The photodetector of claim 1, wherein a light propagation axis of the MRR layer is perpendicular to a carrier transport axis of the absorption layer.

7. 1. A method for fabricating an integrated cavity enhanced photodetector for visible photonics, comprising: forming a photodetector layer; forming a first metal contact layer; forming a low-loss waveguide including a bus layer for input light and a microring resonator (MRR) layer; Forming a phase shifter, forming a second metal contact layer; The light propagation axis of the MRR layer is perpendicular to the carrier transport axis of the absorbing layer.

8. The method of claim 7 , wherein the bus layer and the MRR layer comprise low-loss silicon nitride (SiN).

9. The method of claim 7 , wherein the photodetector layer comprises a silicon material.

10. The method of claim 7, wherein the phaser is a thermo-optic phaser made of a resistive titanium nitride (TiN) material.

11. The method of claim 7 , wherein the photodetector has a single traveling wave geometry or a traveling wave photodetector array (TWPDA) structure.

Citation Information

Patent Citations

  • A polycrystalline germanium-based waveguide detector integrated on a thin-film silicon-on-insulator (soi) platform

    JP2006522465A

  • Optical semiconductor device

    JP2014130939A

  • Resonator with reduced loss

    JP2014530388A

  • Optical integrated device and optical communication device

    JP2017098362A

  • Light emitting and receiving device

    JP2020122878A