Converter and method for discharging converter

Abstract

The invention relates to a converter 1 with a control unit configured to selectively operate in a mode in which the control unit provides control signals to the switching elements 21 for repeatedly switching each of a certain number of cells 5 between a first state and a second state such that the current in each of a certain number of arms 3 is adjusted to correspond to a respective predefined current reference value and the certain number of capacitors 23 are partially discharged until the voltage provided by each capacitor 23 is above a predefined minimum voltage reference value and below a predefined maximum voltage reference value. The invention further relates to a method for controlling the converter 1.

Description

[Technical field]

[0001] The present invention relates to a converter and a method for controlling the converter. The converter comprises a plurality of arms and a control unit coupled to the plurality of arms. Each arm comprises a first arm terminal, a second arm terminal, and a plurality of cells coupled between the first arm terminal and the second arm terminal. Each of the cells comprises a first cell terminal, a second cell terminal, a switching element, and a capacitor. The switching element of each cell is configured to selectively switch the cell between a first state in which the capacitor is connected to the first and second cell terminals, and a second state in which the capacitor is bypassed. The cells are connected in series between the first arm terminal and the second arm terminal such that a first cell terminal of a first cell in the plurality of cells is connected to the first arm terminal and a second cell terminal of a second cell in the plurality of cells is connected to the second arm terminal. [Background technology]

[0002] Such converters are known and, as mentioned above, comprise a number of cells for storing electrical energy. In certain situations, for example when the converter requires maintenance, it is necessary to discharge the electrical energy stored in the converter so that the maintenance work can be carried out safely.

[0003] In general, it is desirable to release the energy stored in a converter in a safe, reliable and time-efficient manner. Summary of the Invention [Problem to be solved by the invention]

[0004] SUMMARY OF THE DISCLOSURE In view of the above, it is an object of the present invention to provide an improved manner in which the energy stored in a converter can be released in a safe, reliable and time-efficient manner. [Means for solving the problem]

[0005] In a first aspect of the invention, the problem is solved by a converter having the features of claim 1. The converter comprises a plurality of arms and a control unit coupled to the plurality of arms. Each of the arms comprises a first arm terminal, a second arm terminal and a plurality of cells coupled between the first arm terminal and the second arm terminal. Each of the cells comprises a first cell terminal, a second cell terminal, a switching element and a capacitor. The switching element of each cell is configured to selectively switch the cell between a first state in which the capacitor is connected to the first and second cell terminals and a second state in which the capacitor is bypassed. The plurality of cells are connected in series between the first arm terminal and the second arm terminal such that a first cell terminal of a first cell of the plurality of cells is connected to the first arm terminal and a second cell terminal of a second cell of the plurality of cells is connected to the second arm terminal. The control unit is configured to selectively operate in a mode in which the control unit provides control signals to the switching elements that repeatedly switch each cell between a first state and a second state such that the current in each arm is adjusted to correspond to a respective predefined current reference value and the capacitor is partially discharged until the voltage supplied by each capacitor exceeds a predefined minimum voltage reference value and falls below a predefined maximum voltage reference value.

[0006] Preferably, the converter is a modular multilevel converter, comprising a plurality of arms and a control unit coupled to the plurality of arms, the control unit being configured to selectively operate in one or more modes, and depending on the mode or modes, the control unit providing control signals to one or more components of the converter, such as switching elements.

[0007] Each of the arms includes a first arm terminal, a second arm terminal, and a number of cells coupled between the first arm terminal and the second arm terminal. Each cell is coupled to the first arm terminal directly or indirectly, for example, through one or more other cells or through one or more other components of the converter. Similarly, each cell is coupled to the second arm terminal directly or indirectly, for example, through one or more other cells or through one or more other components of the converter.

[0008] Each of the cells comprises a first cell terminal, a second cell terminal, a switching element, and a capacitor. Preferably, each of the switching elements is capable of being in a conductive state and a non-conductive state and is configured to be switched between the conductive and non-conductive states. Each of the switching elements comprises a transistor, in particular an insulated gate bipolar transistor (IGBT). Preferably, each of the switching elements comprises an insulated gate bipolar transistor and a diode. For example, each cell comprises two switching elements connected to each other at a first connection point. The first connection point is connected to the second cell terminal. A first switching element of the two switching elements is connected to a first terminal of the capacitor, and a second switching element of the two switching elements is connected to a second terminal of the capacitor at a second connection point. The second connection point is connected to the first cell terminal. More preferably, each cell comprises four switching elements. A first switching element and a second switching element of the four switching elements are connected to each other at a first connection point. The first connection point is connected to the second cell terminal. The first switching element is connected to a first terminal of the capacitor, and the second switching element is connected to a second terminal of the capacitor. Furthermore, a third switching element and a fourth switching element of the four switching elements are connected to each other at a second node. The second node is connected to the first cell terminal. The third switching element is connected to the first terminal of the capacitor, and the fourth switching element is connected to the second terminal of the capacitor. The first switching element and the third switching element are connected to each other at a third node, which is connected to the first terminal of the capacitor. The second switching element and the fourth switching element are connected to each other at a fourth node, which is connected to the second terminal of the capacitor.

[0009] The switching element of each cell is configured to selectively switch the cell between a first state in which the capacitor is connected to the first and second cell terminals and a second state in which the capacitor is bypassed. Preferably, the first state of the cell is defined as a state in which the switching element is arranged between the first and second cell terminals such that at least one of the switching elements is in a non-conductive state and the first and second cell terminals are connected to each other via at least one of the switching elements in the non-conductive state. Further, the first state of the cell is preferably defined as a state in which the switching element is arranged between the capacitor and the first and second cell terminals such that at least one of the switching elements is in a conductive state and the capacitor is connected to the first and second cell terminals via at least one of the switching elements in the conductive state. Preferably, the second state of the cell is defined as a state in which the switching element is arranged between the first and second cell terminals such that at least one of the switching elements is in a conductive state and the first and second cell terminals are connected to each other via at least one of the switching elements in the conductive state. Furthermore, the second state of the cell is preferably defined as a state in which at least one of the switching elements is in a non-conductive state and the switching elements are disposed between the capacitor and the first and second cell terminals such that the capacitor is connected to the first and second cell terminals via at least one of the switching elements in a non-conductive state.

[0010] The cells are connected in series between the first arm terminal and the second arm terminal such that a first cell terminal of a first cell of the plurality of cells is connected to the first arm terminal and a second cell terminal of a second cell of the plurality of cells is connected to the second arm terminal. The first cell terminal of a first cell of the plurality of cells is connected to the first arm terminal directly or indirectly, for example, via another component of the converter. Furthermore, the second cell terminal of a second cell of the plurality of cells is connected to the second arm terminal directly or indirectly, for example, via another component of the converter.

[0011] The control unit is adapted to selectively operate in a mode in which the control unit provides control signals to the switching elements to repeatedly switch each cell between a first and a second state such that the current in each arm is adjusted to correspond to a predefined current reference value and the capacitor is partially discharged until the voltage provided by each capacitor exceeds a predefined minimum voltage reference value and falls below a predefined maximum voltage reference value. Preferably, the current in each arm corresponds to the predefined current reference value during the time period in which the capacitor is partially discharged until the voltage provided by each capacitor exceeds a predefined minimum voltage reference value and falls below a predefined maximum voltage reference value, until the time period ends.

[0012] Since the current in each arm is adjusted to correspond to the predefined current reference value, the predefined current reference value can be selected so that components of the converter, such as switching elements and capacitors, are not damaged by high currents that may occur if the capacitor is discharged in an uncontrolled manner, for example without defining the predefined current reference value. The predefined current reference value in each arm therefore provides a safe way to partially discharge the capacitor. The predefined current reference value for a particular arm is the same as one or more of the predefined current reference values ​​for the other arms. Alternatively, the predefined current reference value for a particular arm is different from one or more of the predefined current reference values ​​for the other arms. The converter comprises a detection unit or multiple detection units, one or more detection units per arm, which detection units are configured to detect the current in one, multiple or all arms. The control unit is configured to provide control signals to the switching elements in response to the detected current in one, multiple or all arms, so as to adjust the current in each arm to correspond to the predefined current reference value.

[0013] This predefined minimum voltage reference value can be selected such that the voltage provided by each capacitor is sufficient to provide sufficient power to activate the cell in question, in particular the switching of the switching element of that cell. This predefined minimum voltage reference value therefore ensures that each capacitor provides sufficient power to activate the cell of that capacitor. This predefined minimum voltage reference value therefore ensures a reliable approach to partially discharging the capacitors, since sufficient power is available to operate the cells after the capacitors have been partially discharged.

[0014] This predefined maximum voltage reference value can be selected such that after the first discharge step, the voltage provided by each capacitor is low enough to discharge each capacitor at least to a value below the predefined maximum voltage reference value. This predefined maximum voltage reference value therefore ensures that the size of the bleeder resistors connected in a closed loop configuration with the capacitors in the further discharge step described further below can be smaller, for example in terms of electrical resistance and geometric dimensions, in particular compared to the situation without the application of the invention, in which the discharge of the capacitors is carried out only via the bleeder resistors. Furthermore, if bleeder resistors are provided, bleeder resistors with a lower electrical resistance can be used according to the invention. The time constant of the capacitors and of the bleeder resistors can therefore be reduced, which, as mentioned above, shortens the time required to further partially discharge the capacitors during the further discharge step from the voltage value at the end of the step of partially discharging the capacitors to the voltage value at the end of the further discharge step. Thereby, the total time required to discharge all the capacitors can be significantly shortened. The invention therefore provides a way to achieve a discharge method that is efficient in terms of time.

[0015] In summary, the converter provides a safe, reliable, and time-efficient manner of discharging the energy stored in the converter.

[0016] In a preferred embodiment of the converter, each arm includes an inductor, the inductor being connected between a first arm terminal of the arm and the plurality of cells of the arm, and a first cell terminal of a first cell among the plurality of cells of the arm is indirectly connected to the first arm terminal through the inductor, or the inductor being connected between a second arm terminal of the arm and the plurality of cells of the arm, and a second cell terminal of a second cell among the plurality of cells of the arm is indirectly connected to the second arm terminal through the inductor. Each inductor reduces current spikes in the arm, particularly current spikes that occur when switching switching elements. This inductor eliminates the need for an additional discrete current limiter.

[0017] In a preferred embodiment of the converter, the converter further comprises disconnecting switches, each of which is configured to be in a closed state in which the first arm terminal or the second arm terminal is connected to a terminal of the power distribution network, and in an open state in which the first arm terminal or the second arm terminal is disconnected from the terminal of the power distribution network, so that when each of the disconnecting switches is in an open state, the terminal of the power distribution network is not connected to either the first arm terminal or the second arm terminal. These disconnecting switches ensure that the converter can be disconnected from the power distribution network. For example, a disconnecting switch can be provided for each AC (alternating current) terminal of the converter as well as for each DC (direct current) terminal, so that each of these terminals can be disconnected from the power distribution network, and thus the converter can be disconnected from the power distribution network.

[0018] In a preferred embodiment of the converter, the arms reach a first state in which each of the capacitors of the arm is partially discharged such that the voltage provided by each of the capacitors of the arm is above a predefined minimum voltage reference value and below a predefined maximum voltage reference value. The state of the arm in which each of the capacitors of the arm is partially discharged such that the voltage provided by each of the capacitors of the arm is above a predefined minimum voltage reference value and below a predefined maximum voltage reference value can be considered as the first state of the arm. In this preferred embodiment of the converter, the arms reach the first state in sequence, i.e. the arms reach the first state one after the other, in particular not at the same time. If the arms reach the first state in sequence, each arm can reach the first state faster for a given predefined current reference value in each arm.

[0019] In a preferred embodiment of the converter, the arms reach a second state in sequence where the capacitors of the arms start to be partially discharged, and the arms reach both the first and second states in sequence. For example, a first arm reaches a second state where the capacitors of the arms start to be partially discharged, then the first arm reaches a first state where the capacitors of the arms are partially discharged such that the voltage supplied by the capacitors of the arms is above a predefined minimum voltage reference value and below a predefined maximum voltage reference value, then the second arm reaches a second state, then the second arm reaches a first state, then the third arm reaches a second state, then the third arm reaches a first state, and similarly the further arms reach the first and second states. In particular, the invention provides a way to specifically choose different time periods for discharging all the capacitors from the end of the disconnection process until it is safe to perform maintenance operations. Thereby, different time requirements for discharging all the capacitors from the end of the disconnection process until it is safe to perform maintenance operations can be realized.

[0020] In a preferred embodiment of the converter, the cells sequentially reach a third state in which the capacitor of the cell is partially discharged such that the voltage it supplies is above a predefined minimum voltage reference value and below a predefined maximum voltage reference value.

[0021] In a preferred embodiment of the converter, the converter further comprises a bleeder resistor and a resistive switch, and for each cell, at least one of the resistive switches is configured to be in a closed state, with the at least one resistive switch connecting the capacitor of the cell with the at least one bleeder resistor in a closed loop configuration, and the at least one resistive switch is configured to be in an open state, with the capacitor of the cell being separated from the at least one bleeder resistor. The converter comprises, for example, two bleeder resistors and two resistive switches per cell. For each cell, a first resistive switch is connected with a first terminal of the capacitor and with a first bleeder resistor, a second resistive switch is connected with a second terminal of the capacitor and with a second bleeder resistor, and the first bleeder resistor and the second bleeder resistor are connected to each other at a junction. Each of these resistors is configured to be in a closed state. When both resistive switches of a particular cell are in a closed state, the resistive switch of the cell connects the capacitor of the cell with the two bleeder resistors in a closed loop configuration. Furthermore, each of these resistive switches is configured to be in an open state. When one of the resistive switches of a particular cell is in an open state, it in particular disconnects the capacitor from the bleeder resistors so as not to form a closed loop configuration between the capacitor of that cell and the two bleeder resistors. As already considered, for example in terms of electrical resistance and geometrical dimensions, the size of the bleeder resistors can be made smaller according to the invention, in particular compared to the situation in which the discharge of the capacitor is carried out only through the bleeder resistors, without carrying out a partial discharge of the capacitor as described above. Furthermore, since a bleeder resistor with a lower electrical resistance can be used according to the invention, the time constant of the capacitor and the bleeder resistors can be reduced, i.e. the RC time constant of the capacitor and the bleeder resistors, which reduces the time required to further partially discharge the capacitor during the further discharge step from the voltage value at the end of the step of partially discharging the capacitor to the voltage value at the end of the further discharge step. Thereby, the total time required to discharge the entire capacitor from the end of the disconnection step until it is safe to carry out maintenance operations can be significantly reduced.

[0022] In a preferred embodiment of the converter, the control unit is configured to provide control signals to the resistive switches that close the resistive switches after the first state of the arms is reached. As mentioned above, the state of the arms in which the capacitors of the arms are partially discharged such that the voltage provided by the capacitors of the arms is above a predefined minimum voltage reference value and below a predefined maximum voltage reference value can be considered as the first state of the arms. The situation in which the arms have reached the first state can also be considered as the end of a first discharge step, which will be described in more detail below. If control signals are provided to the resistive switches that close the resistive switches after the arms have reached the first state, it is guaranteed that a second discharge step is performed after the end of the first discharge step.

[0023] In a preferred embodiment of the converter, the converter further comprises at least one grounding switch, each of which is configured to be in a closed state in which the grounding switch connects or allows the capacitor of at least one arm to be connected to ground, and in an open state in which the grounding switch separates the capacitor of at least one arm from ground, so that when each of the grounding switches is in a closed state, the capacitor of each arm is connected to or allows the capacitor to be connected to ground. The at least one grounding switch ensures that the capacitors are selectively connectable to ground.

[0024] In a preferred embodiment of the converter, the control unit is configured to provide a control signal to the at least one ground switch for closing the respective ground switch of the at least one ground switch after the respective resistive switch of the resistive switches has been closed. The situation in which the respective resistive switches have been closed can also be considered as the end of a second discharge step, which will be described in more detail below. If a control signal is provided to the at least one ground switch for closing the respective ground switch after the respective resistive switch of the resistive switches has been closed, it is ensured that a third discharge step is performed after the end of the first discharge step.

[0025] In a preferred embodiment of the converter, the multiple arms are connected together such that each arm is connected to at least one of the other arms to form a closed loop configuration with at least one of the other arms, for example, three arms form a single delta configuration where the three arms form a closed loop configuration, or six arms form a double star configuration where groups of four arms form a closed loop configuration.

[0026] In a second aspect of the invention, the problem is also solved by a method having the features of claim 12, which is configured for controlling a converter according to the first aspect of the invention. The method comprises a first discharge step, in which the current in each arm is adjusted to correspond to a corresponding predefined current reference value and each cell is repeatedly switched between a first state and a second state such that the capacitor is partially discharged until the voltage supplied by each capacitor is above a predefined minimum voltage reference value and below a predefined maximum voltage reference value. For example, for a situation in which the converter requires maintenance, the method comprises a disconnection step of opening each disconnection switch such that the terminals of the power grid are not connected to either the first arm terminal or the second arm terminal. Preferably, this disconnection step is performed before the first discharge step. To perform this disconnection step, the control unit supplies the disconnection switches with control signals which switch each disconnection switch to an open state. After this disconnection step, it is necessary to discharge the electrical energy stored in the converter, in particular in the capacitors of the converter, so that maintenance work can be performed safely. Preferably, after the disconnection step is performed, a first discharge step is performed. To perform the first discharge step, the control unit supplies the switching elements with control signals for repeatedly switching each cell between a first state and a second state. The current in each arm is adjusted to correspond to the predefined current reference value, which can be selected so that components of the converter, such as the switching elements and the capacitors, are not damaged by large currents that may occur if the capacitors are discharged in an uncontrolled manner, for example without defining a predefined current reference value. The capacitors are partially discharged until the voltage provided by each capacitor is above a predefined minimum voltage reference value and below a predefined maximum voltage reference value, so that all the capacitors are partially discharged after the first discharge step such that the voltage provided by each capacitor is above a predefined minimum voltage reference value and below a predefined maximum voltage reference value.This predefined minimum voltage reference value can be selected such that after the first discharge step, the voltage provided by each capacitor is sufficient to provide sufficient power to activate the cell in question, in particular the switching element of that cell. This predefined minimum voltage reference value therefore ensures that each capacitor provides sufficient power to activate the cell of that capacitor. This predefined maximum voltage reference value can be selected such that after the first discharge step, the voltage provided by each capacitor is sufficiently low so that it is discharged at least to a value below the predefined maximum voltage reference value. This predefined maximum voltage reference value therefore ensures that the size of the bleeder resistor connected in a closed loop configuration with the capacitor in the second discharge step further described below can be smaller, for example in terms of electrical resistance and geometric dimensions, in particular compared to the situation in which the discharge of the capacitor is carried out only via the bleeder resistor without carrying out the first discharge step of the invention.

[0027] In a preferred embodiment of the method, the method further comprises a second discharge step of closing each of the resistive switches of the resistive switches after each arm has reached the first state. Preferably, this second discharge step is performed after the first discharge step has been performed. To perform this second discharge step, the control unit supplies the resistive switches with a control signal that closes each of the resistive switches. As each resistive switch is closed, the resistive switch of each cell connects the capacitor of the cell in a closed loop configuration with the bleeder resistor of the cell, thereby discharging the capacitor to a value that is below a predefined minimum voltage reference value and equal to a value that is low enough to allow a third discharge step, as further described below, to be performed in a safe manner. By combining the first and second discharge steps, it is possible to make the size of the bleeder resistor smaller, for example in terms of electrical resistance and geometric dimensions, in particular compared to the situation of performing the discharge of the capacitor only through the bleeder resistor without performing the first discharge step according to the invention. Furthermore, according to the invention, a bleeder resistor with a lower electrical resistance can be used, which reduces the time constant of the capacitor and the bleeder resistor, which reduces the time required to further partially discharge the capacitor during the second discharge step from the voltage value at the end of the first discharge step to the voltage value at the end of the second discharge step, thereby significantly reducing the total time required to discharge all the capacitors from the end of the disconnection step until maintenance work can be safely performed.

[0028] A preferred embodiment of the method includes a third discharge step of closing each of the earth switches after each of the resistive switches has been closed. Preferably, this third discharge step is performed after the second discharge step has been performed. In particular, during this third discharge step, each of the resistive switches is still in a closed state, whereby the first and second terminals of each of the capacitors are connected to ground, so that after this third discharge step, maintenance operations can be safely performed.

[0029] The features, technical effects and / or advantages described in connection with the first aspect of the invention also apply in at least an analogous manner to the second aspect of the invention and therefore will not be repeated here accordingly. Even if the steps of the method are described in a certain order, the invention is not limited to that order. Rather, the individual steps of the method can be performed in any meaningful order.

[0030] Further features, advantages and applicability of the invention derive from the following description of the embodiments and / or figures. All the features described and / or shown therein therefore constitute advantageous objects and / or features of the invention, on their own and / or in any combination, irrespective of their combinations in the individual claims or their dependencies. Moreover, in the figures, the same reference numerals represent the same or similar objects. [Brief description of the drawings]

[0031] [Figure 1] FIG. 1 is a schematic diagram of a first embodiment of a converter with multiple arms; [Diagram 2] FIG. 2 is a schematic diagram of a first embodiment of a cell of an arm of the converter shown in FIG. 1 ; [Diagram 3] 2 is a schematic diagram of a second embodiment of a cell of an arm of the converter shown in FIG. 1 ; [Figure 4] Schematic diagram of a second embodiment of the converter. [Diagram 5] Schematic diagram of a third embodiment of the converter. [Figure 6] FIG. 2 is a schematic diagram of a first embodiment of the converter shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0032] FIG. 1 is a schematic diagram of a first embodiment of a converter 1. The converter 1 of the first embodiment can be regarded as a double star converter. The converter 1 includes six arms 3. Each of the arms 3 includes a plurality of cells 5 and an inductor 7. Each arm 3 further includes a first arm terminal 9 and a second arm terminal 11. In each arm 3, the plurality of cells 5 are connected between the first arm terminal 9 and the second arm terminal 11, and the inductor 7 is connected between the first arm terminal 9 and the plurality of cells 5, and the inductor 7 is directly connected to the first arm terminal 9 and one of the cells 5. Another of the cells 5 is directly connected to the second arm terminal 11 and yet another of the cells 5. Each of the arms 3 connects its first arm terminal 9 to one of three AC (alternating current) terminals 13 of the converter 1, and each of the arms 3 connects its second arm terminal 11 to one of two DC (direct current) terminals 15 of the converter 1. These arms 3 form three arm pairs, each of which consists of a first arm 3 and a second arm 3, and the first arm 3 and the second arm 3 are connected to the same AC terminal 13 and to different DC terminals 15. Furthermore, each arm pair is connected to a different AC terminal 13.

[0033] FIG. 2 shows a schematic diagram of a first embodiment of a cell 5 of an arm 3 of a converter 1 shown in FIG. 1. The cell 5 of this first embodiment can be considered as a half-bridge type cell. When the converter 1 of the first embodiment shown in FIG. 1 includes the cell 5 of this first embodiment, the converter 1 can be considered as a double star half-bridge type converter. The cell 5 includes a first cell terminal 17, a second cell terminal 19, two switching elements 21, a capacitor 23 and a bypass unit 27. Each of these switching elements 21 is composed of an insulated gate bipolar transistor (IGBT) 29 and a diode 31. Each of the cells 5 shown in FIG. 1 can be configured similarly to the cell 5 shown in FIG. 2. The cells 5 are connected in series between a first arm terminal 9 and a second arm terminal 11 such that a first cell terminal 17 of a first cell 5 of the plurality of cells 5 is connected to the first arm terminal 9 and a second cell terminal 19 of a second cell 5 of the plurality of cells 5 is connected to the second arm terminal 11. In the embodiment shown in FIG. 1, the inductor 7 of each arm 3 is directly connected to the first arm terminal 9 of that arm 3, and the inductor 7 of that arm 3 is directly connected to the first cell terminal 17 of the first cell 5. In this configuration, the first cell terminal 17 of the first cell 5 can be considered to be indirectly connected to the first arm terminal 9 via the inductor 7. The second cell terminal 19 of the first cell 5 is directly connected to the first cell terminal 17 of another cell 5, and the second cell terminal 19 of that other cell 5 is connected to the first cell terminal 17 of yet another cell 5. The cells 5 of each arm 3 are thus directly connected in series with one another, with the first cell 5 being arranged at the first end of the series connection and the second cell 5 being arranged at the second end of the series connection, with a certain number of cells 5 being connected in series between the first cell 5 and the second cell 5 in the manner just described. The second cell terminal 19 of the second cell 5 counting from the second end of this series connection is directly connected to the first cell terminal 17 of the second cell 5, and the second cell terminal 19 of the second cell 5 is directly connected to the second arm terminal 11.

[0034] The two switching elements 21 of the cell 5 are connected to each other at a first connection point. This first connection point is connected to the second cell terminal 19. A first switching element 21 of the two switching elements 21 is connected to a first terminal of the capacitor 23 and a second switching element 21 of the two switching elements 21 is connected to a second terminal of the capacitor 23 at a second connection point. This second connection point is connected to the first cell terminal 17. The bypass unit 27 is connected to the first and second cell terminals 17, 19.

[0035] These switching elements 21 are configured to connect the capacitor 23 to the first cell terminal 17 and the second cell terminal 19 and to bypass the capacitor 23. Thus, these switching elements 21 are configured to selectively switch the cell 5 in question between a first state in which the capacitor 23 is connected to the first and second cell terminals 17, 19 and a second state in which the capacitor 23 is bypassed. In particular, in the first state, the voltage provided by the capacitor can be provided as cell output voltage by the first terminal 17 and the second terminal 19. This bypass unit 27 is configured to bypass the two switching elements 21 and the capacitor 23 in a short-circuit state and not bypass the two switching elements 21 and the capacitor 23 in an open-circuit state.

[0036] FIG. 3 is a schematic diagram of a second embodiment of a cell 5 of an arm 3 of a converter 1 shown in FIG. 1. The cell 5 of this second embodiment can be considered as a full-bridge type cell. When the converter 1 of the first embodiment shown in FIG. 1 includes the cell 5 of this second embodiment, the converter 1 can be considered as a double-star full-bridge type converter. The cell 5 includes a first cell terminal 17, a second cell terminal 19, four switching elements 21, a capacitor 23, and a bypass unit 27. Each of these switching elements 21 is composed of an insulated gate bipolar transistor (IGBT) 29 and a diode 31. Each of the cells 5 shown in FIG. 1 can be configured similarly to the cell 5 shown in FIG. 3. The cells 5 are connected in series between the first arm terminal 9 and the second arm terminal 11 such that the first cell terminal 17 of a first cell 5 of the plurality of cells 5 is connected to the first arm terminal 9, and the second cell terminal 19 of a second cell 5 of the plurality of cells 5 is connected to the second arm terminal 11. In the embodiment shown in FIG. 1, the inductor 7 of each arm 3 is directly connected to the first arm terminal 9 of that arm 3, and the inductor 7 of that arm 3 is directly connected to the first cell terminal 17 of the first cell 5. In this configuration, the first cell terminal 17 of the first cell 5 can be considered to be indirectly connected to the first arm terminal 9 via the inductor 7. The second cell terminal 19 of the first cell 5 is directly connected to the first cell terminal 17 of another cell 5, and the second cell terminal 19 of that other cell 5 is connected to the first cell terminal 17 of yet another cell 5. The cells 5 of each arm 3 are thus directly connected in series with one another, with the first cell 5 being arranged at the first end of the series connection and the second cell 5 being arranged at the second end of the series connection, with a certain number of cells 5 being connected in series between the first cell 5 and the second cell 5 in the manner just described. The second cell terminal 19 of the second cell 5 counting from the second end of this series connection is directly connected to the first cell terminal 17 of the second cell 5, and the second cell terminal 19 of the second cell 5 is directly connected to the second arm terminal 11.

[0037] The first switching element 21 and the second switching element 21 are connected to each other at a first connection point. This first connection point is connected to the second cell terminal 19. The first switching element 21 is connected to a first terminal of the capacitor 23, and the second switching element 21 is connected to a second terminal of the capacitor 23. The third switching element 21 and the fourth switching element 21 are connected to each other at a second connection point. This second connection point is connected to the first cell terminal 17. The third switching element 21 is connected to a first terminal of the capacitor 23, and the fourth switching element 21 is connected to a second terminal of the capacitor 23. The first switching element 21 and the third switching element 21 are connected to each other at a third connection point connected to the first terminal of the capacitor 23. The second switching element 21 and the fourth switching element 21 are connected to each other at a fourth connection point connected to the second terminal of the capacitor 23. The bypass unit 27 is connected to the first and second cell terminals 17 , 19 .

[0038] These switching elements 21 are configured to connect the capacitor 23 to the first cell terminal 17 and the second cell terminal 19 and to bypass the capacitor 23. Thus, these switching elements 21 are configured to selectively switch the cell 5 in question between a first state in which the capacitor 23 is connected to the first and second cell terminals 17, 19 and a second state in which the capacitor 23 is bypassed. In particular, in the first state, the voltage provided by the capacitor can be provided as cell output voltage by the first terminal 17 and the second terminal 19. In particular, this first state can be composed of a first sub-state and a second sub-state, in both the first sub-state and the second sub-state the capacitor 23 is connected to the first and second cell terminals 17, 19. However, in the first sub-state, the capacitor 23 is connected to the first cell terminal 17 and the second cell terminal 19 such that the voltage Vc provided by the capacitor 23 is provided as the cell output voltage Vo (Vo=Vc), and in the second sub-state, the capacitor 23 is connected to the first cell terminal 17 and the second cell terminal 19 such that the voltage Vc provided by the capacitor 23 is provided as the cell output voltage Vo (Vo=-Vc). Thus, the cell 5 of the second embodiment can provide cell output voltages of alternating polarity. The bypass unit 27 is configured to bypass the four switching elements 21 and the capacitor 23 in a short-circuit state and not bypass the two switching elements 21 and the capacitor 23 in an open-circuit state.

[0039] FIG. 4 is a schematic diagram of a second embodiment of the converter 1. The converter 1 of the second embodiment can be regarded as a single star converter. The converter 1 includes three arms 3. Each of the arms 3 includes a plurality of cells 5 and an inductor 7. Each arm 3 further includes a first arm terminal 9 and a second arm terminal 11. In each arm 3, the cells 5 are connected between the first arm terminal 9 and the second arm terminal 11, and the inductor 7 is connected between the first arm terminal 9 and the cells 5. The inductor 7 is directly connected to the first arm terminal 9 and one of the cells 5, and another of the cells 5 is directly connected to the second arm terminal 11 and yet another of the cells 5. The first arm terminal 9 of each arm 3 is connected to one of three AC (alternating current) terminals 13 of the converter 1, and the second arm terminal 11 of each arm 3 is connected to the second arm terminal 11 of another arm 3. Each cell 5 of each arm 3 of the converter 1 of the second embodiment is constructed according to the first embodiment of the cell 5 shown in Fig. 2 or, alternatively, each cell 5 of each arm 3 of the converter 1 of the second embodiment is constructed according to the second embodiment of the cell 5 shown in Fig. 3. If each cell 5 of each arm 3 of the converter 1 of the second embodiment is constructed according to the first embodiment of the cell 5 shown in Fig. 2, the converter 1 is considered as a single star half-bridge converter. If each cell 5 of each arm 3 of the converter 1 of the second embodiment is constructed according to the second embodiment of the cell 5 shown in Fig. 3, the converter 1 is considered as a single star full-bridge converter.

[0040] FIG. 5 is a schematic diagram of a third embodiment of the converter 1. The converter 1 of the third embodiment is regarded as a single delta converter. The converter 1 includes three arms 3. Each arm 3 includes a plurality of cells 5 and an inductor 7. Each arm 3 further includes a first arm terminal 9 and a second arm terminal 11. In each arm 3, the plurality of cells 5 are connected between the first arm terminal 9 and the second arm terminal 11, and the inductor 7 is connected between the first arm terminal 9 and the plurality of cells 5, and the inductor 7 is directly connected to the first arm terminal 9 and one of the cells 5, and another one of the cells 5 is directly connected to the second arm terminal 11 and yet another one of the cells 5. The first arm terminal 9 of each arm 3 is connected to one of the three AC (alternating current) terminals 13 of the converter 1 and the second arm terminal 11 of one of the other two arms 3. Each cell 5 of each arm 3 of the converter 1 of the third embodiment is constructed according to the first embodiment of the cell 5 shown in Fig. 2 or, alternatively, each cell 5 of each arm 3 of the converter 1 of the third embodiment is constructed according to the second embodiment of the cell 5 shown in Fig. 3. If each cell 5 of each arm 3 of the converter 1 of the second embodiment is constructed according to the first embodiment of the cell 5 shown in Fig. 2, the converter 1 is considered to be a single delta half-bridge converter. If each cell 5 of each arm 3 of the converter 1 of the second embodiment is constructed according to the second embodiment of the cell 5 shown in Fig. 3, the converter 1 is considered to be a single delta full-bridge converter.

[0041] Further, FIG. 6 shows a schematic diagram of a first embodiment of the converter 1 shown in FIG. 1. Each cell 5 of the converter 1 shown in FIG. 6 is configured as the cell 5 of the first embodiment shown in FIG. 2. As shown in FIG. 6, the converter 1 further includes a bleeder resistor 33 and a resistive switch 35. The converter 1 disclosed in FIG. 6 includes two bleeder resistors 33 and two resistive switches 35 for each cell 5. For each cell 5, a first resistive switch 35 is connected to a first terminal of the capacitor 23 and the first bleeder resistor 33, and a second resistive switch 35 is connected to a second terminal of the capacitor 23 and the second bleeder resistor 33, and the first bleeder resistor 33 and the second bleeder resistor 33 are connected to each other at one connection point. Each resistive switch 35 is configured to be in a closed state. When both resistive switches 35 of a particular cell 5 are in a closed state, the resistive switches 35 of that cell 5 connect the capacitor 23 of that cell 5 to the two bleeder resistors 33 in a closed loop configuration. Furthermore, each resistive switch 35 is configured to be in an open state. When one of the resistive switches 35 of a particular cell 5 is in an open state, that resistive switch 35 specifically disconnects the capacitor 23 from the bleeder resistors 33 such that a closed loop configuration is not formed between the capacitor 23 of that cell 5 and the two bleeder resistors 33.

[0042] Further, the converter 1 shown in FIG. 6 includes a ground switch 37. The ground switch 37 is connected to each connection point between the two bleeder resistors 33 of each cell 5 and the ground. The ground switch 37 is configured to be in a closed state in which the ground switch 37 connects each connection point between the two bleeder resistors 33 of each cell 5 to the ground. Furthermore, the ground switch 37 is configured to be in an open state in which the ground switch 37 disconnects each connection point between the two bleeder resistors 33 of each cell 5 from the ground. When one of the resistance switches 35 of a specific cell 5 is in a closed state and the ground switch 37 is in a closed state, the ground switch 37 connects the capacitor 23 of the specific cell 5 to the ground. Similarly, when the other resistance switch 35 of the specific cell 5 is in a closed state and the ground switch 37 is in a closed state, the ground switch 37 also connects the capacitor 23 of the specific cell 5 to the ground. Similarly, when both resistive switches 35 of that particular cell 5 are closed and the ground switch 37 is closed, the ground switch 37 also connects the capacitor 23 of that particular cell 5 to ground. Similarly, the ground switch 37 can connect each capacitor 23 to ground or can connect each capacitor 23 to ground by closing one, more than one or all of the resistive switches 35. Thus, the ground switch 37 is configured to be in a closed state in which the ground switch 37 connects the capacitor 23 to ground or can connect the capacitor 23 to ground, and in an open state in which the ground switch 37 disconnects the capacitor 23 from ground, so that when the ground switch 37 is closed, each capacitor 23 is connected to ground or can be connected to ground.

[0043] The second embodiment of the converter 1 shown in Fig. 4 and the third embodiment of the converter 1 shown in Fig. 5 each include a bleeder resistor 33, a resistive switch 35 and a ground switch 37 in the same manner as described in relation to the first embodiment of the converter 1 disclosed in Fig. 6. The features, technical effects and / or advantages described in relation to the bleeder resistor 33, the resistive switch 35 and the ground switch 37 of the converter 1 of the first embodiment disclosed in Fig. 6 also apply to the converter 1 of the second embodiment shown in Fig. 4 and the converter 1 of the third embodiment shown in Fig. 5, and therefore the corresponding repetitions thereof will not be repeated here.

[0044] Each converter 1 further comprises a disconnect switch, which is configured to be in a closed state in which it connects the respective first arm terminal 9 or the respective second arm terminal 11 with a terminal of the power grid, and in an open state in which it disconnects the respective first arm terminal 9 or the respective second arm terminal 11 from the terminal of the power grid, so that when each of these disconnect switches is in an open state, the terminal of the power grid is not connected to either the first arm terminal 9 or the second arm terminal 11. For each converter 1, one disconnect switch is provided for each AC (AC) terminal 13 and for each DC (DC) terminal 15, so that each terminal 13, 15 can be disconnected from the power grid, and thus the converter 1 can be disconnected from the power grid.

[0045] Each embodiment of the converter 1 also comprises a control unit, not shown in the drawings. The control unit is in particular coupled to the arms 3 such that it can provide control signals to the switching elements 21, the resistive switches 35, the earth switches 37 and the disconnect switches. The control unit is adapted to selectively operate in a mode in which it provides a control signal to the switching elements 21 for switching each cell 5 between a first and a second state, i.e. from the first state to the second state and from the second state to the first state repeatedly. Similarly, the control unit is adapted to selectively operate in a mode in which it provides a control signal to the resistive switches 35 for switching each resistive switch 35 between a closed state and an open state, i.e. from the closed state to the open state and from the open state to the closed state. Furthermore, the control unit is adapted to selectively operate in a mode in which it provides a control signal to the earth switch 37 for switching the earth switch 37 between a closed state and an open state, i.e. from the closed state to the open state and from the open state to the closed state. Further, the control unit is configured to selectively operate in a mode in which the control unit provides control signals to the disconnect switches to switch the disconnect switches between a closed state and an open state, i.e., from a closed state to an open state and from an open state to a closed state. Preferably, in each embodiment of the converter 1, the converter 1 is a modular multi-level converter and is configured as described above.

[0046] In addition to the converter 1, the present invention also relates to a method for controlling the converter 1. The converter 1 according to the present invention is therefore configured to carry out the steps of the method as described below. The features, technical effects and / or advantages described in connection with the converter 1 also apply in at least an analogous manner to the method and vice versa, so that a corresponding repetition is not made here. If the steps of the method are described in a certain order, the present invention is not limited to this order. Rather, the individual steps of the method can be carried out in any meaningful order.

[0047] For example, for a situation in which the converter 1 requires maintenance, the method comprises a disconnection step in which the respective disconnection switches are in an open state, so that the terminals of the power distribution network are not connected to either the first arm terminal 9 or the second arm terminal 11. To carry out this disconnection step, the control unit supplies the respective disconnection switches with control signals for switching them to an open state. After this disconnection step, it is necessary to discharge the electrical energy stored in the converter 1, in particular in the capacitors 23 of the converter 1, so that maintenance operations can be carried out safely.

[0048] After this disconnection step has been performed, a first discharge step is performed, in which the current in each arm 3 is adjusted to correspond to the predefined current reference value and each cell 5 is repeatedly switched between a first state and a second state such that the voltage provided by each capacitor 23 is above a predefined minimum voltage reference value and the capacitor 23 is partially discharged until it falls below a predefined maximum voltage reference value. To perform this first discharge step, the control unit supplies the switching element 21 with a control signal for repeatedly switching each cell 5 between the first state and the second state. Since the current in each arm 3 is adjusted to correspond to the predefined current reference value, this predefined current reference value can be selected so that components of the converter 1, such as the switching element 21 and the capacitor 23, are not damaged by high currents that would occur if the capacitor 23 were discharged in an uncontrollable manner, for example without defining a predefined current reference value. The capacitors 23 are partially discharged until the voltage provided by each capacitor 23 is above a predefined minimum voltage reference value and below a predefined maximum voltage reference value, so that after the first discharge step, all capacitors 23 are partially discharged such that the voltage provided by each capacitor 23 is above a predefined minimum voltage reference value and below a predefined maximum voltage reference value. This predefined minimum voltage reference value can be selected such that after the first discharge step, the voltage provided by each capacitor 23 is sufficient to provide sufficient power to activate the cell 5 in question, in particular the switching element 21 of that cell 5. This predefined minimum voltage reference value therefore ensures that each capacitor 23 provides sufficient power to activate the cell 5 of that capacitor 23. This predefined maximum voltage reference value can be selected such that after the first discharge step, the voltage provided by each capacitor 23 is sufficiently low such that it is discharged at least to a value below the predefined maximum voltage reference value.This predefined maximum voltage reference value therefore ensures that the size of the bleeder resistor 33, which is connected in a closed loop configuration with the capacitor 23 in the second discharge step further described below, can be made smaller, for example in terms of its electrical resistance and geometric dimensions, in particular compared to the situation in which the discharge of the capacitor 23 is carried out only via the bleeder resistor, without carrying out the first discharge step according to the invention.

[0049] After the first discharge step has been performed, a second discharge step is performed, in which each of these resistive switches 35 is in a closed state. To perform this second discharge step, the control unit supplies the resistive switches 35 with a control signal that causes each of these resistive switches 35 to be in a closed state. As each of these resistive switches 35 is in a closed state, the resistive switch 35 of each cell 5 connects the capacitor 23 of that cell 5 in a closed loop configuration with the bleeder resistor 33 of that cell 5, thereby discharging the capacitor 23 to a value that is below a predefined minimum voltage reference value and equal to a value that is low enough to allow a third discharge step, as further described below, to be performed in a safe manner. By combining these first and second discharge steps, as already mentioned, it is possible to make the size of the bleeder resistor 33 smaller, for example in terms of electrical resistance value and geometric dimensions, in particular compared to the situation in which the discharge of the capacitor 23 is performed only through the bleeder resistor, without performing the first discharge step according to the invention. Furthermore, according to the present invention, a bleeder resistor 33 with a lower electrical resistance can be used, thereby reducing the time constant of the capacitor 23 and the bleeder resistor 33, which reduces the time required to further partially discharge the capacitor 23 during the second discharge step from the voltage value at the end of the first discharge step to the voltage value at the end of the second discharge step, thereby significantly reducing the total time required to discharge all the capacitors 23 from the end of the disconnection step until it is safe to perform maintenance operations.

[0050] After the second discharge step is performed, a third discharge step is performed in which each ground switch 37 is in a closed state. In particular, each resistive switch 35 is still in a closed state during the third discharge step, so that the first and second terminals of each capacitor 23 are connected to ground, so that maintenance work can be safely performed after the third discharge step.

[0051] As already mentioned, these capacitors 23 are partially discharged in a first discharge step until the voltage provided by each capacitor 23 exceeds a predefined minimum voltage reference value and falls below a predefined maximum voltage reference value. The capacitors 23 of the present converter 1 can be partially discharged according to different time schedules.

[0052] For example, these capacitors 23 are partially discharged during a first discharge step according to a first time schedule, which is considered a per-arm time schedule.

[0053] In this first time schedule, during a first step, each capacitor 23 of a first arm 3 starts to be partially discharged and reaches a partially discharged state, i.e. a state in which the voltage of the capacitor 23 is above a predefined minimum voltage reference value and below a predefined maximum voltage reference value. During this first step, the switching element 21 of the other arm 3 is switched such that the cell 5 of the other arm 3 is in a second state in which the capacitor 23 of that arm 3 is bypassed. Thereby, during a first step of the first time schedule, the capacitor 23 of the first arm 3 is partially discharged before the capacitor 23 of the other arm 3 starts to be partially discharged. During the first step, the capacitors 23 of the arm 3 start to be partially discharged simultaneously and reach a partially discharged state simultaneously, start to be partially discharged sequentially and reach a partially discharged state sequentially, start to be partially discharged simultaneously and reach a partially discharged state sequentially, or start to be partially discharged sequentially and reach a partially discharged state simultaneously. Furthermore, the capacitors 23 of a given arm 3 are divided into groups of capacitors 23, with each group consisting of two or more capacitors 23. During the first step, the group of a given arm 3 starts to be partially discharged simultaneously and reach a partially discharged state simultaneously, or starts to be partially discharged sequentially and reach a partially discharged state sequentially, or starts to be partially discharged simultaneously and reach a partially discharged state sequentially, or starts to be partially discharged sequentially and reach a partially discharged state simultaneously.

[0054] In this first time schedule, during the second step, each capacitor 23 of the second arm 3 starts to be partially discharged and reaches a partially discharged state, i.e. a state in which the voltage of the capacitor 23 is above a predefined minimum voltage reference value and below a predefined maximum voltage reference value. During the second step, the switching element 21 of the other arm 3 is switched such that the cell 5 of the other arm 3 is in a second state in which the capacitor 23 of that arm 3 is bypassed. Thereby, during the second step of the first time schedule, after the capacitor 23 of the first arm 3 is partially discharged, the capacitor 23 of the second arm 3 is partially discharged before the capacitors 23 of the other arm 3 or arms 3 start to be partially discharged. Similarly, during the second step, the capacitors 23 of the arm 3 start to be partially discharged simultaneously and reach a partially discharged state simultaneously, start to be partially discharged sequentially and reach a partially discharged state sequentially, start to be partially discharged simultaneously and reach a partially discharged state sequentially, or start to be partially discharged sequentially and reach a partially discharged state simultaneously. Furthermore, the capacitors 23 of a given arm 3 are divided into groups of capacitors 23, with each group consisting of two or more capacitors 23. During the second step, the group of a given arm 3 starts to be partially discharged simultaneously and reach a partially discharged state simultaneously, or starts to be partially discharged sequentially and reach a partially discharged state sequentially, or starts to be partially discharged simultaneously and reach a partially discharged state sequentially, or starts to be partially discharged sequentially and reach a partially discharged state simultaneously.

[0055] Similarly, the capacitors 23 of the third arm 3 and possibly also the capacitors 23 of the further arm 3 are partially discharged, so that the arms 3 reach a state in which the capacitors 23 of the arm 3 are partially discharged at the end of the first discharge step sequentially, i.e. one after the other. The state of the arm 3 in which the capacitors 23 of the arm 3 are partially discharged, such that the voltage supplied by the capacitors 23 of the arm 3 is above a predetermined minimum voltage reference value and below a predetermined maximum voltage reference value, can be considered as a first state of the arm 3. Furthermore, the state of the arm 3 in which the capacitors 23 of the arm 3 start to be partially discharged can be considered as a second state of the arm 3. When the capacitor 23 is partially discharged during the first discharge step according to the first time schedule, the arm 3 reaches both the first state and the second state in sequence, i.e., the first arm 3 reaches the second state where each capacitor 23 of the arm 3 begins to be partially discharged, then the first arm 3 reaches the first state where each capacitor 23 of the arm 3 is partially discharged such that the voltage supplied by each capacitor 23 of the arm 3 exceeds a predefined minimum voltage reference value and falls below a predefined maximum voltage reference value, then the second arm 3 reaches the second state, then the second arm 3 reaches the first state, then the third arm 3 reaches the second state, then the third arm 3 reaches the first state, and similarly, another arm 3 reaches the first and second states.

[0056] Furthermore, these capacitors 23 are for example partially discharged during the first discharge step according to a second time schedule, which can be considered as a cell-by-cell time schedule. For this second time schedule, the capacitors 23 of the arms 3 are divided into groups of capacitors 23, each group being made up of one or more capacitors 23 of each arm 3. Thus, each group is made up of at least one capacitor 23 of each arm 3.

[0057] In the second time schedule, during a first step, each capacitor 23 of the first group starts to be partially discharged and reaches a partially discharged state, i.e. a state in which the voltage of the capacitor 23 is above a predefined minimum voltage reference value and below a predefined maximum voltage reference value. During the first step, the switching elements 21 of the cells 5 of the other capacitors 23 are switched to a second state in which the capacitors 23 of those cells 5 are bypassed, so that during the first step of the second time schedule, the capacitors 23 of the first group are partially discharged before the capacitors 23 of the other group start to be partially discharged. During the first step, the capacitors 23 of the first group start to be partially discharged simultaneously and reach a partially discharged state simultaneously, start to be partially discharged sequentially and reach a partially discharged state sequentially, start to be partially discharged simultaneously and reach a partially discharged state sequentially, or start to be partially discharged sequentially and reach a partially discharged state simultaneously.

[0058] In the second time schedule, during a second step, each capacitor 23 of the second group starts to be partially discharged and reaches a partially discharged state, i.e. a state in which the voltage of that capacitor 23 is above a predefined minimum voltage reference value and below a predefined maximum voltage reference value. During the second step, the switching elements 21 of the cells 5 of the other capacitors 23 are switched to a second state in which the capacitors 23 of those cells 5 are bypassed. Thereby, during a second step of the second time schedule, the capacitors 23 of the second group are partially discharged after the capacitors 23 of the first group are partially discharged and before the capacitors 23 of the other group or groups start to be partially discharged. Similarly, during the second step, the capacitors 23 of the second group start to be partially discharged simultaneously and reach a partially discharged state simultaneously, start to be partially discharged sequentially and reach a partially discharged state sequentially, start to be partially discharged simultaneously and reach a partially discharged state sequentially, or start to be partially discharged sequentially and reach a partially discharged state simultaneously.

[0059] As mentioned above, during a first step of the second time schedule, the capacitors 23 of a first group are partially discharged before the capacitors 23 of another group start to be partially discharged, and after the capacitors 23 of the first group are partially discharged, the capacitors 23 of a second group are partially discharged before the capacitors 23 of another group or groups start to be partially discharged. Similarly, if multiple further groups are provided, the groups will sequentially reach a state in which the capacitors 23 of each group are partially discharged, with the capacitors 23 of each group starting to be partially discharged only after the capacitors 23 of the previous group have been partially discharged. In this case, the second time schedule can be considered as a non-overlapping time schedule for each cell.

[0060] Alternatively, it may be the case that during a first step of the second time schedule, the capacitors 23 of the first group are partially discharged until the voltage supplied by each of the capacitors 23 of the first group corresponds to a predefined voltage reference value that is greater than a predefined maximum voltage reference value, and the capacitors 23 of the second group begin to be partially discharged when the voltage supplied by each of the capacitors 23 of the first group corresponds to the predefined voltage reference value. Similarly, the capacitors 23 of the second group are partially discharged until the voltage supplied by each of the capacitors 23 of the second group corresponds to a predefined voltage reference value that is greater than a predefined maximum voltage reference value, and the capacitors 23 of the third group begin to be partially discharged when the voltage supplied by each of the capacitors 23 of the second group corresponds to the predefined voltage reference value. Similarly, the capacitors 23 of the further groups begin to be partially discharged in sequence before the capacitors 23 of the previous groups reach a partially discharged state. In this case, the second time schedule may be considered as an overlapping time schedule for each cell.

[0061] In particular, with regard to different time schedules during the first discharge step in combination with the first, second and third discharge steps, the present invention provides a way to specifically select different time periods for discharging all the capacitors 23 from the end of the disconnection step until the maintenance work can be safely performed, thereby realizing different time requirements for discharging all the capacitors 23 from the end of the disconnection step until the maintenance work can be safely performed.

[0062] It is further pointed out that the word "comprising" does not exclude other elements and the word "a" does not exclude a plurality. It is also pointed out that a feature described with reference to one of the above embodiments may also be disclosed in combination with another feature of another embodiment described above. The reference signs in the claims do not limit the invention. [Explanation of symbols]

[0063] 1 Converter 3 Arm 5 Cell 7 Inductors 9 First arm terminal 11 Second arm terminal 13 AC (alternating current) terminal 15 DC (direct current) terminal 17 First cell terminal 19 Second cell terminal 21 Switching element 23 Capacitor 27 Bypass unit 29 Insulated Gate Bipolar Transistor (IGBT) 31 Diode 33 Bleeder resistor 35 Resistance Switch 37 Earth Switch

Claims

1. A converter (1) comprising a plurality of arms (3) and a control unit connected to the plurality of arms (3), Each of these arms (3) a first arm terminal (9); a second arm terminal (11); a plurality of cells (5) connected between the first arm terminal (9) and the second arm terminal (11); Equipped with Each of these cells (5) comprises a first cell terminal (17), a second cell terminal (19), a switching element (21), and a capacitor (23), and the switching element (21) of each cell (5) is configured to selectively switch the cell (5) between a first state in which the capacitor (23) is connected to the first and second cell terminals (17, 19) and a second state in which the capacitor (23) is bypassed; The cells (5) are connected in series between the first arm terminal (9) and the second arm terminal (11) such that a first cell terminal (17) of a first cell (5) among the plurality of cells (5) is connected to the first arm terminal (9) and a second cell terminal (19) of a second cell (5) among the plurality of cells (5) is connected to the second arm terminal (11); The control unit is configured to selectively operate in a mode in which it provides a control signal to the switching element (21) to repeatedly switch each cell (5) between a first state and a second state in such a way that the current in each arm (3) is adjusted to correspond to a respective predefined current reference value and the capacitor (23) is partially discharged until the voltage supplied by each capacitor (23) exceeds a predefined minimum voltage reference value and falls below a predefined maximum voltage reference value.

2. A converter (1) according to claim 1, Each of the arms (3) includes an inductor (7), and the inductor (7) is connected between a first arm terminal (9) of the arm (3) and a plurality of cells (5) of the arm (3), and a first cell terminal (17) of a first cell (5) among the plurality of cells (5) of the arm (3) is indirectly connected to the first arm terminal (9) via the inductor (7), or the inductor (7) is connected between a second arm terminal (11) of the arm (3) and a plurality of cells (5) of the arm (3), and a second cell terminal (19) of a second cell (5) among the plurality of cells (5) of the arm (3) is indirectly connected to the second arm terminal (11) via the inductor (7).

3. A converter (1) according to claim 1 or 2, The converter (1) further comprises disconnecting switches, each of which is configured to be in a closed state in which the disconnecting switch connects the first arm terminal (9) or the second arm terminal (11) to a terminal of the power distribution network, and to be in an open state in which the disconnecting switch disconnects the first arm terminal (9) or the second arm terminal (11) from the terminal of the power distribution network, so that when each of the disconnecting switches is in an open state, the terminal of the power distribution network is not connected to either the first arm terminal (9) or the second arm terminal (11).

4. A converter (1) according to claim 1 or 2, The arms (3) sequentially reach a first state in which each capacitor (23) of the arm (3) is partially discharged so that the voltage provided by each capacitor (23) of the arm (3) is above a predefined minimum voltage reference value and below a predefined maximum voltage reference value.

5. A converter (1) according to claim 4, The arms (3) sequentially reach a second state in which each capacitor (23) in the arms (3) begins to be partially discharged, and the arms (3) sequentially reach both the first and second states.

6. A converter (1) according to claim 1 or 2, The cells (5) sequentially reach a third state in which the capacitor (23) of that cell (5) is partially discharged such that the voltage supplied by the capacitor (23) is above a predefined minimum voltage reference value and below a predefined maximum voltage reference value.

7. A converter (1) according to claim 1 or 2, The converter (1) further comprises bleeder resistors (33) and resistive switches (35), and for each cell (5), at least one of the resistive switches (35) is configured such that the at least one resistive switch (35) is in a closed-circuit state connecting the capacitor (23) of that cell (5) to the at least one bleeder resistor (33) in a closed-loop configuration, and the at least one resistive switch (35) is in an open-circuit state disconnecting the capacitor (23) of that cell (5) from the at least one bleeder resistor (33).

8. A converter (1) according to claim 7, The control unit is configured to provide a control signal to the resistive switches (35) to cause each of the resistive switches (35) to be in a closed state after each arm (3) reaches a first state.

9. A converter (1) according to claim 1 or 2, The converter (1) further comprises at least one grounding switch (37), and each grounding switch (37) of the at least one grounding switch (37) is configured to be in a closed state in which the grounding switch (37) connects the capacitor (23) of at least one arm (3) to ground or allows the capacitor (23) of at least one arm (3) to be connected to ground, and is configured to be in an open state in which the capacitor (23) of at least one arm (3) is separated from ground, so that when each grounding switch (37) of these grounding switches (37) is in a closed state, the capacitor (23) of each arm (3) is connected to ground or allows the capacitor (23) to be connected to ground.

10. A converter (1) according to claim 9, The control unit is configured to supply a control signal to the at least one grounding switch (37) to bring each grounding switch (37) of the at least one grounding switch (37) into a closed state after each resistive switch (35) of the resistive switches (35) is brought into a closed state.

11. A converter (1) according to claim 1 or 2, The plurality of arms (3) are connected to one another such that each arm (3) is connected to at least one of the other arms (3) to form a closed loop configuration with at least one of the other arms (3).

12. A method for controlling a converter (1) according to claim 1 or 2, comprising the steps of: a first discharge step in which the current in each of the arms (3) is adjusted to correspond to a predefined current reference value and each of the cells (5) is repeatedly switched between a first state and a second state such that the capacitor (23) is partially discharged until the voltage provided by each capacitor (23) exceeds a predefined minimum voltage reference value and falls below a predefined maximum voltage reference value.

13. 13. The method of claim 12, The method further comprises a second discharging step of closing each of the resistive switches (35) after each arm (3) has reached the first state.

14. 14. The method of claim 13, The method further comprises a third discharge step of closing each ground switch (37) after each resistive switch (35) has been closed.

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