Integrated package device, method for fabricating same, and memory system - Patents.com

Abstract

The present application discloses an integrated package device, a method for fabricating the integrated package device, and a memory system. The integrated package device includes at least one package module, each of which includes a first subpackage module including a plurality of first electronic devices, a second subpackage module including a plurality of second electronic devices, a first redistribution layer connected to the first pads, and a second redistribution layer connected to the second pads.

Description

[Technical field]

[0001] The present application relates to the field of semiconductor technology, and in particular to integrated package devices, methods for fabricating the same, and memory systems. [Background technology]

[0002] With the development of chip technology, various packaging techniques have been proposed, among which the existing packaging techniques using chip stacking include wiring process and TSV process. However, the wiring process may expand the footprint of the entire package due to the presence of bonding fingers, and the TSV process requires matching between the chip design and the chip packaging, which is technically difficult and has a relatively high cost. In recent years, fan-out packages have emerged and are expected to drive the development of chip stack packaging. However, in the known fan-out package structure, there are problems of insufficient assembly efficiency and style, as well as insufficient physical protection for the system structure.

[0003] Implementations of the present application provide integrated packaged devices, methods for fabricating the same, and memory systems that provide efficient thermal conduction and magnetic shielding while improving packaging efficiency and quantity of the fabricated devices. Summary of the Invention [Means for solving the problem]

[0004] In one aspect, an implementation of the present application provides an integrated package device including at least one package module. Each package module can include a first subpackage module including a plurality of first electronic devices and a molding body encapsulating the plurality of first electronic devices, each of the first electronic devices including a first pad on a side thereof. Each package module can include a second subpackage module stacked on a side of the first subpackage module remote from the first pads, including a plurality of second electronic devices and a second molding body encapsulating the plurality of second electronic devices, each of the second electronic devices including a second pad on a side thereof. Each package module can include a first redistribution layer positioned on a side of the first subpackage module remote from the second subpackage module and connected with each of the first pads. Each package module can include a second redistribution layer positioned on a side of the second subpackage module remote from the first subpackage module and connected with each of the second pads.

[0005] Optionally, the package module may further include a through molding via (TMV), the through molding via (TMV) extending through the first molding body portion and the second molding body portion and connecting the first redistribution layer and the second redistribution layer.

[0006] Optionally, the integrated package device may further include a first bonding structure and a second bonding structure positioned over and sandwiched between the first subpackage module and the second subpackage module, respectively, and the first bonding structure and the second bonding structure bond the first subpackage module and the second subpackage module together.

[0007] Optionally, the integrated package device may further include an external connection structure, the external connection structure being positioned on a side of the second redistribution layer away from the second subpackage module and connected to the second redistribution layer.

[0008] Optionally, the external connection structure may include a tin ball array.

[0009] Optionally, the integrated package device may further include a protective layer covering a side of the first redistribution layer away from the first subpackage module.

[0010] Optionally, the integrated package device may further include an adhesive layer between the first subpackage module and the second subpackage module.

[0011] Optionally, the multiple first electronic devices and / or the multiple second electronic devices may be stacked in a staircase-like manner in a direction in which the first subpackage module and the second subpackage module are stacked, and a first pad of each of the first electronic devices and / or a second pad of each of the second electronic devices may not be covered by any other first electronic device and / or any other second electronic device.

[0012] Optionally, the outer connection surface of the first pad and the outer connection surface of the second pad may face the first redistribution layer and the second redistribution layer, respectively, and the first subpackage module and / or the second subpackage module further include a first conductive pillar and / or a second conductive pillar, respectively, which electrically connects the first redistribution layer with a portion of the first pad and / or the second redistribution layer with a portion of the second pad.

[0013] Optionally, the outer connection surface of the first pad may face away from the first redistribution layer, or the outer connection surface of the second pad faces away from the second redistribution layer, and the package module further includes a gold wire, through which the first pad is connected to the first redistribution layer, or the second pad is connected to the second redistribution layer.

[0014] Optionally, the plurality of first electronic devices and the plurality of second electronic devices may each be arranged in at least two columns in a horizontal direction perpendicular to the direction in which the first subpackage module and the second subpackage module are stacked; the TMV is positioned outside one column of electronic devices and away from the other column, and at least one TMV is present.

[0015] Optionally, the plurality of first electronic devices and the plurality of second electronic devices may be respectively arranged in at least two columns in a horizontal direction perpendicular to the direction in which the first subpackage module and the second subpackage module are stacked; the TMV is positioned between the two columns of electronic devices, and at least one TMV is present.

[0016] Optionally, the integrated package device may further include a plurality of package modules, and the plurality of package modules are stacked in a direction in which the first subpackage module and the second subpackage module are stacked. In some implementations, the external connection structure on one of any two adjacent package modules may be connected with the first redistribution layer of the other of the two adjacent package modules. In some implementations, the integrated package device may further include a protection layer covering the first redistribution layer of the outermost package module in the vertical direction.

[0017] Optionally, the package module may further include an external connection structure, the external connection structure being located on a side of the second redistribution layer away from the second electronic device and connected to the second redistribution layer. In some implementations, the integrated package device may further include a plurality of package modules stacked in a direction in which the first subpackage module and the second subpackage module are stacked. In some implementations, the external connection structure on one of any two adjacent package modules may be connected to the first redistribution layer of the other of the two adjacent package modules. In some implementations, the integrated package device may further include a protective layer covering the first redistribution layer of the outermost package module in the vertical direction. In some implementations, the TMVs in the plurality of package modules may or may not be aligned in the vertical direction.

[0018] In another aspect, implementations of the present application also provide a method of fabricating an integrated package device. The method may include providing a first subpackage module and a second subpackage module. In some implementations, the first subpackage module may include a plurality of first electronic devices and a first molding body portion encapsulating the plurality of first electronic devices. In some implementations, each of the first electronic devices may include a first pad on its side. In some implementations, the second subpackage module may be on a side of the first subpackage module away from the first pad. In some implementations, the second subpackage may include a plurality of second electronic devices and a second molding body portion encapsulating the plurality of second electronic devices, each of the second electronic devices including a second pad on its side. The method may include stacking the first subpackage module and the second subpackage module. The method can include forming a first redistribution layer, the first redistribution layer being located on a side of the first subpackage module away from the second subpackage module and connected to the first pad. The method can include forming a second redistribution layer, the second redistribution layer being located on a side of the second subpackage module away from the first subpackage module and connected to the second pad.

[0019] Optionally, forming a second redistribution layer connected to the second pad can further include forming a through molding via (TMV), the through molding via (TMV) extending through the first molding body portion and the second molding body portion and connecting the first redistribution layer and the second redistribution layer. In some implementations, the second redistribution layer can be connected to the TMV.

[0020] Optionally, the method may further include forming an external connection structure, the external connection structure being on a side of the second redistribution layer away from the second subpackage module and connected to the second redistribution layer.

[0021] Optionally, providing the first subpackage module and the second subpackage module may include arranging a plurality of first electronic devices and a plurality of second electronic devices on the first temporary adhesive layer and the second temporary adhesive layer, respectively, such that outer connection surfaces of the first pads of the first electronic devices face one same side and outer connection surfaces of the second pads of the second electronic devices face one same side. Optionally, providing the first and second subpackage modules may include disposing a first carrier and a second carrier on sides of the first and second electronic devices away from the first and second temporary adhesive layers, respectively, the first carrier and the second carrier having a temporary bonding film facing the first and second electronic devices, respectively, and an outer connection surface of the first pad and an outer connection surface of the second pad facing toward or away from the first and second carrier, respectively. Optionally, providing the first and second subpackage modules may include removing the first and second temporary adhesive layers and forming a first and second molding body on the first and second carrier, respectively.

[0022] Optionally, the method may further include disposing a first conductive pillar and a second conductive pillar on a portion of the first pad and a portion of the second pad, respectively, before disposing the first carrier and the second carrier.

[0023] Optionally, the step of stacking the first subpackage module and the second subpackage module may further include disposing an adhesive layer between the first subpackage module and the second subpackage module.

[0024] Optionally, the step of stacking the first subpackage module and the second subpackage module may further include disposing a first bonding structure and a second bonding structure on the first subpackage module and the second subpackage module, respectively.

[0025] Optionally, the method may further include forming a protective layer on a side of the first redistribution layer away from the first subpackage module to cover the first redistribution layer.

[0026] Optionally, the method may further include placing a side of the first subpackage module and a side of the second subpackage module that are away from the first carrier and the second carrier, respectively, close to each other with the first carrier and the second carrier positioned on two outsides of the combination of the first subpackage module and the second subpackage module during the step of stacking the first subpackage module and the second subpackage module. Optionally, the method may further include removing the first carrier and the second carrier before forming the first redistribution layer and the second redistribution layer.

[0027] Optionally, the method may further include providing a plurality of package modules; and stacking the plurality of package modules in a direction in which the first subpackage module and the second subpackage module are stacked. Optionally, the method may further include connecting an external connection structure on one of any two adjacent package modules with a first redistribution layer of the other of the two adjacent package modules.

[0028] Optionally, the step of stacking the multiple package modules in the direction in which the first subpackage module and the second subpackage module are stacked may further include a step of forming a protective layer, the protective layer covering the first redistribution layer of the outermost package module in the vertical direction.

[0029] In yet another aspect, implementations of the present application provide a memory system, the memory system including any one of the integrated package devices described above. In some implementations, at least one of the first electronic devices and / or at least one of the second electronic devices in the integrated package device includes a memory device, and at least any other one of the first electronic devices and / or at least any other one of the second electronic devices includes a controller used to control operation of the memory device.

[0030] Using the integrated package device, the method for fabricating the integrated package device, and the memory system disclosed by the implementations of the present application, not only can a large number of semiconductor dies or electronic devices be accommodated, but also the packaging density can be increased by adopting a vertical stack packaging scheme. On the one hand, the package body can have a system structure with electromagnetic shielding, and the entire package body can have a relatively high percentage of metal. Furthermore, the dies can be arranged continuously and have a thermally conductive adhesive film / bonding film between them, so that the entire structure has beneficial heat dissipation. By utilizing a redistribution layer (RDL) instead of the traditional gold wiring, the overall wiring pitch can be reduced, the signal transmission speed can be increased, the high frequency performance can be improved, substantially complete functions can be realized, and a system in package (SiP) can be realized. Moreover, using the modular packaging solution disclosed by the implementations of the present application, a high stack structure can be realized, the difficulty of processing ultra-thin chips for high-stack packages with high capacity can be reduced, mass production can be promoted, and packages with different capacities can be flexibly processed due to the infinite possibilities of stacking. In this way, market demand can be met and package processing yields can be beneficially improved.

[0031] In order to more clearly illustrate the technical solutions in the implementation or in the prior art, the drawings required in the description of the implementation or the prior art are briefly introduced. Obviously, the drawings in the following description only represent some implementations of the present application, and in light of them, other drawings can be grasped by those skilled in the art without creative work. [Brief description of the drawings]

[0032] [Figure 1a] 1A-1C are cross-sectional structural diagrams of various package modules in an integrated package device provided by an implementation of the present application. [Figure 1b] 1A-1C are cross-sectional structural diagrams of various package modules in an integrated package device provided by an implementation of the present application. [Figure 1c] 1A-1C are cross-sectional structural diagrams of various package modules in an integrated package device provided by an implementation of the present application. [Figure 1d] 1A-1C are cross-sectional structural diagrams of various package modules in an integrated package device provided by an implementation of the present application. [Figure 1e] 1A-1C are cross-sectional structural diagrams of various package modules in an integrated package device provided by an implementation of the present application. [Figure 1f] 1A-1C are cross-sectional structural diagrams of various package modules in an integrated package device provided by an implementation of the present application. [Figure 2a] 1A to 1C are cross-sectional structural diagrams of various combinations of stacked package modules in an integrated package device provided by an implementation of the present application. [Figure 2b] 1A to 1C are cross-sectional structural diagrams of various combinations of stacked package modules in an integrated package device provided by an implementation of the present application. [Figure 2c] 1A to 1C are cross-sectional structural diagrams of various combinations of stacked package modules in an integrated package device provided by an implementation of the present application. [Figure 2d] A cross-sectional structural diagram of various combinations of stacked package modules in an integrated package device provided by an implementation form of the present application, in particular a cross-sectional structural block diagram of the integrated package device as a memory system. [Diagram 3] 1 is a flowchart of a method for fabricating an integrated package device provided in an implementation of the present application. [Figure 4a] 1A to 1C are cross-sectional structural diagrams corresponding to major steps of fabricating a package module in a method of fabricating an integrated package device provided in an implementation form of the present application. [Figure 4b] 1A to 1C are cross-sectional structural diagrams corresponding to major steps of fabricating a package module in a method of fabricating an integrated package device provided in an implementation form of the present application. [Figure 4c] 1A to 1C are cross-sectional structural diagrams corresponding to major steps of fabricating a package module in a method of fabricating an integrated package device provided in an implementation form of the present application. [Figure 4d] 1A to 1C are cross-sectional structural diagrams corresponding to major steps of fabricating a package module in a method of fabricating an integrated package device provided in an implementation form of the present application. [Figure 4e] 1A to 1C are cross-sectional structural diagrams corresponding to major steps of fabricating a package module in a method of fabricating an integrated package device provided in an implementation form of the present application. [Figure 4f] 1A to 1C are cross-sectional structural diagrams corresponding to major steps of fabricating a package module in a method of fabricating an integrated package device provided in an implementation form of the present application. [Figure 4g] 1A to 1C are cross-sectional structural diagrams corresponding to major steps of fabricating a package module in a method of fabricating an integrated package device provided in an implementation form of the present application. [Figure 4h] 1A to 1C are cross-sectional structural diagrams corresponding to major steps of fabricating a package module in a method of fabricating an integrated package device provided in an implementation form of the present application. [Figure 4i] 1A to 1C are cross-sectional structural diagrams corresponding to major steps of fabricating a package module in a method of fabricating an integrated package device provided in an implementation form of the present application. [Figure 4j] 1A to 1C are cross-sectional structural diagrams corresponding to major steps of fabricating a package module in a method of fabricating an integrated package device provided in an implementation form of the present application. [Diagram 5] FIG. 2 is a representative cross-sectional structural diagram of multiple package modules during a stacking step in a method for fabricating an integrated package device in an implementation form of the present application. [Figure 6a] 1 is a cross-sectional structural diagram illustrating the combination of subpackage modules in a method for fabricating an integrated package device in an implementation form of the present application. [Figure 6b] 1 is a cross-sectional structural diagram illustrating the combination of subpackage modules in a method for fabricating an integrated package device in an implementation form of the present application. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0033] Exemplary implementations of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although exemplary implementations of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the specific implementations described herein. Rather, these implementations are provided so that the present disclosure may be more thoroughly understood and the scope of the present disclosure may be fully conveyed to those skilled in the art. Specific details of the structure and function disclosed herein are merely representative and are used for the purpose of describing exemplary implementations of the present application. However, the present application may specifically be implemented in many alternative forms and should not be construed as being limited by the implementations described herein.

[0034] In the description of this application, it is understood that the orientations and positional relationships indicated by terms such as "middle", "lateral", "upper", "lower", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", and "outside" are based on the drawings and are merely for purposes of illustration and simplicity of description. There is no indication or implication that the devices or elements referred to must have any particular orientation and position or must be constructed or operated in any particular orientation and position. As a result, they should not be understood as limitations for this application. Moreover, terms such as "first", "second", etc. are used merely for descriptive purposes and should not be understood to indicate or imply a relative importance or to implicitly specify the number of technical features referenced. Thus, a feature modified by "first" or "second" can explicitly or implicitly include one or more instances of the feature. In the description of this application, "plurality" means two or more unless otherwise specified. Moreover, the terms "include", "comprise" and variations thereof are intended to cover the meaning of "include or comprise non-exclusively".

[0035] Moreover, when devices of the same type are modified by the terms "first" and "second," it is intended only to distinguish between different devices of the same type and to express a relative position, not any sequence or invariance. That is, the terms "first" and "second" are interchangeable, and any one of the devices of the same type that is referred to as a "first" can also be referred to as a "second."

[0036] It should be noted that in the description of this application, the terms "interconnect" and "connect" should be broadly explained. They can include, for example, fixed, removable, or integral connection; mechanical or electrical connection; direct interconnection or interconnection with intermediate medium; or internal communication of two elements, unless otherwise expressly specified or limited. The specific meaning of the above terms in this application will be understood by those skilled in the art depending on the specific situation.

[0037] The terms used herein are for the purpose of describing particular implementations only and are not intended to be limiting. As used herein, singular forms such as "a" and "an" are also intended to include the plural unless the context clearly dictates otherwise. Also, as used herein, the terms "include" and / or "comprise" are understood to specify the presence of the stated features, integers, steps, operations, elements, assemblies, and / or any combination thereof without excluding the presence or addition of one or more other features, integers, steps, operations, elements, assemblies, and / or any combination thereof.

[0038] Fan-out wafer-level packaging (FOWLP) is a new method to integrate multiple dies obtained from heterogeneous fabrication processes into one compact package. Due to the demand for devices with low profile and higher number of inputs / outputs, fan-out wafer-level packaging has attracted more and more attention. With the development of FOWLP, single-chip applications are evolving to multi-chip package (MCP) applications and 3D package-on-package (PoP) applications, etc., achieving higher levels of I / O chip integration.

[0039] FOWLP fully utilizes the RDL for connections and maximizes the interconnect density. Conventional WLP packages are usually in a fan-in configuration and are used for integrated circuits (ICs) with a small number of pins. When the area of ​​the chip decreases, the number of pins that can be accommodated by the chip also decreases, and as a result, FOWLP packages in a spreading configuration are developed to fully utilize the RDL for making connections outside the chip and increase the number of pins. When each die is embedded in epoxy molding compound (EMC), the gaps between the dies each have additional input / output (I / O) connection points, increasing the I / O count, improving silicon utilization, maximizing interconnect density, and achieving high bandwidth transmission of data.

[0040] FOWLP can reduce package cost and package thickness. In contrast to fan-in packaging techniques, FOWLP has the advantages of reduced package thickness, scalability (increased I / O count), improved electrical and thermal performance, and baseplate-less process. Fan-out WLP is similar to traditional ball grid array (BGA) packaging in terms of structure, but does not require expensive substrate processes.

[0041] Based on the demand for versatile miniaturized system products, integrated circuit packages have entered the era of 3D stacking packages. The era of 3D stacking packages is characterized by (1) the evolution from package assembly to package system, (2) the development from single chip application to multi-chip application, and (3) the development from in-plane package (MCM) to 3D package. However, there has been no effective and efficient package design that allows easy operation of 3D packaging and fits various combinations, especially in the design of memory chips and memory systems. Therefore, the present application utilizes chip-size package (CSP) and build-up multi-layer base plate techniques, such as flip connection, connection through via, and package-on-package (PoP) techniques, as well as in combination with ingenious design, to provide an integrated package device that provides convenience and fits various system packages (especially those containing memory). The integrated package device can integrate chips of various functions (including processors, memories, or any other functional chips) into one package to realize substantially complete functions and form a system in package (SiP).

[0042] Hereinafter, an integrated package device, a method for fabricating the same, and a memory system provided by the present application are illustrated in several implementations.

[0043] As shown in Figures 1a to 1f, an integrated package device according to some implementations of the present application is illustrated, and in particular, a package module that can facilitate stack packaging and can facilitate the formation of an integrated package device is illustrated.

[0044] First, an integrated package device according to some implementations of the present application can be basic. As shown in FIG. 1a, the integrated package device illustrated in the implementations of the present application includes at least one package module 100. The package module 100 can mainly include a first subpackage module 110, a second subpackage module 120, a first redistribution layer 130, and a second redistribution layer 140. The first subpackage module 110 can include a plurality of first electronic devices 111 and a first molding body 118 that encapsulates the plurality of first electronic devices. Each of the first electronic devices 111 can include a first pad 112 on its side. The second subpackage module 120 can be stacked on the side of the first subpackage module 110 that is away from the first pad 112. The second subpackage module 120 can include a plurality of second electronic devices 121 and a second molding body 128 that encapsulates the plurality of second electronic devices. Each of the second electronic devices 121 includes a second pad 122 on its side. The first redistribution layer 130 is on a side of the first subpackage module 110 that is away from the second subpackage module 120 and is connected to the first pad 112. The second redistribution layer 140 is on a side of the second subpackage module 120 that is away from the first subpackage module 110 and is connected to the second pad 122.

[0045] In some implementations, the first electronic device 111 and the second electronic device 121 can include any active or passive components and can be collectively referred to as a first or second electronic device, respectively. Common passive components are primarily resistors, inductors, and capacitors, and are characterized by their ability to operate without power in a circuit when a signal is present. Common passive components can be categorized into circuit types and connection types according to their function in the circuit. Thus, the first electronic device 111 and / or the second electronic device 121 can include, for example, a diode, a resistor, a resistor network, a capacitor, an inductor, a transformer, a relay, a key, a beeper, a speaker, a switch, or any other device of a circuit type.

[0046] Active devices are the main devices of an electronic circuit and can be classified into various types of discrete devices and integrated circuits according to their physical structure, circuit function, and engineering parameters. Thus, the first electronic device 111 and / or the second electronic device 121 can include, for example, discrete devices, such as bipolar transistors (BJTs), field effect transistors, thyristors, semiconductor resistors, and capacitors (fabricated by integrated processes and used in integrated circuits), etc. The first electronic device 111 and / or the second electronic device 121 can include analog integrated circuit devices, such as integrated operational amplifiers, comparators, logarithmic and exponential amplifiers, analog multipliers / dividers, analog switches, phase-locked loops (PLLs), voltage regulators, reference sources, waveform generators, power amplifiers, and power management circuits, etc. The first electronic device 111 and / or the second electronic device 121 may include, for example, digital integrated circuit devices, such as basic logic gate circuits, flip-flops, registers, decoders, data comparators, drivers, counters, shaping circuits, PLDs, microprocessors (MPUs), microcontrollers (MCUs), and digital signal processors (DSPs).

[0047] The first electronic devices 111 may be the same as each other or different from each other, and the second electronic devices 121 may be the same as each other. For example, as shown in the implementation of FIG. 1a, the first electronic devices 111 in the first subpackage module 110 may be the same as each other, and the second electronic devices 121 in the second subpackage module 120 may be the same as each other. They may be, but are not limited to, semiconductor chips with storage functions. Depending on the implementation, any type of chips may be chosen for the first electronic devices 111 and the second electronic devices 121.

[0048] As an optional implementation of the combination of the first electronic device 111 and the second electronic device 121, FIG. 1b illustrates another exemplary package module 101 of an integrated package device. The package module 101 can be different from the package module 100 in terms of the type, number, and / or arrangement of the electronic devices. In the implementation illustrated in FIG. 1b, the first subpackage module 110′ also includes a plurality of first electronic devices. However, the plurality of first electronic devices can include the first electronic device 111 and a first electronic device 111′ different from the first electronic device 111. The first electronic device 111 can be, for example, a semiconductor memory chip / die (e.g., DRAM, NAND, NOR, FeRAM, RRAM, or PCRAM, etc.). On the other hand, the first electronic device 111′ can be, for example, a controller or a power management circuit device, etc. Also, the second package module 120′ can include a plurality of second electronic devices. However, the plurality of second electronic devices may include a second electronic device 121 and a second electronic device 121' different from the second electronic device 121. The second electronic device 121 may be, for example, a semiconductor memory chip / die (e.g., NAND, NOR, FeRAM, RRAM, PCRAM, or DRAM, etc.). On the other hand, the second electronic device 121' may be, for example, a passive device (e.g., an inductor or a semiconductor discrete device, etc.). Hereinafter, the first electronic device 111 and the second electronic device 121 may be taken as representatives to facilitate the description, even though the first electronic devices 111 / 111' may be the same or different from each other, and the second electronic devices 121 / 121' may also be similar as illustrated above.

[0049] In some implementations, both the first electronic device 111 and the second electronic device 121 can be electronic devices. Each electronic device can have a substrate and an electronic component on the substrate. The electronic component can include a 2D unit, a 3D memory unit, and / or any other suitable component. As used herein, the term "3D memory unit" can refer to a semiconductor device having memory cell transistor strings (also referred to as "memory strings") that extend in a direction perpendicular to the direction of the chip thickness.

[0050] Also, as shown in FIG. 1a, each of the first electronic devices 111 has at least one first pad 112 on its side, and / or each of the second electronic devices 121 has at least one second pad 122 on its side. The first pad 112 and the second pad 121 each act as components of a signal transmission path between the corresponding electronic device and an external device (e.g., a signal source or a power source, etc.). For ease of illustration, FIG. 1a shows each of the first electronic devices 111 having one first pad 112 and / or each of the second electronic devices 121 having one second pad 122. However, each of the first electronic devices 111 can have multiple first pads 112 and / or each of the second electronic devices 121 can have multiple second pads 122. Each first pad 112 and / or each second pad 122 may include at least one conductive material (such as, for example, but not limited to, a metal and / or a transparent conductive material).

[0051] Still referring to FIG. 1a, the first subpackage module 110 and the second subpackage module 120 may each include two columns of four first electronic devices 111 and second electronic devices 121 (only two first electronic devices are labeled) stacked sequentially in the longitudinal direction of the figure and in the transverse direction perpendicular to the stacking direction of the two columns on the left and right sides. In other words, the multiple first electronic devices 111 and / or multiple second electronic devices 121 are respectively stacked in a staircase configuration in the direction in which the first subpackage module 110 and / or the second subpackage module 120 are stacked. Here, the first pad 112 of each first electronic device 111 and / or the second pad 122 of each second electronic device 121 may not be covered by any other first electronic device 111 and / or any other second electronic device 121. However, the present application is not so limited. For example, when any two first / second electronic devices stacked one on top of the other are bonded and electrically connected through a bonding structure formed using a bonding adhesive layer, the two electronic devices cannot be stacked in a staircase-like manner (e.g., in a staircase configuration) so as not to align their first / second pads. For example, in the implementation shown in FIG. 1b, the first electronic device 111 can be placed in only one tier, and / or the second electronic device 121 can be as well. In this case, it may be unnecessary to take into account the stacking manner and the mutual adhesion design.

[0052] In the implementation of FIG. 1a, the multiple first electronic devices 111 and / or second electronic devices 121 stacked on top of each other may be attached to each other through a die attachment film (DAF) or thermally conductive adhesive film 150. In other words, the multiple first electronic devices 111 and / or second electronic devices 121 may be joined through an adhesive layer and bonded and electrically connected through the bonding adhesive layer described above. The present application is not limited to such a configuration. Instead, in one non-limiting example, the die attachment film / thermally conductive adhesive film 150 may be disposed between the facing stacking surfaces of the first electronic devices 111 and / or second electronic devices 121.

[0053] In some implementations, the first subpackage module 110 and the second subpackage module 120 may be adhered to each other through the DAF 150 or any other adhesive film. The first subpackage module 110 and the second subpackage module 120 may be joined through an adhesive layer, and in some non-limiting examples, may be bonded and electrically connected through the bonding adhesive layer described above. The DAF 150 may be disposed on the facing stacking surfaces of the first subpackage module 110 and the second subpackage module 120, respectively.

[0054] As shown in FIG. 1a, the first subpackage module 110 and / or the second subpackage module 120 may also include a vertical first conductive pillar 113 and / or a second conductive pillar 123, respectively. The vertical first conductive pillar 113 and / or the second conductive pillar 123 may electrically connect the first redistribution layer 130 with a portion of the first pad 112 and / or electrically connect the second redistribution layer 140 with a portion of the second pad 122, respectively. The first conductive pillar 113 and the second conductive pillar 123 may include at least one conductive material (such as, but not limited to, gold, copper, aluminum, silver, and / or any other suitable metal). Due to the use of the vertical conductive pillars, the lateral dimensions of the chip package structure 300 may be further reduced.

[0055] In some implementations, as shown in FIG. 1b, the conductive layer 132 or 142 in the first redistribution layer 130 or the second redistribution layer 140 can also be electrically connected to the first pad 112 or the second pad 122, respectively, through a gold wire 113′.

[0056] That is, the first redistribution layer 130 and the second redistribution layer 140 can be electrically connected to the first pad 112 of the first electronic device 111 and the second pad 122 of the second electronic device 121, respectively, through conductive pillars or gold wires. Also, as shown in FIG. 1a, the first subpackage module 110 and / or the second subpackage module 120 can include a first conductive pillar 113 and / or a second conductive pillar 123, respectively, when the outer connection surface of the first pad 112 and the outer connection surface of the second pad 122 face the first redistribution layer 130 and the second redistribution layer 140, respectively. The first conductive pillar 113 and / or the second conductive pillar 123 can electrically connect the first redistribution layer 130 with a portion of the first pad 112 and / or electrically connect the second redistribution layer 140 with a portion of the second pad 122, respectively.

[0057] 1b, when the outer connection surface of the first pad 112 is disposed away from the first redistribution layer 130 or the outer connection surface of the second pad 122 is disposed away from the second redistribution layer 140, the first subpackage module 110 or the second subpackage module 120 in the package module 101 may include a gold wire. The gold wire may connect the first pad 112 with the first redistribution layer 130 or the second pad 122 with the second redistribution layer 140.

[0058] As shown in FIG. 1a and FIG. 1b, the first subpackage module 110 / 110′ and the second subpackage module 120 / 120′ may include a first molding body 118 and a second molding body 128, respectively. The first molding body 118 and the second molding body 128 may encapsulate the first electronic devices 111 and the second electronic devices 121, respectively, to form a subpackage module, exposing the first pads 112 and the second pads 122, and the first conductive pillars 113 and the second conductive pillars 123 or gold wires 113′, respectively. The first molding body 118 and the second molding body 128 may protect the first electronic devices 111 and the second electronic devices 121, respectively, and reduce their physical / chemical damage (e.g., damage from oxidation and moisture, etc.). First molding body portion 118 and second molding body portion 121 can include, for example, epoxy resin and / or any other suitable molding compound (including epoxy resin, phenolic resin, catalytic agent, or silicon dioxide micropowder, etc.).

[0059] Still referring to Figures 1a and 1b, the first redistribution layer 130 may be on the side of the first subpackage module 110 / 110' away from the second subpackage module 120 / 120' and connected to the first pad 112; the second redistribution layer 140 may be on the side of the second subpackage module 120 / 120' away from the first subpackage module 110 / 110' and connected to the second pad 122.

[0060] The first redistribution layer 130 may include at least one conductive layer 132 and at least one insulating layer 131. Each conductive layer 132 may include, for example, a metal, any other suitable conductive material, or any combination thereof. Each insulating layer 131 may include an organic material or an inorganic material, for example, silicon oxide, silicon nitride, silicon oxynitride, any other suitable insulating material, or any combination thereof. Similarly, the second redistribution layer 140 may include at least one conductive layer 142 and at least one insulating layer 141. Each conductive layer 142 may include, for example, a metal, any other suitable conductive material, or any combination thereof. Each insulating layer 141 may include, for example, silicon oxide, silicon nitride, silicon oxynitride, any other suitable insulating material, or any combination thereof. The number of conductive layers 132 / 142 and the number of insulating layers 131 / 141 in the first and second redistribution layers 130 and 140 may be determined according to practical design. For ease of illustration, only one conductive layer 132 / 142 is shown as one non-limiting example.

[0061] Still referring to FIG. 1a, the insulating layers 131 and 141 of the first and second redistribution layers 130 and 140, respectively, have a number of openings (not labeled) exposing a number of portions of the corresponding conductive layers 132 and 142 for external connection.

[0062] As a summary of the above description, it can be recognized that the first electronic device 111 / 111' in the first subpackage module 110 / 110' and the second electronic device 121 / 121' in the second subpackage module 120 / 120' can include any type of electronic device and can be arranged and connected side by side or stacked. The connection components between the electronic device and the first redistribution layer 130 or the second redistribution layer 140 can be varied. Thus, in some further implementations below, in the case of description, the combination of the first electronic device 111 / 111' in the first subpackage module 110 / 110' and the second electronic device 121 / 121' in the subpackage module 120 / 120', and the connection between the electronic device and the first redistribution layer 130 or the second redistribution layer 140 will be described with reference to the combination in FIG. 1a, which is taken as a non-limiting example.

[0063] Through the above-described package module 100 / 101, the main member of the package stack structure is provided as the base of the integrated package device disclosed by the implementation of the present application. That is, the package module (e.g., the integrated package device) of the present disclosure, as an integrated package device, not only accommodates a large number of semiconductor dies or devices, but also increases the packaging density by adopting vertical stack packaging. On the one hand, the package body can have a system structure with electromagnetic shielding, and the whole package body can have a relatively high percentage of metal. The dies can be arranged continuously and have a thermally conductive film / bonding film between them. As a result, the whole structure has improved heat dissipation. By utilizing RDL instead of the traditional gold wiring, the overall wiring pitch can be reduced by more than 40%, the signal transmission speed can be increased, the high frequency performance can be improved, and substantially complete functions can be realized and SiP can be realized. Moreover, circuit scalability can be enabled by electronic devices using the internal connection components or external connection components of the package module. When such a package module is used to complete a high-stack structure in the modularized packaging process described below, the difficulty of packaging ultra-thin chips for high-stack packages with high capacity can be reduced, and mass production can be facilitated. Moreover, packages with different capacities can be flexibly processed due to the infinite possibilities of stacking, which meets market demands and beneficially improves the processing yield of packages.

[0064] Hereinafter, with further reference to Figs. 1c and 1d, several other implementations are disclosed according to the present application.

[0065] As shown in FIG. 1c, the package module 102 is based on the package module 100 as shown in FIG. 1a as an integrated package device according to the implementation of the present application, with the addition of through-molding vias (TMVs) 170. The components in the package module 102 that are the same as those in the package module 100 will not be repeated here, and only the differences between the two package modules will be described. Still referring to FIG. 1c, each through-molding via 170 extends through the first molding body portion 118 and the second molding body portion 128, connecting the first redistribution layer 130 and the second redistribution layer 140. Also, as shown in FIG. 1c, the plurality of first electronic devices 111 and the plurality of second electronic devices 121 may be respectively arranged in at least two columns arranged in a horizontal direction perpendicular to the direction in which the first subpackage module 110 and the second subpackage module 120 are stacked. Each through-molded via 170 may be disposed outside one column of electronic devices away from the other column, and there may be at least one through-molded via, however, in some implementations, as shown in FIG.

[0066] In some implementations, each through-molding via 170 can include an insulating layer (not labeled) and a metal layer 170a formed on the inner sidewall of an opening through the first molding body portion 118. The second molding body portion 128 and the insulator 170b can be filled into the metal layer 170a. The metal layer 170a can connect the conductive layers 132 and 142 in the first redistribution layer 130 and the second redistribution layer 140, and electrically connect the first redistribution layer 130 and the second redistribution layer 140 outside the first subpackage module 110 and the second subpackage module 120, respectively. In this manner, circuit connections can be diversified among the electronic devices of the package module 102.

[0067] In contrast to wire bonding, using 3D interconnect techniques such as through-molded vias (TMVs) 170, shorter interconnect paths, lower resistance and inductance, and more efficient transmission of signals and power may be achieved, improving or speeding up signal transmission within the entire package module, improving high frequency performance of the product, not limiting the number of stacked dies, making the fabrication and design process less operation intensive, and reducing fabrication costs.

[0068] Moreover, according to some implementations of the present application, as shown in FIG. 1d, the package module 103 is illustrated as an integrated package device, which is similar to the package module 100 as shown in FIG. 1a, except that instead of using a DAF 150, a first bonding structure 114 and a second bonding structure 124 are included on the bonding surfaces of the electronic device on the bonding side of the first subpackage module 110″ and the bonding side of the second subpackage module 120″, respectively, to bond the first subpackage module 110″ and the second subpackage module 120″ together to realize the circuit connection.

[0069] In some implementations, the first bonding structure 114 and the second bonding structure 124 can have the same structure and can each have at least one bonding insulator layer 1141 / 1241 and at least one bonding contact 1142 / 1242 extending longitudinally through the bonding insulator layer 1141 / 1241. The bonding contacts 1142 and 1242 connect circuit interconnect layers (not shown) in the first electronic device 111 and the second electronic device 121 and provide mechanical and electrical connection between the first subpackage module 110'' and the second subpackage module 120'' in the package module 103 directly through the first bonding structure 114 and the second bonding structure 124. The material of each bonding insulator layer 1141 / 1241 can include, for example, silicon oxide, silicon nitride, silicon oxynitride, any other suitable insulating material, or any combination thereof. The material of each bonding contact 1142 / 1242 can include, without limitation, at least one conductive material (such as, for example, gold, copper, aluminum, silver, and / or any other suitable metal). Various bonding techniques can be used to facilitate the structures described above.

[0070] By providing the first bonding structure 114 and the second bonding structure 124 to replace the above-mentioned TMV, the fabrication process for the TMV may be omitted. However, the bonding structures may be provided in addition to the TMV to achieve functionality equivalent to that obtained by the above-mentioned TMV 170. As previously mentioned, the plurality of first electronic devices 111 in the first subpackage module 110 / 110″ or the plurality of second electronic devices 121 in the second subpackage module 120 / 120″ may be mechanically and / or electrically connected through the above-mentioned bonding structures to achieve conductive connection.

[0071] As another summary of the above description, in contrast to the package module 100 / 101, the package module 102 / 103 described above has additional TMV or bonding structures, and therefore not only constitutes the main member of the package stack structure as the base of the integrated package device, but also provides more possibilities of circuit connection for application flexibility. In this way, the combination of package modules can be used more flexibly in any subsequent package stack structure.

[0072] With further reference to FIGS. 1e and 1f, a basic packaging module of an integrated package device according to some implementations of the present application is disclosed.

[0073] As shown in Fig. 1e, a package module 104 is shown as an integrated package device. Based on the package module 102 shown in Fig. 1c, the package module 104 has an additional external connection structure 190, which is on the side of the second redistribution layer 140 away from the second subpackage module 120 and is connected to the second redistribution layer 140.

[0074] As shown in FIG. 1f, the package module 105 is also illustrated as an integrated package device. Similar to the above-mentioned package module 104, the package module 105 also has an additional external connection structure 190, which is on the side of the second redistribution layer 140 away from the second subpackage module 120 and is connected to the second redistribution layer 140. However, the package module 105 differs from the package module 104 in terms of the location of each TMV 170. That is, in the package module 105, the plurality of first electronic devices 111 and the plurality of second electronic devices 121 are respectively arranged in at least two columns arranged in a lateral direction perpendicular to the direction in which the first subpackage module 110 and the second subpackage module 120 are stacked. Here, the TMV 170 is arranged between the two columns of electronic devices, rather than being arranged outside one column of electronic devices and separated from the other column, and at least one TMV 170 may be present.

[0075] In some implementations, the external connection structure 190 may include, but is not limited to, an array of tin balls, and may also include, for example, tin paste, conductive glue, or bonding contacts. The tin balls are disposed in a plurality of outwardly facing openings (not labeled) in the insulating layer 141 described above, and are electrically connected to exposed portions of the conductive layer 142. Using the tin balls of the external connection structure 190 as signal input / output terminals, signals from an external device may be input into the package module 104 / 105, and signals from the package module 104 / 105 may be output to an external device.

[0076] Moreover, still referring to FIG. 1e and FIG. 1f, while the external connection structure 190 is depicted as being on the side of the second redistribution layer 140 away from the second subpackage module 120 and connected with the second redistribution layer 140, it should be understood that the depiction is merely for convenience of illustration. However, it is understood that the external connection structure 190 may be located on the side of the first redistribution layer 130 away from the first subpackage module 110 and connected with the first redistribution layer 130 without departing from the scope of the present disclosure. Thus, it should be recognized that the terms "first" or "second" herein do not imply a meaning of "upper" or "lower" and may be interchangeable without departing from the scope of the present application as long as the relative relationship is met.

[0077] In the integrated package device disclosed in the implementation of the present application, multiple package modules can be stacked using the package module 104 / 105 with additional external connection structure 190, and their external connection can be realized by directly using the package module 104 / 105 as a unit. However, it should be understood that multiple package modules can be stacked and connected to the outside even if only the structure of the package module 102 / 103 described above is present. This is because at least the external connection structure 190 is a component that can be added when device installation is performed, or multiple package modules are stacked by a downstream manufacturer. Therefore, the integrated package device disclosed herein can be or include any one of the package modules 100, 101, 102, 103, 104, and 105 described above.

[0078] According to implementations of the present application, various integrated package devices can be obtained using various stacking combinations utilizing any of the above-described various package modules 100, 101, 102, 103, 104, and 105. In other words, based on the package modules 100, 101, 102, 103, 104, 105, the integrated package devices disclosed by implementations of the present application can include one or more package modules.

[0079] For example, referring to Figure 2a, an implementation in which an integrated package device disclosed by the present application is fabricated from one package module is illustrated. As shown in Figure 2a, the integrated package device 201 includes a package module 105 (e.g., as depicted in Figure 1e) and a protective layer 160 that covers the first redistribution layer 130 on the side away from the first subpackage module 110.

[0080] In some implementations, the material of the protective layer 160 can be the same as that of the first / second molding body portion 118 / 128 described above and can include epoxy resin and / or any other suitable molding compound (e.g., epoxy resin, phenolic resin, catalytic agent, silicon dioxide micropowder, etc.). The protective layer 160 can protect the first redistribution layer 130 from being physically and / or chemically damaged by, for example, oxidation and moisture.

[0081] In the integrated package device 201 as shown in Fig. 2a, since a vertical stack packaging scheme is used, the following effects can also be realized: accommodating multiple semiconductor dies or devices, increasing the packaging density, and the package body has electromagnetic shielding. The entire package body has a high percentage of metal, and the dies are continuously arranged and have a thermally conductive adhesive / bonding film between them, enabling better heat dissipation effect for the whole structure.

[0082] As shown in FIG. 2b, an implementation in which an integrated package device disclosed by the implementation of the present application is made from two package modules is illustrated.

[0083] Referring to Fig. 2b, the integrated package device can include multiple instances of the package module. The multiple package modules can be stacked in a direction in which the first subpackage module and the second subpackage module are stacked. The external connection structure on one of any two adjacent package modules can be connected with the first redistribution layer of the other of the two adjacent package modules. The integrated package device can further include a protective layer covering the first redistribution layer of the outermost package module in the vertical direction.

[0084] Still referring to FIG. 2b, the integrated package device 202 may include two package modules 104 (each as shown in FIG. 1e) stacked one on top of the other in the direction in which the first subpackage module 110 and the second subpackage module 120 are stacked. The tin balls 190 (external connection structures) of the lower package module 104 act as members connected to the first redistribution layer 130 in the upper package module 104. The integrated package device 202 further includes a protective layer 160 covering the first redistribution layer 130 of the vertically outermost package module 104 (e.g., located on the bottom surface of the lower package module 104). The tin balls 190 (external connection structures) of the lower package module 104 act as members connected to the first redistribution layer 130 in the upper package module 104. The integrated package device 202 further includes a protective layer 160 that covers the first redistribution layer 130 of the vertically outermost package module 104 (e.g., positioned on the bottom surface of the lower package module 104).

[0085] Using the integrated packaging device 202 as shown in FIG. 2b, the difficulty of processing ultra-thin chips / dies for high-stack packages with high capacity is reduced, which can facilitate mass production, and packages with different capacities can be flexibly processed due to the infinite possibilities of stacking, which meets market demands and beneficially improves the processing yield of packages.

[0086] Referring to FIG. 2c, an integrated package device including a plurality of package modules (e.g., three package modules) is shown. The plurality of package modules can be stacked in a direction in which the first subpackage module and the second subpackage module are stacked. The external connection structure on one of any two adjacent package modules can be connected with the first redistribution layer of the other of the two adjacent package modules. The integrated package device can further include a protective layer covering the first redistribution layer of the outermost package module in the vertical direction. The TMVs of the plurality of package modules are vertically aligned or misaligned.

[0087] The integrated package device 203 depicted in FIG. 2c may include two package modules 104 (each as shown in FIG. 1e) stacked one on top of the other in the vertical direction, and one package module 105 sandwiched between them. In other words, three package modules may be stacked on top of each other in the direction in which the first subpackage module 110 and the second subpackage module 120 in any of the package modules are stacked. The tin balls 190 (external connection structures) on the lower package module 104 act as members connected to the first redistribution layer 130 in the package module 105. The tin balls 190 on the package module 105 may act as members connected to the first redistribution layer 130 in the package module 104. The integrated package device 203 further includes a protective layer 160 covering the first redistribution layer 130 of the outermost package module 104 in the vertical direction (e.g., positioned on the bottom surface of the bottom package module 104). Moreover, the TMVs 170 of the package modules are either vertically aligned or misaligned, i.e., the TMVs 170 in each package module 104 and the TMVs 170 in package module 105 are misaligned, while the TMVs 170 in the top package module 104 and the TMVs 170 in the bottom package module 104 are aligned.

[0088] The integrated package device 203 as shown in FIG. 2c can achieve the same effect as the integrated package device 202 as shown in FIG. 2b. Moreover, although not shown, it can be recognized from the illustration of the integrated package devices 202 and 203 that any number of instances of the package modules 100, 101, 102, 103, and 104 can be used in any combination and arrangement. For example, four or even five package modules can be stacked on top of each other. Electronic devices can also be used in any combination as previously described, for example, each vertical column can include one, two, three, or four electronic devices, which is not meant to be limiting.

[0089] Some implementations of the present application further provide a memory system including an integrated package device using any of the previously described combinations, in which at least one of the first electronic devices and / or at least one of the second electronic devices of the integrated package device includes a memory device, and at least any other one of the first electronic devices and / or at least any other one of the second electronic devices includes a controller used to control the operation of the memory device.

[0090] As shown in FIG. 2d, an integrated package device 204 as a memory system is illustrated. In FIG. 2d, the electronic devices are respectively represented by boxes with the names of the corresponding devices therein, and the corresponding reference numerals are omitted. For example, the electronic devices represented by the boxes include DRAM, controller 1, NAND 1-8, dies 1-4, controller 2, and power management die, etc. Referring to the positions corresponding to the first electronic device in the lower first subpackage module and the second electronic device in the upper second subpackage module of each package module, the first electronic device 111 in the integrated package device 204 may include NAND 1-4, dies 1-2, controller 2, and power management die. On the other hand, it can be seen that the second electronic device 121 includes DRAM, controller 1, NAND 5-8, and dies 3-4. The memory system may include a memory and a controller that are electrically connected. The controller may be used to control the data storage of the memory. The memory and the controller may be well known to those skilled in the art and will not be described in detail here. The memory system may be applied in computers, televisions, set-top boxes, or vehicle-mounted terminal products, etc.

[0091] Still referring to FIG. 2d, the integrated package device 204 is capable of acting as a memory system; at least one of the first electronic devices and / or at least one of the second electronic devices in the integrated package device includes a memory device, and at least any other one of the first electronic devices and / or at least any other one of the second electronic devices includes a controller used to control the operation of the memory device.

[0092] An integrated package device according to some implementations of the present application is described above, and according to some other implementations of the present application, a method of fabricating the integrated package device as described above is further provided. As shown in FIG. 3, the method of fabricating the integrated package device according to some implementations of the present application may include the following operations.

[0093] 3, in operation S100, a first subpackage module and a second subpackage module are provided. The first subpackage module includes a plurality of first electronic devices, and a first molding body can encapsulate the plurality of first electronic devices. Each of the first electronic devices can include a first pad on a side thereof. The second subpackage module can be on a side of the first subpackage module away from the first pad. The second subpackage module can include a plurality of second electronic devices and a second molding body that encapsulates the plurality of second electronic devices. Each of the second electronic devices can include a second pad on a side thereof.

[0094] In an operation S300, the first sub-package module and the second sub-package module are stacked.

[0095] In operation S500, a first redistribution layer is formed on a side of the first subpackage module away from the second subpackage module and connected to the first pad.

[0096] In operation S700, a second redistribution layer is formed on a side of the second subpackage module away from the first subpackage module and connected to the second pad.

[0097] Referring again to operation S100, the first sub-package module and the second sub-package module may be provided in many ways, one of which is taken as representative and may further include the following sub-steps:

[0098] For example, in operation S110, a plurality of first electronic devices and a plurality of second electronic devices are placed on a first temporary adhesive layer and a second adhesive layer, respectively, with a first pad of the first electronic devices and a second pad of the second electronic devices, respectively, facing one same side.

[0099] In operation S120, a first conductive pillar and a second conductive pillar are disposed over a portion of the first pad and a portion of the second pad, respectively.

[0100] In operation S130, a first carrier and a second carrier are disposed on sides of the plurality of first electronic devices and sides of the plurality of second electronic devices away from the first and second temporary adhesive layers, respectively, and the temporary bonding film is caused to face the plurality of first electronic devices and the plurality of second electronic devices, respectively, with the first pads and the second pads facing toward the first carrier and the second carrier, respectively, or facing away from the first carrier and the second carrier.

[0101] In operation S140, the first and second temporary adhesive layers are removed, respectively, and a first and second molding body portion is formed on the first and second carriers, respectively.

[0102] Referring again to operation S300, the first subpackage module and the second subpackage module can be stacked in many ways, one of which is taken as representative. That is, operation S300 can further include: positioning the first carrier and the second carrier on two sides of the combination of the first molding body and the second molding body; and removing the first carrier and the second carrier before forming the first redistribution layer and the second redistribution layer.

[0103] Similarly, between operation S100 and operation S300, various operations may be added depending on the chosen structure of the integrated package device, and two of the operations are taken as representative.

[0104] For example, in operation S200, an adhesive layer may be disposed between the first subpackage module and the second subpackage module. In operation S210, a first bonding structure and a second bonding structure may be disposed on the first subpackage module and the second subpackage module, respectively.

[0105] Moreover, after forming the first redistribution layer in operation S500 and before performing operation S700, many operations may be added depending on the selected structure of the integrated package device. For example, operation S550 may be optionally added, which includes forming a protective layer on a side of the first redistribution layer away from the first subpackage module to cover the first redistribution layer.

[0106] Moreover, referring to the integrated package device having TMV depicted in FIG. 1c, the method of fabricating the integrated package device may further include the following optional steps in operation S700 when the second redistribution layer is formed:

[0107] For example, in operation S600, a TMV is formed to extend through the first molding body portion and the second molding body portion and to be connected to the first redistribution layer and the second redistribution layer; the second redistribution layer is connected to the TMV.

[0108] Moreover, a method for fabricating an integrated packaged device may include applying a completed basic package module.

[0109] For example, in act S800, an external connection structure is formed on a side of the second redistribution layer away from the second subpackage module and connected with the second redistribution layer.

[0110] In operation S900, a plurality of package modules are provided, stacked in a direction in which a first subpackage module and a second subpackage module are stacked, and an external connection structure on one of any two adjacent package modules can be connected with a first redistribution layer of the other of the two adjacent package modules.

[0111] Operations corresponding to various possible operations in a method of fabricating an integrated packaged device will now be detailed with reference to the cross-sectional structural illustrations of Figures 4a through 4j.

[0112] 4a-4c, operation S100 of FIG. 3 is performed, e.g., a first subpackage module and a second subpackage module are provided. The first subpackage module includes a plurality of first electronic devices and a first molding body encapsulating the plurality of first electronic devices, each of the first electronic devices may include a first pad on a side thereof. The second subpackage module is on a side of the first subpackage module away from the first pad and includes a plurality of second electronic devices and a second molding body encapsulating the plurality of second electronic devices, each of the second electronic devices includes a second pad on a side thereof.

[0113] In some implementations, the first subpackage module and the second subpackage module can have the same electronic device or a combination of different electronic devices as shown in Figures 1a and 1b, but can be made using essentially the same method. Therefore, in the following description, the combination as shown in Figure 1a may be taken as a representative for illustration purposes, and only the first subpackage module 110 will be described as a representative with the description of the device of the second subpackage module in parentheses if it is not necessary to describe the second subpackage module 120 at the same time.

[0114] For example, operation S100 may include sub-operations S110 to S140. As shown in Fig. 4a, operation S110 of Fig. 3 is performed, for example, a plurality of first electronic devices 111 (and a plurality of second electronic devices) are first placed on a first temporary adhesive layer 115 (and a second temporary adhesive layer) respectively with a first pad 112 on the first electronic device 111 (and a second pad on the second electronic device) respectively facing the same side. The vertically stacked plurality of first electronic devices 111 may be fixed with a DAF 150 or any suitable adhesive material therebetween, but this is not meant to be limiting.

[0115] As also shown in FIG. 4a, operation S120 is performed, for example, a first conductive pillar 113 (and a second conductive pillar) protruding in the direction in which the first electronic device 111 is stacked is disposed on a portion of the first pad 112 (and a portion of the second pad), respectively.

[0116] According to the integrated package device in some implementations of the present application as shown in Figures 1a and 1b herein, this operation is not limited to disposing conductive pillars, and gold wires can be disposed according to design. Therefore, any device for leading from the pads can be used. However, it can be recognized that the conductive pillars have the advantage of saving lateral space.

[0117] Subsequently, as shown in FIG. 4b, operation S130 of FIG. 3 is performed, for example by disposing the first carrier 116 (and the second carrier) on the sides of the first electronic devices 111 (and the second electronic devices) that are away from the first temporary adhesive layer 115 (and the second temporary adhesive layer), respectively, and causing the temporary bonding film 116a to face the first electronic devices (and the second electronic devices), respectively, with the first pads 112 (and the second pads, respectively) facing the first carrier 116 (and the second carrier).

[0118] For example, as shown in FIG. 4b, before the first electronic device 111 is disposed on the first carrier 116, the stacked multiple first electronic devices 111 may be flipped upside down, and the first electronic device 111 not attached to the first temporary adhesive layer 115 may be attached to the temporary bonding film 116a of the first carrier 116. It may be appreciated that whether to flip the first electronic device 111 upside down may be determined depending on the manner in which the first pads 112 are connected with the temporary film 116a. For example, as shown in FIG. 1b, when the connection is realized through gold wires 113′, it may not be necessary to flip the multiple first electronic devices 111 upside down. Additionally and / or alternatively, the first carrier 116 may be directly attached to the side of the first electronic device away from the first temporary adhesive layer 115 without flipping, and then the flipping is performed and moved to the next operation.

[0119] 3 is performed, as shown in FIG 4b and FIG 4c. For example, the first temporary adhesive layer 115 (and the second temporary adhesive layer) are respectively removed, and the first molding body 118 (and the second molding body) are respectively formed on the first carrier 116 (and the second carrier) to complete the first subpackage module 110 (and the second subpackage module). The material of the molding body has been described above and will not be repeated here.

[0120] After the first sub-package module and the second sub-package module are each completed using the sub-operations described above, the above-described operation S100 of providing the first sub-package module and the second sub-package module may be completed.

[0121] Subsequently, the above-mentioned main operation S300 of stacking the first subpackage module and the second subpackage module may be performed.

[0122] For example, referring to FIG. 4d, to stack the first subpackage module and the second subpackage module, the sides of the first subpackage module 110 and the sides of the second subpackage module 120 that are away from the first carrier 116 and the second carrier 126, respectively, are placed close to each other, with the first carrier 116 and the second carrier 126 positioned on the two outsides of the combination of the first subpackage module 110 and the second subpackage module 120.

[0123] According to some implementations of the present application, different alternative operations may be used to stack the first subpackage module and the second subpackage module according to different structures of the integrated package device.

[0124] For the first type of step, as shown in FIG. 4d, operation S200 of FIG. 3 is performed, e.g., a DAF 150 is disposed between the first subpackage module 110 and the second subpackage module 120 to firmly join them together from the top and bottom, respectively.

[0125] 6a and 6b, operation S210 of FIG. 3 is performed, e.g., a first bonding structure 114 and a second bonding structure 124 are disposed on a bonding surface of an electronic device at a bonding side of the first subpackage module 110″ and a bonding side of the second subpackage module 120″, respectively, to bond the first subpackage module 110″ and the second subpackage module 120″ together, and a conductive connection is realized by joining the first bonding structure 114 and the second bonding structure 124 under heat or pressure. Various bonding techniques may be used for bonding as described herein, without limitation.

[0126] After the first subpackage module and the second subpackage module are bonded together to form a combination, the main operation S500 is performed. In operation S500, a first redistribution layer 130 is formed on a side of the first subpackage module 110 remote from the second subpackage module 120 and connected with the first pads 112. However, before the formation of the first redistribution layer 130, the first carrier 116 is removed. Moreover, before the subsequent formation of the second redistribution layer 140, the second carrier 126 is also removed.

[0127] For example, as shown in FIG. 4e and FIG. 4f, the operation S500 of FIG. 3 is performed. As an example, the first carrier 116 is removed before the formation of the first redistribution layer 130, and then the first redistribution layer 130 is formed where the first carrier was before being removed. During the formation of the first redistribution layer 130, referring to the above description, an insulating layer 131 is formed, then a conductive layer 132 is formed, and then another insulating layer 131 is formed to cover the conductive layer 132. Openings (not labeled) are formed at appropriate positions for external connection. The conductive layer 132 can include a metal, any other suitable conductive material, or any combination thereof, and the insulating layer 131 can include an organic material or an inorganic material, such as silicon oxide, silicon nitride, silicon oxynitride, any other suitable insulating material, or any combination thereof. The number of conductive layers 132 and the number of insulating layers 131 in the first redistribution layer 130 can be determined. Depending on practical design and for convenience, only one conductive layer 132 is shown as one non-limiting example.

[0128] Still referring to Figures 4e and 4f, operation S550 of Figure 3 is performed, e.g., a protective layer 160 / 160a is formed on the side of the first redistribution layer 130 away from the first subpackage module 110 to cover the first redistribution layer 130.

[0129] 4e and 4f differ from each other in that FIG. 4e shows protective layer 160, while FIG. 4f shows temporary protective layer 160a. Protective layer 160 and temporary protective layer 160a are collectively referred to as "protective layers" and may be selected for use depending on the application of the package module to be subsequently formed. In other words, if the first redistribution layer 130 is the outermost in the stack of package modules to be subsequently formed, as shown in FIG. 4e, the same material as that of the first molding body portion 118 may be used for the protective layer. If the first redistribution layer 130 is in the middle of the stack of package modules, as shown in FIG. 4f, the temporary protective layer 160a may be selected to be easy to remove and has a material common in the art. By way of example and without limitation, any combination of polyimide, polybenzoxazole, phenolic, and / or other resins / materials may be used as the temporary protective layer 160a. When the package module is to be placed in a stack with other package modules, the temporary protective layer 160a may be removed to facilitate electrical connection between the first redistribution layer 130 and other devices. It may be appreciated that the formation of the temporary protective layer 160a may be an optional operation.

[0130] Subsequently, operation S700 may be performed, where a second redistribution layer is formed on a side of the second subpackage module away from the first subpackage module and connected with the second pad.

[0131] 4g and 4h, after the formation of the first redistribution layer 130, the combination of the first subpackage module 110 and the second subpackage module 120 is flipped upside down, and the second redistribution layer 140 is formed on the side of the second subpackage module 120 away from the first subpackage module 110 and connected with the second pad 122. To reduce the number of figures, the optional TMV 170 for operation S600 is also shown in FIG. 4g and 4h. The difference between FIG. 4g and FIG. 4h is the same as the difference between FIG. 4e and FIG. 4f. In other words, the formation of the protective layers 160 and 160a. Similarly, before the formation of the second redistribution layer 140, the corresponding second carrier 126 is removed, and the second redistribution layer 140 is formed in the same place as the second carrier 126 before its removal. The manner and materials for forming the second redistribution layer 140 can be similar to those for forming the first redistribution layer 130 and will not be repeated here. Up to this point, a basic unit of an integrated package device (e.g., one package module 106 / 106′) has been completed.

[0132] It is noted that, for different designs, optionally, TMV 170 corresponding to operation S600 may be selectively formed simultaneously with second redistribution layer 140. In other words, when bonding structures 114 / 124 such as those shown previously in Figures 6a and 6b are formed, TMV 170 may or may not be implemented optionally, and even when bonding structures are not formed, TMV 170 may not necessarily be disposed.

[0133] As shown in FIG. 4g and FIG. 4h, before the formation of the two insulating layers 141, through molding openings (not labeled) are formed in the first subpackage module 110 and the second subpackage module 120, and during the formation of one insulating layer 141, the material of the insulating layer 141 is also filled into the through molding openings. Then, during the formation of the conductive layer 142 in the second redistribution layer 140 and the subsequent formation of the insulating layer 141 thereon, the materials of the conductive layer 142 and the insulating layer 141 are also filled into the TMVs, so that the TMVs 170 are formed in cooperation with the second redistribution layer 140. Similar to the insulating layer 131, the insulating layer 141 can be used to cover the conductive layer 142 and has openings (not labeled), which are disposed at appropriate positions and are used to place tin balls 190 for external connection.

[0134] 4i and 4j, operation S800 is optionally performed after formation of the first redistribution layer 130 and the second redistribution layer 140. For example, an external connection structure is formed on a side of the second redistribution layer 140 away from the second subpackage module and connected with the second redistribution layer.

[0135] As shown in Figures 4i and 4j, external connection structures 190 (e.g., tin balls 190) are filled into the openings (not labeled) in the insulating layer 141 of the second redistribution layer 140. This operation is optional because the package module 106 / 106' completed in step S700 can serve as an integrated package device by itself. Moreover, tin balls can be added by the user when using an integrated package device (e.g., a single package module).

[0136] Hereinafter, a method for fabricating an integrated package device including a plurality of package modules disclosed in the implementation of the present application is described. That is, an operation S900 is performed. Here, a plurality of package modules are provided, and are stacked in a direction in which a first subpackage module and a second subpackage module are stacked; an external connection structure on one of any two adjacent package modules is connected with a first redistribution layer of the other of the two adjacent package modules.

[0137] As shown in Fig. 5, operation S900 of Fig. 3 is performed. For example, package modules (such as those represented by any of package modules 104, 105, and 107 as shown in Fig. 1e, Fig. 1f, and Fig. 4i, respectively) are stacked on top of each other, and tin balls 190 are heated to melt and then flattened. In this way, an integrated package device 203 as shown in Fig. 2c can be obtained after reflow and curing.

[0138] Using the method for fabricating the integrated package device described above in some implementations of the present application, an integrated package device is provided that provides convenience and fits various system packages (especially those including memory). The integrated package device integrates chips of various functions (including processors, memories, or any other functional chips) into one package, realizes substantially complete functions, and forms a SiP. Moreover, the difficulty of processing ultra-thin chips for high-stack packages with high capacity is reduced, which can promote mass production, and packages with different capacities can be flexibly processed due to the infinite possibilities of stacking, so as to meet market demands and beneficially improve the processing yield of packages.

[0139] In summary, the integrated package device, the method for fabricating the integrated package device, and the memory system in several implementations of the present application have been described above. However, the present application is not defined by those implementations. Substitutions and modifications may be made to the above implementations by those skilled in the art to obtain other implementations without departing from the scope and spirit of the present application. All technical solutions formed by the same or equivalent replacements fall within the scope of the present application. Therefore, the scope of the present application is defined by the claims. [Explanation of symbols]

[0140] 100 Package Modules 101 Package Module 102 Package Module 103 Package Module 104 Package Module 105 Package Module 106 Package Module 106' Package Module 107 Package Module 110 First Subpackage Module 110' First Subpackage Module 110'' First Subpackage Module 111 First Electronic Device 111' First Electronic Device 112 First Pad 113 First conductive pillar 113' Gold Wire 114 First bonding structure 1141 Bonding insulation layer 1142 Bonding Contact 115 First temporary adhesive layer 116 First Career 116a Temporary Bonding Film 118 First molding body part 120 Second Subpackage Module 120' Second Package Module 120'' Secondary Subpackage Module 121 Second Electronic Device 121' Second Electronic Device 122 Second Pad 123 Second conductive pillar 124 Second bonding structure 1241 Bonding insulation layer 1242 Bonding Contact 126 Second Career 128 Second molding body part 130 First redistribution layer 131 Insulating layer 132 Conductive Layer 140 Second redistribution layer 141 Insulating layer 142 Conductive Layer 150 Die Attachment Film (DAF), Thermally Conductive Adhesive Film 160 protective layer 160a Temporary Protective Layer 170 Through Molding Via (TMV) 170a metal layer 170b Insulator 190 External connection structure 201 Integrated Package Devices 202 Integrated Package Device 203 Integrated Package Devices 204 Integrated Package Device

Claims

1. An integrated package device including at least one package module, each package module comprising: a first subpackage module including a plurality of first electronic devices and a first molding body encapsulating the plurality of first electronic devices, each of the first electronic devices including a first pad on a side thereof; a second subpackage module stacked on a side of the first subpackage module remote from the first pad, the second subpackage module including a plurality of second electronic devices and a second molding body encapsulating the plurality of second electronic devices, each of the second electronic devices including a second pad on a side thereof; a first redistribution layer located on a side of the first subpackage module away from the second subpackage module and connected to each of the first pads; a second redistribution layer located on a side of the second subpackage module away from the first subpackage module and connected to each of the second pads; 1. An integrated packaged device comprising:

2. Each package module is a through-molding via (TMV) extending through the first molding body and the second molding body and connecting the first redistribution layer and the second redistribution layer; The integrated package device of claim 1 further comprising:

3. 10. The integrated package device of claim 1, further comprising a first bonding structure and a second bonding structure, the first bonding structure and the second bonding structure being positioned between the first subpackage module and the second subpackage module and positioned above the first subpackage module and the second subpackage module, respectively, the first bonding structure and the second bonding structure bonding the first subpackage module and the second subpackage module together.

4. 4. The integrated package device of claim 1, further comprising an external connection structure, the external connection structure being positioned on a side of the second redistribution layer away from the second subpackage module and connected to the second redistribution layer.

5. The integrated package device of claim 4 , wherein the external connection structure comprises an array of tin balls.

6. The integrated package device of claim 1 , further comprising a protective layer covering a side of the first redistribution layer away from the first subpackage module.

7. The integrated package device of claim 2 further comprising an adhesive layer positioned between said first subpackage module and said second subpackage module.

8. 2. The integrated package device of claim 1, wherein the plurality of first electronic devices and / or the plurality of second electronic devices are respectively stacked in a staircase-like manner in a direction in which the first subpackage module and the second subpackage module are stacked, and the first pads of each of the first electronic devices and / or the second pads of each of the second electronic devices are not covered by any other of the first electronic devices and / or any other of the second electronic devices.

9. 9. The integrated package device of claim 1, wherein an outer connection surface of the first pad and an outer connection surface of the second pad face the first redistribution layer and the second redistribution layer, respectively, and the first subpackage module and / or the second subpackage module further include a first conductive pillar and / or a second conductive pillar, respectively, which connect the first redistribution layer with a portion of the first pad and / or connect the second redistribution layer with a portion of the second pad.

10. 2. The integrated package device of claim 1, wherein an outer connection surface of the first pad faces away from the first redistribution layer or an outer connection surface of the second pad faces away from the second redistribution layer, and the package module further includes a gold wire through which the first pad is connected to the first redistribution layer or the second pad is connected to the second redistribution layer.

11. 3. The integrated package device of claim 2, wherein the plurality of first electronic devices and the plurality of second electronic devices are respectively arranged in at least two columns of electronic devices in a horizontal direction perpendicular to a direction in which the first subpackage module and the second subpackage module are stacked; and the TMV is positioned outside one column of the electronic devices and away from the other column, and there is at least one TMV.

12. 3. The integrated package device of claim 2, wherein the plurality of first electronic devices and the plurality of second electronic devices are respectively arranged in at least two columns of the electronic devices in a horizontal direction perpendicular to a direction in which the first subpackage module and the second subpackage module are stacked; and the TMV is positioned between the two columns of the electronic devices, and there is at least one TMV.

13. 5. The integrated package device of claim 4, comprising a plurality of the package modules, the plurality of package modules being stacked in a direction in which the first subpackage module and the second subpackage module are stacked, and the external connection structure on one of any two adjacent package modules is connected to the first redistribution layer of the other of the two adjacent package modules; the integrated package device further comprising a protective layer covering the first redistribution layer of a vertically outermost package module.

14. The package module further includes an external connection structure, the external connection structure being located on a side of the second redistribution layer away from the second electronic device and connected to the second redistribution layer; the integrated package device further includes a plurality of the package modules stacked in a direction in which the first subpackage module and the second subpackage module are stacked; the external connection structure on one of any two adjacent package modules is connected to the first redistribution layer of the other of the two adjacent package modules; the integrated package device further includes a protection layer covering the first redistribution layer of a vertically outermost package module; The integrated package device of claim 2 , wherein the TMVs in the package module are aligned or misaligned in the vertical direction.

15. 1. A method of fabricating an integrated packaged device, comprising: providing a first subpackage module and a second subpackage module, the first subpackage module including a plurality of first electronic devices and a first molding body encapsulating the plurality of first electronic devices, each of the first electronic devices including a first pad on a side thereof, the second subpackage module including a plurality of second electronic devices on a side of the first subpackage module away from the first pads and a second molding body encapsulating the plurality of second electronic devices, each of the second electronic devices including a second pad on a side thereof; stacking the first subpackage module and the second subpackage module; forming a first redistribution layer, the first redistribution layer being located on a side of the first subpackage module away from the second subpackage module and connected to the first pad; forming a second redistribution layer, the second redistribution layer being located on a side of the second subpackage module away from the first subpackage module and connected to the second pad; A method comprising:

16. 16. The method of fabricating an integrated package device of claim 15, wherein forming the second redistribution layer connected to the second pad further comprises forming a through molding via (TMV), the through molding via (TMV) extending through the first molding body portion and the second molding body portion and connecting the first redistribution layer and the second redistribution layer; and the second redistribution layer connected to the TMV.

17. 17. The method of fabricating an integrated package device as recited in claim 15 or 16, further comprising the step of forming an external connection structure, the external connection structure being on a side of the second redistribution layer away from the second subpackage module and connected to the second redistribution layer.

18. The step of providing the first subpackage module and the second subpackage module includes: placing the plurality of first electronic devices and the plurality of second electronic devices on a first temporary adhesive layer and a second temporary adhesive layer, respectively, with outer connection surfaces of the first pads of the first electronic device and outer connection surfaces of the second pads of the second electronic device facing one and the same side; disposing a first carrier and a second carrier on sides of the plurality of first electronic devices and sides of the plurality of second electronic devices away from the first and second temporary adhesive layers, respectively, the first carrier and the second carrier including a temporary bonding film facing the plurality of first electronic devices and the plurality of second electronic devices, and the outer connection surfaces of the first pads and the outer connection surfaces of the second pads facing toward or away from the first carrier and the second carrier, respectively; removing the first and second temporary adhesive layers, respectively, and forming the first and second molding bodies on the first and second carriers, respectively; 20. A method for fabricating the integrated packaged device of claim 15, comprising:

19. 20. The method of fabricating an integrated package device as recited in claim 18, further comprising the step of disposing a first conductive pillar and a second conductive pillar on a portion of the first pad and a portion of the second pad, respectively, prior to disposing the first carrier and the second carrier.

20. 20. The method of fabricating an integrated package device of claim 15, wherein stacking the first subpackage module and the second subpackage module further comprises disposing an adhesive layer between the first subpackage module and the second subpackage module.

21. 16. The method of fabricating an integrated package device of claim 15, wherein stacking the first subpackage module and the second subpackage module further comprises disposing a first bonding structure and a second bonding structure on the first subpackage module and the second subpackage module, respectively.

22. 20. The method of fabricating an integrated package device as recited in claim 15, further comprising forming a protective layer on a side of said first redistribution layer away from said first subpackage module to cover said first redistribution layer.

23. during the step of stacking the first subpackage module and the second subpackage module, placing a side of the first subpackage module and a side of the second subpackage module that are away from the first carrier and the second carrier, respectively, proximate to one another with the first carrier and the second carrier positioned on two outsides of the combination of the first subpackage module and the second subpackage module; removing the first carrier and the second carrier before forming the first redistribution layer and the second redistribution layer, respectively; 20. The method of fabricating the integrated packaged device of claim 18, further comprising:

24. 20. The method for fabricating the integrated package device of claim 17, further comprising the steps of: providing a plurality of said package modules; stacking said plurality of said package modules in a direction in which said first subpackage module and said second subpackage module are stacked; and connecting said external connection structure on one of any two adjacent package modules with said first redistribution layer of the other of said two adjacent package modules.

25. 25. The method of fabricating an integrated package device of claim 24, wherein stacking the plurality of package modules in a direction in which the first subpackage module and the second subpackage module are stacked further comprises forming a protective layer, the protective layer being positioned over and covering the first redistribution layer of a vertically outermost package module.

26. An integrated package device according to any one of claims 1 to 14, at least one of the first electronic devices and / or at least one of the second electronic devices in the integrated package device includes a memory device, and at least any other one of the first electronic devices and / or at least any other one of the second electronic devices includes a controller for controlling operation of the memory device.

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