Die reversal before bonding

Abstract

Various system, method, and device embodiments are disclosed for batch flipping and individual picking of die. The embodiments disclosed herein can be used, for example, in the manufacture of direct bonded devices.

Description

[Technical field]

[0001] (CROSS REFERENCE TO RELATED APPLICATIONS) This application claims the benefit of U.S. Patent Application No. 17 / 662,180, filed May 5, 2023, the entire disclosure of which is incorporated by reference for all purposes.

[0002] (Technical field) FIELD OF THE DISCLOSURE The present invention relates to methods and tools for directly bonding semiconductor dies. In particular, some embodiments relate to systems and methods for flipping the die prior to bonding. [Background technology]

[0003] Direct bonding can be used in many types of electronics applications to form stacked structures, systems-on-chips (SoC), microelectromechanical systems (MEMS) devices, optical devices, memory and / or processing devices, etc. The costs associated with surface contamination are particularly pronounced when using direct bonding. Because direct bonding processes bond elements on planarized surfaces without an adhesive, even a few small particles can have detrimental effects. For example, particles on the bonding surface can cause voids that can result in, for example, non-functional interconnects, resistive interconnects that limit performance, or brittleness that can reduce the useful life of the device. Summary of the Invention [Means for solving the problem]

[0004] For purposes of this Summary, certain aspects, advantages, and novel features are described herein. It is to be understood that not all such advantages may be achieved in accordance with any particular embodiment.

[0005] In some embodiments, the techniques described herein include a method including providing a first wafer and a second wafer, polishing the first wafer and the second wafer, dicing the first wafer on a dicing tape to form a diced wafer including a plurality of dies, activating at least one of the first wafer, the diced wafer, and the second wafer, inverting the diced wafer, securing the diced wafer to a chuck, removing the isolating tape from the diced wafer, and bonding at least some of the dies to the second wafer. In some embodiments, the activating includes activating the second wafer and one of the first wafer and the diced wafer. In some embodiments, the activating includes exposing at least one of the first wafer, the diced wafer, and the second wafer to a nitrogen plasma.

[0006] In some embodiments, the techniques described herein relate to a method that includes providing a plurality of semiconductor dies on a dicing tape, each of the plurality of semiconductor dies having a first bonding surface and a second surface opposite the first bonding surface, the second surfaces of the plurality of semiconductor dies being attached to the dicing tape, and fastening the first bonding surfaces of the plurality of semiconductor dies to a chuck while the plurality of semiconductor dies are attached to the dicing tape. In some embodiments, the second surface of each of the plurality of semiconductor dies is a second bonding surface. In some embodiments, the method further includes preparing the second bonding surface for bonding.

[0007] In some embodiments, the method further comprises activating the first mating surface for direct bonding. In some embodiments, the method further comprises cleaning the first mating surface.

[0008] In some embodiments, the technology described herein relates to a method in which the step of providing a plurality of semiconductor dies further includes fixing the wafer on a dicing tape and dicing the wafer into a plurality of semiconductor dies.

[0009] In some embodiments, the techniques described herein relate to a method further including removing the dicing tape from the plurality of semiconductor dies, removing one of the plurality of semiconductor dies from the chuck, and bonding a first bonding surface of the semiconductor die directly to the carrier without an adhesive.

[0010] In some embodiments, the technology described herein relates to a method in which the step of directly bonding includes directly bonding a non-conductive layer of the semiconductor die to a non-conductive layer of the carrier.

[0011] In some embodiments, the techniques described herein relate to methods in which the step of directly bonding further comprises directly bonding conductive contacts of the semiconductor die to conductive contacts of the carrier.

[0012] In some embodiments, the techniques described herein relate to methods that further include cleaning the second surface of the semiconductor die after the direct bonding step.

[0013] In some embodiments, the techniques described herein relate to a method, wherein the second surface is a second bonding surface, further comprising the step of directly bonding a second semiconductor die to the second bonding surface of the semiconductor die after the direct bonding step.

[0014] In some embodiments, the techniques described herein relate to a method further including removing the dicing tape from the plurality of semiconductor dies and selectively releasing one or more semiconductor dies of the plurality of semiconductor dies while securing the remaining semiconductor dies of the plurality of semiconductor dies to a chuck.

[0015] In some embodiments, the technology described herein relates to a method where selectively releasing includes selectively releasing only one semiconductor die.

[0016] In some embodiments, the technology described herein relates to a method where the chuck is an electrostatic chuck, and the clamping step includes applying an electrostatic force to the multiple semiconductor dies by the electrostatic chuck, and the applying the electrostatic force includes providing power to multiple electrodes embedded in the electrostatic chuck.

[0017] In some embodiments, the techniques described herein relate to a method further including removing the dicing tape from the plurality of semiconductor dies and selectively releasing one or more of the plurality of semiconductor dies while securing the remaining semiconductor dies of the plurality of semiconductor dies to the chuck, wherein the selectively releasing includes altering power supplied to one or more of the plurality of electrodes.

[0018] In some embodiments, the technology described herein relates to methods in which altering the supplied power comprises reversing the polarity of the power supplied to one or more electrodes.

[0019] In some embodiments, the technology described herein relates to a method in which the chuck is a vacuum chuck and the clamping step includes applying a vacuum force to the multiple semiconductor dies through multiple vacuum channels embedded in the vacuum chuck.

[0020] In some embodiments, the techniques described herein relate to a method further including removing the dicing tape from the plurality of semiconductor dies and selectively releasing one or more semiconductor dies of the plurality of semiconductor dies while securing the remaining semiconductor dies of the plurality of semiconductor dies to a vacuum chuck.

[0021] In some embodiments, the technology described herein relates to a method in which the selectively releasing step includes reducing a vacuum force applied to one or more semiconductor dies.

[0022] In some embodiments, the technology described herein relates to a method in which multiple porous inserts are placed on top of multiple vacuum channels.

[0023] In some embodiments, the technology described herein relates to a method in which multiple semiconductor dies are disposed on top of multiple porous inserts.

[0024] In some embodiments, the technology described herein relates to a method in which the providing step includes applying a protective layer to the wafer, attaching the wafer to a dicing tape, and dicing the wafer into a plurality of semiconductor dies.

[0025] In some embodiments, the techniques described herein relate to a method, wherein the providing step further includes removing a protective layer from the plurality of semiconductor dies after the dicing step.

[0026] In some embodiments, the technology described herein relates to methods that further include activating the first bonding surface while the die is attached to the dicing tape prior to the fixing step.

[0027] In some embodiments, the technology described herein relates to methods in which the activation step is performed after the wafer is diced to form a plurality of semiconductor dies.

[0028] In some embodiments, the technology described herein relates to methods where the activating step includes exposing the first bonding surface to a nitrogen-containing plasma.

[0029] In some embodiments, the techniques described herein relate to methods that further include planarizing at least one of the first bonding surface and the second bonding surface prior to securing the wafer to the dicing tape.

[0030] In some embodiments, the techniques described herein relate to a method further comprising picking up one of the plurality of dies from the chuck with a vacuum bonding tool, the vacuum bonding tool being conductive and electrically grounded, and the picking up comprises removing charge from the die by contacting the die with the conductive vacuum bonding tool.

[0031] In some embodiments, techniques described herein relate to a method that includes fixing a wafer on a dicing tape; dicing the wafer into a plurality of semiconductor dies, each semiconductor die of the plurality of semiconductor dies having a first bonding surface and a second surface opposite the first bonding surface, the second surfaces of the plurality of semiconductor dies being attached to the dicing tape; fixing the first bonding surfaces of the plurality of semiconductor dies to a chuck while the plurality of semiconductor dies are attached to the dicing tape; removing the dicing tape from the plurality of semiconductor dies; and removing one of the plurality of semiconductor dies from the chuck.

[0032] In some embodiments, the techniques described herein relate to a method further comprising inverting the plurality of semiconductor dies and the dicing tape.

[0033] In some embodiments, the techniques described herein relate to a method where the chuck is an electrostatic chuck, and further including applying an electrostatic force to the multiple semiconductor dies to secure the multiple semiconductor dies to the electrostatic chuck.

[0034] In some embodiments, the technology described herein relates to a method in which removing the die includes reducing an electrostatic force applied to the die by the electrostatic chuck.

[0035] In some embodiments, the technology described herein relates to a method in which removing the die includes removing power supplied to one or more electrodes of an electrostatic chuck associated with the die.

[0036] In some embodiments, the techniques described herein relate to a method in which removing the die includes reversing an electrostatic force applied to the die by the electrostatic chuck and reducing the electrostatic force applied to the die by the electrostatic chuck.

[0037] In some embodiments, the technology described herein relates to a vacuum chuck for supporting a plurality of semiconductor dies, the vacuum chuck including a plate including a die support surface with a plurality of die support areas, and a plurality of vacuum channels extending through the plate, the plurality of vacuum channels being connectable to one or more vacuum sources, each vacuum channel of the plurality of vacuum channels being associated with a corresponding die support area, In some embodiments, only one vacuum channel is associated with each die support area.

[0038] In some embodiments, the technology described herein relates to a vacuum chuck that further includes a plurality of porous regions disposed on the die support surface of the plate, each porous region being positioned over a corresponding one of the plurality of vacuum channels.

[0039] In some embodiments, the technology described herein relates to a vacuum chuck that further includes a controller configured to independently control each vacuum channel of the plurality of vacuum channels.

[0040] In some embodiments, the technology described herein relates to a vacuum chuck in which a plurality of porous regions includes replaceable porous inserts.

[0041] In some embodiments, the technology described herein relates to a vacuum chuck in which the porous regions are wider than the corresponding vacuum channels.

[0042] In some embodiments, the technology described herein relates to a vacuum chuck in which the porous region comprises a polymer coating.

[0043] In some embodiments, the techniques described herein relate to an electrostatic chuck for supporting a plurality of semiconductor dies using electrostatic forces, the electrostatic chuck including: a non-conductive body having a plurality of die support regions, each die support region configured to support one of the plurality of semiconductor dies; and a plurality of electrodes within the non-conductive body, the first electrode having a first polarity and a second electrode associated therewith having a second polarity opposite the first polarity.

[0044] In some embodiments, the technology described herein relates to an electrostatic chuck that further includes a controller configured to independently control each electrode of the plurality of electrodes.

[0045] These and other features, aspects, and advantages of the present disclosure will be described with reference to drawings of specific embodiments, which are intended to illustrate, but not to limit, the disclosure, It will be understood that the accompanying drawings, which are incorporated in and constitute a part of this specification, are for the purpose of illustrating the concepts disclosed herein and may not be to scale. [Brief description of the drawings]

[0046] [Figure 1] 1 illustrates an exemplary process for individually picking and placing a die according to some embodiments. [Diagram 2] 1 illustrates an exemplary process for batch flipping a die according to some embodiments. [Diagram 3] 1 illustrates an exemplary vacuum chuck in accordance with some embodiments. [Figure 4a] 1 illustrates an example of a porous insert that can be used in a vacuum chuck according to some embodiments. [Figure 4b]1 illustrates an example of a porous insert that can be used in a vacuum chuck according to some embodiments. [Figure 4c] 1 illustrates an example of a porous insert that can be used in a vacuum chuck according to some embodiments. [Diagram 5] 1 illustrates an exemplary electrostatic chuck in accordance with some embodiments. [Figure 6a] 1 illustrates an exemplary electrostatic chuck surface in accordance with some embodiments. [Figure 6b] 1 illustrates an exemplary electrostatic chuck surface in accordance with some embodiments. [Figure 7] 1 illustrates an exemplary process for batch flipping and individual picking up dies using an electrostatic chuck and conductive vacuum bonding tool according to some embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0047] Although several embodiments, examples, and illustrations are disclosed below, those skilled in the art will understand that the disclosure described herein extends beyond the scope of the specifically disclosed embodiments, examples, and illustrations, and includes other uses, as well as obvious modifications and equivalents thereof. The embodiments are described with reference to the attached figures, in which like numbers refer to like elements throughout the drawings. The terms used in the description presented herein are not intended to be interpreted as being limiting or restrictive simply because they are used in conjunction with the detailed description of certain specific embodiments of the invention. Furthermore, the embodiments of the present invention may comprise several novel features, and no single feature is solely responsible for its desirable attributes, nor is it essential to practice the invention described herein.

[0048] Various embodiments described herein relate to systems and methods for flipping and directly bonding die. The embodiments described herein may be used in the manufacture of any suitable type of electronic device, such as, for example, stacked structures, systems-on-chips (SoCs), microelectromechanical systems (MEMS) devices, optical devices, memory and / or processing devices, etc.

[0049] In some embodiments, the direct bonding process can be performed according to at least the techniques disclosed in U.S. Patent No. 1,037,919, the disclosure of which is incorporated herein by reference for all purposes. Figure 1 illustrates an example of a direct bonding process flow 100 in which individual die are picked up and placed on a carrier 138 and one or more of the die are directly bonded to the carrier 138. In block 101, a device wafer 114 may have a device portion 116 (e.g., a semiconductor portion on which circuitry may be patterned), a first bonding layer including a first non-conductive layer 118 and a plurality of first contact features 120 at least partially embedded in the first non-conductive layer 118, a first bonding surface 122 on an outer surface (e.g., a top surface) of the first bonding layer, and in some embodiments, a second bonding layer including a second non-conductive layer 124 and a plurality of second contact features 126 at least partially embedded in the second non-conductive layer 124, and a second surface 128 (which may include a second bonding surface for a multi-die stack arrangement) on an outer surface (e.g., a bottom surface) of the second bonding layer. As shown in block 101, a protective layer 130 (e.g., a polymer layer such as a photoresist layer) may be provided over the first bonding surface 122. The protective layer 130 may protect the wafer 114 during dicing. The wafer 114 may be placed on a dicing tape 110 that is attached to a frame 112. As described herein, the first bonding surface 122, and in some embodiments the second bonding surface 128, may be polished to a high degree of smoothness in preparation for direct bonding.

[0050] In block 102, the wafer 114 may be diced into a plurality of dies 132a-e. The wafer 114 may be diced by any suitable method, such as saw singulation, laser stealth dicing, reactive ion etching (RTE), or plasma dicing. After dicing, the protective layer 130 may be removed by ashing (e.g., exposure to oxygen plasma) and rinsing with deionized (DI) water, using a suitable solvent, or any other suitable method. In some embodiments, the protective layer 130 may be a polymer that responds to ultraviolet light (e.g., a photoresist layer), and the protective layer 130 may be exposed to ultraviolet light before being removed. As described herein, the bonding surfaces 122 of the dies 132a-e may be further processed on the dicing tape 110 in preparation for bonding. For example, the dies 132a-e may be activated (e.g., exposed to a plasma, such as a nitrogen-containing plasma, or an etchant) and / or cleaned in preparation for bonding.

[0051] In block 103, an inversion tool 134 (e.g., a vacuum inversion tool) can contact the first bonding surface 122 of the die 132b to pick up the die 132b from the tape for bonding. In block 104, the inversion tool 134 can invert the die 132b and transfer the die 132b to a bonding tool 136 (e.g., a vacuum bonding tool). The bonding tool 136 can contact the second surface 128 of the die 132b. In some embodiments, the second surface 128 can comprise a second bonding surface prepared for direct bonding, for example, including a polished non-conductive surface with conductive contacts at least partially embedded therein. In other embodiments, the second surface 128 can comprise a ground surface that is not bonded to another element. In block 105, the bonding tool 136 can be used to bond the die 132b to a carrier 138. The carrier can have a non-conductive carrier region with carrier contact features 142 at least partially embedded therein and a carrier bonding surface 144. The first bonding surface 122 of the die 132b may be bonded (i.e., directly bonded) to the carrier bonding surface 144. The carrier 138 may be a wafer, a die, an interposer, or some other suitable element.

[0052] Although the process shown in FIG. 1 offers some advantages, it also has some limitations. For example, by picking and bonding the dies individually, only known good dies (KGD) can be picked up. Similarly, if the carrier 138 has known defects, those parts can be avoided to prevent KGD from being placed on the known defects of the carrier 138. In some cases, the flip tool 134 contacting the first bond surface 122 can become contaminated. In some cases, the flip tool 134 can become contaminated from previous processing, from tool wear or defects, or by picking up particles on the surface of the die and scattering the particles to the other dies. For example, if 132a is picked up by the flip tool 134 first, contaminants on the first bond surface 122 of the die 132a can be transferred by the flip tool 134 to the other dies 132b-e. In some cases, the transfer of contaminants to the other dies can render those other dies unusable or cause other problems. Contamination problems can be especially pronounced when the die sizes are large. For example, a 300mm wafer with a die size of 1cm x 1cm and a defect density of about 0.1 per square centimeter would mean that about 10% of the dies would be defective. In contrast, if the die size was about 4cm x 4cm, then the same defect density would mean that about 75% of the dies would be defective.

[0053] In some cases, such as low volume test runs, it may be practical to clean the flip tool surface frequently, for example after every die, every 10 dies, etc. However, for high volume production applications, flip tools often process thousands of units per hour, making cleaning the flip tool between dies both prohibitive and costly. Therefore, a method is needed to flip dies in preparation for bonding without contaminating the die surfaces.

[0054] In some cases, using a collective bonding process may allow for the elimination of the flip tool that contacts each die. Although collective bonding prevents contamination from the flip tool, when performing collective bonding, known bad die cannot be screened out, e.g., KGD cannot be selected. Thus, collective bonding may lead to a reduction in device yield by including bad die. The inability to identify and select KGD may result in a reduction in overall yield and increased costs. Screening out bad die may be especially important when die sizes are large and there are only a few die per wafer. In general, manufacturing costs are largely independent of die size, so when there are only a few die per wafer, each die is more expensive to manufacture. Therefore, it is important to prevent known bad die from being bonded to other good device components.

[0055] In addition to the problem of not being able to screen out bad dies, collective bonding can pose other challenges. For example, some collective bonding processes include preparing a transfer wafer with an adhesive layer, bonding the dies to the transfer wafer to form a reconstituted wafer, and then performing a wafer-to-wafer bonding process to bond the transfer wafer and the carrier wafer. This process may include one or more cleaning and / or activation steps, after which the transfer wafer is removed.

[0056] Collective bonding can be especially problematic when die features are close to one another (e.g., fine pitch electrical interconnects, optical paths, etc.). Alignment errors can arise from flexibility of the dicing tape, from placement of the die on the carrier wafer (if a carrier wafer is used), and from alignment of the dicing tape or carrier wafer with the carrier wafer. The combined effects of alignment errors can result in reduced yields, reduced device performance, etc.

[0057] It may therefore be advantageous to be able to flip a die and bond it to another surface without contaminating the surface of the die, while still being able to individually pick and place the die, and to eliminate known bad die and reduce the chance of problems due to alignment errors.

[0058] 2, an exemplary process 200 for batch flipping die, individually picking up and placing the die on a carrier 138, and directly bonding one or more of the die to the carrier 138 is shown according to some embodiments. Process flow 200 may be similar in some respects to process flow 100. For example, blocks 101 and 102 of process flow 100 may be the same for process flow 200. In block 101, a device wafer 114 (e.g., a silicon device wafer) may have a device portion 116 (e.g., a semiconductor portion on which circuitry may be patterned), a first bonding layer including a first non-conductive layer 118 and a plurality of first contact features 120 at least partially embedded in the first non-conductive layer 118, a first bonding surface 122 at an outer surface (e.g., a top surface) of the first bonding layer, and optionally a second bonding layer including a second non-conductive layer 124 and a plurality of second contact features 126 at least partially embedded in the second non-conductive layer 124, and a second surface 128 at an outer surface (e.g., a bottom surface) of the second bonding layer. The first bonding layer and the second bonding layer may be disposed on opposite sides of the device portion 116. As shown in block 101, the first bonding surface 122 may be coated with a protective layer 130 (e.g., a polymer such as a photoresist layer) that protects the wafer 114 during dicing. The device wafer 114 can be placed on a dicing tape 110 that is attached to a frame 112. As described herein, the first bonding surface 122, and in some embodiments the second bonding surface 128, can be polished to a high degree of smoothness in preparation for direct bonding.

[0059] In block 102, the device wafer 114 is diced into a number of singulated device dies 120, as described above, which may undergo further processing in preparation for bonding.

[0060] In block 203, the frame 112, dicing tape 110, and diced device wafer 114 (comprising a plurality of device dies 132a-e) are collectively flipped and placed on a chuck 210. The first bonding surfaces 122 of the device dies 132a-e are in contact with a surface of the chuck 210. The device dies are secured (e.g., temporarily or removably secured) to the chuck 210, for example, by electrostatic or vacuum forces. In some embodiments, rather than flipping the frame 112, dicing tape 110, and device dies 132a-e, the chuck 210 can be moved into position to contact the dies 132a-e while remaining unchanged. For example, the chuck 210 can be moved vertically downward to contact the dies 132a-e.

[0061] In block 204, the dicing tape 110 and frame 112 are pulled away from the dies 132a-e to expose the second surface 128. The force applied by the chuck 210 to the dies 132a-e can be greater than the adhesive force of the dicing tape 110, allowing the dicing tape 110 to be removed while the dies 132a-e remain attached to the chuck 210. In some embodiments, the dicing tape 110 can be a UV release tape, allowing for relatively easy removal after exposure to UV light. For example, commercially available UV release tapes may have a loss of adhesive strength of about one or about two orders of magnitude after UV exposure. In some cases, the dicing tape 110 can be removed at a pre-defined acute angle relative to the second surface 128, which may optionally be the second bonding surface. This can reduce the downward electrostatic or vacuum force required to hold the dies 132a-e in place on the chuck 210.

[0062] In block 205, a bonding tool 136 (e.g., a vacuum bonding tool) can pick up a die (e.g., die 132d) from the chuck in preparation for bonding. In some embodiments, the die 132d can include a known good die (KGD). The bonding tool 136 can contact the second surface 128 of the die 132b. In block 206, the die 132b can be bonded (i.e., directly bonded) to a carrier 138 having a non-conductive carrier region 140 with carrier contact features 142 at least partially embedded therein. The carrier can have a carrier bonding surface 144, and the die 132b can be bonded (i.e., directly bonded) to the carrier 138 via the carrier bonding surface 144 and the first bonding surface 122 of the die 132b.

[0063] Process 200 offers several advantages. As mentioned above, individual pick and place processes (e.g., a process such as that shown in FIG. 1) can lead to contamination as the flip tool contacts multiple dies in succession. Process 200 eliminates the flip tool contacting the first mating surface of each die. Rather, the process includes collectively flipping and transferring multiple dies on a dicing tape to a clean chuck so that the first mating surface remains clean. In some embodiments, the chuck can be cleaned after each use. This can lead to increased yields, improved device performance, etc. Advantageously, because process 200 can pick up individual dies, only KGD can be selected, thereby increasing yields.

[0064] As discussed above, the process 200 can be performed using, for example, a vacuum chuck or an electrostatic chuck. Preferably, the chuck allows for the release of individual dies or groups of dies while leaving other dies or groups of dies attached to the surface of the chuck. FIG. 3 illustrates a vacuum chuck 304 according to some embodiments. The vacuum chuck 304 has a die support surface 306 with a number of die support areas 312 (shown in dashed lines) sized and shaped to accommodate corresponding dies, and a number of vacuum channels 308a-f that apply a vacuum force to each die 132a-f. In some embodiments, the die support areas can be indicated by markings or other indicia. In some embodiments, there may be more than one vacuum channel per die support area. In other embodiments, there may be exactly one vacuum channel per die support area. In one embodiment, the support surface is a single piece of material with a pattern of vacuum holes to hold each die in place. In another embodiment, a number of porous inserts 310a-f fit into the ends of each vacuum channel 308a-f, each corresponding to a vacuum channel. The porous insert 310 can be, for example, a porous ceramic material such as those used in grinding processes. The porous insert 310 may shed particles. Thus, in some embodiments, the surface of the porous insert 310 can be coated to prevent the particles from falling off. For example, in some embodiments, the surface can be coated with a polyimide material, such as a vacuum deposited polyimide thin film. In some embodiments, rather than using a porous ceramic material that may scratch the surface of the die 132a-f, a porous polymer material can be used, such as various porous polymer media from Porex Filtration Group, Fairburn, Georgia, USA, as well as SUNMAP™ ultra-high molecular weight polyethylene porous film from Nitto Denko Corporation, Osaka, Japan.

[0065] The first bonding surfaces 122 of the dies 132a-f can be in contact with the vacuum chuck 304. The dies 132a-f can be placed in contact with the porous inserts 310a-f, which can be smaller (e.g., slightly smaller) in size than the dies 132a-f. In another embodiment, the inserts 310a-310f are approximately the same size as the dies 132a-132f.

[0066] Advantageously, the vacuum force applied to each die 132a-f can be independently controlled, allowing individual dies to be picked up by a bonding tool while the other dies remain fixed in place. As an example, die 132a can be removed for bonding, while dies 132b-f remain on the chuck 304. A controller (not shown) can be configured to selectively disable the vacuum force to channel 308a to release die 132a (e.g., by operating a valve that blocks communication between a vacuum source (e.g., a vacuum pump) and channel 308a), while maintaining the vacuum force to channels 308b-f such that dies 132b-f remain attached to the surface of the vacuum chuck 304.

[0067] In some embodiments, the porous inserts 310a-f can be flush with the top surface of the vacuum chuck 304. In other embodiments, the porous inserts 310a-f can be recessed from the top surface of the vacuum chuck 304. For example, a slight recess can prevent the dies 132a-f from making physical contact with the porous inserts 310.

[0068] In some embodiments, a purge gas can be used to limit particle buildup on the surface of the vacuum chuck 304. For example, an inert gas can be flowed through the vacuum channels 308a-f and the porous inserts 310a-f after each die of the plurality of dies 132a-f is removed from the vacuum chuck 304, or before the dies 132a-f are placed on the vacuum chuck 304, or both. For example, in some embodiments, the system can be configured to flow argon or nitrogen gas through the channels 308a-f and the porous inserts 310a-f.

[0069] In some embodiments, the porous inserts 310a-f can be selected such that the porous surfaces 402a-c are proportional to the size of the dies 132a-f. For example, in some embodiments, the porous surfaces 402a-c can be approximately the same size and / or shape as (e.g., slightly smaller than) the size and / or shape of the dies 132a-f. Advantageously, the porous inserts 310a-f can distribute the vacuum force laterally across the first mating surfaces 122 of the dies 132a-f, thereby reducing stress that may be imparted by a vacuum force applied in a small area. This can reduce stress on the dies 132a-f that may lead to, for example, cracking or other failure. In some cases, the porous inserts 310a-f are interchangeable so that the chuck can be used for a variety of die sizes. FIGS. 4a-4c show examples of porous inserts 310 with different sizes and shapes of porous regions 402a-c to accommodate a variety of dies. As shown in Figure 4a, the porous region 402a can be the same size as the porous insert, which can be sized and shaped to suit a particular die shape. Figure 4b shows an alternative arrangement where the insert contains multiple porous regions 402b in a patterned arrangement. In some cases, for example for small dies, the porous region 402c can be smaller than the insert, as shown in Figure 4c.

[0070] In some embodiments, large thin dies such as DRAM dies may benefit from the use of a porous insert that allows for a more uniform application of vacuum force across the die area. In some embodiments, the die may be sufficiently robust to be placed directly on the surface of the chuck, for example, a graphic processing unit (GPU) or central processing unit (CPU) die may have a sufficient thickness (e.g., 200 um or more). In some embodiments, the vacuum chuck may have vacuum channels but no porous insert. For example, rather than having a porous insert, in some embodiments the vacuum channels may extend to the surface of the chuck. In some embodiments, the surface of the chuck may have an array of vacuum holes. In another embodiment, the surface of the chuck may have vacuum channels, e.g., recesses in the chuck surface, to allow for the application of vacuum force to a die placed on the chuck. In some embodiments, the surface of the chuck may be coated with an organic coating, such as polyimide, to prevent scratching and / or contamination of the bonding surface.

[0071] In some cases, rather than a vacuum chuck such as vacuum chuck 304 shown in FIG. 3, an electrostatic chuck 504 can be used to hold the dies 512a,b (e.g., dies 132a,b) in place during removal and stripping of the dicing tape. FIG. 5 illustrates an exemplary electrostatic chuck 504 according to some embodiments. In FIG. 5, the first mating surfaces 122 of the dies 512a,b are disposed on a die support surface 506 of the electrostatic chuck 504. The electrostatic chuck 504 has electrodes 508a,b and 510a,b for the dies 512a,b, each electrode pair corresponding to a die (e.g., electrodes 508a and 510a can correspond to die 512a). The electrodes 508a,b and 510a,b can be connected to a power source (not shown) and can be applied with voltages on the order of tens to thousands of volts depending on the configuration of the chuck and the force required to hold the dies flat to remove the dicing tape. The electrostatic chuck 504 can be made from a non-conductive dielectric material, such as alumina, silicon oxide, polyimide, etc., along with metal electrodes. In some cases, the surface of the electrostatic chuck can be coated with a coating that does not directly bond to the die. For example, the electrostatic chuck 504 can be coated with a polymer (e.g., polyimide) or other suitable coating. For example, a mobile electrostatic chuck available from Eshylon Scientific, Inc., Pleasanton, Calif., USA, is built on a silicon substrate and coated with a polyimide surface layer.

[0072] In some embodiments, the surface may be textured or patterned to reduce the contact area between the die and the die support surface 506 of the electrostatic chuck 504. Figures 6a and 6b show exemplary embodiments of textured surfaces that reduce contact between the first bonding surface 122 and the electrostatic chuck 504. For example, feature 602a shown in Figure 6a may reduce the surface area of ​​the die that contacts the chuck (i.e., the die may only contact the chuck at the apex of feature 602a). As another example, feature 602b shown in Figure 6b may limit contact between the first bonding surface 122 and the electrostatic chuck 504. The flat surface of feature 602b may reduce stress in the die compared to the small contact area of ​​feature 602a. Figures 6a and 6b are merely examples, and other patterns may be used. In some cases, the texture of the electrostatic chuck surface may be random or designed for a particular die shape and size (e.g., designed to minimize contact with critical areas on the die).

[0073] 5 shows a bipolar configuration with two electrodes for each of the dies 512a and 512b, other configurations are possible. For example, instead of a bipolar configuration, a monopolar configuration can be used with only a single electrode associated with each die. In some embodiments, the same electrode(s) can be used for multiple dies rather than providing an electrode for each die. In some embodiments, there may be only a single electrode (e.g., in the case of a monopolar electrostatic chuck) or two electrodes (in the case of a bipolar chuck) for all dies gripped on the surface of the chuck.

[0074] In some embodiments, the electrodes 508a,b and 510a,b can be in communication with a controller (not shown) that can selectively provide or disable power to the electrodes. For example, the controller can be configured to turn off the power to electrodes 508a and 510a so that the die 512a can be removed from the electrostatic chuck 504 (e.g., by a bonding tool such as bonding tool 136) and to maintain the power to electrodes 508b and 510b so that the die 512b remains attached to the electrostatic chuck 504. In some embodiments, rather than (or in addition to) turning off the power, the controller can reverse the power provided to the electrodes 508a and 510a.

[0075] In some embodiments, the power supplied to the electrodes may be high during parts of the process (e.g., when the dicing tape is removed from the die or when a plasma cleaning process is performed). At other times, the power supplied is low so that there is only a small electrostatic force holding the die in place, for example while picking up the die from the tape for bonding. When power to the electrodes of the chuck is cut off, the die will typically remain bonded to the chuck for some time due to residual charges in the die and in the dielectric material of the chuck. The residual charges will eventually dissipate, but advantageously the die can remain bonded long enough for the pick-up process to be completed.

[0076] While the residual charge helps hold the die in place during further manipulations (e.g., picking up), it also creates significant problems. For example, it can be difficult to remove the die from the chuck using a vacuum bonding tool without cracking or breaking the die. In some cases, lift pins or other mechanical devices can be used to lift the die from the chuck, but this can also crack or break the die. Using lift pins, for example, can cause the die to pop out of the chuck unpredictably. This can be particularly problematic because the electrostatic force that keeps the die attached to the chuck can change over time, making it difficult to determine the appropriate lift force to use to remove the die from the chuck. In some cases, the die can be released by reversing the electrostatic force. However, this can also be problematic because knowing the electrostatic force that keeps the die attached to the chuck can be important to determine the amount of force to apply (i.e., the voltage to apply to the electrodes).

[0077] 7 illustrates a process 700 for collectively inverting the dies 512a,b (which may be, for example, the dies 132a,b shown in FIG. 1) onto the electrostatic chuck 504 and removing the dies individually (or in selected subgroups) from the electrostatic chuck 504, according to some embodiments. Prior to block 701, the dies may be singulated and prepared for bonding, for example, as described in blocks 101 and 102 of FIG.

[0078] In block 701, the dies 512a,b with the dicing tape 110 attached supported by the frame 112 are collectively inverted onto the electrostatic chuck 504, with the dies 512a,b contacting the chuck via the first mating surface 122. In block 702, the electrodes 508a,b and 510a,b can be powered and the dies 512a,b can be electrostatically held to the surface of the electrostatic chuck 504. The dicing tape 110 can be removed from the dies 512a,b. In some embodiments, removing the dicing tape 110 can include exposing the dicing tape to ultraviolet light before and / or while the dicing tape is being pulled away from the dies 512a,b. In block 703, the power to the electrodes 508a,b and / or 510a,b may be reduced such that the dies 512a,b are held in place with an electrostatic force that is less than the electrostatic force applied during removal of the dicing tape 110. In some embodiments, the power to the electrodes 508a,b and 510a,b may be reduced or turned off completely, and the dies 512a,b may be held in place using residual charges in the electrostatic chuck 504 (e.g., in non-conductive areas of the electrostatic chuck 504) and in the dies 512a,b.

[0079] In block 704, a bonding tool 706 may be used to pick up an individual die (e.g., die 512b) from the surface of the electrostatic chuck 504 by contacting the second surface 128 of the die 512b. In the illustrated embodiment, the bonding tool 706 may comprise a vacuum bonding tool having a vacuum channel 708. Advantageously, the bonding tool 706 is electrically conductive and may be connected to an electrical ground. Thus, by grounding the bonding tool 706, when the bonding tool contacts the die 512b, any charge in the die 512b may be dissipated, and the die 512b may be picked up from the surface of the electrostatic chuck 504 without damaging the die 512b. In block 705, the die 132b may be bonded (i.e., directly bonded) to the carrier 138 via the carrier bonding surface 144 and the first bonding surface 122 of the die 512b.

[0080] Examples of direct bonding methods and direct bonding structures Various embodiments disclosed herein relate to direct bonding structures that allow two elements to be directly bonded to one another without the use of adhesive. Two or more semiconductor elements, such as integrated device dies, wafers, etc., can be stacked or bonded to one another to form a bonding structure. Conductive contact pads of one element can be electrically connected to corresponding conductive contact pads of another element. Any suitable number of elements can be stacked in the bonding structure.

[0081] In some embodiments, the elements are directly bonded to each other without adhesive. In various embodiments, the non-conductive or dielectric material of the first element can be directly bonded to the corresponding non-conductive or dielectric field area of ​​the second element without adhesive. The non-conductive material can be referred to as the non-conductive bonding area or bonding layer of the first element. In some embodiments, the non-conductive material of the first element can be directly bonded to the corresponding non-conductive material of the second element using dielectric-dielectric bonding techniques. For example, the direct bonding techniques disclosed in at least U.S. Pat. No. 9,564,414, U.S. Pat. No. 9,391,143, and U.S. Pat. No. 1,043,4749 can be used to form the dielectric-dielectric bond without adhesive, the entire disclosures of which are incorporated herein by reference for all purposes.

[0082] In various embodiments, a hybrid direct bond can be formed without the aid of an adhesive. For example, the dielectric bonding surfaces can be polished to a high degree of smoothness. The bonding surfaces can be cleaned and exposed to plasma and / or etchants to activate the bonding surfaces. In some embodiments, the bonding surfaces can be terminated with chemical species after or during activation, e.g., during a plasma and / or etch process. Without being bound by theory, in some embodiments, an activation process can be performed to break the chemical bonds of the bonding surfaces, and a termination process can provide additional chemical species to the bonding surfaces that improve the bond energy during direct bonding. In some embodiments, activation and termination treatments are provided in the same step, e.g., a plasma or wet etchant is applied to activate and terminate the bonding surfaces. In other embodiments, the bonding surfaces can be terminated in a separate process to provide additional chemical species for direct bonding. In various embodiments, the termination chemical species can include nitrogen. Additionally, in some embodiments, the bonding surfaces can be exposed to fluorine. For example, there can be one or more fluorine peaks near the layers and / or bonding interface / surface. Thus, in some embodiments, in a direct bond structure, the bond interface between the two dielectric materials can include a very smooth interface with high nitrogen content and / or fluorine peaks at the bond interface / surface. Further examples of activation and / or termination treatments can be found throughout U.S. Patent Nos. 9,564,414, 9,391,143, and 10,434,749, the entire disclosures of each of which are incorporated herein by reference for all purposes.

[0083] In various embodiments, the conductive contact pads of a first component may be directly bonded to corresponding conductive contact pads of a second component. For example, hybrid bonding techniques may be used to provide direct conductor-conductor bonds along bonding interfaces / surfaces including covalently directly bonded dielectric-dielectric surfaces prepared as described above. In various embodiments, direct conductor-conductor, e.g., contact pad-contact pad, bonds and hybrid dielectric-dielectric bonds may be formed using direct bonding techniques as disclosed at least in U.S. Pat. No. 9,716,033 and U.S. Pat. No. 9,852,988, the entire disclosures of each of which are incorporated herein by reference for all purposes.

[0084] For example, the dielectric bonding surfaces may be prepared and directly bonded to each other without an adhesive as described above. Conductive contact pads, which may be surrounded by non-conductive dielectric field regions, may also be directly bonded to each other without an adhesive. In some embodiments, each contact pad may be recessed below an outer surface (e.g., top surface) of the dielectric region or non-conductive bonding region, e.g., by less than 30 nm, less than 20 nm, less than 15 nm, or less than 10 nm, e.g., in the range of 2 nm to 20 nm, or in the range of 4 nm to 10 nm. The non-conductive bonding regions may be directly bonded to each other at room temperature in some embodiments without the use of adhesive, after which the bonded structure may be annealed. Upon annealing, the contact pads may expand and contact each other to form a direct metal-metal bond. Advantageously, a hybrid bonding technology such as Direct Bond Interconnect, or DBI®, available from Xperi, Inc., San Jose, Calif., USA, may be used to achieve a high density of pads connected across the direct bonding interface / surface, e.g., small or fine pitch for regular arrays. In some embodiments, the pitch of the bond pads, or the pitch of the conductive traces embedded in the bonding surface of one of the bonded elements, can be less than 40 microns, or less than 10 microns, or even less than 2 microns. In some applications, the ratio of the bond pad pitch to one of the bond pad dimensions is less than 5, or less than 3, and in some cases desirably less than 2. In other applications, the width of the conductive traces embedded in the bonding surface of one of the bonded elements can range between 0.3 and 3 microns. In various embodiments, the contact pads and / or traces can include copper, although other metals may be suitable.

[0085] Thus, in a direct bonding process, a first element can be directly bonded to a second element without the aid of an adhesive. In some configurations, the first element can include a singulated element, such as a singulated integrated device die. In other configurations, the first element can include a carrier or substrate (e.g., a wafer) that includes a plurality, e.g., tens, hundreds, or more, of device regions, which when singulated form a plurality of integrated device dies. Similarly, the second element can include a singulated element, such as a singulated integrated device die. In other configurations, the second element can include a carrier or substrate (e.g., a wafer).

[0086] As described herein, the first and second elements can be directly bonded to each other without adhesive, which is different from a deposition process. In one application, the width of the first element of the bonded structure can be similar to the width of the second element. In some other embodiments, the width of the first element of the bonded structure can be different from the width of the second element. The width or area of ​​the larger element of the bonded structure can be at least 10% greater than the width or area of ​​the smaller element. Thus, the first and second elements can include non-deposited elements. Furthermore, unlike deposited layers, the direct bonded structure can include defect regions with nanovoids along the bonded interface / surface. The nanovoids can be formed due to activation of the bonded surface / interface, e.g., exposure to a plasma. As discussed above, the bonded interface / surface can include material concentrations from the activation process and / or the final chemical treatment process. For example, in embodiments utilizing nitrogen plasma for activation, nitrogen peaks can be formed at the bonded interface / surface. In embodiments utilizing oxygen plasma for activation, oxygen peaks can be formed at the bonded interface / surface. In some embodiments, the bonding interface / surface may include silicon oxynitride, silicon oxycarbonitride, or silicon carbonitride. As described herein, the direct bond may include a covalent bond that is stronger than a van der Waals bond. The bonding layer may also include a polished surface that has been planarized to a high degree of smoothness.

[0087] In some embodiments, a metal-metal bond is formed between the contact pads. In some embodiments, the contact pads include copper or a copper alloy. In various embodiments, the metal-metal bond between the contact pads can be bonded such that the copper grains grow into each other across the bond interface / surface. In some embodiments, the copper can have grains oriented along 111 crystal planes to enhance copper diffusion across the bond interface. The bond interface can extend substantially completely to at least a portion of the bonded contact pads, and there are substantially no gaps between the non-conductive bond regions at or near the bonded contact pads. In some embodiments, a barrier layer (which can include, for example, copper) can be provided under the contact pads. However, in other embodiments, there may be no barrier layer under the contact pads, as described, for example, in U.S. Patent Publication No. 2019 / 0096741, the disclosure of which is incorporated herein by reference in its entirety for all purposes.

[0088] Additional Embodiments In the foregoing specification, the present system and process has been described with reference to specific embodiments thereof. It will be apparent, however, that various modifications and changes can be made thereto without departing from the broader spirit and scope of the embodiments disclosed herein. The specification and drawings are therefore to be regarded in an illustrative rather than a restrictive sense.

[0089] In fact, although the present system and process are disclosed in terms of specific embodiments and examples, those skilled in the art will appreciate that various embodiments of the present system and process extend beyond the specifically disclosed embodiments to other alternative embodiments and / or uses of the present system and process, as well as obvious modifications and equivalents thereof. Moreover, while several variations of the embodiments of the present system and process have been shown and described in detail, other modifications falling within the scope of the present disclosure will be readily apparent to those skilled in the art based on this disclosure. Also, various combinations or subcombinations of the specific features and implementations of these embodiments are considered to still fall within the scope of the present disclosure. It should be understood that various features and implementations of the disclosed embodiments can be combined with or substituted for one another to form various modes of the embodiments of the presently disclosed system and method. Any methods disclosed herein need not be performed in the order listed. Thus, it is not intended that the scope of the systems and processes disclosed herein should be limited by the specific embodiments described above.

[0090] It should be understood that each of the systems and methods of the present disclosure has multiple innovative embodiments, any one of which is not solely responsible for or required for the desirable attributes disclosed herein. The various features and processes described above can be used independently of one another or combined in various ways. All possible combinations and subcombinations are intended to fall within the scope of the present disclosure.

[0091] Certain features described in this specification in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. Moreover, although features may be described above as functioning in a particular combination and may initially be claimed as such, one or more features from a claimed combination may in some cases be deleted from the combination, and the claimed combination may be directed to a subcombination or a variation of the subcombination. No single feature or group of features is in any way essential or essential to all embodiments.

[0092] Additionally, as used herein, conditional terms, particularly "can, could, might, may" and "for example," are generally intended to convey that some embodiments include certain features, elements, and / or conditions and other embodiments do not include them, unless otherwise specified or understood otherwise within the context of use. Thus, such conditional terms are generally not intended to imply that features, elements, and / or steps are somehow required for one or more embodiments, or that one or more embodiments necessarily include logic, whether provided or initiated by the author, for determining whether those features, elements, and / or steps are included or performed in any particular embodiment. The terms "comprises," "includes," "having," and the like are used inclusively and open-endedly and do not exclude additional elements, features, acts, operations, and the like. Additionally, the term "or" is used in an inclusive sense (not an exclusive sense), so that, for example, when used to join a list of elements, the term "or" means one, some, or all of the elements in the list. Additionally, the articles "a," "an," and "the" as used in this application and the appended claims should be construed to mean "one or more" or "at least one," unless otherwise specified. Similarly, while the figures may depict acts in a particular order, it should be recognized that such acts need not be performed in the particular order or sequence depicted, and not all of the depicted acts need to be performed, to achieve desirable results. Additionally, the figures may depict one or more exemplary processes in the form of a flow chart. However, other acts not depicted may be incorporated into the illustrative methods and processes depicted in the diagram. For example, one or more additional acts may be performed before, after, simultaneously with, or between any of the depicted acts. Additionally, in other embodiments, these acts may be rearranged or reordered. Additionally, other embodiments are within the scope of the following claims.In some cases, the actions recited in the claims can be performed in a different order and still achieve desirable results.

[0093] Furthermore, the methods and devices described herein may be susceptible to various modifications and alternatives, specific examples of which are shown in the drawings and described in detail herein. However, it should be understood that the embodiments should not be limited to the specific forms or methods disclosed, but rather, the embodiments should cover all modifications, equivalents, and alternatives falling within the spirit and scope of the various implementations described and the appended claims. Furthermore, any particular feature, aspect, method, characteristic, property, quality, attribute, element, etc. disclosed herein in conjunction with one implementation or embodiment can be used with all other implementations or embodiments described herein. Any method disclosed herein does not have to be performed in the order listed. The methods disclosed herein may include certain actions performed by a professional. However, they may also include, explicitly or implicitly, third-party instructions regarding those actions. Additionally, the ranges disclosed herein encompass any and all overlaps, subranges, and combinations thereof. Expressions such as "up to," "at least," "greater than," "less than," "between," and the like, include the recited numbers. Numbers preceded by terms such as "about" or "approximately" are inclusive of the recited number and should be interpreted in the context (e.g., as precisely as reasonably possible under the circumstances, e.g., ±5%, ±10%, ±15%, etc.). For example, "about 3.5 mm" includes "3.5 mm". Phrases preceded by terms such as "substantially" are inclusive of the recited number and should be interpreted in the context (e.g., to the extent reasonably possible under the circumstances). For example, "substantially constant" includes "constant". Unless otherwise specified, all measurements are at standard conditions, including temperature and pressure.

[0094] As used herein, a phrase referring to "at least one of" a list of items refers to any combination of those items, including a single element. As an example, "at least one of A, B, or C" is intended to encompass A, B, C, A and B, A and C, B and C, and A, B and C. Conjunctions such as "at least one of X, Y, and Z" are understood with the context in which they are commonly used to convey that an item, term, etc. may be at least one of X, Y, or Z, unless specifically stated otherwise. Thus, such conjunctions are not generally intended to suggest that a particular embodiment requires that at least one of X, at least one of Y, and at least one of Z, respectively, are present. The headings provided herein, if any, are merely for convenience and do not necessarily affect the scope or meaning of the devices and methods disclosed herein.

[0095] Thus, the scope of the claims is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the present disclosure and the principles and novel features disclosed herein. [Explanation of symbols]

[0096] 110 Dicing tape 112 frames 114 Device Wafer 116 Device Part 118 First non-conductive layer 120 First Contact Feature 122 First joint surface 124 Second non-conductive layer 126 Secondary Contact Features 128 Second Surface 130 Protective layer 132a~e die 136 Joining Tools 140 Non-conductive carrier area 142 Career Contact Features 144 Carrier bonding surface 210 Chuck

Claims

1. The steps include preparing a first wafer and a second wafer, The steps include polishing the first wafer and the second wafer, The steps include dicing the first wafer on a dicing tape to form a diced wafer containing multiple dies, A step of activating at least one of the first wafer, the diced wafer, and the second wafer, The steps include inverting the diced wafer, The steps include fixing the diced wafer to a chuck, The steps include removing the dicing tape from the diced wafer, The steps include bonding at least some of the dies among the plurality of dies to the second wafer, A method that includes this.

2. The method according to claim 1, wherein the activation step includes activating the second wafer and one of the first wafer and the diced wafer.

3. The method according to claim 1, wherein the activation step includes exposing at least one of the first wafer, the diced wafer, and the second wafer to a nitrogen plasma.

4. A step of preparing a plurality of semiconductor dies on a dicing tape, wherein each of the plurality of semiconductor dies has a first bonding surface and a second surface opposite to the first bonding surface, and the second surfaces of the plurality of semiconductor dies are attached to the dicing tape. The steps include fixing the first bonding surfaces of the plurality of semiconductor dies to a chuck while the plurality of semiconductor dies are attached to the dicing tape, A method that includes this.

5. The steps include removing the dicing tape from the plurality of semiconductor dies, The steps include removing one of the plurality of semiconductor dies from the chuck, The steps include: directly bonding the first bonding surface of the semiconductor die to the carrier without the use of an adhesive; The method according to claim 4, further comprising:

6. The method according to claim 5, wherein the direct bonding step includes the step of directly bonding the nonconductive layer of the semiconductor die to the nonconductive layer of the carrier.

7. The method according to claim 6, wherein the direct bonding step further includes the step of directly bonding the conductive contact of the semiconductor die to the conductive contact of the carrier.

8. The method according to claim 5, wherein the second surface is a second bonding surface, and further comprises the step of directly bonding the second semiconductor die to the second bonding surface of the semiconductor die after the direct bonding step.

9. The steps include removing the dicing tape from the plurality of semiconductor dies, The steps include selectively releasing one or more semiconductor dies from the plurality of semiconductor dies, while fixing the remaining semiconductor dies of the plurality of semiconductor dies to the chuck, The method according to claim 4, further comprising:

10. The method according to claim 4, wherein the chuck is an electrostatic chuck, and the fixing step includes applying an electrostatic force to the plurality of semiconductor dies by the electrostatic chuck, and the step of applying an electrostatic force includes supplying power to a plurality of electrodes embedded in the electrostatic chuck.

11. The steps include removing the dicing tape from the plurality of semiconductor dies, The steps include selectively releasing one or more semiconductor dies from the plurality of semiconductor dies, while fixing the remaining semiconductor dies of the plurality of semiconductor dies to the electrostatic chuck, It further includes, The method according to claim 10, wherein the step of selectively releasing includes the step of changing the power supplied to one or more electrodes among the plurality of electrodes.

12. The method according to claim 4, wherein the chuck is a vacuum chuck, and the fixing step includes applying a vacuum force to the plurality of semiconductor dies through a plurality of vacuum channels embedded in the vacuum chuck.

13. The steps include removing the dicing tape from the plurality of semiconductor dies, The steps include selectively releasing one or more semiconductor dies from the plurality of semiconductor dies, while fixing the remaining semiconductor dies of the plurality of semiconductor dies to a vacuum chuck, The method according to claim 12, further comprising:

14. The method according to claim 13, wherein the selective release step includes reducing the vacuum force applied to the one or more semiconductor dies.

15. The method according to claim 12, wherein a plurality of porous inserts are arranged on top of the plurality of vacuum channels.

16. The method according to claim 15, wherein the plurality of semiconductor dies are arranged on top of the plurality of porous inserts.

17. The method according to claim 4, further comprising the step of picking up one of the plurality of dies from the chuck with a vacuum bonding tool, wherein the vacuum bonding tool is conductive and electrically grounded, and the picking-up step includes removing the charge from the die by bringing the die into contact with the conductive vacuum bonding tool.

18. The steps include fixing the wafer onto the dicing tape, A step of dicing the wafer into a plurality of semiconductor dies, wherein each of the plurality of semiconductor dies has a first bonding surface and a second surface opposite to the first bonding surface, and the second surfaces of the plurality of semiconductor dies are attached to the dicing tape. The steps include fixing the first bonding surfaces of the plurality of semiconductor dies to a chuck while the plurality of semiconductor dies are attached to the dicing tape, The steps include removing the dicing tape from the plurality of semiconductor dies, The steps include removing one of the plurality of semiconductor dies from the chuck, A method that includes this.

19. The method according to claim 18, further comprising the step of inverting the plurality of semiconductor dies and the dicing tape.

20. The method according to claim 18, wherein the chuck is an electrostatic chuck, and the method further includes the step of applying an electrostatic force to the plurality of semiconductor dies in order to fix the plurality of semiconductor dies to the electrostatic chuck.

21. The method according to claim 20, wherein the step of removing the die includes the step of reducing the electrostatic force applied to the die by the electrostatic chuck.

22. The method according to claim 20, wherein the step of removing the die includes the step of removing the power supplied to one or more electrodes of the electrostatic chuck that are related to the die.

23. The step to remove the die is, The steps include: reversing the electrostatic force applied to the die by the electrostatic chuck; The method according to claim 20, comprising the step of reducing the electrostatic force applied to the die by the electrostatic chuck.

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