Die edge protection to eliminate die chipping
Patent Information
- Application Number
- JP2024560858
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2022-04-27
- Filing Date
- 2023-02-24
- Publication Date
- 2026-02-10
AI Technical Summary
Chipping and cracking during the dicing process of semiconductor wafers into individual dies, leading to reduced yield and potential failure of the dies due to thermal expansion and contraction.
A protective layer is formed on the sidewalls of the die before dicing, which surrounds all sidewalls and can be made from less brittle materials such as oxides, nitrides, or metals, to prevent chipping and cracking.
The protective layer effectively reduces the occurrence of chipping and cracking during dicing, enhancing the yield of usable dies and preventing propagation of defects during thermal cycles.
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Abstract
Description
[Technical field]
[0001]
[0001] The present disclosure relates generally to semiconductor devices or dies, and more particularly, but not exclusively, to protecting the devices or dies to reduce or even eliminate chipping, as well as fabrication techniques thereof. [Background technology]
[0002]
[0002] Chipping and / or cracking are major issues when wafers (e.g., silicon (Si), gallium arsenide (GaAs), gallium nitride (GaN), etc.) are diced into individual dies. Various dicing techniques for singulating or dicing a wafer into individual dies, e.g., mechanical, laser, stealth, plasma, etc., have process variations. These variations result in front chipping and / or back chipping within the die.
[0003]
[0003] Such chipping / cracks result in reduced yield of useful die. Thus, there is a need for systems, devices, and methods that address the issues of chipping and cracking when singulating or dicing a wafer into individual die, including the methods, systems, and devices provided herein. Summary of the Invention
[0004]
[0004] The following presents a simplified summary of one or more aspects and / or examples related to the apparatus and methods disclosed herein. As such, the following summary should not be considered an extensive overview of all contemplated aspects and / or examples, nor should the following summary be considered to identify key or critical elements of all contemplated aspects and / or examples or to delineate the scope related to any particular aspect and / or example. As such, the following summary is intended solely to present certain concepts related to one or more aspects and / or examples related to the apparatus and methods disclosed herein in a simplified form prior to the detailed description presented below.
[0005]
[0005] An exemplary device is disclosed. The device may include a die. The device may also include a protective layer formed on a sidewall of the die. The protective layer may surround all of the sidewalls of the die.
[0006]
[0006] A method of fabricating a device is disclosed. The method may include providing a die. The method may also include forming a protective layer on a sidewall of the die. The protective layer may surround all of the sidewalls of the die.
[0007]
[0007] Other features and advantages associated with the apparatus and methods disclosed herein will become apparent to one of ordinary skill in the art based on the accompanying drawings and detailed description. [Brief description of the drawings]
[0008]
[0008] A more complete understanding of many of the aspects and attendant advantages of the present disclosure will be readily obtained by reference to the following detailed description, taken in conjunction with the accompanying drawings, which are presented merely to illustrate and not to limit the disclosure, and in which: [Figure 1]
[0009] 1 illustrates one or more problems associated with dicing a wafer into individual dies. [Figure 2A]
[0010] 1 illustrates steps of a conventional technique for dicing a wafer. [Figure 2B] 1 illustrates steps of a conventional technique for dicing a wafer. [Figure 2C] 1 illustrates steps of a conventional technique for dicing a wafer. [Figure 3A]
[0011] 1A-1D show side and top views of an exemplary module or device according to one or more aspects of the present disclosure. [Figure 3B] 1A-1D show side and top views of an exemplary module or device according to one or more aspects of the present disclosure. [Figure 4A]
[0012] 1 illustrates a device comprising a die and a protective layer according to one or more embodiments of the present disclosure. [Figure 4B] 1 illustrates a device comprising a die and a protective layer according to one or more embodiments of the present disclosure. [Figure 5A]
[0013] 1 illustrates a device comprising a die and a protective layer according to one or more embodiments of the present disclosure. [Figure 5B] 1 illustrates a device comprising a die and a protective layer according to one or more embodiments of the present disclosure. [Figure 5C] 1 illustrates a device comprising a die and a protective layer according to one or more embodiments of the present disclosure. [Figure 6A]
[0014] 1 illustrates a device comprising a die and a protective layer according to one or more embodiments of the present disclosure. [Figure 6B] 1 illustrates a device comprising a die and a protective layer according to one or more embodiments of the present disclosure. [Figure 6C] 1 illustrates a device comprising a die and a protective layer according to one or more embodiments of the present disclosure. [Figure 7A]
[0015] 1 illustrates a device comprising a die and a protective layer according to one or more embodiments of the present disclosure. [Figure 7B] 1 illustrates a device comprising a die and a protective layer according to one or more embodiments of the present disclosure. [Figure 7C] 1 illustrates a device comprising a die and a protective layer according to one or more embodiments of the present disclosure. [Figure 8A]
[0016] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 8B] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 8C] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 8D] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 8E]1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 9A]
[0017] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 9B] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 9C] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 9D] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 9E] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 10A]
[0018] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 10B] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 10C] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 10D] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 10E] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 11A]
[0019] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 11B] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 11C] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 11D] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 11E] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 11F] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 12A]
[0020] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 12B] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 12C] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 12D] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 12E] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 13A]
[0021] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 13B] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 13C] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 13D] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 13E] 1 illustrates stages in fabricating a device according to one or more aspects of the present disclosure. [Figure 14]
[0022] 1 is a flowchart of an exemplary method for manufacturing a device according to one or more aspects of the present disclosure. [Figure 15] 1 is a flowchart of an exemplary method for manufacturing a device according to one or more aspects of the present disclosure. [Figure 16] 1 is a flowchart of an exemplary method for manufacturing a device according to one or more aspects of the present disclosure. [Figure 17]
[0023] 1 illustrates various electronic devices in which one or more aspects of the present disclosure may be utilized.
[0009]
[0024] Other objects and advantages associated with the aspects disclosed herein will become apparent to those skilled in the art based on the accompanying drawings and detailed description. In accordance with common practice, features depicted by the drawings may not be drawn to scale. Thus, dimensions of depicted features may be arbitrarily increased or decreased for clarity. In accordance with common practice, some of the drawings have been simplified for clarity. Thus, the drawings may not depict all components of a particular apparatus or method. Moreover, like reference numerals refer to like features throughout the specification and figures. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0010]
[0025] Aspects of the present disclosure are illustrated in the following description and related drawings directed to specific embodiments. Alternative aspects or embodiments may be devised without departing from the scope of the teachings herein. In addition, well-known elements of the exemplary embodiments herein may not be described in detail or may be omitted so as not to obscure the relevant details of the teachings in the present disclosure.
[0011]
[0026] In some described exemplary implementations, instances are identified where portions of the structure and operation of various components may be derived from known conventional techniques and then configured in accordance with one or more exemplary embodiments. In such instances, some internal details of the structure and / or operation of the known conventional components may be omitted to help avoid potentially obscuring the concepts illustrated in the exemplary embodiments disclosed herein.
[0012]
[0027] The terms used herein are for the purpose of describing particular embodiments only and are not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural unless the context clearly indicates otherwise. It is further understood that the terms "comprises", "comprising", "includes" and / or "including" as used herein specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.
[0013]
[0028] As indicated above, the back-end process for singulating / dicing the wafer into individual dies or chips creates significant weaknesses in the die edges, which in turn poses real risks such as reducing the yield of usable dies. Such risks may be present regardless of the die technology, e.g., silicon (Si), gallium arsenide (GaAs), gallium nitride (GaN), etc. The risks may also be present regardless of the dicing technique used, e.g., mechanical, laser, stealth, plasma, etc. This is because process variations exist for all dicing techniques. For example, when using mechanical dicing techniques, the dicing blade may meander and / or vibrate from the desired dicing line. As a result, chips and / or cracks may appear on the front and / or backside of the die. In particular, the edge sidewalls of the die may suffer from chips and cracks.
[0014]
[0029] The chipping and / or cracking can render the die unusable, resulting in reduced die yield from the wafer, and even if the die is initially usable, the chipping and / or cracking can propagate into the die during use as it experiences thermal expansion and contraction as it is repeatedly turned on and off.
[0015]
[0030] FIG. 1 illustrates one or more problems associated with dicing a wafer into individual dies. FIG. 1 illustrates a wafer 100 having a partial view of four dies or chips 110 with edges 120. The wafer 100 is assumed to be diced along dice lines 130. Variations in the dicing process can result in meandering of the dicing lines 130. This can result in chips and cracks. More seriously, defects such as cracks / chips 140 can even appear within the die 110.
[0016]
[0031] Figures 2A-2C show stages of a conventional technique for dicing a wafer into individual dies. Figure 2A shows the result of front-end processing where a wafer 200 is produced that contains multiple dies 210. Between adjacent dies are scribe areas 215. The thickness of the wafer 200 is denoted as T(w) and the width of the scribe area 215 is denoted as W(s).
[0017]
[0032] 2B shows the stage after the wafer 200 has been back-ground to a thickness T(d), which is the thickness of the die 210. FIG 2C shows the stage after the wafer 200 has been diced into individual dies by dicing the scribe areas 215. When the wafer 200 is thinned by back-grinding before dicing, there is a greater likelihood that chips and cracks will develop due to the dicing process, as discussed above. The edges and corners of the die 210 are particularly vulnerable to developing chips and cracks.
[0018]
[0033] To address such issues, it has been proposed to protect the dies with a protective layer that is applied to the sidewalls of the dies before dicing the wafer into individual dies. The protective layer may be applied as part of a back-end process. Typically, the protective layer may be applied. The wafer may then be diced into individual dies.
[0019]
[0034] 3A and 3B show side and top views of an exemplary module or device 300 protected with a protective layer 320 according to one or more aspects of the present disclosure. FIG. 3A shows a side view of the device 300 having a die 310, and FIG. 3B shows a top view. As seen in FIG. 3A, the device 300 may include a die 310 on a substrate 330 and encapsulated with a mold compound 340. The die 310 may be connected to a board 350, such as a printed circuit board (PCB). The protective layer 320 may be formed on a sidewall of the die 310. As seen in FIG. 3B, the protective layer 320 may be formed on all sidewalls of the die 310. That is, the protective layer may surround all sidewalls of the die 310.
[0020]
[0035] The protective layer 320 may be formed of one or more passivation materials (e.g., oxides, nitrides, etc.), or one or more metals (e.g., titanium (Ti), chromium (Cr), gold (Au), etc.), or any combination thereof. In one aspect, the protective layer 320 may be formed of a material that is less brittle than the material of the die 310. In particular, the protective layer 320 may be formed of a material that is less brittle than the material of the edge portions of the die 310. For example, the protective layer 320 may be formed of a material that is less brittle than Si, GaAs, GaN, etc.
[0021]
[0036] 4A and 4B show a device 400 according to one or more aspects of the present disclosure. 4A and 4B show side and top views, respectively, of the device 400. As can be seen, the device 400 may include a die 410 and a protective layer 420. The die 410 may be assumed to be one of multiple dies of a wafer that has been diced into individual dies.
[0022]
[0037] The protective layer 420 may include a sidewall protective layer 422. As seen in FIG. 4A, the sidewall protective layer 422 (hence the protective layer 420) may be formed on a sidewall of the die 410. As seen in FIG. 4B, the sidewall protective layer 422 may surround all of the sidewall of the die 410. The protective layer 420, including the sidewall protective layer 422, may be formed from a similar material as the protective layer 320 (e.g., a passivation material, a metal, etc.) and therefore may have similar properties (e.g., less brittle than the material of the die 410).
[0023]
[0038] In one embodiment, the sidewall protection layer 422 may cover the entire vertical height of the sidewall of the die 410. That is, all of the sidewall of the die 410 may be covered by the sidewall protection layer 422. In another embodiment, the top surface of the die 410 and the top surface of the sidewall protection layer 422 may be planar to one another. Alternatively, or in addition, the bottom surface of the die 410 and the bottom surface of the sidewall protection layer 422 may be planar to one another.
[0024]
[0039] 5A, 5B, and 5C show a device 500 according to one or more aspects of the present disclosure. FIG. 5A shows a side view, FIG. 5B shows a top view, and FIG. 5C shows a bottom view of the device 500. As can be seen, the device 500 may comprise a die 510 and a protective layer 520. The die 510 may be assumed to be one of multiple dies of a wafer that has been diced into individual dies.
[0025]
[0040] The protective layer 520 may include a sidewall protective layer 522 and a top edge protective layer 524. As seen in FIG. 5A, the sidewall protective layer 522 may be formed on the sidewall of the die 510. The sidewall protective layer 522 may surround all of the sidewall of the die 510. As seen in FIG. 5A and FIG. 5B, the top edge protective layer 524 may be formed on more top edge portions of the die 510 and on the top surface of the sidewall protective layer 522. In FIG. 5B, the dashed rectangle represents the top edges and corners of the die 510. The top edge protective layer 524 may be formed on all of the top edge portions of the die 510. As a result, all of the top edges and corners of the die 510 may be covered by the protective layer 520. That is, the sidewall protective layer 522 and the top edge protective layer 522 may be covered.
[0026]
[0041] In one aspect, the sidewall protection layer 522 and the top edge protection layer 524 can be integrally formed from the same material. Alternatively, they can be formed from different materials. The protection layer 520 (i.e., the sidewall protection layer 522 and the top edge protection layer 524) can be formed from a material similar to the protection layer 320 (e.g., a passivation material, a metal, etc.) and therefore can have similar properties (e.g., less brittle than the material of the die 510).
[0027]
[0042] In one embodiment, protective layer 520 may cover the entire vertical height of the sidewalls of die 510 as well as a portion of the top edge of die 510. In another embodiment, the bottom surface of die 510 and the bottom surface of protective layer 520 may be planar to one another.
[0028]
[0043] 6A, 6B, and 6C illustrate a device 600 according to one or more aspects of the present disclosure. FIG. 6A illustrates a side view, FIG. 6B illustrates a top view, and FIG. 6C illustrates a bottom view of device 600. As can be seen, device 600 may comprise a die 610 and a protective layer 620. Die 610 may be assumed to be one of multiple dies of a wafer that has been diced into individual dies.
[0029]
[0044] The protective layer 620 may include a sidewall protective layer 622 and a bottom protective layer 626. As seen in FIG. 6A, the sidewall protective layer 622 may be formed on the sidewall of the die 610. As seen in FIG. 6A and FIG. 6B, the sidewall protective layer 622 may surround all the sidewalls of the die 610. As seen in FIG. 6A and FIG. 6C, the bottom protective layer 626 may be formed on the bottom surface of the die 610 and on the bottom surface of the sidewall protective layer 622. The dashed rectangle in FIG. 5C is the bottom edge and corner of the die 610. In one embodiment, the bottom protective layer 626 may cover the entire bottom surface of the die 610. As a result, all the bottom edges and bottom corners of the die 610 may be covered by the protective layer 620. That is, the sidewall protective layer 622 and the bottom protective layer 626 may be covered.
[0030]
[0045] In one embodiment, the sidewall protective layer 622 and the bottom protective layer 626 may be formed from the same material. Alternatively, they may be formed from different materials. In one embodiment, the bottom protective layer 626 may be formed from one or more metals (e.g., Cu, Al, Ti, Au, etc.) and configured as a back via contact for the die 610. The die 610 may be a wirebond die or a flip chip die. The protective layer 620 (i.e., the sidewall protective layer 622 and the bottom protective layer 626) may be formed from a material similar to the protective layer 320 (e.g., a passivation material, a metal, etc.) and therefore may have similar properties (e.g., less brittle than the material of the die 610).
[0031]
[0046] In one embodiment, the protective layer 620 may cover the entire vertical height of the sidewalls of the die 610. In another embodiment, the top surface of the die 610 and the top surface of the protective layer 620 may be planar to one another. In an alternative embodiment, a top edge protection layer (similar to the top edge protection layer 524) may be added (not shown). In this manner, the top edges and corners of the die 610 may also be covered by, for example, the sidewall protection layer and the top edge protection layer.
[0032]
[0047] 7A, 7B, and 7C illustrate a device 700 according to one or more aspects of the present disclosure. FIG. 7A illustrates a side view, FIG. 7B illustrates a top view, and FIG. 7C illustrates a bottom view of device 700. As can be seen, device 700 may comprise a die 710 and a protective layer 720. Die 710 may be assumed to be one of multiple dies of a wafer that has been diced into individual dies.
[0033]
[0048] As seen in FIG. 7A, the protective layer 720 may include an upper sidewall protective layer 728 and a lower sidewall protective layer 729. As seen in FIG. 7B, the upper sidewall protective layer 728 may surround an upper portion of all sidewalls of the die 710. As seen in FIG. 7C, the lower sidewall protective layer 729 may surround a lower portion of all sidewalls of the die 710. In one embodiment, the upper sidewall protective layer 728 and the lower sidewall protective layer 729 may be formed from the same material. Alternatively, they may be formed from different materials. The protective layer 720 (i.e., the upper sidewall protective layer 728 and the lower sidewall protective layer 729) may be formed from a similar material as the protective layer 320 (e.g., a passivation material, a metal, etc.) and therefore may have similar properties (e.g., less brittle than the material of the die 710).
[0034]
[0049] In one embodiment, the top surface of the top sidewall protection layer 728 may be planar with the top surface of the die 710. Alternatively, or in addition, the bottom surface of the bottom sidewall protection layer 729 may be planar with the bottom surface of the die 710. In an alternative embodiment, a top edge protection layer (similar to the top edge protection layer 524) may be added (not shown). In this way, the top edges and corners of the die 710 may be covered, for example, by the top sidewall protection layer and the top edge protection layer. In an alternative embodiment, a bottom protection layer (similar to the bottom protection layer 626) may be added (not shown). In this way, the bottom edges and corners of the die 710 may be covered by the bottom sidewall protection layer and the bottom edge protection layer. Both alternatives may be combined. That is, in yet another alternative, both the top edge protection layer and the bottom protection layer may be added.
[0035]
[0050] 8A-8E illustrate stages in fabricating a device according to one or more embodiments of the present disclosure. In one embodiment, the fabricated device may be similar to device 400 including die 410 having protective layer 420 (including sidewall protective layer 422) shown in FIGS. 4A-4B.
[0036]
[0051] 8A illustrates a later stage of front-end processing where a wafer 800 including multiple dies 810 may be fabricated. The dies 810 may be semiconductor dies (e.g., Si, GaAs, GaN, etc.). T(w) represents the thickness of the wafer 800. For example, T(w) may be about 700 μm. Scribe regions 815 may be between adjacent dies 810 in the wafer 800. W(s) represents the width of the scribe regions 815. T(w) may depend on the technology of the dies 810 (e.g., Si, GaAs, GaN, etc.) and / or the dicing technology used to dice the wafer 800. In one example, T(w) may be as small as about 20 μm or as large as 45 μm or more.
[0037]
[0052] FIG. 8B illustrates a stage where a trench 823 may be formed in a scribe area 815 on the front side of the wafer 800. For example, the scribe area 815 may be front side etched, for example, by plasma, laser, etc. T(d) represents the depth of the trench. In one embodiment, T(d) may be at least the thickness of the die 810. That is, the bottom of the trench may be at a height equal to or lower than the lower surface of the die 810. For a typical Si die, T(d) may be about 125 μm. For a GaAs die, T(d) may range from 150 μm to 200 μm. In one embodiment, the trench 823 may expose a sidewall of the die 810. Note that the trench 823 between adjacent dies 810 may expose the sidewalls of both dies 810. When the wafer thickness T(w) is significantly greater than the etch depth T(d) (eg, 700 μm vs. 175 μm), the act of etching trench 823 is less likely to result in the development of chips and / or cracks.
[0038]
[0053] 8C illustrates a stage where trench 823 may be filled with protective material 825. Protective material 825 may include one or more passivation materials (e.g., oxides, nitrides, etc.), or one or more metals (e.g., titanium (Ti), chromium (Cr), gold (Au), etc.), or any combination thereof. In this case, protective material 825 may fill the entire trench 823. Note that protective material 825 may cover the sidewalls of die 810 and the bottom of trench 823.
[0039]
[0054] In one aspect, a top surface of protective material 825 can be planar with a top surface of die 810. For example, during the filling process, trench 823 can be overfilled (not shown) with protective material 825 such that a portion of protective material 825 is above the top surface of die 810. In this case, protective material 825 can be planarized after filling trench 823 such that the top surfaces of protective material 825 and of the top surface of die 810 are planar.
[0040]
[0055] 8D shows a stage where the wafer 800 may be back-ground. That is, the backside of the wafer 800 may be ground. The wafer 800 may be back-ground until its thickness reaches T(d), which is the thickness of the die 810. In one embodiment, the protective material 825 may act as a back-grind stop layer.
[0041]
[0056] FIG. 8E shows a stage where the wafer 800 can be diced into individual dies 810. Various dicing techniques (e.g., mechanical, laser, plasma, etc.) can be used. In particular, the protective material 825 can be diced. In one embodiment, it may be preferable for the width W(s) of the scribe area to be wider than the width of the dicing. Then, when the dicing is completed, not all of the protective material 825 is removed. The overhangs on both sides of the dicing—the remaining protective material 825—become part of the protective layer. In this case, the remaining protective material 825 becomes the sidewall protective layer 822.
[0042]
[0057] It should be noted that the protective material 825 serves to protect the die 810 from chipping and cracking as the wafer 800 is diced. The die 810 may be brittle and therefore may be subject to chipping and / or cracking during the dicing process if it is not protected. In one aspect, the protective material 825 (and thus the protective layer resulting therefrom) may be a less brittle material than the die 810 itself. In particular, the protective material 825 may be less brittle than the edge and / or corner portions of the die 810. In this manner, the protective material 825 may protect the die 810 during the dicing process and may also serve to stop chips from propagating after dicing (e.g., during operation where the die 810 may be subject to thermal and / or mechanical stresses).
[0043]
[0058] 9A-9E illustrate stages in fabricating a device according to one or more embodiments of the present disclosure. In one embodiment, the fabricated device may be similar to device 400 shown in FIGS. 4A-4B, which includes a die 410 having a protective layer 420 (including a sidewall protective layer 422).
[0044]
[0059] Figure 9A shows a later stage of front-end processing in which a wafer 900 is fabricated that includes multiple dies 910. The dies 910 may be semiconductor dies. T(w) represents a thickness of the wafer 900. Scribe regions 915 may be between adjacent dies 910 in the wafer 900. Figure 9A may be similar to Figure 8A. Therefore, the above description regarding Figure 8A may apply to Figure 9A.
[0045]
[0060] FIG. 9B illustrates a stage where a trench 923 may be formed in the scribe area 915 on the front side of the wafer 900, for example by front side etching. T(d) represents the depth of the trench. In one embodiment, T(d) may be at least the thickness of the die 910. The trench 923 may expose a sidewall of the die 910. FIG. 9B may be similar to FIG. 8B. Therefore, the above description regarding FIG. 8B may apply to FIG. 9B.
[0046]
[0061] 9C illustrates a stage where the trench 923 may be filled with a protective material 925. The protective material 925 may include one or more passivation materials (e.g., oxides, nitrides, etc.), or one or more metals (e.g., titanium (Ti), chromium (Cr), gold (Au), etc.), or any combination thereof. In this case, the protective material 925 may not fill the entire trench 923, which is a deviation from FIG. 8C. However, similar to FIG. 8C, the protective material 925 may cover the sidewalls of the die 910 and the bottom of the trench 923. Other aspects of the above description of FIG. 8C may also apply to FIG. 9C.
[0047]
[0062] In one aspect, a top surface of protective material 925 can be planar with a top surface of die 910. For example, during the filling process, trench 923 can be overfilled with protective material 925 (not shown) such that an outer portion of protective material 925 is above the top surface of die 910. In this case, protective material 925 can be planarized after filling trench 923 such that the top surfaces of protective material 925 and of die 910 are planar.
[0048]
[0063] FIG. 9D illustrates a stage at which the wafer 900 may be back-ground. The wafer 900 may be back-ground until its thickness reaches T(d), which is the thickness of the die 910. In one embodiment, the protective material 925 may act as a back-grinding stop layer. FIG. 9D may be similar to FIG. 8D except for the shape of the protective material 925. Therefore, the above description of FIG. 8D may apply to FIG. 9D.
[0049]
[0064] FIG. 9E shows a stage where the wafer 900 may be diced into individual dies 910. In particular, the protective material 925 may be diced. Again, it may be preferable for the width W(s) of the scribe area to be wider than the width of the dicing. Then, when the dicing is completed, the center of the "U" portion of the protective material 925 may be removed. However, the overhangs on either side of the dicing - the remaining protective material 925 - may become part of a protective layer, such as the sidewall protective layer 922. FIG. 9E may be similar to FIG. 8E. Therefore, the above description of FIG. 8E may apply to FIG. 9E.
[0050]
[0065] The protective material 925 may serve to protect the die 910 from chipping and cracking when the wafer 900 is diced. In one aspect, the protective material 925 (and thus the protective layer resulting therefrom) may be a material that is less brittle than the die 910 itself. In particular, the protective material 925 may be less brittle than the edge and / or corner portions of the die 910 for the reasons discussed above.
[0051]
[0066] 10A-10E illustrate stages in fabricating a device according to one or more embodiments of the present disclosure. In one embodiment, the fabricated device may be similar to device 500 shown in FIGS. 5A-5C, which includes a die 510 having a protective layer 520 (including a sidewall protective layer 522 and a top edge protective layer 524).
[0052]
[0067] FIG 10A illustrates a later stage of front-end processing in which a wafer 1000 is fabricated that includes multiple dies 1010. The dies 1010 may be semiconductor dies. T(w) represents a thickness of the wafer 1000. Scribe regions 1015 may be between adjacent dies 1010 in the wafer 1000. FIG 10A may be similar to FIG 8A. Therefore, the above description regarding FIG 8A may apply to FIG 10A.
[0053]
[0068] FIG. 10B illustrates a stage where a trench 1023 may be formed in the scribe area 1015 on the front side of the wafer 1000, for example by front side etching. T(d) represents the depth of the trench. In one embodiment, T(d) may be at least the thickness of the die 1010. The trench 1023 may expose a sidewall of the die 1010. FIG. 10B may be similar to FIG. 8B. Therefore, the above description regarding FIG. 8B may apply to FIG. 10B.
[0054]
[0069] 10C illustrates a stage where the trenches 1023 may be filled with a protective material 1025. The protective material 1025 may include one or more passivation materials (e.g., oxides, nitrides, etc.), or one or more metals (e.g., titanium (Ti), chromium (Cr), gold (Au), etc.), or any combination thereof.
[0055]
[0070] In this case, the trench 1023 may be intentionally overfilled with the protective material 1025 such that the protective material 1025 has a mushroom shape (also called a T-shape) with a portion of the protective material 1025 above the top surface of the die 1010.
[0056]
[0071] FIG. 10D illustrates a stage at which the wafer 1000 may be back-ground. The wafer 1000 may be back-ground until its thickness reaches T(d), which is the thickness of the die 1010. In one embodiment, the protective material 1025 may act as a back-grinding stop layer. FIG. 10D may be similar to FIG. 8D, except for the shape of the protective material 1025. Therefore, the above description of FIG. 8D may apply to FIG. 10D.
[0057]
[0072] FIG. 10E shows a stage where the wafer 1000 may be diced into individual dies 1010. In particular, the protective material 1025 may be diced. Again, it may be preferable for the width W(s) of the scribe area to be wider than the width of the dicing. Then, when the dicing is completed, the center of the protective material 1025 may be removed. However, the overhangs on both sides of the dicing - the remaining protective material 1025 - may become part of the protective layer, including the sidewall protective layer 1022 and the top edge protective layer 1024. FIG. 10E may be similar to FIG. 8E, except for the shape of the resulting protective layer. Therefore, the above description of FIG. 8E may apply to FIG. 10E.
[0058]
[0073] 11A-11F illustrate stages in fabricating a device according to one or more embodiments of the present disclosure. In one embodiment, the fabricated device may be similar to device 600 shown in FIGS. 6A-6C, which includes a die 610 having a protective layer 620 (including a sidewall protective layer 622 and a bottom protective layer 626).
[0059]
[0074] FIG 11A shows a later stage of front-end processing in which a wafer 1100 is fabricated that includes multiple dies 1110. The dies 1110 may be semiconductor dies. T(w) represents a thickness of the wafer 1100. Scribe regions 1115 may be between adjacent dies 1110 in the wafer 1100. FIG 11A may be similar to FIG 8A. Therefore, the above description regarding FIG 8A may apply to FIG 11A.
[0060]
[0075] FIG. 11B illustrates a stage where a trench 1123 may be formed in the scribe area 1115 on the front side of the wafer 1100, for example by front side etching. T(d) represents the depth of the trench. In one embodiment, T(d) may be at least the thickness of the die 1110. The trench 1123 may expose a sidewall of the die 1110. FIG. 11B may be similar to FIG. 8B. Therefore, the above description regarding FIG. 8B may apply to FIG. 11B.
[0061]
[0076] 11C illustrates a stage where the trench 1123 may be filled with a protective material 1125. The protective material 1125 may include one or more passivation materials (e.g., oxides, nitrides, etc.), or one or more metals (e.g., titanium (Ti), chromium (Cr), gold (Au), etc.), or any combination thereof. FIG 11C may be similar to FIG 8C. Thus, the above description regarding FIG 8C may apply to FIG 11C.
[0062]
[0077] In one aspect, a top surface of protective material 1125 can be planar with a top surface of die 1110. For example, during the filling process, trench 1123 can be overfilled with protective material 1125 (not shown) such that an outer portion of protective material 1125 is above the top surface of die 1110. Protective material 1125 can be planarized after filling trench 1123 such that the top surfaces of protective material 1125 and of die 1110 are planar.
[0063]
[0078] FIG. 11D illustrates a stage at which the wafer 1100 may be back-ground. The wafer 1100 may be back-ground until its thickness reaches T(d), which is the thickness of the die 1110. In one embodiment, the protective material 1125 may act as a back-grind stop layer. FIG. 11D may be similar to FIG. 8D. Therefore, the above description of FIG. 8D may apply to FIG. 11D.
[0064]
[0079] 11E shows a stage where additional protective material 1127 may be applied onto the underside of wafer 1100 after backgrinding wafer 1100. Protective material 1125 and additional protective material 1127 may be the same. Alternatively, they may be different. In one example, additional protective material 1127 may be metal to act as a back via contact when wafer 1100 is diced into individual dies.
[0065]
[0080] FIG. 11F shows a stage where the wafer 1100 may be diced into individual dies 1110. In particular, the protective material 1125 and the additional protective material 1127 may be diced. Again, it may be preferable that the width W(s) of the scribe area is wider than the width of the dicing. Then, when the dicing is completed, the center of the protective material 1125 may be removed. However, the overhangs on both sides of the dicing - the remaining protective material 1125 - may become part of the protective layer, including the sidewall protective layer 1122 and the bottom protective layer 1126. FIG. 11F may be similar to FIG. 8E, except for the shape of the resulting protective layer. Therefore, the above description of FIG. 8E may apply to FIG. 11F.
[0066]
[0081] 12A-12E illustrate stages in fabricating a device according to one or more embodiments of the present disclosure. In one embodiment, the fabricated device may be similar to device 700 shown in FIGS. 7A-7C, which includes a die 710 having a protective layer 720 (including an upper sidewall protective layer 728 and a lower sidewall protective layer 729).
[0067]
[0082] FIG 12A illustrates a later stage of front-end processing in which a wafer 1200 is fabricated that includes multiple dies 1210. The dies 1210 may be semiconductor dies. T(w) represents a thickness of the wafer 1200. Scribe regions 1215 may be between adjacent dies 1210 in the wafer 1200. FIG 12A may be similar to FIG 8A. Therefore, the above description regarding FIG 8A may apply to FIG 12A.
[0068]
[0083] 12B shows a stage where the wafer 1200 may be background. The wafer 1200 may be background until its thickness reaches T(d), which is the thickness of the die 1210.
[0069]
[0084] 12C illustrates a stage where an upper edge groove 1216 and a lower edge groove 1217 may be formed. The upper edge groove 1216 may be formed in the scribe area 1215 on the front side of the wafer 1200, for example, by a front side etch. The upper edge groove 1216 may expose an upper portion of all sidewalls of the die 1210. The lower edge groove 1217 may be formed in the scribe area 1215 on the back side of the wafer 1200, for example, by a back side etch. The lower edge groove 1217 may expose a lower portion of all sidewalls of the die 1210.
[0070]
[0085] In one aspect, the top surface of the first protective material 1218 can be planar with the top surface of the die 1210. For example, during the filling process, the top edge groove 1216 can be overfilled with the first protective material 1218 (not shown) such that a portion of the first protective material 1218 is above the top surface of the die 1210. The first protective material 1218 can be planarized after filling the top edge groove 1216 such that the top surfaces of the first protective material 1218 and of the die 1210 are planar.
[0071]
[0086] Alternatively, or in addition, the bottom surface of second protective material 1219 may be planar with the bottom surface of die 1210. For example, during the filling process, bottom edge groove 1217 may be overfilled with second protective material 1219 (not shown) such that a portion of second protective material 1219 is below the bottom surface of die 1210. Second protective material 1219 may be planarized after filling bottom edge groove 1217 such that the bottom surfaces of second protective material 1219 and of die 1210 are planar.
[0072]
[0087] 12D shows a stage where the top edge groove 1216 may be filled with a first protective material 1218 and the bottom edge groove 1217 may be filled with a second protective material 1219. The first protective material 1218 may include one or more passivation materials (e.g., oxides, nitrides, etc.), or one or more metals (e.g., titanium (Ti), chromium (Cr), gold (Au), etc.), or any combination thereof. The second protective material 1219 may include one or more passivation materials (e.g., oxides, nitrides, etc.), or one or more metals (e.g., titanium (Ti), chromium (Cr), gold (Au), etc.), or any combination thereof. The first protective material 1218 and the second protective material 1219 may be the same material. Alternatively, they may be different materials.
[0073]
[0088] 12E shows a stage where the wafer 1200 may be diced into individual dies 1210. In this case, the scribe area material may be diced. It may be preferable for the width W(s) of the scribe area to be wider than the width of the dicing. Then, when dicing is completed, the scribe area material may be removed, but the first protective material 1218 and the second protective material 1219 may remain, forming the top sidewall protective layer 1228 and the bottom sidewall protective layer 1229.
[0074]
[0089] 13A-13E illustrate stages in fabricating a device according to one or more embodiments of the present disclosure. In one embodiment, the fabricated device may be similar to device 400 shown in FIGS. 4A-4B, which includes a die 410 having a protective layer 420 (including a sidewall protective layer 422).
[0075]
[0090] FIG 13A illustrates a later stage of front-end processing in which a wafer 1300 is fabricated that includes multiple dies 1310. The dies 1310 may be semiconductor dies. T(w) represents a thickness of the wafer 1300. Scribe regions 1315 may be between adjacent dies 1310 in the wafer 1300. FIG 13A may be similar to FIG 8A. Therefore, the above description of FIG 8A may apply to FIG 13A.
[0076]
[0091] 13B shows a stage where edge grooves 1329 may be formed in the scribe area 1315 on the front side of the wafer 1300, for example, by front side etching. T(d) represents the depth of the trench. In one embodiment, T(d) may be at least the thickness of the die 1310. The edge grooves 1329 may be adjacent to each die 1310 and expose the sidewalls of the die 1310. The width of each edge groove 1329 may be less than the width W(s) of the scribe area 1315.
[0077]
[0092] 13C illustrates a stage where the edge grooves 1329 may be filled with a protective material 1325. The protective material 1325 may include one or more passivation materials (e.g., oxides, nitrides, etc.), or one or more metals (e.g., titanium (Ti), chromium (Cr), gold (Au), etc.), or any combination thereof. In this case, the protective material 1325 may fill the entirety of each edge groove 1329. The protective material 1325 may cover the sidewalls of the die 1310.
[0078]
[0093] In one aspect, the top surface of protective material 1325 can be planar with the top surface of die 1310. For example, during the filling process, edge grooves 1329 can be overfilled (not shown) with protective material 1325 such that a portion of protective material 1325 is above the top surface of die 1310. In this case, protective material 1325 can be planarized after filling edge grooves 1329 such that the top surfaces of protective material 1325 and of die 1310 are planar.
[0079]
[0094] FIG. 13D illustrates a stage at which the wafer 1300 may be back-ground. The wafer 1300 may be back-ground until its thickness reaches T(d), which is the thickness of the die 1310. In one embodiment, the protective material 1325 may act as a back-grinding stop layer. FIG. 13D may be similar to FIG. 8D, except for the shape of the protective material 1325. Therefore, the above description of FIG. 8D may apply to FIG. 13D.
[0080]
[0095] FIG. 13E shows a stage where the wafer 1300 may be diced into individual dies 1310. In particular, the protective material 1325 may be diced. Again, it may be preferable for the width W(s) of the scribe area to be wider than the width of the dicing. Then, when dicing is complete, the scribe area material may be removed, but the protective material 1325 may remain, forming the sidewall protective layer 1322. FIG. 13E may be similar to FIG. 8E. Therefore, the above description of FIG. 8E may apply to FIG. 13E.
[0081]
[0096] 14 illustrates a flowchart of an example method 1400 of fabricating a device (e.g., device 300, 400, 500, 600, 700, etc.) in accordance with one or more aspects of the present disclosure. At block 1410, a die (e.g., die 310, 410, 510, 610, 710) may be provided. In one aspect, method 1400 may be considered to be part of a back-end process, i.e., a process that is performed after a wafer is fabricated.
[0082]
[0097] In block 1420, a protective layer (e.g., protective layer 320, 420, 520, 620, 720) may be formed on the sidewalls of the die. The protective layer may surround all of the sidewalls of the die. The protective layer may be formed from a variety of materials (e.g., one or more oxides, one or more nitrides, one or more metals, or any combination thereof).
[0083]
[0098] Figure 15 illustrates a flowchart of an exemplary process for implementing blocks 1410 and 1420. In one aspect, the flowchart of Figure 15 may apply to at least the steps illustrated in Figures 8A-8E, 9A-9E, 10A-10E, 11A-11D, and 13A-13E for forming devices 400, 500, 600.
[0084]
[0099] In block 1510, a trench may be etched (e.g., see Figures 8B, 9B, 10B, 11B, 13B) in a scribe area (e.g., scribe area 815, 915, 1015, 1115, 1315) of a wafer (e.g., wafer 800, 900, 1000, 1100, 1300). The trench (e.g., trench 823, 923, 1023, 1123, edge groove 1323) may expose all sidewalls of a die (e.g., die 810, 910, 1010, 1110, 1310). The depth of the trench may be equal to or greater than the thickness T(d) of the die.
[0085]
[0100] In block 1520, the trench may be filled with a protective material (see, e.g., FIGS. 8C, 9C, 10C, 11C, 13C). The protective material (e.g., protective material 825, 925, 1025, 1125, 1325) may cover the sidewalls of the die. The protective material may also cover at least a portion of the bottom of the trench. In one embodiment, the trench may be completely filled with the protective material (see, e.g., FIGS. 8C, 11C, 13C). In another embodiment, the trench may be filled such that a cross section of the protective material is U-shaped to cover the sidewalls of the die and the bottom of the trench (see, e.g., FIG. 9C). In yet another embodiment, the trench may be overfilled above the top surface of the die. For example, the trench may be overfilled with the protective material above the top surface of the die, e.g., in a mushroom shape (see, e.g., FIG. 10C).
[0086]
[0101] In block 1525, the protective material may be planarized so that a top surface of the protective material is planar with the top surface of the die (see, e.g., FIGS. 8C, 9C, 11C, and 13C). For example, if the trench is overfilled, the excess protective material may be planarized.
[0087]
[0102] Note that block 1525 is optional, as indicated by the dashed rectangle, i.e., block 1525 does not have to be performed. For example, the trench may be intentionally overfilled with protective material and left without planarization (see, e.g., FIG. 10C).
[0088]
[0103] In block 1530, the wafer may be back-grinded (see, e.g., FIGS. 8D, 9D, 10D, 11D, 13D). Back-grinding may stop when the wafer is thinned to a thickness T(d), i.e., to the thickness of the die. In one embodiment, a protective material may be utilized as a back-grind stop layer when the trench depth is T(d). In one embodiment, block 1530 may be performed after block 1525 or after 1520 (if planarization is not performed).
[0089]
[0104] In block 1535, additional protective material (e.g., additional protective material 1127) may be applied onto the underside of the wafer (see, e.g., FIG. 11E). Block 1535 may also be optional (as indicated by the dashed rectangle). Note that, although not shown, block 1535 may be performed in conjunction with other processes (e.g., between the stages of FIG. 9D and FIG. 9E, between the stages of FIG. 10D and FIG. 10E, between the stages of FIG. 13D and FIG. 13E). If performed, block 1535 may occur after block 1530.
[0090]
[0105] In block 1540, the wafer may be diced along the scribe regions (see, e.g., FIGS. 8E, 9E, 10E, 11F, 13E). After dicing, protective layers (e.g., protective layers 420, 520, 620) may be formed to protect the dies. For example, various combinations of sidewall protective layers (e.g., sidewall protective layers 822, 922, 1022, 1122, 1322), top edge protective layers (e.g., top edge protective layer 1024), and bottom protective layers (e.g., bottom protective layer 1126) may be formed after dicing.
[0091]
[0106] Figure 16 shows a flowchart of another example process for implementing blocks 1410 and 1420. In one aspect, the flowchart of Figure 16 may apply to at least the steps shown in Figures 12A-12E for forming device 700.
[0092]
[0107] In block 1610, the wafer may be back-ground (see, e.g., FIG. 12B). Back-grinding may stop when the thickness of the wafer (e.g., wafer 1200) is thinned to T(d), i.e., the thickness of the die (e.g., die 1210).
[0093]
[0108] In block 1620, a top edge groove may be formed (see, e.g., FIG. 12C). The top edge groove (e.g., top edge groove 1216) may expose a top portion of all sidewalls of the die.
[0094]
[0109] In block 1630, an upper sidewall protective layer (e.g., upper sidewall protective layer 1228) may be formed by filling the upper edge groove with a first protective material (e.g., first protective material 1218) (see, e.g., FIG. 12D). The upper sidewall protective layer may surround an upper portion of all sidewalls of the die.
[0095]
[0110] In block 1635, the first protective material may be planarized (e.g., see FIG. 12D) so that after filling the top edge groove, the top surface of the first protective material is planar with the top surface of the die. For example, if the top edge groove is overfilled, the excess first protective material may be planarized.
[0096]
[0111] Note that block 1625 is optional, as indicated by the dashed rectangle. That is, block 1625 does not have to be performed. For example, the top edge groove may be intentionally overfilled with the first protective material and left without planarization (not shown). In this manner, a top edge protection layer (similar to top edge protection layer 1024 of FIG. 10) may be formed.
[0097]
[0112] In block 1640, a bottom edge groove may be formed (see, e.g., FIG. 12C). The bottom edge groove (e.g., bottom edge groove 1217) may expose a bottom portion of all sidewalls of the die. In one embodiment, block 1640 may be after block 1610.
[0098]
[0113] In block 1650, a lower sidewall protective layer (e.g., lower sidewall protective layer 1229) may be formed by filling the lower edge groove with a second protective material (e.g., second protective material 1219) (see, e.g., FIG. 12D). The lower sidewall protective layer may surround a lower portion of all sidewalls of the die. In one embodiment, the first protective material and the second protective material may be the same. Alternatively, they may be different.
[0099]
[0114] In block 1655, the second protective material may be planarized (e.g., see FIG. 12D) after filling the bottom edge grooves so that the bottom surface of the second protective material is planar with the bottom surface of the die. For example, if the bottom edge grooves are overfilled, the excess second protective material may be planarized.
[0100]
[0115] Note that block 1655 is optional, as indicated by the dashed rectangle; that is, block 1625 need not be performed. For example, additional protective material (similar to additional protective material 1127) may be applied (not shown) onto the underside of the wafer to create a underside protective layer (similar to underside protective layer 1126). In this case, the excess additional protective material may not be removed.
[0101]
[0116] In block 1660, the wafer may be diced along the scribe regions (see, e.g., FIG. 12E). After dicing, protective layers may be formed to protect the dies. For example, various combinations of sidewall protective layers (e.g., sidewall protective layers 822, 922, 1022, 1122, 1322), top edge protective layers (e.g., top edge protective layer 1024), and bottom protective layers (e.g., bottom protective layer 1126) may be formed after dicing.
[0102]
[0117] After dicing, a protective layer (e.g., protective layer 720) may be formed to protect the die. For example, an upper sidewall protective layer (e.g., upper sidewall protective layer 1228) and a lower sidewall protective layer (e.g., lower sidewall protective layer 1229) may be formed after dicing.
[0103]
[0118] 17 illustrates various electronic devices 1700 that may be integrated with any of the aforementioned devices according to various aspects of the disclosure. For example, a mobile phone device 1702, a laptop computer device 1704, and a fixed location terminal device 1706 may each generally be considered user equipment (UE) and may include one or more devices as described herein (e.g., devices 300, 400, 500, 600, 700). The devices 1702, 1704, 1706 illustrated in FIG. 17 are merely illustrative. Other electronic devices may also include the above-mentioned devices including, but not limited to, mobile devices, hand-held personal communication systems (PCS) units, portable data units such as personal digital assistants, global positioning system (GPS) enabled devices, navigation devices, set-top boxes, music players, video players, entertainment units, stationary data units such as meter reading equipment, communication devices, smartphones, tablet computers, computers, wearable devices, servers, routers, electronic devices implemented within automotive vehicles (e.g., autonomous vehicles), Internet of things (IoT) devices, or any other device that stores or retrieves data or computer instructions, or any combination thereof, including the group of devices (e.g., electronic devices).
[0104]
[0119] The devices and functions disclosed above may be designed and configured into computer files (e.g., RTL, GDSII, GERBER, etc.) stored on a computer readable medium. Some or all of such files may be provided to a fabricator who fabricates devices based on such files. The resulting product may include a semiconductor wafer that is then cut into semiconductor dies and packaged with an antenna on a glass device. The antenna on the glass device may then be used in the devices described herein.
[0105]
[0120] The following numbered clauses describe example implementations.
[0106]
[0121] Clause 1: A device comprising: a die; and a protective layer formed on a sidewall of the die, the protective layer surrounding all sidewalls of the die.
[0107]
[0122] Clause 2: The device of clause 1, wherein the material of the protective layer is less brittle than the material of the edge portion of the die.
[0108]
[0123] Clause 3: The device of clause 1 or 2, wherein the protective layer is formed from one or more oxides, one or more nitrides, one or more metals, or any combination thereof.
[0109]
[0124] Clause 4: A device described in any of clauses 1 to 3, wherein the protective layer includes a sidewall protective layer that surrounds all sidewalls of the die, the sidewall protective layer covering the entire vertical height of the sidewall of the die.
[0110]
[0125] Clause 5: The device of clause 4, wherein the protective layer further comprises a top edge protective layer formed on one or more top edge portions of the die and on an upper surface of the sidewall protective layer.
[0111]
[0126] Clause 6: The device of clause 5, wherein a top edge protection layer is formed on all top edge portions of the die, such that all top edges and corners of the die are covered by the protection layer.
[0112]
[0127] Clause 7: The device of clause 5 or 6, wherein the sidewall protection layer and the top edge protection layer are formed from the same material.
[0113]
[0128] Clause 8: The device of any of clauses 1-7, wherein the protective layer further comprises a bottom protective layer formed on the bottom surface of the die and on the bottom surface of the sidewall protective layer.
[0114]
[0129] Clause 9: The device of clause 8, wherein the bottom protective layer covers the entire underside of the die, and all bottom edges and bottom corners of the die are covered by the protective layer.
[0115]
[0130] Clause 10: The device of clause 8 or 9, wherein the sidewall protective layer and the bottom protective layer are formed from the same material.
[0116]
[0131] Clause 11: The device of any of clauses 8-10, wherein the bottom protective layer is formed from one or more metals and configured as a back via contact.
[0117]
[0132] Clause 12: A device described in any of clauses 1 to 3, wherein the protective layer includes an upper sidewall protective layer surrounding an upper portion of all sidewalls of the die, and a lower sidewall protective layer surrounding a lower portion of all sidewalls of the die.
[0118]
[0133] Clause 13: The device of clause 12, wherein an upper surface of the upper sidewall protective layer is planar with an upper surface of the die, or a lower surface of the lower sidewall protective layer is planar with a lower surface of the die, or both.
[0119]
[0134] Clause 14: The device of clause 12 or 13, wherein the upper sidewall protective layer and the lower sidewall protective layer are formed from the same material.
[0120]
[0135] Clause 15: A device described in any of clauses 1 to 14, wherein the device is incorporated into an apparatus selected from the group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, an Internet of Things (IoT) device, a laptop computer, a server, and a device in an automotive vehicle.
[0121]
[0136] Clause 16: A method of fabricating a device, the method comprising: providing a die; and forming a protective layer on a sidewall of the die, the protective layer surrounding all sidewalls of the die.
[0122]
[0137] Clause 17. The method of clause 16, wherein the protective layer is formed from one or more oxides, one or more nitrides, one or more metals, or any combination thereof.
[0123]
[0138] Clause 18: The method of clause 16 or 17, wherein providing a die and forming a protective layer includes etching a trench in a scribe area of a wafer comprising a plurality of dies including the die, the trench exposing all sidewalls of the die, filling the trench with a protective material covering the sidewalls of the die and at least a portion of a bottom of the trench, backgrinding the wafer after filling the trench, and dicing the wafer along the scribe area after backgrinding the wafer, wherein the protective layer is formed from the protective material.
[0124]
[0139] Clause 19: The method of clause 18, wherein the depth of the trench is equal to or greater than the thickness of the die.
[0125]
[0140] Clause 20: The method of clause 18 or 19, wherein backgrinding the wafer stops when the wafer thickness reaches a die thickness.
[0126]
[0141] Clause 21: The method of any of clauses 18 to 20, wherein the protective material is used as a back-grinding stop layer when back-grinding the wafer.
[0127]
[0142] Clause 22: The method of any one of clauses 18 to 21, wherein providing a die and forming a protective layer further comprises planarizing the protective material so that a top surface of the protective material is planar with a top surface of the die, and the protective material is planarized after filling the trenches and before dicing the wafer, and after dicing the wafer, a sidewall protective layer of the protective layer is formed, the sidewall protective layer surrounding all sidewalls of the die and covering the entire vertical height of the sidewalls of the die.
[0128]
[0143] Clause 23: The method of any of clauses 18-22, wherein the trench is completely filled with the protective material.
[0129]
[0144] Clause 24. The method of any of clauses 18-22, wherein the trench is filled such that a cross section of the protective material is U-shaped to cover the sidewalls of the die and a bottom of the trench.
[0130]
[0145] Clause 25: A method according to any of clauses 18 to 21, wherein after dicing the wafer, the trench is overfilled in a mushroom shape above the top surface of the die such that after the wafer is diced, the protective layer includes a sidewall protective layer surrounding all sidewalls of the die and covering the entire vertical height of the sidewalls of the die, and a top edge protective layer formed on all top edge portions of the die and on the top surface of the sidewall protective layer, so that all top edges and corners of the die are covered by the protective layer.
[0131]
[0146] Clause 26: The method of any of clauses 18 to 25, wherein providing a die and forming a protective layer further comprises applying additional protective material on the underside of the wafer after backgrinding the wafer and before dicing the wafer, and after the wafer is diced, the protective layer includes a sidewall protective layer that surrounds all sidewalls of the die and covers the entire vertical height of the sidewalls of the die, and a bottom protective layer formed on the underside of the die and on the bottom surface of the sidewall protective layer, wherein the bottom protective layer covers the entire underside of the die.
[0132]
[0147] Clause 27: The method of any of clauses 18-26, wherein the trench is an edge groove adjacent to a sidewall of the die, the width of the edge groove being less than the width of the scribe area.
[0133]
[0148] Clause 28: The method of clause 16 or 17, wherein providing a die and forming a protective layer includes backgrinding the wafer, forming an upper edge groove exposing an upper portion of all sidewalls of the die, filling the upper edge groove with a first protective material to form an upper sidewall protective layer surrounding the upper portion of all sidewalls of the die, after backgrinding the wafer, forming a lower edge groove exposing an upper portion of all sidewalls of the die, filling the lower edge groove with a second protective material to form a lower sidewall protective layer surrounding the lower portion of all sidewalls of the die, and after forming the lower sidewall protective layer, dicing the wafer along the scribe area, wherein the protective layer includes an upper sidewall protective layer and a lower sidewall protective layer.
[0134]
[0149] Clause 29: The method of clause 28, according to any of clauses 25 to 28, wherein the upper surface of the upper sidewall protective layer is planar with the upper surface of the die, or the lower surface of the lower sidewall protective layer is planar with the lower surface of the die, or both.
[0135]
[0150] Clause 30: The method of clause 28 or 29, wherein the first protective material and the second protective material are the same.
[0136]
[0151] As used herein, terms such as "user equipment" (or "UE"), "user device", "user terminal", "client device", "communication device", "wireless device", "wireless communication device", "handheld device", "mobile device", "mobile terminal", "mobile station", "handset", "access terminal", "subscriber device", "subscriber terminal", "subscriber station", "terminal", and variations thereof may interchangeably refer to any suitable mobile or fixed device capable of receiving wireless communication and / or navigation signals. These terms include, but are not limited to, music players, video players, entertainment units, navigation devices, communication devices, smartphones, personal digital assistants, stationary terminals, tablet computers, computers, wearable devices, laptop computers, servers, automotive devices in automotive vehicles, and / or other types of portable electronic devices that are typically carried by a person and / or have communication capabilities (e.g., wireless, cellular, infrared, short range radio, etc.). These terms are also intended to include a device that communicates with another device capable of receiving wireless communication and / or navigation signals, such as by a short-range wireless connection, an infrared connection, a wired connection, or other connection, regardless of whether the satellite signal reception, assistance data reception, and / or location-related processing occurs on that device or on another device. Furthermore, these terms are intended to include all devices, including wireless and wired communication devices, that can communicate with a core network via a radio access network (RAN), through which the UE can connect to external networks, such as the Internet, and to other UEs. Of course, other mechanisms for connecting to a core network and / or the Internet are also possible for a UE, such as via a wired access network, a wireless local area network (WLAN) (e.g., based on IEEE 802.11, etc.), etc.A UE may be embodied by any of several types of devices, including, but not limited to, a printed circuit (PC) card, a compact flash device, an external or internal modem, a wireless or wired phone, a smart phone, a tablet, a tracking device, an asset tag, etc. A communication link through which a UE can transmit signals to a RAN is called an uplink channel (e.g., a reverse traffic channel, a reverse control channel, an access channel, etc.). A communication link through which a RAN can send signals to a UE is called a downlink channel or a forward link channel (e.g., a paging channel, a control channel, a broadcast channel, a forward traffic channel, etc.). As used herein, the term traffic channel (TCH) may refer to either an uplink / reverse traffic channel or a downlink / forward traffic channel.
[0137]
[0152] Wireless communication between electronic devices can be based on various technologies, such as Code Division Multiple Access (CDMA), W-CDMA, Time Division Multiple Access (TDMA), Frequency Division Multiple Access (FDMA), Orthogonal Frequency Division Multiplexing (OFDM), Global System for Mobile Communications (GSM), 3GPP Long Term Evolution (LTE), 5G New Radio, Bluetooth (BT), Bluetooth Low Energy (BLE), IEEE 802.11 (WiFi), and IEEE 802.15.4 (Zigbee / Thread) or other protocols that may be used in wireless or data communication networks. Bluetooth Low Energy (also known as Bluetooth LE, BLE, and Bluetooth Smart) is a wireless personal area network technology designed and marketed by the Bluetooth Special Interest Group that aims to significantly reduce power consumption and cost while maintaining a similar communication range. BLE was integrated into the main Bluetooth standard in 2010 by adopting the Bluetooth Core Specification Version 4.0 and was updated in Bluetooth 5.
[0138]
[0153] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any detail described herein as "exemplary" should not be construed as advantageous over other examples. Similarly, the term "example" does not imply that all examples include the discussed features, advantages, or modes of operation. Furthermore, particular features and / or structures may be combined with one or more other features and / or structures. Moreover, at least a portion of the apparatus described herein may be configured to perform at least a portion of the methods described herein.
[0139]
[0154] It should be noted that the terms "connected" and "coupled," or any variation thereof, mean any direct or indirect connection or coupling between elements, unless the connection is expressly disclosed as being directly connected, and may encompass the presence of intermediate elements between two elements that are "connected" or "coupled" together through the intermediate elements.
[0140]
[0155] Any reference herein to an element using a designation such as "first," "second," etc. is not intended to limit the quantity and / or order of those elements. Rather, these designations are used as a convenient method of distinguishing between two or more elements and / or instances of an element. Also, unless otherwise stated, a set of elements can comprise one or more elements.
[0141]
[0156] Those skilled in the art will appreciate that information and signals may be represented using any of a variety of different technologies and techniques. For example, the data, instructions, commands, information, signals, bits, symbols, and chips that may be referred to throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.
[0142]
[0157] Nothing described or illustrated in this application is intended to publicly disclose any element, act, feature, benefit, advantage, or equivalent, whether or not that element, act, feature, benefit, advantage, or equivalent is recited in a claim.
[0143]
[0158] In the above detailed description, it can be seen that in each example, various features are grouped together. This method of disclosure should not be understood as the claimed examples having more features than are expressly recited in each claim. Rather, the disclosure may include fewer features than all of the individual examples disclosed. Thus, the following claims are hereby considered incorporated into this description, and each claim can stand alone as a separate example. Although each claim can stand alone as a separate example, it should be noted that a dependent claim can refer to a specific combination with one or more claims within the scope of the claim, while other examples can include or include a combination of the dependent claim with the subject matter of any other dependent claim, or a combination of any feature with other dependent claims and independent claims. Such combinations are suggested herein unless it is expressly stated that a specific combination is not intended. It is further intended that a feature of a claim can be included in any other independent claim, even if the claim is not directly dependent on the independent claim.
[0144]
[0159] It is further noted that the methods, systems and apparatus disclosed in the present description or claims may be implemented by a device comprising means for performing the respective acts and / or functions of the disclosed methods.
[0145]
[0160] Further, in some examples, an individual act may be subdivided into or include one or more sub-acts, and such sub-acts may be included in and part of the disclosure of the individual act.
[0146]
[0161] Although the above disclosure illustrates exemplary examples of the present disclosure, it should be noted that various modifications and changes can be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions and / or acts of the method claims according to the examples of the present disclosure described herein need not be performed in any particular order. In addition, well-known elements may not be described in detail or may be omitted so as not to obscure the relevant details of the aspects and examples disclosed herein. Furthermore, although elements of the present disclosure may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
Claims
1. A device, Dai and a protective layer formed on a sidewall of the die, the protective layer surrounding all of the sidewalls of the die; Equipped with The protective layer is a sidewall protection layer surrounding all sidewalls of the die, the sidewall protection layer covering the entire vertical height of the sidewalls of the die; a lower surface protection layer formed on the lower surface of the die and on the lower surface of the sidewall protection layer; Including, the device.
2. Preferably, the material of the protective layer is less brittle than the material of the edge portion of the die; The device of claim 1 , wherein the protective layer is formed from one or more oxides, one or more nitrides, one or more metals, or any combination thereof.
3. The protective layer is a top edge protection layer formed on one or more top edge portions of the die and on a top surface of the sidewall protection layer; the top edge protection layer is formed on all top edge portions of the die, and all top edges and corners of the die are covered by the protection layer; The device of claim 1 , wherein the sidewall protection layer and the top edge protection layer are formed from the same material.
4. the lower surface protective layer covers the entire lower surface of the die, and all lower edges and lower corners of the die are covered by the protective layer; The device of claim 1 , wherein the sidewall protective layer and the bottom protective layer are formed from the same material.
5. The device of claim 1 , wherein the bottom protective layer is formed from one or more metals and configured as a back via contact.
6. The protective layer is an upper sidewall protection layer surrounding an upper portion of all sidewalls of the die; and a lower sidewall protection layer surrounding a lower portion of all sidewalls of the die; Including, the top surface of the upper sidewall protection layer is planar with the top surface of the die; or the lower surface of the lower sidewall protection layer is planar with the lower surface of the die; or Both, preferably The device of claim 1 , wherein the upper sidewall protective layer and the lower sidewall protective layer are formed from the same material.
7. 10. The device of claim 1, wherein the device is incorporated into an apparatus selected from the group consisting of a music player, a video player, an entertainment unit, a navigation device, a communication device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, an Internet of Things (IoT) device, a laptop computer, a server, and a device in an automotive vehicle.
8. 1. A method of fabricating a device, said method comprising: providing a die; forming a protective layer on the sidewalls of the die, the protective layer surrounding all sidewalls of the die; wherein the protective layer comprises: a sidewall protection layer surrounding all sidewalls of the die, the sidewall protection layer covering the entire vertical height of the sidewalls of the die; a lower surface protection layer formed on the lower surface of the die and on the lower surface of the sidewall protection layer; A method comprising:
9. providing the die and forming the protective layer Etching trenches in a scribe area of a wafer comprising a plurality of dies including the die, the trenches exposing all sidewalls of the die; filling the trench with a protective material that covers the sidewalls of the die and at least a portion of a bottom of the trench; backgrinding the wafer after filling the trench; backgrinding the wafer and then dicing the wafer along the scribe area; Including, The method of claim 8 , wherein the protective layer is formed from the protective material.
10. the depth of the trench is equal to or greater than the thickness of the die; the back-grinding of the wafer is stopped when the thickness of the wafer reaches the thickness of the die; 10. The method of claim 9, wherein the protective material is used as a back-grind stop layer when back-grinding the wafer.
11. providing the die and forming the protective layer planarizing the protective material so that a top surface of the protective material is planar with a top surface of the die; the protective material is planarized after filling the trenches and before dicing the wafer; After dicing the wafer, the sidewall protection layer of the protection layer is formed, the sidewall protection layer surrounding all sidewalls of the die and covering the entire vertical height of the sidewalls of the die.
10. The method of claim 9.
12. the trench is completely filled with the protective material, or the trench is filled such that the cross section of the protective material is U-shaped to cover the sidewalls of the die and the bottom of the trench; or After the trench is formed by dicing the wafer, the protective layer is the sidewall protection layer surrounding all sidewalls of the die and covering the entire vertical height of the sidewalls of the die; a top edge protection layer formed on the entire top edge portion of the die and on the top surface of the sidewall protection layer in a mushroom shape overfilled above the top surface of the die; The method of claim 9 , wherein all top edges and corners of the die are covered by the protective layer.
13. providing the die and forming the protective layer further comprising applying an additional protective material onto the underside of the wafer after backgrinding the wafer and before dicing the wafer; After the wafer is diced, the protective layer the sidewall protection layer surrounding all sidewalls of the die and covering the entire vertical height of the sidewalls of the die; a lower surface protection layer formed on a lower surface of the die and on a lower surface of the sidewall protection layer, the lower surface protection layer covering the entire lower surface of the die; 10. The method of claim 9, comprising:
14. 10. The method of claim 9, wherein the trench is an edge groove adjacent the sidewall of the die, the width of the edge groove being less than the width of the scribe area.
15. providing the die and forming the protective layer backgrinding the wafer; forming a top edge groove exposing an upper portion of all sidewalls of the die; filling the top edge groove with a first protective material to form a top sidewall protective layer surrounding an upper portion of all sidewalls of the die; forming a bottom edge groove after backgrinding the wafer, the bottom edge groove exposing an upper portion of all sidewalls of the die; filling the lower edge grooves with a second protective material to form a lower sidewall protective layer surrounding lower portions of all sidewalls of the die; dicing the wafer along the scribe area after forming the lower sidewall protection layer; Including, the protective layer includes the upper sidewall protective layer and the lower sidewall protective layer, the top surface of the upper sidewall protection layer is planar with the top surface of the die; or the lower surface of the lower sidewall protection layer is planar with the lower surface of the die; or It's both. The method of claim 8.