Semiconductor Structure and Its Microfluidic System

Abstract

A semiconductor structure and a microfluidic system comprising the semiconductor structure are disclosed. The semiconductor structure comprises a thermoelectric element layer. The thermoelectric element layer comprises p-type and n-type thermoelectric elements. These thermoelectric elements form regions, and each region is associated with a specific temperature range, and achieving the specific temperature range is based on the flow of electrons or holes through the thermoelectric elements. The semiconductor structure forms part of a microfluidic system comprising a microfluidic channel having a meandering spread across regions having different temperature ranges. This enables the fluid flowing within the microfluidic channel to be exposed to periodic temperature variations.

Description

Technical Field

[0001] The present disclosure belongs to semiconductor structures and their microfluidic systems.

Background Art

[0002] Rapid test devices for detecting infections have become indispensable recently due to the strict health restrictions required for going to work, moving around in society, etc. after the worldwide infection explosion caused by COVID-19. Such test devices are typically antigen-based, which have recently become relatively inexpensive. However, for example, when possible displacements of certain virus types occur, the accuracy can be questioned. To increase accuracy, inquiries are often made regarding so-called polymerase chain reaction (PCR)-type tests. PCR is a common molecular biology technique that enables multiple copies of a DNA sequence and can efficiently amplify DNA or RNA sequences from various sources. This is conventionally achieved by using DNA polymerase. DNA polymerase is a holoenzyme that includes 10 subunits, a beta-subunit clamp, a core polymerase consisting of alpha, theta, and epsilon subunits, and a gamma complex. The polymerase may be Taq polymerase, i.e., DNA polymerase I derived from Thermus aquaticus, which is representative of heat-resistant DNA polymerases. The PCR method further uses the following three-step procedure: (i) The DNA is denatured by heating to 90-95 °C, which separates double-stranded DNA into single-stranded DNA. A DNA strand is a double helix composed of two single DNA strands. Each of the DNA strands is composed of monomer units called nucleotides that form a sugar backbone. The forward direction of the DNA strand is in the 5'-3' direction. During denaturation near the boiling point of water, the hydrogen bonds between nucleobases become weak, and thus the double strand is divided into two. When the denatured DNA is cooled, primer DNA is assembled. (ii) In this subsequent annealing step, the sample is cooled to 40-60 °C to allow the primer to attach to the target DNA. Each primer DNA is composed of a chain of DNA strands at the beginning of the sequence for replication. (iii) Finally, the sample is heated to 70-75 °C so that DNA polymerase extends the DNA from the primer to create new double-stranded DNA containing the old and new strands.DNA is always synthesized in the 5’-3’ direction. In response to heating, the elongation of the DNA double strand occurs by the nucleotides added to the 3’ end, that is, the 5’ phosphate group of the new nucleotide binds to the 3’ hydroxyl group of the last nucleotide. By the periodic repetition of the above steps (i) to (iii), the number of DNA copies doubles every cycle, and as a result, the number of DNA copies increases approximately by three digits every 10 cycles.

[0003] DNA for PCR testing may be prepared in a home environment through saliva or blood samples, but the actual PCR testing is usually carried out in a hospital or medical center. This is because conventional PCR devices are sophisticated thermocycler machines programmed to change the reaction temperature every few minutes to enable the denaturation and synthesis of DNA. Furthermore, these devices are relatively expensive. Needless to say, this can be inconvenient for infected people, those living in depopulated areas, etc.

[0004] Therefore, a more flexible and mobile method for performing precise tests for infectious diseases is needed.

Summary of the Invention

Problems to be Solved by the Invention

[0005] The main object of the present invention is to provide a more flexible and mobile method for performing precise tests for infectious diseases.

[0006] Another object is to provide a small and portable method for rapidly changing the temperature of a liquid.

Means for Solving the Problems

[0007] According to a first aspect, a semiconductor structure is provided. The semiconductor structure includes a substrate having a top surface and a thermoelectric element layer. The thermoelectric element layer includes various parts and sub-layers. The thermoelectric element layer is a plurality of vertical p-type semiconductor pillars arranged perpendicular to the top surface of the substrate, each vertical p-type semiconductor pillar having a bottom end facing the top surface of the substrate and a top end facing away from the top surface of the substrate, the plurality of vertical p-type semiconductor pillars being clustered into one or more sets of p-type semiconductor pillars, each of the one or more sets of p-type semiconductor pillars constituting a p-type thermoelectric element, and a plurality of vertical n-type semiconductor pillars arranged perpendicular to the top surface of the substrate, each vertical n-type semiconductor pillar having a bottom end facing the top surface of the substrate and a top end facing away from the top surface of the substrate, the plurality of vertical n-type semiconductor pillars being clustered into one or more sets of n-type semiconductor pillars, each of the one or more sets of n-type semiconductor pillars constituting an n-type thermoelectric element. The n-type and p-type thermoelectric elements are arranged at a distance from each other such that a space is formed between the n-type thermoelectric element and the p-type thermoelectric element. The thermoelectric element layer further includes a bottom contact layer defining a plurality of individual bottom contact portions, each bottom contact portion connecting the bottom end of a vertical p-type semiconductor pillar of a specific p-type thermoelectric element to form a bottom contact of the specific p-type thermoelectric element or connecting the bottom end of a vertical n-type semiconductor pillar of a specific n-type thermoelectric element to form a bottom contact of the specific n-type thermoelectric element. The thermoelectric element layer further includes a top contact layer defining a plurality of individual top contact portions, each top contact portion connecting the top end of a vertical p-type semiconductor pillar of a specific p-type thermoelectric element to form a top contact of the specific p-type thermoelectric element or connecting the top end of a vertical n-type semiconductor pillar of a specific n-type thermoelectric element to form a top contact of the specific n-type thermoelectric element.

[0008] The semiconductor pillars discussed herein may be semiconductor nanopyramids, semiconductor micropillars, or any suitable semiconductor-type pillars. Preferably, the semiconductor pillars can be regarded as semiconductor nanopyramids.

[0009] The semiconductor structure may be regarded as, and is sometimes shown as, a semiconductor layer structure.

[0010] In this specification, basic substances are referred to by their element symbols or abbreviations. For example, gallium nitride may typically be called GaN, and aluminum gallium nitride may be called AlGaN. In general, a layer or structure said to contain a particular substance or element may be understood to at least partially contain or be substantially composed of the particular substance or element. The layers of the semiconductor structure may be understood to be ordered in a "bottom-to-top" sequence. In this context, the term "on" means to place a layer or structure above or on top of another layer or structure. The term "vertical" means the direction in which layers are arranged relative to each other. The vertical direction is considered to be perpendicular or normal to the top surface of the substrate, which may be considered to be substantially planar. The term "laterally" means any direction perpendicular to the vertical direction.

[0011] The semiconductor structure is configured for the generation of the Peltier effect. That is, while a current is maintained in a circuit of a material containing two different types of conductors, cooling of one junction and heating of another junction can be achieved. The use of semiconductors representing different junctions, for example p-type and n-type semiconductors, which may be based on the same parent material in some cases, can further enhance the Peltier effect. Thus, this structure can facilitate the provision of a thermoelectric element capable of creating a temperature difference over a relatively short distance. Furthermore, this can facilitate the manufacture of a relatively small and inexpensive structure.

[0012] The p-type semiconductor pillars may be clustered into a plurality of sets of p-type semiconductor pillars, the n-type semiconductor pillars may be clustered into a plurality of sets of n-type semiconductor pillars, the bottom contact portion of the bottom contact layer may be arranged to connect the bottom contact of the n-type thermoelectric element and the bottom contact of the p-type thermoelectric element, the top contact portion of the top contact layer may be arranged to connect the top contact of the n-type thermoelectric element and the top contact of the p-type thermoelectric element, and the n-type thermoelectric element and the p-type thermoelectric element are connected in series.

[0013] Accordingly, the p-type and n-type semiconductor pillars can form a lattice composed of a relatively large number of semiconductor pillars, and each semiconductor pillar forms a small cell of the lattice. The heating or cooling capacity is linearly corresponding to the number of cells of the lattice. Accordingly, a lattice composed of a relatively large number of relatively small cells can promote the generation of a significant temperature gradient over a short distance. For practical (manufacturing technical) reasons, the lattice can be regular.

[0014] The space between the n-type thermoelectric element and the p-type thermoelectric element may include a passivation material. The passivation material may be a material that is thermally and electrically insulating. This can facilitate improved control of heat transfer between the thermoelectric elements. Further, this can facilitate reducing heat and current leakage.

[0015] The p-type semiconductor pillar may contain In x Ga 1-x N, where 0.2 < x < 0.35, and the n-type semiconductor pillar may contain In y Ga 1-y N, where 0.2 < y < 0.35. x and y are such that the charge carrier density is approximately 10 16 ~10 18 cm -3It is preferably such that it can be within the range, where it is recognized that the charge carriers for the p-type (n-type) semiconductor pillar are holes (electrons). Such a relatively large difference in charge carrier density can contribute to the existence of a sharp temperature difference over a short distance.

[0016] The bottom contact layer may include doped GaN. The doped GaN may be relatively highly doped GaN. The highly doped GaN may have a carrier concentration of at least 10 16 cm -3 of silicon atoms or magnesium atoms.

[0017] The top contact layer may be made of metal. The metal top contact layer can contribute to fast heat transfer and high conductivity.

[0018] The p-type semiconductor pillar may comprise an In x Ga 1-x N and GaN and a superlattice of InN, and the n-type semiconductor pillar comprises a superlattice of In y Ga 1-y N and InN. The superlattice may have a periodicity between 2 and 20 nm between In x Ga 1-x N segments along the axial direction of the pillar. The nitride-based InN / InGaN superlattice can contribute to improved thermoelectric properties, for example, as compared to conventional bulk-like ternary nitride alloy alternatives.

[0019] The substrate may include Si. The silicon-based layer enables thicker GaN to be deposited / grown on the layer to improve crystal quality without the manufacturing complexity associated with the formation of a crystalline GaN / AlGaN layer structure. Other materials such as silicon carbide (SiC) may also be considered. However, pure silicon is preferred due to its relatively low cost.

[0020] The semiconductor structure may further include a support layer disposed between the Si substrate and the thermoelectric element layer. In that case, the support layer is a first semiconductor layer disposed on the Si substrate, and includes a plurality of vertical nanowire structures disposed perpendicular to the top surface of the Si substrate, and the first semiconductor layer contains AlN, and a second semiconductor layer disposed on the first semiconductor layer and surrounding the nanowire structures horizontally and vertically, and the second semiconductor layer contains Al where 0≦z≦0.95 z Ga 1-z and GaN. Such an AlN layer may be disposed above the silicon-based layer and below any GaN and / or Al(1-x)Ga(x)N layers. Due to factors such as the difference in crystal lattice constants and thermal expansion coefficients between silicon and nitride materials, simply forming a nitride layer on a silicon layer will, in most cases, result in cracks, defects, and poor overall crystal quality of the formed nitride layer, for example, due to unbalanced material properties. Therefore, the AlN layer promotes a smoother material transition between the silicon-based layer and any GaN and Al(1-x)Ga(x)N layers, thereby providing appropriate electron mobility or hole mobility through the support structure.

[0021] According to a second aspect, a microfluidic system is provided. The microfluidic system includes a semiconductor structure according to the first aspect. The thermoelectric element layer is vertically divided into two or more regions, and each region includes at least one n-type thermoelectric element and at least one p-type thermoelectric element that constitute a thermoelectric unit. Each thermoelectric unit is configured to supply a specific temperature in response to a fixed current flowing therethrough. The microfluidic system further includes a microfluidic channel layer disposed above the thermoelectric element layer. The microfluidic channel layer includes microfluidic channels having a meandering spread that crosses two or more regions of the thermoelectric element layer such that the fluid can be exposed to periodic temperature changes while being transported in the channels.

[0022] Thus, a fluid containing DNA can be exposed to periodic temperature changes while being transported within a microfluidic channel. It is preferable that the meandering spread of the microfluidic channel can be configured to provide 10 to 50 temperature cycles during transport within the microfluidic channel. The microfluidic system can facilitate a relatively small and portable system for performing polymerase chain reaction (PCR). Furthermore, faster PCR for analysis can be provided.

[0023] The microfluidic channel layer may be made of a plastic material.

[0024] This can facilitate low-friction transport of the fluid. Furthermore, cleaning and flushing can be facilitated.

[0025] The microfluidic channel can include an inlet and an outlet.

[0026] The microfluidic system may further include a detector for detecting a biological indicator. The detector may include an InGaN laser, a microring resonator, and a transducer. The detector can detect errors in the DNA being analyzed. The microring resonator can provide high detection accuracy in that there may be small errors in the DNA being analyzed. The InGaN laser, the microring resonator, and the transducer can be monolithically arranged above the semiconductor layer structure in the same plane as the microfluidic channel. Specifically, the InGaN laser can be formed with a quantum well heterostructure. Such a quantum well heterostructure may include GaN / InGaN / GaN arranged on top of the aforementioned semiconductor layer structure. An AlGaN / Al(1-x)Ga(x)N heterostructure having a composition of 0.2 < x < 0.35 formed above the quantum well heterostructure. The microring may be plasma-etched or wet-etched from a GaN layer. Alternatively, the InGaN laser, the microring, and the transducer may be packaged from individual chip dies together with the semiconductor layer structure described herein.

[0027] The micro ring may include a gold layer disposed on the top side or the bottom side of the micro ring.

[0028] The microfluidic system may be configured for polymerase chain reaction, where the thermoelectric element layer is divided vertically into at least three regions. The first region may include at least one n-type thermoelectric element and at least one p-type thermoelectric element that constitute a first thermoelectric unit configured to supply a temperature of 95°C ± 5% for denaturation. The second region may include at least one n-type thermoelectric element and at least one p-type thermoelectric element that constitute a second thermoelectric unit configured to supply a temperature of 56°C ± 5% for primer annealing.

[0029] The third region may include at least one n-type thermoelectric element and at least one p-type thermoelectric element that constitute a third thermoelectric unit configured to supply a temperature of 72°C ± 5% for elongation by polymerase.

[0030] The first and third regions may abut the second region to form a temperature gradient therebetween.

[0031] The microfluidic channel may have a meandering spread across at least three regions of the thermoelectric element layer such that the fluid can be exposed to periodic temperature changes while being transported within the channel.

[0032] The microfluidic system may be incorporated within an electronic device. The electronic device may be a computer, a computer tablet, a smartphone, a smartwatch, etc. This can further facilitate the portability of the microfluidic system so that PCR test analysis can be performed at home or at any other suitable location.

[0033] The further scope of application of the present invention will become apparent from the detailed description given hereinafter. However, while the detailed description and the specific examples show preferred embodiments of the present invention, it should be understood that various changes and modifications within the scope of the present invention will be apparent to those skilled in the art from this detailed description, which is for the purpose of illustration only.

[0034] Accordingly, since the devices and methods may vary, it should be understood that the present invention is not limited to the specific components of the devices described or to the operation of the methods described. It should also be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. It should be noted that the articles "a", "an", "the", and "said" used in this specification and the appended claims are intended to mean that one or more of the elements are present unless the context clearly indicates otherwise. Thus, for example, reference to "a unit" or "the unit" may include several devices or the like. Further, the terms "comprising", "including", "containing", and similar expressions do not exclude other elements or steps.

[0035] The above and further objects, features, and advantages of the present invention will be better understood through the following illustrative and non-limiting detailed description of the preferred embodiments, together with reference to the accompanying drawings in which like reference numerals are used for like elements.

Brief Description of the Drawings

[0036]

Figure 1

Figure 2

Best Mode for Carrying Out the Invention

[0037] Next, the present invention will be described in more detail below with reference to the accompanying drawings showing presently preferred embodiments of the invention. However, the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided for thoroughness and completeness and to fully convey the scope of the invention to those skilled in the art.

[0038] With reference to FIG. 1, the overall structure of the semiconductor structure 200 as viewed from the side is shown. This side view is represented here by a Cartesian coordinate system having a first extent L1 and a second extent L2, as represented by the L1-L2 plane. A third extent L3 (see FIG. 2) extends perpendicular to the L1-L2 plane. Throughout, the second extent L2 means the “vertical” extent / direction, but the semiconductor can have any spatial orientation, such as during manufacture or use. Thus, other terms such as “bottom” or “top” mean different elevated positions along the second extent L2.

[0039] The semiconductor layer structure includes a substrate 100 having a top surface 110. The semiconductor layer structure includes a thermoelectric element layer 120. The thermoelectric element layer 120 includes various parts and sub-layers.

[0040] The thermoelectric element 120 layer includes a plurality of vertical p-type semiconductor pillars 122 arranged perpendicular to the top surface 110 of the substrate 100. Each vertical p-type semiconductor pillar 122 has a bottom end 121 facing the top surface 110 of the substrate 100 and a top end 123 facing the side opposite to the top surface 110 of the substrate 100. The plurality of vertical p-type semiconductor pillars 122 are clustered into one or more sets of p-type semiconductor pillars. Each of the one or more sets of p-type semiconductor pillars 122 constitutes a p-type thermoelectric element 120p. Thus, in FIG. 1, six such p-type thermoelectric elements 120p are shown in a non-limiting form. Each p-type thermoelectric element 120p can be configured to maintain a specific temperature as current crosses it. The specific temperature can be adjusted by the physical dimensions of the individual components of the p-type thermoelectric element 120p, the specific dopant values of the individual components of the p-type thermoelectric element 120p, the individually set current flowing through the p-type thermoelectric element 120p, etc. The plurality of vertical p-type semiconductor pillars 122 can be arranged along a third extent L3, i.e., inward or outward from the paper / screen of FIG. 1. Thus, the plurality of vertical p-type semiconductor pillars 122 of one or more sets of p-type semiconductor pillars 122 can form a two-dimensional lattice (in the L2-L3 plane) when viewed from above, i.e., along the second extent L2.

[0041] The thermoelectric element 120 layer further includes a plurality of vertical n-type semiconductor pillars 124 arranged perpendicular to the top surface 110 of the substrate 100. Each vertical n-type semiconductor pillar 124 has a bottom end 125 facing the top surface 110 of the substrate 100 and a top end 127 facing away from the top surface 110 of the substrate 100. The plurality of vertical n-type semiconductor pillars 124 are clustered into one or more sets of n-type semiconductor pillars 124. Each one or more sets of n-type semiconductor pillars constitutes an n-type thermoelectric element 120n. Thus, in FIG. 1, six such n-type thermoelectric elements 120n are shown in a non-limiting form. Each n-type thermoelectric element 120n can be configured to generate and / or maintain a specific temperature when current crosses it. The specific temperature can be adjusted by the physical dimensions of the individual components of the n-type thermoelectric element 120n, the specific dopant values of the individual components of the n-type thermoelectric element 120n, the individually set current flowing through the n-type thermoelectric element 120n, etc. The plurality of vertical n-type semiconductor pillars 124 can be arranged along a third extent L3, i.e., inward or outward from the paper / screen of FIG. 1. Thus, the plurality of vertical n-type semiconductor pillars 124 of one or more sets of n-type semiconductor pillars 124 can form a two-dimensional lattice (in the L1-L3 plane) when viewed from above, i.e., along the second extent L2.

[0042] The n-type and p-type thermoelectric elements 120p, 120n can be arranged at a distance D1 from each other such that a space 130 is formed between the n-type thermoelectric element and the p-type thermoelectric element. It is preferred that the distance D1 can be substantially constant at various positions along the third extent L3. Alternatively, the distance D1 may vary between various positions along the third extent L3.

[0043] The thermoelectric element layer 120 further includes a bottom contact layer 140 that defines a plurality of individual bottom contact portions 140. Each bottom contact portion 140 connects the bottom end 121 of the vertical p-type semiconductor pillar 122 of a specific p-type thermoelectric element 120p to form a bottom contact of the specific p-type thermoelectric element 120p. Alternatively, or in combination, each bottom contact portion 140 connects the bottom end 125 of the vertical n-type semiconductor pillar 124 of a specific n-type thermoelectric element 120n to form a bottom contact of the specific n-type thermoelectric element 120n.

[0044] The thermoelectric element 120 further includes a top contact layer 150 that defines a plurality of individual top contact portions. Each top contact portion 150 connects the top end 123 of the vertical p-type semiconductor pillar 122 of a specific p-type thermoelectric element 120p to form a top contact of the specific p-type thermoelectric element 120p. Alternatively, or in combination, each top contact portion 150 connects the top end 127 of the vertical n-type semiconductor pillar of a specific n-type thermoelectric element to form a top contact of the specific n-type thermoelectric element 120n.

[0045] The bottom contact portions 140 of the bottom contact layer are arranged to connect the bottom contact 125 of the n-type thermoelectric element 120n and the bottom contact 121 of the p-type thermoelectric element 120p, and the top contact portions 150 of the top contact layer are arranged to connect the top contact 127 of the n-type thermoelectric element 120n and the top contact 123 of the p-type thermoelectric element 120p, and the n-type thermoelectric element 120n and the p-type thermoelectric element 120p are connected in series.

[0046] The top contact portion 150 receives conduction band electrons from the n-type thermoelectric element 120n. Therefore, substantially equal numbers of electrons should enter the valence band holes originating from the p-type thermoelectric element 120p to exclude the holes. This reduces the energy of the electrons, thereby raising the temperature of the top contact portion 150. At the same time, the bottom contact portion 140 extracts holes from the valence band of the p-type thermoelectric element 120p, and as a result, holes come out from there. Therefore, electrons are injected into the conduction band of the adjacent n-type thermoelectric element 120n, that is, they require energy in that the temperature decreases with respect to the bottom contact portion 140. Therefore, the n-type thermoelectric element 120n and the p-type thermoelectric element 120p provide energy levels of the valence band of the n-type thermoelectric element 120n and the conduction band of the p-type semiconductor 120p that are substantially smaller than the bandgap of either semiconductor. Therefore, the flow of electrons or holes can flow through a plurality of interconnected thermoelectric elements between the ends along the first spread L1. Portion I1 of the path of the flow of electricity (or holes) can be seen in FIG. 1.

[0047] The space 130 between the n-type thermoelectric element 120n and the p-type thermoelectric element 120p may include a passivation material. The passivation material may be electrically and thermally insulating. By way of example, the passivation material may include in-situ MOCVD grown silicon nitride.

[0048] The p-type semiconductor pillar 122 can contain In x Ga 1-x N, where 0.2 < x < 0.35. The n-type semiconductor pillar 124 can contain In y Ga 1-y N, where 0.2 < y < 0.35. x and y are preferably such that the charge carrier density is approximately 10 15 cm -3 -3 for each of the p-type (n-type) semiconductor pillar, where it is recognized that the charge carriers for the p-type (n-type) semiconductor pillar are holes (electrons).

[0049] The bottom contact layer 140 may include doped GaN. Any suitable dopant may be available for providing a bandgap that enables sufficient electron or hole transport through the thermoelectric element 120.

[0050] The top contact layer 150 may be made of metal. Non-limiting examples are tungsten, gold, copper, or silver.

[0051] The p-type semiconductor pillar 122 may comprise a superlattice of In x Ga 1-x N and InN. Thus, the superlattice may comprise a plurality of layers stacked along a second extent L2, where every other layer (0, 2, 4, …, 2N) comprises In x Ga 1-x N, and every other layer (1, 3, 5, …, 2N+1) comprises InN.

[0052] The substrate 102 may include silicon (Si). The silicon may be formed as a silicon-based layer for the semiconductor structure 200. The silicon-based layer 102 can form part of the substrate 100 in that the silicon-based layer 102 is a relatively large silicon wafer on which AlN can grow (discussed further below). Thus, the substrate 100 can include the silicon bulk material 102. The top surface 104 of the silicon-based layer 102 may be substantially planar. The longitudinal thickness of the silicon-based layer may be in the range of 100 - 1000 μm, more preferably in the range of 275 - 525 μm. Unless explicitly stated otherwise, thickness hereafter means longitudinal thickness. The top surface 104 of the silicon-based layer 102 can have a Miller index (111). The silicon-based layer 102 can have a diamond cubic crystal structure.

[0053] The semiconductor structure 200 can further include a support layer 106 disposed between the Si substrate 102 and the thermoelectric element layer 120. The support layer 106 can include a first semiconductor layer 105 disposed on the Si substrate 102. The first semiconductor layer 105 can include a plurality of vertical nanowire structures 103 disposed perpendicular to the top surface 104 of the Si substrate 102. The first semiconductor layer 105 can include an aluminum nitride (AlN) layer 105. The AlN layer 105 can preferably have a thickness in the range of 100 to 500 nm, more preferably in the range of 200 to 300 nm. The AlN layer can include the vertical nanowire structures 103. These nanowires 103 can preferably have a vertical length in the range of 50 to 500 nm, more preferably in the range of 150 to 250 nm. The vertical nanowire structures 103 preferably can have a substantially circular or hexagonal cross-sectional profile. The diameter of such nanowires can be in the range of 5 to 50 nm, more preferably in the range of 10 to 30 nm. The nanowires 103 may be arranged in a repeating array pattern as viewed in the vertical direction, where each nanowire 103 has the four closest other nanowires equidistant therefrom. Alternatively, the repeating array pattern may have a square pattern. The distance between adjacent nanowires 103 can preferably be in the range of 10 to 500 nm, more preferably in the range of 50 to 200 nm.

[0054] The support layer 106 can further include a second semiconductor layer 107. The second semiconductor layer 107 can be disposed on the first semiconductor layer 105 and can surround the nanowire structures 103 horizontally and vertically. The second semiconductor layer 107 is Al z Ga 1-zIt can contain N, where 0 ≤ z ≤ 0.95. Alternatively, the second semiconductor layer 107 may contain GaN. The second semiconductor layer 107 can preferably have a thickness in the range of 100 to 500 nm, more preferably in the range of 200 to 300 nm. The second semiconductor layer 107 may be considered to laterally surround, enclose, or surround the vertical nanowire structure 103, that is, it may be considered to fill the space between the vertical nanowire structures 103. The second semiconductor layer 107 may further be considered to vertically surround or enclose the vertical nanowire structure 103, that is, it may further be considered to vertically extend above the top portion of the vertical nanowire structure 103 to cover the top portion.

[0055] The second semiconductor layer 107 may be directly attached to the thermoelectric element layer 120.

[0056] Each bottom contact portion 140 may be etched into the second semiconductor layer 107. The region between adjacent bottom contact portions 140 can contain n-doped GaN. These n-type GaN layers can be lithographically patterned and plasma-etched. The lithographic patterning may be utilized by nanoimprint lithography.

[0057] In connection with FIG. 2, a highly schematic microfluidic system 300 is shown. The microfluidic system 300 comprises a semiconductor structure 200. Further details of the semiconductor layer structure may be as presented above. The thermoelectric element layer 120 is vertically divided into two or more regions R1, R2, R3. As used herein, the term vertically divided means a spatial separation along a first extent L1. Each region comprises at least one n-type thermoelectric element 120n and at least one p-type thermoelectric element 120p that constitute a thermoelectric unit. Each thermoelectric unit is configured to supply a specific temperature in response to a fixed current flowing therethrough. Thus, the fixed current may be direct current (DC). As presented above, the fixed current of a particular thermoelectric unit can provide a specific temperature depending on, for example, the physical dimensions of the thermoelectric unit, the electrical properties of the thermoelectric unit derived from the type of metal or metal compound involved in the unit, the combination of physical dimensions and electrical properties, and the like.

[0058] The microfluidic system 300 further comprises a microfluidic channel layer 310, see FIG. 1. The microfluidic channel layer 310 may be made of a polymer or any other material having properties similar to a polymer. The microfluidic channel layer 310 may be disposed directly above the thermoelectric element layer 120, and the microfluidic channel layer 310 may be printed or molded onto the thermoelectric element layer 120.

[0059] The microfluidic channel layer 310 comprises a microfluidic channel 320 having a meandering extent that traverses two or more regions R1, R2, R3 of the thermoelectric element 120 layer, enabling the fluid to be exposed to periodic temperature variations while being transported within the channel 320.

[0060] In Figure 2, the microfluidic system is viewed along a second extent L2, i.e., in the L1 - L3 plane. Further, three regions, namely a first region R1, a second region R2, and a third region R3, are illustrated herein. Preferably, adjacent regions can be spatially separated from each other by substantially straight lines. Alternatively, adjacent regions may be spatially separated from each other by curves. Regions R1, R2, and R3 are further described below.

[0061] The microfluidic channel layer 320 may be made of a plastic material. Preferably, the inner surface of the microfluidic channel through which fluid can flow can be passivated using epoxy - polydimethylacrylamide, epoxy - polydimethylsiloxane, etc. This can reduce the potentially inhibitory action of certain substances in the enzymatic reactions that may occur within the microfluidic channel 320.

[0062] The microfluidic system 300 can include a mechanical micropump. The micropump may be a diaphragm.

[0063] The microfluidic channel 320 can include an inlet and an outlet (not shown).

[0064] The microfluidic system 300 can further include a detector for detecting a biological indicator. The detector may include an InGaN laser. The laser includes a laser source. The laser source can include a plurality of InGaN quantum wells. The detector can further include a microring resonator. The detector can further include a transducer.

[0065] The microring can include a gold layer disposed on the top side or the bottom side of the microring.

[0066] The microfluidic system 300 may be configured for polymerase chain reaction (PCR). Thus, as already mentioned, it is preferable that the thermoelectric element layer is vertically divided into at least three regions.

[0067] The first region R1 can comprise at least one n-type thermoelectric element 120n and at least one p-type thermoelectric element 120p. These constitute a first thermoelectric unit configured to supply a temperature of 95°C ± 5% for denaturation. The denaturation step typically includes double-stranded DNA for denaturing into two single strands.

[0068] The second region R2 can comprise at least one n-type thermoelectric element 120n and at least one p-type thermoelectric element 120p. These constitute a second thermoelectric unit configured to supply a temperature of 56°C ± 5% for primer annealing. A primer, i.e., a relatively short complementary sequence of DNA, can anneal to single-stranded target DNA. A sharp increase in double-stranded DNA concentration may be obtained by periodic repetition of exposing a fluid, such as blood, to the above regions R1, R2, R3, and each region supplies a specific temperature. This is because the number of double-stranded DNA doubles with each repetition. For this reason, the second region R2 may abut the first region R1 and the third region R3 such that the second region R2 is disposed between the first region R1 and the third region R3. Further, the microfluidic channel 320 can have a meandering spread across at least three regions of the thermoelectric element layer such that the fluid can be exposed to periodic temperature changes while being transported within the microfluidic channel.

[0069] The third region R3 can include at least one n-type thermoelectric element 120n and at least one p-type thermoelectric element 120p. These constitute a third thermoelectric unit configured to supply a temperature of 72 °C ± 5% for elongation by polymerase. Here, the polymerase can obtain activity in that the synthesis of the second complementary strand of DNA can be performed from free nucleotides in the fluid. The microfluidic system 300 may be incorporated within an electronic device. The electronic device may be a smartphone, a computer tablet, a smart watch, etc. In one embodiment of the present invention, the microfluidic pump may be a capillary pump disposed within a microfluidic channel above a semiconductor layer structure. The microfluidic pump may include micropillars or pillars in a hexagonal or cubic pattern. The spacing or pitch of the micropillars or pillars can be configured to provide capillary pump operation. In other embodiments, the microfluidic pump may be based on any of the following types, namely, mechanical, geometrical, hydrophobic, pneumatic, thermo-pneumatic, phase change, electrostatic, piezoelectric, or based on thermal expansion. Those skilled in the art will understand that the present invention is in no way limited to the above examples. On the contrary, many modifications and variations are possible within the scope described in the appended claims.

Claims

1. An Si substrate (100) having a top surface (110), a thermoelectric element layer (120), wherein A plurality of vertical p-type semiconductor pillars (122) arranged perpendicular to the top surface (110) of the substrate (100), each vertical p-type semiconductor pillar (122) having a bottom end (121) facing the top surface (110) of the substrate (100) and a top end (123) facing away from the top surface (110) of the substrate (100), the plurality of vertical p-type semiconductor pillars (122) being clustered into one or more sets of p-type semiconductor pillars (122), each of the one or more sets of p-type semiconductor pillars (122) constituting a p-type thermoelectric element (120p), the p-type semiconductor pillars (122) having In with 0.2 < x < 0.35 ｘ Ga １－ｘ N and a superlattice of InN, a plurality of vertical p-type semiconductor pillars (122), and A plurality of vertical n-type semiconductor pillars (124) arranged perpendicular to the top surface (110) of the substrate (100), each vertical n-type semiconductor pillar (124) having a bottom end (125) facing the top surface (110) of the substrate (100) and a top end (127) facing away from the top surface (110) of the substrate (100), the plurality of vertical p-type semiconductor pillars (124) being clustered into one or more sets of n-type semiconductor pillars (124), each of the one or more sets of n-type semiconductor pillars (124) constituting an n-type thermoelectric element (120n), and the n-type semiconductor pillars (124) having In with 0.2 < y < 0.35 ｙ Ga １－ｙ N and a superlattice of InN, a plurality of vertical n-type semiconductor pillars (124), the n-type thermoelectric elements (120n) and the p-type thermoelectric elements (120p) are arranged at a distance (D1) from each other such that a space (130) is formed between the n-type thermoelectric element (120n) and the p-type thermoelectric element (120p), a plurality of vertical p-type semiconductor pillars (122) and vertical n-type semiconductor pillars (124), a bottom contact layer (140) defining a plurality of individual bottom contact portions (140), each bottom contact portion (140) connecting the bottom end (121) of the vertical p-type semiconductor pillar (122) of a specific p-type thermoelectric element to form a bottom contact of the specific p-type thermoelectric element, or connecting the bottom end (125) of the vertical n-type semiconductor pillar (124) of a specific n-type thermoelectric element (120n) to form a bottom contact of the specific n-type thermoelectric element (120n), the bottom contact layer (140), a top contact layer (150) defining a plurality of individual top contact portions, each top contact portion connecting the top end (123) of the vertical p-type semiconductor pillar (122) of a specific p-type thermoelectric element (120p) to form a top contact of the specific p-type thermoelectric element (120p), or connecting the top end (127) of the vertical n-type semiconductor pillar (124) of a specific n-type thermoelectric element (120n) to form a top contact of the specific n-type thermoelectric element (120n), the top contact layer (150) comprising, a thermoelectric element layer (120), a support layer (106) disposed between the Si substrate (102) and the thermoelectric element layer (120), wherein a first semiconductor layer (105) disposed on the Si substrate (102), comprising a plurality of vertical nanowire structures (103) disposed perpendicular to the top surface (104) of the Si substrate (102), the first semiconductor layer (105) containing AlN, and, a second semiconductor layer (107) disposed on the first semiconductor layer (105) and surrounding the nanowire structure (103) horizontally and vertically, containing AlzGa1−zN, where 0 ≦ z ≦ 0.95, the second semiconductor layer (107) comprising, a support layer (106), comprising, a semiconductor structure (200).

2. The p-type semiconductor pillars (122) are clustered into a plurality of sets of p-type semiconductor pillars (122), The n-type semiconductor pillars (124) are clustered into a plurality of sets of n-type semiconductor pillars (124), The bottom contact portion (140) of the bottom contact layer is arranged to connect the bottom contact (125) of the n-type thermoelectric element (120n) and the bottom contact (121) of the p-type thermoelectric element (120p), and the top contact portion (150) of the top contact layer (150) is arranged to connect the top contact (127) of the n-type thermoelectric element (120n) and the top contact of the p-type thermoelectric element (120p), and the n-type thermoelectric element (120n) and the p-type thermoelectric element (120p) are connected in series. The semiconductor structure (200) according to claim 1.

3. The semiconductor structure (200) according to claim 1 or 2, wherein the space (130) between the n-type thermoelectric element (120n) and the p-type thermoelectric element (120p) contains a passivation material.

4. The p-type semiconductor pillar (122) contains In ｘ Ga １－ｘ N, where 0.2 < x < 0.35, and the n-type semiconductor pillar (124) contains In ｙ Ga １－ｙ N, where 0.2 < y < 0.35, the semiconductor structure (200) according to any one of claims 1 to 3.

5. The semiconductor structure (200) according to any one of claims 1 to 4, wherein the bottom contact layer (140) contains doped GaN.

6. The semiconductor structure (200) according to any one of claims 1 to 5, wherein the top contact layer (150) is a metal.

7. A semiconductor layer structure (200) according to any one of claims 1 to 6, wherein the thermoelectric element layer (120) is vertically divided into two or more regions (R1, R2, R3), and each region comprises at least one n-type thermoelectric element (120n) and at least one p-type thermoelectric element (120p) that constitute a thermoelectric unit, and each thermoelectric unit is configured to supply a specific temperature in response to a fixed current flowing therethrough. A semiconductor layer structure (200), A microfluidic channel layer (310) disposed above the thermoelectric element layer (120), the microfluidic channel layer (310) comprising a meandering microfluidic channel (320) having a spread that crosses the two or more regions (R1, R2, R3) of the thermoelectric element layer (120), and the fluid can be exposed to a periodic temperature change while being transferred within the channel (310). A microfluidic channel layer (310), A microfluidic system (300) comprising:

8. The microfluidic system (300) according to claim 7, wherein the microfluidic channel layer (310) is made of a plastic material.

9. The microfluidic system (300) according to claim 7 or 8, wherein the microfluidic channel (320) has an inlet and an outlet.

10. further comprising a detector for detecting a biological index, wherein the detector is an InGaN laser, a microring resonator, and a transducer The microfluidic system (300) according to any one of claims 7 to 9.

11. The microfluidic system (300) according to claim 10, wherein the microring comprises a gold layer disposed on a top side or a bottom side of the microring.

12. configured for polymerase chain reaction, the thermoelectric element layer (120) is vertically divided into at least three regions (R1, R2, R3), The first region (R1) comprises at least one n-type thermoelectric element (120n) and at least one p-type thermoelectric element (120p) that constitute a first thermoelectric unit configured to supply a temperature of 95° C. ±5% for denaturation, The second region (R2) comprises at least one n-type thermoelectric element (120n) and at least one p-type thermoelectric element (120p) that constitute a second thermoelectric unit configured to supply a temperature of 56° C. ±5% for primer annealing, The third region (R3) comprises at least one n-type thermoelectric element (120n) and at least one p-type thermoelectric element (120p) that constitute a third thermoelectric unit configured to supply a temperature of 72° C. ±5% for elongation by polymerase, the second region (R2) is in contact with the first region (R1) and the third region (R3), the microfluidic channel (320) has a meandering spread across the at least three regions (R1, R2, R3) of the thermoelectric element layer (120), and the fluid can be subjected to periodic temperature changes while being transported within the channel (320). The microfluidic system (300) according to any one of claims 7 to 11.

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