Fabrication and Processing of Graphene Electronic Devices on Silicon with SiO2 Passivation Layer

JP2025516399A5Pending Publication Date: 2026-03-10ARCHER MATERIALS LTD
View PDF 0 Cites 0 Cited by

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-03-31
Publication Date
2026-03-10

AI Technical Summary

Technical Problem

The integration of graphene into silicon-based electronic devices is hindered by issues such as graphene transfer from growth substrates, protection during processing, and degradation of electrical performance due to polymer resist processing in lithography.

Method used

A three-step cleaning method involving methylbenzene, a ketone, and an alcohol is used to minimize delamination and defects in graphene layers deposited on SiO2/Si substrates, facilitating the manufacturing of graphene field effect transistors (gFETs) compatible with clean-room environments.

Benefits of technology

The proposed method effectively reduces graphene delamination and defects, maintaining the electronic properties of graphene and enabling the reliable fabrication of gFETs suitable for silicon technology integration.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 00000000_0000_ABST
    Figure 00000000_0000_ABST
Patent Text Reader

Abstract

The present invention relates to the manufacture and processing of graphene electronic devices on silicon including a silicon dioxide passivation layer.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention is broadly related to the manufacture and processing of graphene electronic devices on silicon including a silicon dioxide passivation layer.

Background Art

[0002] Graphene is a material that is highly expected to be applied to electronic devices, particularly graphene field effect transistors (gFETs). This includes analog applications such as gas sensors and biomolecule sensors, and digital applications (specific low-dimensional sizes). However, at present, due to insufficient process integration into conventional silicon (Si) wafer production lines, graphene has not actually yet exceeded the realm of laboratory-scale applications. The main problems regarding the processing of graphene and its integration with Si are the transfer of graphene from the growth substrate, the protection of graphene during processing, and the degradation of the electrical performance of graphene due to the processing of the polymer resist used in lithography.

[0003] Graphene does not usually grow on a SiO 2 substrate. This is a problem in the manufacture of graphene-based semiconductor devices, and in many electronic devices (such as integrated circuits and sensors) incorporated into silicon technology, a thin layer of SiO 2 is required to function as an insulating layer. This layer is essential for activating the electric field effect that enables the material to function as a transistor. Since it is not easy to directly grow graphene on a silicon substrate, usually, graphene is synthesized and then SiO 2Transfer it to the surface. This includes graphene layers removed from graphite, graphene synthesized by chemical vapor deposition (CVD), and chemically synthesized and separated graphene dispersed in a solution. Among these, the method of exfoliating graphene from graphite generally yields the highest-quality graphene, but this method is not industrially scalable and is mainly limited to research applications. Both CVD graphene and chemically synthesized graphene are suitable for scaling up production. In CVD, it is generally grown on a metal catalyst (copper or nickel) and transferred to a Si wafer. Although many transfer processes are used, these leave chemical residues or defects (or both in some cases), which have an adverse effect on the electronic properties. Nevertheless, CVD is widely regarded as an advantageous process in graphene production because it provides repeatability and reproducibility of single- to few-layer graphene that is homogeneous for each batch.

[0004] To effectively incorporate CVD-grown graphene into gFETs, it is necessary to develop a method to prevent unwanted defects and delamination of graphene while maintaining its electronic properties. These two properties are closely related, and when the sp 2 bonds in graphene are broken (due to vacancies or sp 3 bond defects), electron transport through the graphene surface will decrease. Pure graphene without defects or substrate bonding scatters electrons only through phonon interactions. However, when graphene is contacted from above (e.g., impurities that break sp 2 bonds, or a passivation layer) or below (e.g., substrate interaction), these impurities also scatter electrons and reduce electron transport. In recent models, electron mobility and electron transport can be directly linked to the defect density, and the calculation of defects by electron measurement has become possible using the following equation. μ = α / η 0 Here, μ is the electron mobility, n 0 is the defect density, and α is 20.e 2 / h (approximate value of the conductivity of the sample). Therefore, the reduction of defects can be directly measured electronically as an improvement in carrier mobility (i.e., a decrease in sheet resistance).

[0005] There are several ways to quantify the number of defects on a graphene sheet. The most powerful one is Raman spectroscopy. With this technique, not only can the number of graphene sheets on the surface be determined, but it can also determine whether defects exist and in what form they exist. The main forms of defects are vacancy defects where carbon atoms in the lattice are missing and sp 2 sp that hinders the delocalized sp 3 bonds in graphene. The standard spectrum of graphene shows a graphite peak at about 1600 cm -1 (G), a 2D band at about 2650 cm -1 . Additional peaks at about 1360 cm -1 (D) and about 1610 cm -1 (D’) convey information about the population type of defects (the intensity of the peaks indicates the number of defects, and the ratio of the intensities of D and D’ indicates the nature of the defects). Raman information of graphene is usually obtained from the ratio of the peak height or area. When the D / D’ ratio is greater than 10, especially around 13, the defects are likely due to sp 3 defects. When the ratio is about 7, it corresponds to vacancy defects (important for preventing removal from graphene), and when the ratio is about 3.5, it corresponds to grain boundaries or lattice dislocations. The relative height of the D peak suggests the number of defects present. Since the D’ peak is also very close to the G peak, as the defects increase, the full width at half maximum (FWHM) will change before the D’ peak fully appears.

[0006] In the art, those skilled in the art generally try to prevent defects (i.e., make D and D’ small or non-existent), but if there are defects, it is necessary to make the ratio of D and D’ as small as possible to ensure that it is just a discontinuity or a small gap. If the defects are sp 3When related, major problems may occur during the process, and extensive peeling may occur.

[0007] X-ray photoelectron spectroscopy (XPS) is another method for determining the number of defects in graphene. This can be done through examination of the core carbon 1s spectrum. The carbon-carbon sp 2 bonding found in graphene has a lower binding energy of about 284 eV compared to sp 3 bonding (284.8 eV for carbon-carbon / hydrogen and about 286 eV and 289 eV for carbon-other elements). Regarding XPS, those skilled in the art would expect to see a convolution of the 284.8 peak and the 284 peak. The 284.8 peak will be dominant in any case due to the impurity carbon layer (removed only in vacuum by ion bombardment that removes graphene). In XPS, it is desired that the peaks at 286 and 289 due to other carboxyl groups are reduced. Furthermore, since XPS can determine and quantify the presence of other elements on the sample, it can identify with higher accuracy what the chemical defects are and how many of them exist. Using XPS of the valence band, information regarding the band gap can be calculated and the chemical and electronic properties of graphene can be directly linked.

[0008] Defects can also be directly observed and quantified by microscopic observation of the graphene surface. At high magnification, the defects can be observed with an optical microscope as color changes. These defects can be addressed by the ratio of the defect area of graphene to the total area of graphene. For example, in the case of the method of the present invention, it has been observed that those skilled in the art can expect about 5% fewer defects compared to equivalent methods used in the prior art.

[0009] There are several strategies to reduce defects and delamination, such as patterning with metals (specifically Ti and Au) and cleaning of graphene (using vacuum heating, lasers, electron beams). Metal protection is effective for protection during processing, but for post - processing packaging including plasma or laser dicing, additional photoresist - based lithography is required, and it cannot be protected by using these processes after manufacturing. At the same time, in energy - intensive cleaning methods, more undesirable defects tend to increase when removing residues.

[0010] To fully integrate gFETs into silicon technology, the manufacturing of gFETs must be compatible with a clean - room environment. This means developing lithography methods compatible with photo or electron polymer resists and using pure graphene with in - plane crystallinity on Si (i.e., CVD). To further develop gFETs into sensing platforms (especially biosensors that utilize liquid gating), passivation and insulation of the electrodes are required to reduce crosstalk. This results in not only the manufacturing of graphene electrodes but also an additional complex layer (and lithography). Therefore, even when a sacrificial metal layer is used to protect graphene during manufacturing, the problem of reliably removing polymer resist and residues also needs to be solved.

Summary of the Invention

Problems to be Solved by the Invention

[0011] The present invention aims to overcome one or more of the current drawbacks in the art.

Means for Solving the Problems

[0012] The present invention provides a method for manufacturing a gFET suitable for an ISO5 clean room environment, including three cleaning steps. Si covered with a graphene film (fabricated by CVD) from a complete monolayer to several layers (1 - 3) was used in the manufacturing. This (number of layers) is also important in the electronic structure, and in the case of graphene, it has been well studied that a bandgap occurs when there are multiple layers. During the manufacturing of the gFET, contaminants and defects are introduced onto the graphene surface by the steps used, and they may remain and as a result cause delamination of the graphene layer. These contaminants and defects remain attached to the graphene surface and the resist layer used to transfer the graphene onto the Si surface. Therefore, when the resist is removed, both the contaminants and the attached graphene are removed. Since the graphene under these contaminants is removed, delamination occurs and an incomplete graphene layer remains.

[0013] The inventors have found that the method disclosed herein minimizes or prevents delamination of graphene deposited on a substrate. It has also been found that the method disclosed herein can be used for the fabrication of graphene field effect transistors (gFETs).

[0014] In connection with this method, first, the graphene on Si is rinsed with methylbenzene (xylene as an example), then rinsed with a ketone (acetone as an example), and finally rinsed with an alcohol (isopropyl alcohol (IPA) as an example). Further, methylbenzene is used for the removal of the polymer resist (such as PMMA) after lithography and then washed with a ketone and an alcohol. The inventors have found that washing first with methylbenzene such as xylene is beneficial for preventing delamination of graphene during the removal of the resist after lithography. This is mainly due to the removal of contaminants and defects related to the amorphous carbon deposits introduced during the CVD of the graphene layer.

[0015] Therefore, one aspect of the present invention is SiO 2Provided is a method for minimizing or preventing the exfoliation of graphene and / or reducing defects in a graphene layer deposited on a SiO / Si substrate, said method comprising the following steps: i) SiO 2 Providing a SiO / Si wafer substrate; ii) Depositing a graphene layer grown by CVD (chemical vapor deposition) on the surface of said wafer substrate by polymer deposition transfer; iii) Washing the graphene deposited layer with methylbenzene; iv) Washing the layer after step iii) with a ketone; v) Washing the layer after step iv) with an alcohol.

[0016] In a second aspect of the present invention, provided is a method for manufacturing a graphene field effect transistor (gFET) comprising a graphene layer deposited on a SiO / Si substrate and having at least one drain electrode, source electrode and gate electrode, said method comprising the following steps: 2 / Si substrate and having at least one drain electrode, source electrode and gate electrode, said method comprising the following steps: i) SiO 2 Providing a SiO / Si wafer substrate; ii) Depositing a graphene layer grown by CVD (chemical vapor deposition) on the surface of said wafer substrate by polymer deposition transfer; iii) Washing the graphene deposited layer with methylbenzene; iv) Washing the layer after step iii) with a ketone; v) Washing the layer after step iv) with an alcohol; vi) After step v), depositing a polymer resist on the layer; vii) Using e-beam lithography to define a region on the wafer substrate where graphene remains; viii) O 2 Removing unnecessary graphene using O plasma etching; ix) Washing the remaining polymer resist using methylbenzene; x) The step of washing the remaining graphene layer with a ketone; xi) The step of washing the graphene layer with an alcohol after step x); xii) The step of depositing an adhesive layer containing Ti or Cr on the graphene surface layer after step xi); xiii) The step of depositing a metal electrode material layer under the adhesive layer after step xii); xiv) The step of peeling the metal layer of step xiii) to form a gFET comprising at least one of a drain electrode, a source electrode, and a gate electrode.

[0017] In certain embodiments, with respect to the above two aspects, methylbenzene is selected from xylene (ortho-xylene, meta-xylene, or para-xylene), toluene, hemellitene (1,2,3-trimethylbenzene), mesitylene (1,3,5-trimethylbenzene), pseudocumene (1,2,4-trimethylbenzene), prehnitene (1,2,3,4-tetramethylbenzene), isodurene (1,2,3,5-tetramethylbenzene), durene (1,2,4,5-tetramethylbenzene), or hexamethylbenzene. In one embodiment, commercially available methylbenzene is sufficient. In one embodiment, the commercially available methylbenzene contains minimal (i.e., less than 1%) metal impurities. In a preferred embodiment, methylbenzene is xylene.

[0018] With respect to the above two aspects, in certain embodiments, the ketone is selected from acetone, ethyl acetate, cyclohexanone, methyl ethyl ketone, and diacetone. In one embodiment, commercially available ketone is sufficient. In one embodiment, the commercially available ketone contains minimal (i.e., less than 1%) metal impurities. In a preferred embodiment, the ketone is acetone.

[0019] In certain embodiments, with respect to the above two aspects, the alcohol is selected from isopropanol (IPA), n-propanol, n-butanol, isobutanol, tert-butanol, or n-pentanol. In one embodiment, commercially available alcohol is sufficient. In one embodiment, the commercially available alcohol contains minimal (i.e., less than 1%) metal impurities. In a preferred embodiment, the alcohol is isopropanol.

[0020] In certain embodiments of the first or second aspect, one or more washing steps may be independently performed one or more times.

[0021] In certain embodiments, the polymer resist is selected from the group consisting of poly(methyl methacrylate) (PMMA), poly(α-methylstyrene-co-α-chloromethyl acrylate) (CSAR62), ZEP520, and maN2403.

[0022] In an embodiment of the first aspect, the method includes the following steps: i) Providing an SiO 2 / Si wafer substrate; ii) Depositing a graphene layer grown by CVD (chemical vapor deposition) on the surface of the wafer substrate by polymer deposition transfer; iii) Washing the graphene deposition layer with xylene; iv) Washing the layer after step iii) with acetone; v) Washing the layer after step iv) with isopropanol.

[0023] In an embodiment of the second aspect, the method includes the following steps: i) Providing an SiO 2 / Si wafer substrate; ii) Depositing a graphene layer grown by CVD (chemical vapor deposition) on the surface of the wafer substrate by polymer deposition transfer; iii) Washing the graphene deposition layer with xylene; iv) a step of washing the layer after step iii) with acetone; v) a step of washing the layer after step iv) with isopropanol; vi) a step of depositing a polymer resist on the layer after step v); vii) a step of defining, using e-beam lithography, regions on the wafer substrate where graphene remains; viii) O 2 a step of removing unnecessary graphene using plasma etching; ix) a step of washing the remaining polymer resist using xylene; x) a step of washing the remaining graphene layer with acetone; xi) a step of washing the graphene layer with isopropanol after step x); xii) a step of depositing an adhesion layer containing Ti or Cr on the graphene surface layer after step xi); xiii) a step of depositing a metal electrode material layer under the adhesion layer after step xii); xiv) a step of peeling the metal layer of step xiii) to form a gFET comprising at least one of a drain electrode, a source electrode, and a gate electrode.

[0024] The methods disclosed herein define a step of providing a graphene layer with minimal layer delamination. Thus, these methods can be used in the manufacture of electronic devices that include the steps of the methods disclosed herein in the manufacture of electronic devices. In certain embodiments, the electronic device can be selected from the group consisting of graphene-based electronic circuits, electronic sensors, analog circuits, semiconductor chips, and microfluidic delivery systems. In certain embodiments, the graphene-based electronic circuit comprises a graphene field effect transistor (gFET). In other embodiments, the electronic sensor is a sensor for gases or biomolecules. In certain embodiments, the analog circuit is an amplifier, an oscillator, or a mixed circuit. In certain embodiments, the microfluidic delivery system delivers gases and / or biological molecules.

Brief Description of the Drawings

[0025]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

DETAILED DESCRIPTION OF THE INVENTION

[0026] Currently, one of the most basic cleaning methods used in the cleanroom is to use ketones and alcohols. The inventors have discovered that additional cleaning with methylbenzene (e.g., xylene) can improve the graphene layer in terms of minimizing delamination and / or defects.

[0027] Throughout this specification and the following claims, unless the context otherwise requires, the word "comprising", and variations such as "comprises" or "comprising", are to be understood to imply the inclusion of the stated integer or step, or group of integers or steps, but not the exclusion of any other integer or step, or group of integers or steps.

[0028] As used herein, the terms "about" or "approximately" mean within an acceptable error range for a particular value as determined by one of ordinary skill in the art, which will depend in part on how the value is measured or determined, i.e., on the limitations of the measurement system.

[0029] Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. For the purposes of this invention, the following terms are defined.

[0030] One aspect of the present invention provides a method for minimizing or preventing delamination of graphene on a graphene layer deposited on a SiO 2 / Si substrate and / or reducing defects, the method comprising the following steps: i) Providing a SiO 2 / Si wafer substrate; ii) Depositing a graphene layer grown by CVD (chemical vapor deposition) on the surface of the wafer substrate by polymer deposition transfer; iii) Washing the graphene deposition layer with methylbenzene; iv) Washing the layer after step iii) with a ketone; v) Washing the layer after step iv) with an alcohol.

[0031] In one embodiment, the SiO 2 / Si wafer substrate comprises a SiO 2 insulating layer of about 100 nm to 400 nm, such as about 100 nm, 150 nm, 200 nm, 250 nm, 300 nm, 350 nm, or about 400 nm (or any range between any two of the recited thicknesses).

[0032] Chemical vapor deposition (CVD) grown graphene is deposited on the aforementioned wafer in a cleanroom environment (such as ISO5 / class 100 type).

[0033] As used herein, "CVD-grown graphene" refers to a technique of depositing graphene as a thin film on a substrate (such as a Cu or Ni foil) from vapor species through a chemical reaction. The processes and types of various chemical reactions occurring in a CVD reactor are determined by many complex factors such as system settings, reactor configuration, gas raw materials, gas ratios, reactor pressure and gas partial pressure, reaction temperature, growth time, temperature, etc. CVD is a bottom-up approach widely used for the synthesis of few-layer and single-layer graphene films. Various CVD methods can be used to synthesize graphene-based materials. These methods can be classified into seven main types based on temperature, pressure, wall / substrate, nature of the precursor, deposition time, gas flow state, activation / power according to the characteristics of the processing parameters (pressure, temperature, nature of the precursor, state of gas flow, wall / substrate temperature, deposition time, activation method).

[0034] Graphene grown by CVD is often regarded as high-quality graphene, meaning a single-crystalline material without contamination, wrinkles, cracks, and other defects. To deposit graphene from a CVD-grown graphene substrate onto a target technical substrate (in this case, a SiO 2 / Si wafer substrate), a transfer step is required.

[0035] Transfer is facilitated by polymer deposition transfer with the help of a polymer transfer agent such as polymethyl methacrylate (PMMA), poly(bisphenol A carbonate), polyvinyl acetate (PVA), etc.

[0036] Here, the polymer resist deposited on the graphene layer refers to a layer that functions as a temporary mask for protecting the underlying layer. In certain embodiments, the polymer resist is selected from the group consisting of poly(methyl methacrylate) (PMMA), poly(α-methylstyrene-co-α-chloroacrylate methyl ester) (CSAR62), ZEP520, and maN2403.

[0037] After the transfer of graphene, delamination and defects are often observed in the deposited graphene layer, resulting in a decrease in the quality of graphene that can be used in applications. This is shown in Fig. 3c).

[0038] In many cases, the sources of defects and the causes of delamination are the sacrificial CVD-grown graphene substrate (e.g., Cu foil), the etching solution (e.g., ammonium persulfate (APS)) used to dissolve the sacrificial substrate, and the support layer (usually an organic polymer such as polymethyl methacrylate (PMMA)) that promotes defect formation and generates the most undesirable types of residues due to the compatible interaction between the polymer and graphene. These defects have a harmful effect on graphene, are mainly related to unwanted doping, create charge scattering centers and charge gradients, and degrade the electrical and catalytic properties of graphene.

[0039] Since the thickness of the graphene layer is usually one or two atoms, cracks and delamination can easily occur due to the mechanical load during cleaning or repeated transfer, or damage by sharp tools. Such damage reduces the electrical properties and mechanical stability of graphene, and may subsequently reduce the operating efficiency or cause failure. Furthermore, analyzing impure or damaged graphene makes it difficult to clarify the relationship between the correct structure and properties.

[0040] The inventors have discovered that by cleaning the graphene deposition layer by a three-step method involving methylbenzene, ketone, and finally alcohol, the amount of defects and / or delamination can be minimized or avoided. Regarding the use of xylene in particular, the inventors recognize that xylene is typically only used as a developer in a clean room, because most of the polymers used are less soluble in xylene compared to other cleaning agents (such as acetone) and release agents (such as N-methyl-2-pyrrolidone). Therefore, the use of xylene as a cleaning agent or solvent has been overlooked. The inventors have confirmed that xylene is excellent for removing amorphous carbon deposits and is effective in dissolving polymer resists (especially those with a thickness of about 1 micron or less).

[0041] As used herein, the term "xylene" refers to dimethylbenzene and its three isomers, namely 1,2-dimethylbenzene (ortho-xylene), 1,3-dimethylbenzene (meta-xylene), and 1,4-dimethylbenzene (para-xylene). In this specification, xylene may refer to a single isomer of xylene, a mixture of two isomers of xylene, or a mixture of all three isomers of xylene.

[0042] The inventors have identified the advantages of the defined method as follows. · Reduction of graphene degradation (i.e., delamination and / or defects) when patterned with a polymer resist; · Less complex than methods using a metal sacrificial layer (fewer process steps and solvents). · Current residue removal methods require more time and energy; · The steps disclosed herein are easier to integrate into post-manufacture processing (i.e., dicing); · Since xylene is not as strong a solvent as conventional removal agents and cleaning agents, the risk of damaging graphene is reduced; · The importance of completing the graphene synthesis and transfer method is reduced because defective additives can be removed.

[0043] Specific steps of the embodiments of the present invention are as follows: a) Wash the graphene deposition layer with methylbenzene. This may include washing the layer for about 1 minute to about 5 minutes by dispersion in methylbenzene (such as xylene) and gentle stirring. This can be achieved by using a mechanical stirrer or manually stirring the solvent in the beaker. The washing can also be accomplished by mechanical means such as wiping or sucking the surface with methylbenzene while applying pressure with an inert gas.

[0044] In certain embodiments, the layer is washed by dispersing it in methylbenzene. In certain embodiments, the layer is washed while gently stirring in methylbenzene. In certain embodiments, the layer is washed with methylbenzene by stirring the layer using a mechanical stirrer. In certain embodiments, the layer is washed with methylbenzene by manually swirling the methylbenzene in a suitable container. In other embodiments, the layer is washed for between about 1 minute and about 5 minutes, such as about 1 minute, about 2 minutes, about 3 minutes, about 4 minutes or about 5 minutes.

[0045] In certain embodiments, the layer is washed with methylbenzene by mechanical means. In certain embodiments, the layer is washed with methylbenzene by sucking the surface of the layer with methylbenzene under pressure with an inert gas. In other embodiments, the layer is washed with methylbenzene by wiping the surface of the layer with methylbenzene.

[0046] b) Wash the layer with a ketone after step 3). This may include washing the layer for about 1 minute to about 7 minutes by dispersion in a ketone (such as acetone) and gentle stirring. This can be achieved by using a mechanical stirrer or manually stirring the solvent in the beaker. The washing can also be accomplished by mechanical means such as wiping or sucking the surface with a ketone while applying pressure with an inert gas.

[0047] In certain embodiments, the layer is washed by dispersing it in a ketone. In certain embodiments, the layer is washed while gently stirring in a ketone. In certain embodiments, the layer is washed with a ketone by stirring using a mechanical stirrer. In certain embodiments, the layer is washed with a ketone by manually swirling the ketone in a suitable container. In other embodiments, the layer is washed for between about 1 minute and about 10 minutes, such as about 1 minute, about 2 minutes, about 3 minutes, about 4 minutes, about 5 minutes, about 6 minutes or about 7 minutes.

[0048] In certain embodiments, the layer is washed with a ketone by mechanical means. In certain embodiments, the layer is washed with a ketone by sucking the surface of the layer with a ketone by the pressure of an inert gas. In other embodiments, the layer is washed with a ketone by wiping the surface of the layer with a ketone.

[0049] c) After step iv), the layer is washed using an alcohol. This may include washing the layer for about 1 minute to about 5 minutes by dispersion and gentle stirring in an alcohol (such as IPA). This can be achieved by using a mechanical stirrer or manually stirring the solvent in a beaker. The washing can also be accomplished by mechanical means such as wiping or sucking the surface with an alcohol while applying pressure with an inert gas.

[0050] In certain embodiments, the layer is washed by dispersing it in an alcohol. In certain embodiments, the layer is washed while gently stirring in an alcohol. In certain embodiments, the layer is washed with an alcohol by stirring using a mechanical stirrer. In certain embodiments, the layer is washed with an alcohol by manually swirling the alcohol in a suitable container. In other embodiments, the layer is washed for between about 1 minute and about 5 minutes, such as about 1 minute, about 2 minutes, about 3 minutes, about 4 minutes to about 5 minutes.

[0051] In certain embodiments, the layer is washed with alcohol by mechanical means. In certain embodiments, the layer is washed with alcohol by suction of the surface of the layer with alcohol via pressure with an inert gas. In other embodiments, the layer is washed with alcohol by wiping the surface of the layer with alcohol.

[0052] After each of these washing steps, or after all three washing steps, the graphene deposition layer is dried with an inert gas such as nitrogen, if necessary. In certain embodiments, the method disclosed herein further includes a drying step. In certain embodiments, the graphene deposition layer is dried after being washed with methylbenzene. In other embodiments, the graphene deposition layer is dried after being washed with a ketone. In other embodiments, the graphene deposition layer is dried after being washed with alcohol. In some embodiments, the graphene deposition layer is dried after each washing step. In certain embodiments, the graphene deposition layer is dried with nitrogen after being washed with methylbenzene. In other embodiments, the graphene deposition layer is dried with nitrogen after being washed with a ketone. In other embodiments, the graphene deposition layer is dried with nitrogen after being washed with alcohol.

[0053] Although not essential, further high-temperature annealing treatment or ICP-based additional washing can also be performed on the graphene layer.

[0054] As described above, Raman spectroscopy can be used to quantify the number of defects on the deposited graphene layer. In this regard, the intensity of the graphite peak (1605 - 1590 cm -1 , i.e., the G peak) at about 1600 cm -1 increases by at least 5% after three washing steps compared to an equivalent graphene deposition layer washed only with a ketone and alcohol (such as acetone and IPA) (see Figure 6). The defects in the graphene layer are the height of the D peak (about 1360 cm -1 ), the height of the 2D peak (about 2650 cm -1 ), the D / D’ ratio (i.e., about 1360 cm -1 and 1610 cm -1It can be quantified by comparing the ratio between peaks (), and the ratio between the D peak and the G peak. These peaks are characteristics of graphene when analyzed by Raman spectroscopy, respectively.

[0055] In one embodiment, the D / D’ ratio of the graphene layer after three cleaning steps is less than 12 compared to an equivalent graphene deposition layer cleaned only with ketones and alcohols (such as acetone and IPA).

[0056] In one embodiment, the D / D’ ratio of the graphene layer after three cleaning steps is less than 11 compared to an equivalent graphene deposition layer cleaned only with ketones and alcohols (such as acetone and IPA).

[0057] In one embodiment, the D / D’ ratio of the graphene layer after three cleaning steps is less than 10 compared to an equivalent graphene deposition layer cleaned only with ketones and alcohols (such as acetone and IPA).

[0058] In one embodiment, the D / D’ ratio of the graphene layer after three cleaning steps is less than 9 compared to an equivalent graphene deposition layer cleaned only with ketones and alcohols (such as acetone and IPA).

[0059] In one embodiment, the D / D’ ratio of the graphene layer after three cleaning steps is less than 8 compared to an equivalent graphene deposition layer cleaned only with ketones and alcohols (such as acetone and IPA).

[0060] In one embodiment, the D / D’ ratio of the graphene layer after three cleaning steps is less than 7 compared to an equivalent graphene deposition layer cleaned only with ketones and alcohols (such as acetone and IPA).

[0061] In one embodiment, the D / D’ ratio of the graphene layer after three cleaning steps is less than 6 compared to an equivalent graphene deposition layer cleaned only with ketones and alcohols (such as acetone and IPA).

[0062] In one embodiment, the D / D’ ratio of the graphene layer after three cleaning steps is less than 5 as compared to an equivalent graphene deposition layer cleaned only with ketone and alcohol (e.g., acetone and IPA).

[0063] In one embodiment, the D / D’ ratio of the graphene layer after three cleaning steps is less than 4 as compared to an equivalent graphene deposition layer cleaned only with ketone and alcohol (e.g., acetone and IPA).

[0064] In one embodiment, the D / D’ ratio of the graphene layer after three cleaning steps is less than 3 as compared to an equivalent graphene deposition layer cleaned only with ketone and alcohol (e.g., acetone and IPA).

[0065] In one embodiment, the D / D’ ratio of the graphene layer after three cleaning steps is less than 2 as compared to an equivalent graphene deposition layer cleaned only with ketone and alcohol (e.g., acetone and IPA).

[0066] In another embodiment, the intensity of the graphite peak at about 1600 cm -1 increases by at least 2% after three cleaning steps as compared to an equivalent graphene deposition layer cleaned only with ketone and alcohol (e.g., acetone and IPA).

[0067] In another embodiment, the intensity of the graphite peak at about 1600 cm -1 increases by at least 3% after three cleaning steps as compared to an equivalent graphene deposition layer cleaned only with ketone and alcohol (e.g., acetone and IPA).

[0068] In another embodiment, the intensity of the graphite peak at about 1600 cm -1 increases by at least 4% after three cleaning steps as compared to an equivalent graphene deposition layer cleaned only with ketone and alcohol (e.g., acetone and IPA).

[0069] In another embodiment, the intensity of the graphite peak at about 1600 cm-1 The intensity of the graphite peak is increased by at least 5% after three cleaning steps compared to an equivalent graphene deposition layer cleaned only with ketone and alcohol (e.g., acetone and IPA).

[0070] In another embodiment, at about 1600 cm -1 The intensity of the graphite peak is increased by at least 6% after three cleaning steps compared to an equivalent graphene deposition layer cleaned only with ketone and alcohol (e.g., acetone and IPA).

[0071] Other peaks characteristic of graphene may also be used to characterize the properties of graphene and the degree of defects present. For example, a peak at about 2650 cm -1 can be used, i.e., the 2D peak. In this regard, the intensity of the graphite peak at about 2650 cm -1 (such as between 2655 - 2645 cm -1 ) is increased by at least 2% after three cleaning steps compared to an equivalent graphene deposition layer cleaned only with ketone and alcohol (such as acetone and IPA).

[0072] In another embodiment, at about 2650 cm -1 The intensity of the graphite peak is increased by at least 3% after three cleaning steps compared to an equivalent graphene deposition layer cleaned only with ketone and alcohol (e.g., acetone and IPA).

[0073] In another embodiment, at about 2650 cm -1 The intensity of the graphite peak is increased by at least 4% after three cleaning steps compared to an equivalent graphene deposition layer cleaned only with ketone and alcohol (e.g., acetone and IPA).

[0074] In another embodiment, at about 2650 cm -1 The intensity of the graphite peak is increased by at least 5% after three cleaning steps compared to an equivalent graphene deposition layer cleaned only with ketone and alcohol (e.g., acetone and IPA).

[0075] In another embodiment, the intensity of the graphite peak at about 2650 cm -1 increases by at least 6% after three cleaning steps compared to an equivalent graphene deposition layer cleaned only with ketone and alcohol (e.g., acetone and IPA).

[0076] In another embodiment, the intensity of the graphite peak at about 2650 cm -1 increases by at least 7% after three cleaning steps compared to an equivalent graphene deposition layer cleaned only with ketone and alcohol (e.g., acetone and IPA).

[0077] In certain embodiments, the intensities of the graphite peaks at about 1600 cm -1 and about 2650 cm -1 both increase by at least 3% after three cleaning steps compared to an equivalent graphene deposition layer cleaned only with ketone and alcohol (e.g., acetone and IPA).

[0078] In certain embodiments, the intensities of the graphite peaks at about 1600 cm -1 and about 2650 cm -1 both increase by at least 4% after three cleaning steps compared to an equivalent graphene deposition layer cleaned only with ketone and alcohol (e.g., acetone and IPA).

[0079] In certain embodiments, the intensities of the graphite peaks at about 1600 cm -1 and about 2650 cm -1 both increase by at least 5% after three cleaning steps compared to an equivalent graphene deposition layer cleaned only with ketone and alcohol (e.g., acetone and IPA).

[0080] Defects can also be determined using electronic measurements, specifically, using the conductivity and mobility of the prepared graphene, μ = α / η 0The total number of defects can be determined through the relationship. In the measurement of the graphene sheet, μ and α can be measured in a four-probe configuration. Once these values are determined, the defect density n 0 can be calculated.

[0081] In certain embodiments, the XPS data includes information about carbon compounds (i.e., the arrangement of graphene and what is on it), as well as information about other elements, particularly nitrogen and oxygen.

[0082] In this application, the inventors focus on the ratio of CC bonds to C=C bonds and the number of carbons at higher binding energies (i.e., looking for a decrease in the number of compounds between 286 eV and 289 eV). The penetration depth of XPS is about 5 nm.

[0083] Also, in this application, the inventors have observed that the total ratio of nitrogen and oxygen is low (i.e., the atomic and / or weight ratio is low) compared to graphene layers cleaned by equivalent means. Oxygen and nitrogen may be either bonded to carbon or simply adsorbed. This information can also be obtained from XPS. Measurements can be made to indicate whether these other elements are "electrically connected" to the graphene.

[0084] In certain embodiments, the measured electrical resistance of a graphene deposition layer (after PMMA removal) cleaned with methylbenzene shows an electrical resistance in the range close to that of graphene, about 450 Ω / cm 2 (the square is typically 1 cm × 1 cm), whereas when methylbenzene (such as xylene) cleaning is not part of the processing step, the resistance exceeds 100 MΩ.

[0085] These methods are used in combination with, or may be used to produce, the following. · Graphene-based electronic circuits; · Graphene field-effect transistors (gFETs); · gFETS as the basis for electronic sensors (gas / biological molecules); · Analog circuits (amplifiers, oscillators, mixer circuits); · Miniaturization of devices to increase the number of devices on a chip; · Integration of different graphene devices on a single semiconductor chip; · Microfluidic delivery systems for gaseous / biological molecules; · Potential on-chip compatibility for device miniaturization and multiplexing.

[0086] For example, the present invention further provides a method for manufacturing a graphene field effect transistor (gFET) including a graphene layer deposited on an SiO 2 / Si substrate, wherein the aforementioned gFET is characterized by at least one drain electrode, a source electrode, and a gate electrode, and the method includes the following steps: i) Providing an SiO 2 / Si wafer substrate; ii) Depositing a graphene layer grown by CVD (chemical vapor deposition) on the surface of the wafer substrate by polymer deposition transfer; iii) Cleaning the graphene deposition layer with methylbenzene; iv) Cleaning the layer after step iii) with a ketone; v) Cleaning the layer after step iv) with alcohol; vi) After step v), depositing a polymer resist on the layer; vii) Using e-beam lithography to define a region on the wafer substrate where graphene remains; viii) Removing unnecessary graphene using O 2 plasma etching; ix) Cleaning the remaining polymer resist using methylbenzene; x) Cleaning the remaining graphene layer with a ketone; xi) After step x), cleaning the graphene layer with alcohol; xii) After step xi), depositing an adhesion layer containing Ti or Cr on the graphene surface layer; xiii) After step xii), depositing a metal electrode material layer under the adhesive layer; xiv) Removing the metal layer of step xiii) to form a gFET comprising at least one of a drain electrode, a source electrode, and a gate electrode.

[0087] References in this specification to prior publications (or information derived therefrom) or known matters shall not be construed as an admission, concession, or any form of suggestion that the prior publication (or information derived therefrom) or known matter forms part of the common general knowledge in the field to which this specification pertains.

[0088] Those skilled in the art will understand that the invention described in this specification is capable of changes and modifications other than those specifically described. It is to be understood that the invention includes all such variations and modifications that fall within the spirit and scope of the invention. The invention also includes all steps, features, compositions, and compounds referred to or indicated in this specification, individually or collectively, and any combination of any two or more of said steps or features.

Example

[0089] The following examples are illustrative of the disclosure and are not to be construed in any way as limiting the general nature of the disclosure of the description throughout this specification.

[0090] General procedure Graphene grown by CVD on a Si wafer (with a 300 nm SiO 2 insulating layer) is introduced into a clean room (ISO5 / class 100). The graphene is grown on a copper foil. In a two-step process, first the copper foil is heated in an Ar-hydrogen gas stream (hydrogen about 2.5%) at a pressure of 1 atm or slightly lower than that for about 1 hour at about 1000 °C. Subsequently, 500 ppm of methane is added to the Ar-hydrogen mixture and graphene is grown for 15 minutes.

[0091] In all experiments, the wafers were diced into approximately 1 cm × 1 cm squares using a diamond scribe. First, the dies were washed with xylene while gently stirring for 3 minutes. Subsequently, the dies were further immersed in acetone for 5 minutes and gently stirred to remove organic residues. Finally, they were rinsed with isopropanol (IPA) for 3 minutes (again, gently stirring) to remove all residues. After that, the dies were dried in N 2 flow. An electron beam resist of 950A4 polymethyl methacrylate (PMMA) was spin-coated onto the graphene on the die (Polos spin coater SPIN 150i).

[0092] To demonstrate the cleaning effect of xylene, another process of cleaning with only acetone and IPA (same time and same conditions) before spin-coating a similar PMMA layer was also carried out.

[0093] Lithography was performed using an Elionix F-125 electron beam lithography system. The electron beam voltage was set to 125 keV, and the pattern dose was 1250 μC.cm for the electrodes and markers (1 nA beam size), -2 and 300 μC.cm for the graphene pattern (3 nA beam size). -2 The development of PMMA was carried out using methyl isobutyl ketone (MiBK) in IPA at a ratio of 1:3 (MiBK:IPA). PMMA was first developed with MiBK:IPA (40 seconds for markers and electrode patterns, 120 seconds for graphene patterns), and then rinsed with IPA (20 seconds for markers and electrode patterns, 60 seconds for graphene patterns). After that, the dies were dried in N 2 airflow.

[0094] The design of the marker, graphene, and electrode layouts was completed in Klayout and converted to a.con file using Beamer software.

[0095] Graphene squares (sizes 15 μm × 25 μm and 2 μm × 4 μm) were formed by lithographically defining the area and etching the exposed graphene from the surface. To achieve this, O 2 plasma was used to etch the graphene in a reactive ion etching apparatus (Southbay Technologies). The plasma was generated with O 2 at 50 W of RF power for 1 minute at 30 mT. This process was carried out before the deposition of the Au markers (to ensure direct deposition of Au onto the SiO 2 layer) and to separate the graphene sheet into multiple devices (after lithography of the graphene pattern).

[0096] Deposition of the Au layer for the markers and electrodes was realized using an electron beam evaporation apparatus (AJA international). A 30-nm-thick Au layer (deposition rate 1 Å / s) was deposited onto the markers (after plasma etching) and the electrode lithography pattern. Before Au deposition, first a 10-nm-thick Ti adhesion layer (deposition rate 0.5 Å / s) was deposited.

[0097] Example 1 - Fabrication and Characterization of Graphene Layers The graphene on SiO 2 was cleaned with acetone and IPA (not xylene) before lithography and metallization. After peeling off the residual gold and PMMA layer, it was found that the graphene was torn off and removed from the SiO 2 substrate, and only the graphene localized mainly around the gold electrodes remained (see Figure 1). Although the electrodes seem to hold the graphene to the substrate, it seems that the graphene would just break when removed together with the PMMA. The overall removal of the graphene was electrically confirmed by resistance measurements (see Figure 2). These measurements support the fact that the amount of graphene remaining on the surface is negligibly small due to the high resistance (out of range > 100 MΩ).

[0098] It was found that the damaged areas occurred during the deposition and curing of PMMA. Before spin-coating and curing PMMA, the substrate was cleaned with acetone and IPA. After curing, acetone was used to remove PMMA. The results of the removal are shown in Figure 3.

[0099] From the image, it can be seen that no graphene remains in the center of the Si die (see Figure 3a). Some graphene still remains around the edge (see Figure 3b). However, it is clear that graphene has also been removed along with PMMA by acetone. The reason is thought to be due to the interaction between the defective amorphous carbon on graphene. In the curing step, the bond between graphene and SiO 2 can be sacrificed to improve the bond between PMMA and graphene. Considering that graphene remains around the gold (see Figure 1), there is a possibility that graphene is released from PMMA by an electron beam during lithography. A simple diagram of the tearing and peeling process is shown in Figure 4.

[0100] The process was changed, such as adding xylene before the acetone and IPA treatment procedure to remove amorphous carbon. The purpose is to remove amorphous carbon with xylene and remove organic residues with acetone. IPA cleaning is further used to remove the residues left by acetone. Subsequently, PMMA was deposited, cured, and then removed. The results are shown in Figure 5. The surface is almost uniform except for some scratches, suggesting that the graphene layer remains intact uniformly. At the edge (Figure 5.b), more scratches are visible on the surface, but it is clearly shown that more graphene is present compared to the treatment involving only the reaction of acetone and IPA. It was confirmed by Raman spectroscopy (see Figure 6) that graphene continues to exist after the treatment (see Figure 6b). Comparing with the Raman spectrum before cleaning and the deposition and removal of PMMA (see Figure 6a), it can be seen that there is no significant change in graphene. The D region and D’ region (1360 and 1610 cm -1Since no peak is observed in ), it can be seen that no defects are caused by cleaning and PMMA removal. On the other hand, the G region and the 2D region (corresponding to 1600 cm -1 and 2650 cm -1 ) have almost the same shape and ratio.

[0101] Figure 7 shows a comparison of the electrical resistance measurement values of graphene-covered Si dies after removing PMMA. Graphene cleaned with xylene shows an electrical resistance in the range close to that of graphene, but when xylene is not included in the processing steps, the resistance exceeds 100 MΩ again. When the xylene treatment is not performed, the graphene is removed, and it is confirmed that the peeling of graphene is prevented by the xylene treatment method. The proposed process is outlined in the scheme of Figure 8. The difference between this method and the method shown in Figure 4 is that xylene is proposed to remove the growth of amorphous carbon and smooth out some of the defects generated during growth, transfer, or storage.

[0102] Xylene-acetone-IPA cleaning was integrated into the lithography process, and an Au electrode was deposited on the graphene surface. Next, Au was peeled off using xylene at 80 °C. The results of this peeling are shown in Figure 8. Except for the area around where Au was deposited, the graphene remains intact (see Figure 9a). The cracks in this graphene are generated by the peeling of Au, as shown by the pattern remaining on the graphene (see Figure 9b). The reason for the breakage of the graphene may be that the Au electrode is more strongly bonded to the graphene due to the temperature of the metal flowing in during deposition. Looking at the high-magnification image of the graphene, it can be seen that the graphene is continuous, but there are some defects, so it needs to be considered (either a baseline needs to be established or it needs to be optimized to reduce it).

[0103] Considering that Au initiated the tearing of the graphene, the etching of the graphene (for better contact and SiO 2Beginning with enabling it and reducing the possibility of graphene removal when stripping the metal strip, another process of depositing contacts (employing xylene acetone IPA cleaning) was then executed. The results are shown in Figure 10. Although there are positive aspects to this proposed process, for example, the metal remains firmly bonded to SiO 2 and the graphene is sufficiently etched by the plasma. However, complex problems may occur during manufacturing. For example, due to reliability issues with the electron beam system, extra metal may be deposited unevenly unexpectedly. As a result, effective removal (also called "lift-off") cannot be performed. However, etched graphene sheets can be seen in the areas where the resist was successfully removed.

[0104] This process is used to create a four-probe graphene device for specifically testing the electrical properties of graphene, which includes measurements of current and voltage (IV) (usable for determining the resistance of graphene) and conductivity and electron mobility. This is shown in Figure 11. In preliminary IV measurements, it was found that the resistance between the probes is approximately 9.3 kΩ.

[0105] Fabrication of Example 2 - gFET This process can be used for the manufacture of gFETs (gFETs can then also be used for the construction of biosensors and gas sensors). The process applicable to the manufacture of gFETs is shown in Figure 12. First, graphene on Si is cleaned in a three-step process of xylene, acetone, and IPA. Subsequently, PMMA is deposited, spin-coated, and cured (under the above conditions). Next, electron beam lithography is used to define the areas where graphene needs to be left, and then O 2Use plasma etching to remove most of the unwanted graphene. Subsequently, remove the remaining PMMA resist with xylene. Subsequently, the lithography process starts again. This process again begins with a three-step cleaning process, after which PMMA is deposited and cured, and the metal contact areas are defined using electron beam lithography. Next, deposit the metal layer using vapor deposition. There are usually two layers, one is a thin adhesion layer (usually composed of Ti or Cr), and the other is a thick electrode layer (usually composed of Au). Next, use xylene to peel the resist metal layer from the surface. To function as a liquid gate gFET, surface passivation is required to prevent shorts (in the case of biosensors, also to avoid crosstalk in multiplexed designs). This is achieved by another lithography process and the deposition of a dielectric material (for example, SiN is preferentially used to prevent ion migration). When the resist and dielectric material are removed with xylene, the exposed areas that are not dielectric are only the gate electrode and graphene.

[0106] References in this specification to prior publications (or information derived therefrom) or known matters shall not be construed as an admission, concession, or any form of suggestion that the prior publication (or information derived therefrom) or known matter forms part of the common general knowledge in the field to which this specification pertains.

[0107] Throughout this specification and the following claims, unless the context otherwise requires, the word "comprising", and variations such as "comprises" or "comprising", are to be understood to imply the inclusion of the stated integer or step, or group of integers or steps, but not the exclusion of any other integer or step, or group of integers or steps.

[0108] Throughout this specification and the appended claims, unless the context otherwise requires, the phrase "consisting essentially of" and variations such as "consists essentially of" are understood to indicate that the recited elements are essential elements of the invention. This phrase permits the presence of other unrecited elements that do not substantially affect the characteristics of the invention, but excludes additional unspecified elements that affect the basic and novel characteristics of the defined method.

Claims

1. SiO 2 1. A method for minimizing or preventing graphene exfoliation and / or reducing defects in a graphene layer deposited on a Si substrate, the method comprising: i) SiO 2 providing a silicon wafer substrate; ii) depositing a CVD (chemical vapor deposition) grown graphene layer onto the surface of said wafer substrate by polymer deposition transfer; iii) washing the graphene deposit with methylbenzene; iv) washing the layer after step iii) with a ketone; v) washing the layer after step iv) with alcohol.

2. SiO 2 1. A method for fabricating a graphene field effect transistor (gFET) comprising a graphene layer deposited on a Si substrate, the gFET having at least one drain electrode, a source electrode, and a gate electrode, the method comprising: i) SiO 2 providing a silicon wafer substrate; ii) depositing a CVD (chemical vapor deposition) grown graphene layer onto the surface of said wafer substrate by polymer deposition transfer; iii) washing the graphene deposit with methylbenzene; iv) washing the layer after step iii) with a ketone; v) washing the layer after step iv) with alcohol; vi) after step v), depositing a polymer resist onto the layer; vii) using e-beam lithography to define areas on the wafer substrate where graphene will remain; viii) O 2 removing unwanted graphene using plasma etching; ix) washing off the remaining polymer resist using methylbenzene; x) washing the remaining graphene layer with a ketone; xi) after step x), washing the graphene layer with alcohol; xii) after step xi), depositing an adhesion layer comprising Ti or Cr on the graphene surface layer; xiii) after step xii), depositing a metal electrode material layer below the adhesion layer; xiv) stripping the metal layer of step xiii) to form a gFET comprising at least one of a drain electrode, a source electrode, and a gate electrode.

3. Methylbenzene is xylene (ortho-xylene, meta-xylene, or para-xylene), toluene, hemelitene (1,2,3-trimethylbenzene), mesitylene (1,3,5-trimethylbenzene), pseudocumene (1,2,4-trimethylbenzene), prenythene (1,2,3,4-tetramethylbenzene), isodurene (1,2,3,5- 3. The method according to claim 1, wherein the methylbenzene is selected from the group consisting of methylbenzene (1,2,4,5-tetramethylbenzene), durene (1,2,4,5-tetramethylbenzene), and hexamethylbenzene.

4. 3. The method of claim 1 or 2, wherein the methylbenzene is a xylene.

5. 3. The method of claim 1, wherein the ketone is selected from acetone, ethyl acetate, cyclohexanone, methyl ethyl ketone, or diacetone.

6. 3. The method of claim 1, wherein the ketone is acetone.

7. 3. The method according to claim 1 or 2, wherein the alcohol is selected from isopropanol (IPA), n-propanol, n-butanol, isobutanol, tert-butanol, or n-pentanol.

8. 3. The method of claim 1 or 2, wherein the alcohol is isopropanol (IPA).

9. The method of claim 2 , wherein the polymer resist is PMMA.

10. 10. A graphene layer produced according to the method of claim 1.

11. 3. A graphene field effect transistor (gFET) fabricated according to the method of claim 2.

12. 12. The graphene field effect transistor of claim 11, wherein the resistivity of the graphene deposition layer is within the characteristic range of graphene.

13. The resistivity of the graphene deposition layer is about 450 Ω / cm 2 The graphene field effect transistor according to claim 11 or 12, wherein

14. An electronic device comprising the graphene layer of claim 10.

15. 15. The electronic device of claim 14, wherein the device is selected from the group consisting of graphene-based electronic circuits, electronic sensors, analog circuits, semiconductor chips, and microfluidic delivery systems.

16. 16. The electronic device of claim 15, wherein the graphene-based electronic circuit comprises a graphene field effect transistor (gFET).

17. 16. The electronic device of claim 15, wherein the electronic sensor is a gas or biomolecule sensor.

18. 16. The electronic device of claim 15, wherein the analog circuit is an amplifier, an oscillator, or a mixed circuit.

19. The electronic device of claim 15 , wherein the microfluidic delivery system delivers gases and / or biological molecules.