Low-temperature silicon oxide gap filling

Abstract

Embodiments of the present disclosure relate to a method for forming a silicon-based gap fill within a substrate feature. A flowable silicon film is formed within the feature such that the thickness of the bottom and top surfaces is greater than the sidewall surfaces. An etching plasma removes the silicon film from the sidewall surfaces. A conversion plasma is used to convert the silicon film into a silicon-based gap fill (e.g., silicon oxide). In some embodiments, the silicon film is preferentially converted on the top and bottom surfaces before being etched from the sidewall surfaces.

Description

Technical Field

[0001] Cross - Reference to Related Applications This application claims the benefit and priority of U.S. Patent Application No. 17 / 827,652, entitled "LOW TEMPERATURE SILICON OXIDE GAP FILL", filed on May 27, 2022, the entire content of which is incorporated herein by reference.

[0002] Embodiments of the present disclosure generally relate to methods for providing silicon - based gap filling in high - aspect - ratio structures. Specifically, some embodiments of the present disclosure relate to methods for forming silicon oxide gap fills at low temperatures without using vapor.

Background Art

[0003] Integrated circuits are enabled by a process of generating complexly patterned material layers on a substrate surface. To generate patterned materials on a substrate, methods for controlling the formation and removal of the exposed materials are required. As device sizes continue to shrink, material formation can affect subsequent operations.

[0004] In gap - filling operations, materials may be formed or deposited to fill trenches or other features formed on a semiconductor substrate. Since features may be characterized by higher aspect ratios and reduced critical dimensions, certain filling methods may be inappropriate. For example, some methods deposit more material along the upper and sidewalls of narrower features. Continuing deposition by these methods may cause the feature to pinch off, including between the sidewalls, inside the feature, and voids may be generated inside the feature. These voids can adversely affect device performance and subsequent processing operations.

[0005] Specifically, current methods for depositing silicon oxide rely on vapor-based processes that utilize relatively high temperatures. However, the underlying structures to be filled often include exposed silicon or silicon-germanium materials that can be oxidized by these high-temperature vapor conditions. Some methods for depositing silicon oxide gap fill use multiple chambers to meet the material requirements of the gap fill material. These multi-chamber processes are time-consuming and have low throughput.

[0006] Accordingly, there is a need in the art for new methods of depositing gap fill materials in high aspect ratio and / or low critical dimension features. Specifically, there is a need for silicon oxide gap fill that can be performed in situ, at relatively low temperatures, and without using vapor, within a single processing chamber. SUMMARY OF THE INVENTION

[0007] One or more embodiments of the present disclosure are directed to a method of depositing a silicon-based gap fill. The method includes depositing a flowable silicon film on a substrate surface having at least one feature therein. The feature has an opening width, one or more sidewalls, and extends in depth from the top surface to the bottom of the substrate. The flowable silicon film is deposited as an upper material on the top surface, as a sidewall material on one or more sidewalls, and as a bottom material on the bottom. The sidewall material is selectively etched relative to the upper material and the bottom material. The upper material and the bottom material are converted to form a converted material.

[0008] Additional embodiments of the present disclosure are directed to a method of depositing a silicon-based gap fill. The method includes depositing a flowable silicon film on a substrate surface having at least one feature therein. The feature has an opening width, has one or more sidewalls, extends in depth from the top surface to the bottom surface of the substrate, and the flowable silicon film is deposited as an upper material on the top surface, as a sidewall material on one or more sidewalls, and as a bottom material on the bottom surface. The upper material and the bottom material are selectively converted to form a converted material. The sidewall material is selectively etched relative to the converted material.

[0009] To better understand the above features of the present disclosure, a more specific description of the present disclosure briefly summarized above can be obtained by referring to the embodiments shown in part in the accompanying drawings. However, it should be noted that the accompanying drawings show only typical embodiments of the present disclosure and should not be considered as limiting its scope, and the present disclosure can recognize other equally valid embodiments. The embodiments described herein are shown by way of example and not limitation in the figures of the accompanying drawings in which like reference numerals indicate like elements.

Brief Description of the Drawings

[0010]

Figure 1

Figure 2

Figure 3A

Figure 3B

Figure 3C

Modes for Carrying Out the Invention

[0011] Some of the figures are included as schematic diagrams. It should be understood that the figures are for illustrative purposes and should not be considered to be to scale unless specifically stated to be so. Further, as schematic diagrams, the figures are provided to aid understanding and may not include all aspects or information compared to a realistic representation and may include exaggerated materials for illustrative purposes.

[0012] In the accompanying figures, like components and / or features may have the same reference labels. Further, various components of the same type may be distinguished by following the reference label with a letter or an appended number to distinguish the like components. When only the first reference label is used in this specification, the description is applicable to any one of the like components having the same first reference label, regardless of the letter or appended number.

[0013] Before describing some exemplary embodiments of the present disclosure, it should be understood that the present disclosure is not limited to the details of the configurations or process steps described in the following description. The present disclosure is capable of other embodiments and of being practiced or carried out in various ways.

[0014] As used in this specification and the appended claims, the term "substrate" refers to the surface or a portion of the surface on which a process acts. Also, one of ordinary skill in the art will understand that a reference to a substrate can also refer to only a portion of the substrate unless the context clearly indicates otherwise. Further, a reference to an operation on or with respect to a substrate can mean both a bare substrate and a substrate having one or more films or features deposited or formed thereon.

[0015] As used herein, "substrate" refers to any substrate on which film processing is performed during the manufacturing process or the surface of a material formed on a substrate. For example, the substrate surface on which processing can be performed can be made of materials such as silicon, silicon oxide, strained silicon, silicon-on-insulator (SOI), carbon-doped silicon oxide, amorphous silicon, doped silicon, germanium, gallium arsenide, glass, sapphire, etc., as well as any other materials such as metals, metal nitrides, metal alloys, and other conductive materials. The substrate includes, but is not limited to, semiconductor wafers.

[0016] The substrate may be subjected to a pretreatment process for polishing, etching, reducing, oxidizing, hydroxylation, annealing, UV curing, electron beam curing, and / or baking the substrate surface. In addition to directly performing film processing on the surface of the substrate itself, in the present disclosure, any of the disclosed film processing steps can also be performed on an underlying layer formed on the substrate, as will be disclosed in more detail below, and the term "substrate surface" is intended to include such an underlying layer as the context indicates.

[0017] As used herein, the term "substrate surface" refers to any substrate surface on which a layer can be formed. The substrate surface can have one or more features formed thereon, one or more layers formed thereon, and combinations thereof. The shape of the feature can be any suitable shape including, but not limited to, peaks, trenches, holes, and vias (circular or polygonal). As used in this regard, the term "feature" refers to any intentional surface irregularity. Suitable examples of features include trenches having an upper portion, two sidewalls, and a bottom portion and extending into the substrate, and vias having one or more sidewalls and extending to the bottom within the substrate, but are not limited thereto.

[0018] As used in this specification and the appended claims, the term "selectively" refers to a process that acts on a first surface with a greater effect than on another second surface. Such a process is described as acting "selectively" on the first surface rather than on the second surface. The term "(over)" used in this context does not mean a physical orientation where one surface is over another surface, but rather refers to the relationship of the thermodynamic or kinetic characteristics of the relative chemical reactions between one surface and the other surface.

[0019] The term "on" indicates that there is direct contact between elements. The term "directly on" indicates that there is direct contact between elements without intervening elements.

[0020] As used in this specification and the appended claims, terms such as "precursor", "reactant", "reactive gas", etc. are used interchangeably to refer to any gaseous nuclide that can react with a substrate.

[0021] Embodiments of the present disclosure provide a method for depositing silicon-based gap fillings. Some embodiments of the present disclosure provide gap filling at relatively low temperatures. Some embodiments provide gap filling in a bottom-up manner. Some embodiments provide gap filling without seams or voids. Some embodiments provide in-situ gap filling within a single processing chamber. Further embodiments advantageously provide a method for depositing silicon oxide gap fillings. Some embodiments provide silicon oxide gap fillings without using vapor.

[0022] Amorphous silicon may be used in semiconductor device manufacturing for several structures and processes, such as as a sacrificial material, for example as a dummy gate material or as a trench fill material. In a gap filling operation, some processes can utilize a fluid film formed under process conditions to limit the conformality of deposition, which may enable the deposited material to better fill features on the substrate. The fluid silicon material may be characterized by a relatively large amount of hydrogen and may have a lower density than other formed films. As a result, subsequent processing operations may be performed to cure the resulting film. In the prior art, a UV curing process may be utilized to remove hydrogen and treat the film. However, UV curing may cause the film to shrink significantly, which may not only create voids within the structure but also generate stress in the features.

[0023] As feature sizes continue to shrink, the fluid film may challenge narrow features that can be further characterized by a higher aspect ratio. For example, due to deposition on the sidewalls of the feature, pinching of the feature may occur more easily, which may further limit the flow into additional features and may generate voids when the feature size is small. The present technology can overcome these limitations by performing a directional treatment on the material formed within the feature, and this directional treatment may not be performed on the material deposited on the sidewalls. Further, the present technology can perform selective etching and / or modification of the formed film that can maintain the material near the bottom of the feature while removing the material on the sidewalls during the curing operation. This can limit or prevent sidewall coverage during trench filling and enable an improved filling operation.

[0024] After describing the general aspects of a chamber according to some embodiments of the present technology that can perform the plasma processing operations discussed below, a specific methodology will be discussed. It should be understood that the technology described can be used to improve any number of film forming processes and may be applicable to various processing chambers, operations, and materials, and thus the technology is not intended to be limited to the specific films, chambers, or processes discussed.

[0025] FIG. 1 shows a cross-sectional view of an exemplary processing chamber 100 according to some embodiments of the present technology. This figure shows an overview of a system incorporating one or more aspects of the present technology and / or capable of performing one or more deposition or other processing operations according to embodiments of the present invention.

[0026] Chamber 100 may be utilized to form a film layer according to some embodiments of the present technology, but it should be understood that the method may be similarly performed within any chamber in which film formation can occur. Processing chamber 100 can include a chamber body 102, a substrate support 104 disposed inside the chamber body 102, and a lid assembly 106 coupled to the chamber body 102 and enclosing the substrate support 104 within a processing volume 120. Substrate 103 may be provided to the processing volume 120 through an opening 126, and the opening 126 may be conventionally sealed for processing using a slit valve or door. Substrate 103 may be placed on the surface 105 of the substrate support during processing. Substrate support 104 may be rotatable along an axis 147 where the shaft 144 of the substrate support 104 can be located, as indicated by arrow 145. Similarly, substrate support 104 can be raised or lowered as needed for loading and unloading of substrate 103.

[0027] In order to control the plasma distribution over the entire substrate 103 disposed on the substrate support 104, a plasma profile modulator 111 can be disposed within the processing chamber 100. The plasma profile modulator 111 can include a first electrode 108 that is disposed adjacent to the chamber body 102 and can separate the chamber body 102 from other components of the lid assembly 106. The first electrode 108 can be part of the lid assembly 106 or can be a separate sidewall electrode. The first electrode 108 can be an annular or ring-shaped member or can be a ring electrode. The first electrode 108 can be a continuous loop around the outer periphery of the processing chamber 100 surrounding the processing volume 120 or can be discontinuous at selected positions as desired. The first electrode 108 can also be a perforated electrode such as a perforated ring or a mesh electrode or can be a plate electrode such as, for example, a secondary gas distributor.

[0028] One or more isolators 110a, 110b including a dielectric material such as ceramic or metal oxide, for example, aluminum oxide and / or aluminum nitride, can contact the first electrode 108 and can electrically and thermally separate the first electrode 108 from the gas distributor 112 and the chamber body 102. The gas distributor 112 can define an aperture 118 for distributing the processing precursor into the processing volume 120. The gas distributor 112 can be coupled to a first power source 142 such as an RF generator, an RF power source, a DC power source, a pulsed DC power source, a pulsed RF power source, or any other power source that can be coupled to the processing chamber 100. In some embodiments, the first power source 142 can be an RF power source.

[0029] The gas distributor 112 may be a conductive gas distributor or a non-conductive gas distributor. The gas distributor 112 may also be formed from conductive and non-conductive components. For example, the body of the gas distributor 112 may be conductive, while the faceplate of the gas distributor 112 may be non-conductive. The gas distributor 112 may be powered by a first power source 142 as shown in FIG. 1, or in some embodiments, the gas distributor 112 may be coupled to ground.

[0030] The first electrode 108 may be coupled to a first tuning circuit 128 that can control the ground path of the processing chamber 100. The first tuning circuit 128 can include a first electronic sensor 130 and a first electronic controller 134. The first electronic controller 134 may be or include a variable capacitor or other circuit element. The first tuning circuit 128 may be or include one or more inductors 132. The first tuning circuit 128 may be any circuit that enables a variable or controllable impedance under plasma conditions present within the processing volume 120 during processing. In some embodiments as shown, the first tuning circuit 128 can include a first circuit section and a second circuit section coupled in parallel between ground and the first electronic sensor 130. The first circuit section can include a first inductor 132A. The second circuit section can include a second inductor 132B coupled in series with the first electronic controller 134. The second inductor 132B may be disposed between the first electronic controller 134 and a node connecting both the first and second circuit sections to the first electronic sensor 130. The first electronic sensor 130 may be a voltage or current sensor and may be coupled to the first electronic controller 134, thereby enabling some degree of closed-loop control of the plasma conditions inside the processing volume 120.

[0031] The second electrode 122 may be coupled to the substrate support 104. The second electrode 122 may be embedded within the substrate support 104, or may be coupled to the surface of the substrate support 104. The second electrode 122 may be a plate, perforated plate, mesh, wire screen, or any other distributed arrangement of conductive elements. The second electrode 122 may be a tuning electrode and may be coupled to the second tuning circuit 136 by a conduit 146, such as a cable disposed within the shaft 144 of the substrate support 104 and having a selected resistance, such as 50 ohms. The second tuning circuit 136 may include a second electronic sensor 138 and a second electronic controller 140, which may be a second variable capacitor. The second electronic sensor 138 may be a voltage or current sensor and may be coupled to the second electronic controller 140 to provide further control over the plasma conditions within the processing volume 120.

[0032] A third electrode 124, which may be a bias electrode and / or an electrostatic chuck electrode, may be coupled to the substrate support 104. The third electrode may be coupled to a second power source 150 via a filter 148, which may be an impedance matching circuit. The second power source 150 may be DC power, pulsed DC power, RF bias power, a pulsed RF source or bias power, or a combination of these or other power sources. In some embodiments, the second power source 150 may be RF bias power.

[0033] The lid assembly 106 and the substrate support 104 of FIG. 1 may be used with any processing chamber for plasma or heat treatment. In operation, the processing chamber 100 can provide real-time control of plasma conditions within the processing volume 120. The substrate 103 may be disposed on the substrate support 104, and the process gas may flow through the lid assembly 106 using the inlet 114 according to any desired flow plan. The inlet 114 can include a supply from the remote plasma source unit 116 and can be fluidly coupled with a bypass 117 for a process gas supply that cannot flow through the chamber and the remote plasma source unit 116. The gas can exit the processing chamber 100 through the outlet 152. Power can be coupled to the gas distributor 112 to establish a plasma within the processing volume 120. The substrate may be electrically biased using a third electrode 124 in some embodiments.

[0034] When a plasma is excited within the processing volume 120, a potential difference can be established between the plasma and the first electrode 108. A potential difference can also be established between the plasma and the second electrode 122. Then, the flow characteristics of the ground path represented by the two tuning circuits 128 and 136 can be adjusted using the electronic controllers 134, 140. Set points can be supplied to the first tuning circuit 128 and the second tuning circuit 136 to provide independent control of the deposition rate and the plasma density uniformity from the center to the edge. In embodiments where both electronic controllers may be variable capacitors, the electronic sensors can independently adjust the variable capacitors to maximize the deposition rate and minimize the thickness non-uniformity.

[0035] Each of the tuning circuits 128, 136 can have a variable impedance that can be adjusted using respective electronic controllers 134, 140. If the electronic controllers 134, 140 are variable capacitors, the capacitance range of each variable capacitor, as well as the inductance of the first inductor 132A and the second inductor 132B, can be selected to provide a range of impedances. This range may depend on the frequency and voltage characteristics of the plasma, and there may be a minimum value in the capacitance range of each variable capacitor. Therefore, when the capacitance of the first electronic controller 134 is at a minimum or maximum, the impedance of the first tuning circuit 128 becomes high, and as a result, a plasma shape is obtained in which the aerial or lateral coverage on the substrate support is minimized. As the capacitance of the first electronic controller 134 approaches a value that minimizes the impedance of the first tuning circuit 128, the aerial coverage of the plasma becomes maximum, and the entire working area of the substrate support 104 can be effectively covered. As the capacitance of the first electronic controller 134 deviates from the minimum impedance setting, the plasma shape may contract from the chamber wall, and the aerial coverage of the substrate support may decrease. Since the second electronic controller 140 can vary the capacitance of the second electronic controller 140, it can have a similar effect and can increase or decrease the spatial coverage of the plasma on the substrate support.

[0036] The electronic sensors 130, 138 can be used to adjust the respective circuits 128, 136 in a closed loop. Depending on the type of sensor used, a setpoint of current or voltage may be installed in each sensor, and the sensor may be provided with control software that determines the adjustment to each of the respective electronic controllers 134, 140 so as to minimize the deviation from the setpoint. As a result, the plasma shape can be selected and dynamically controlled during processing. It should be understood that the foregoing discussion is based on the electronic controllers 134, 140, which may be variable capacitors, but that tuning circuits 128 and 136 having adjustable impedances can be provided using any electronic component having adjustable characteristics.

[0037] In some embodiments of the present technology, the processing chamber 100 may be utilized in a processing method that may include the formation, processing, etching, or conversion of materials for semiconductor structures. It should be understood that the chambers described are not to be considered limiting, and any chamber configured to perform the operations as described may be used as well. FIG. 2 shows exemplary operations in a processing method 200 according to some embodiments of the present technology. The method can be performed in various processing chambers, including the above-described processing chamber 100, and on one or more mainframes or tools. The method 200 can include several optional operations that may or may not be specifically associated with some embodiments of the method according to the present technology. For example, many of the operations are described to provide a broader range of structure formation, but are not important to the present technology or may be performed by alternative methodologies that are readily understood. The method 200 can describe the operations schematically shown in FIGS. 3A - 3C, the description of which is provided in connection with the operations of the method 200. It should be understood that the figures show only partial schematics, and the substrate can include any number of additional materials and features having various characteristics and aspects as shown in the figures.

[0038] Furthermore, it should be noted that, as described below, the order of the operations identified in FIG. 2 may be changed. For example, in some embodiments, the film may be converted before being modified or densified. Additionally, as also described below, it may not be necessary to perform each operation during each process cycle. For example, in some embodiments, the deposition and modification cycles may be repeated several times before transitioning to conversion and then returning to deposition and modification.

[0039] Referring to FIG. 2, method 200 may include additional operations before the start of the listed operations. For example, the additional processing operations may include forming a structure on a semiconductor substrate, which may include both forming and removing materials. For example, a transistor structure, a memory structure, or any other structure may be formed. The pre-processing operations may be performed in a chamber in which method 200 can be executed, or the processing may be performed in one or more other processing chambers before supplying the substrate into the semiconductor processing chamber in which method 200 can be executed. In any case, method 200 can include supplying a semiconductor substrate to a processing region of a semiconductor processing chamber such as semiconductor processing chamber 100 described above, or another chamber that can include the components described above. The substrate may be placed on a substrate support, which may be a pedestal such as pedestal 104, and can be present within the processing region of the chamber such as processing volume 120 described above.

[0040] The substrate on which some operations have been performed may be substrate 305 of structure 300, and structure 300 can show a partial view of the substrate on which semiconductor processing can be performed. It should be understood that structure 300 may show only some of the top layers during processing for purposes of illustrating aspects of the present technology. Substrate 305 can include a material in which one or more features 310 can be formed. Substrate 305 can be any number of materials used in semiconductor processing. The substrate material may be silicon, germanium, a dielectric material including silicon oxide or silicon nitride, a metal material, or any number of combinations of these materials, or may include them. Features 310 may be characterized by any shape or configuration according to the present technology. In some embodiments, the feature may be or include a trench structure or an aperture formed within substrate 305.

[0041] Feature 310 may be characterized by any shape or size, but in some embodiments, Feature 310 may be characterized by a higher aspect ratio, i.e., the ratio of the depth of the feature to the width across the feature. For example, in some embodiments, Feature 310 may be characterized by an aspect ratio of about 5:1 or greater, about 10:1 or greater, about 15:1 or greater, about 20:1 or greater, about 25:1 or greater, about 30:1 or greater, about 40:1 or greater, or about 50:1 or greater. Additionally, the feature may be characterized by a narrow width or diameter across the feature, including between two sidewalls, such as a dimension of about 20 nm or less, about 15 nm or less, about 12 nm or less, about 10 nm or less, about 9 nm or less, about 8 nm or less, about 7 nm or less, about 6 nm or less, or about 5 nm or less.

[0042] In some embodiments, method 200 can include any processing operation, such as a pre-treatment, that can be performed to prepare the surface of substrate 305 for deposition. Once prepared, method 200 can include supplying one or more precursors to a processing region of a semiconductor processing chamber that houses structure 300. The precursors can include one or more silicon-containing precursors, as well as one or more diluents or carrier gases, such as an inert gas or other gas supplied with the silicon-containing precursor. In operation 205, a plasma can be formed from a deposition precursor that includes a silicon-containing precursor. The plasma can be formed within the processing region, whereby it may be possible to deposit a deposition material onto the substrate. For example, in some embodiments, a capacitively coupled plasma can be formed within the processing region by applying a plasma output to the faceplate as described above.

[0043] In operation 210, a silicon-containing material can be deposited onto a substrate from a plasma emission of a silicon-containing precursor. The material may, in some embodiments, be a flowable silicon-containing material, which may be or may include amorphous silicon. The deposited material can at least partially flow into features on the substrate, providing bottom-up gap filling. As shown in FIG. 3A, material 315 can be deposited onto substrate 305 and can flow into trench or feature 310. As shown, the deposited material 315 can flow into the bottom of the feature, but as shown by material 317, some amount of material may remain on the sidewalls of the substrate, and as shown by material 319, material may remain on or between the features. The deposition amount may be relatively small, but the material remaining on the sidewalls can potentially limit subsequent flow. Further, when the deposited material is conventionally converted, such as to silicon nitride, the conversion involves expansion of the film. In the case of features with reduced dimensions, the residual material formed on the sidewalls is converted and may expand outwardly towards the opposite sidewalls. This can cause the feature to pinch off, potentially forming voids within the feature.

[0044] The power applied during deposition may be a lower-power plasma that can limit dissociation and maintain the amount of hydrogen incorporated into the deposited material. This incorporated hydrogen can contribute to the fluidity of the deposited material. Additionally, unlike the prior art, the present technique can incorporate a bias process that can perform a treatment on the deposited film during the deposition operation. This process can include utilizing source power such as that coupled to a faceplate or showerhead as described above, as well as utilizing bias power such as that applied through a substrate support as described above. The source power can be used to perform a controlled dissociation of the silicon-containing precursor, which may limit the dissociation and allow for the formation of longer material chains. When these materials contact the substrate, the fluidity of the longer-chain silicon-containing materials is improved, which may improve bottom-up filling.

[0045] The source power may be pulsed and the duty cycle may be reduced, which in some embodiments can further reduce the effective plasma output. For example, the source power may be applied at any higher frequency such as about 10 MHz or more, about 13 MHz or more, about 15 MHz or more, or about 20 MHz or more. The plasma power supply can supply a plasma output of about 300 W or less, about 250 W or less, about 200 W or less, about 150 W or less, about 100 W or less, or about 50 W or less to the faceplate. Additionally, the source power may be pulsed at a pulse frequency of 20 kHz or less, for example, about 15 kHz or less, about 12 kHz or less, about 10 kHz or less, or about 8 kHz or less. Further, the pulse duty cycle may be applied at about 50% or less, about 40% or less, about 30% or less, about 20% or less, about 10% or less, about 5% or less, or about 1% or less. This limits the dissociation of the silicon precursor and may improve long-chain formation as described above.

[0046] In some embodiments, to facilitate dissociation and deposition, the deposition precursor can include one or more inert gases such as argon and / or helium that can help improve dissociation. Further, in some embodiments, the deposition precursor can include diatomic hydrogen, which may be flowed to facilitate the processing during deposition and may be assisted by the supply of bias power. For example, hydrogen can be supplied with a silicon-containing precursor at a flow rate ratio of hydrogen to silicon-containing precursor of about 0.5:1 or more, about 1:1 or more, about 1.5:1 or more, about 2:1 or more, about 2.5:1 or more, about 3.0:1 or more, about 3.5:1 or more, or about 4.0:1 or more.

[0047] Hydrogen may also be dissociated in the generated plasma and may be further activated by utilizing the bias power supply. For example, in some embodiments, the bias power supply can be operated at a frequency lower than the source power and can be operated at about 10 MHz or less, about 5 MHz or less, or about 2 MHz or less. The power supply can be operated with a power of about 2000 W or less, about 1000 W or less, about 500 W or less, about 450 W or less, about 400 W or less, or about 350 W or less. The bias power can create a certain degree of directivity in the movement of the emissions, and the lighter hydrogen radicals can further dissociate argon and / or helium. More specifically, argon and / or helium can be directed downward of the structure. The lower frequency power can also impart additional energy to the ions as they move to the substrate in a more linear path.

[0048] These radical nuclides of hydrogen and inert gases can transfer energy to materials along the bottom of the feature, such as materials 315 and 319, and materials along the surface perpendicular to the direction of progress, such as materials along the top of the feature. The energy can help release excess hydrogen, which may densify the film at these locations. As shown in Figure 3B, the material 317 along the sidewall may be unaffected or have limited changes, while the materials 315 and 319 can be densified, thereby improving the quality of the materials. Therefore, in some embodiments, the materials along the top and bottom of the structure can be characterized by high quality, including a higher density than the materials that may have been deposited along the sidewalls of the feature.

[0049] However, by using bias power, the deposition plasma may be characterized by an increase in power, which may further dissociate the silicon-containing precursor and reduce fluidity. Therefore, to suppress this effect, the bias power can also be pulsed at a pulsed frequency of about 20 kHz or less, about 10 kHz or less, about 5 kHz or less, about 1 kHz or less, about 500 Hz or less, about 100 Hz or less, about 50 Hz or less, or about 10 Hz or less. In addition, the duty cycle can be operated at about 50% or less, about 40% or less, about 30% or less, about 20% or less, about 10% or less, about 5% or less, or about 1%, thereby further reducing the impact of the bias power. By operating the bias power at a relatively low pulsed frequency and duty cycle, the bias power can be used to improve the film quality at the top of the structure and the bottom of the feature while suppressing the impact on other deposition characteristics. Furthermore, by using relatively low power, hydrogen may not be sufficiently activated to cause etching of the deposited material, or it may not lead to sputtering of the material based on the impact of inert gas emissions.

[0050] After a certain amount of deposition, in some embodiments of the present technology, an etching and / or modification process can be performed that is configured to selectively etch back material from the sidewalls of the feature while simultaneously modifying the material at the top and bottom of the feature. This process may be performed in the same chamber as the deposition or may be performed in a cyclic process to fill the feature. In some embodiments, the flow of the silicon-containing precursor can be stopped and the processing region can be purged. The flow of an inert gas such as argon and / or helium can also be stopped. After purging the processing region, a hydrogen-containing precursor or NF3 can be flowed into the processing region of the processing chamber. In some embodiments, the modification process may include only a hydrogen-containing precursor, which may be diatomic hydrogen in some embodiments. In some embodiments, the modification plasma contains NF3. In operation 215, a modification plasma may be formed, which may be a capacitively coupled plasma formed within the processing region, although in some embodiments, an inductively coupled plasma may be equally applicable.

[0051] Similar to the deposition process, during the etching / modification operation, an additional power source can be engaged and coupled to the substrate support to supply a bias to the plasma generated above the substrate, as described above. Thus, the etching process may include both source power and bias power. This may cause the plasma emissions to be attracted to the substrate, impact the film, and densify the deposited material, particularly a material that has already been at least partially improved by the processes performed during deposition. Any hydrogen-containing material can be used, but in some embodiments, diatomic hydrogen can be used as the hydrogen-containing precursor for generating the etching plasma. Hydrogen radicals and ions can easily penetrate into the material formed in the trench and release the incorporated hydrogen from the film to densify it. The applied bias power may be relatively low in order to suppress sputtering of the generated film and to suppress the possibility of damage to the structure. Additionally, by adjusting the applied source power and bias power, an etching operation may be performed, thereby reducing the sidewall coverage of the deposited material while limiting the impact on the previously processed material.

[0052] Plasma can be generated in the processing region by supplying power from a plasma power source to the panel using diatomic hydrogen or any other hydrogen-containing material. Similarly, NF3-based plasma can also be used. In some embodiments, the plasma output during deposition may be greater than the plasma output used during deposition, due to both source power and bias power. For example, the supplied plasma source power may be about 100 W or more, about 200 W or more, about 300 W or more, about 400 W or more, or about 500 W or more. By increasing the plasma output during reformed plasma formation, a greater amount of plasma emissions can be generated. However, as the plasma output increases, the amount of material etched from the bottom of the structure may also increase. Thus, in some embodiments, the plasma source power may be maintained at about 500 W or less, about 400 W or less, or about 300 W or less. Additionally, the aspect of the bias power may also be adjusted. For example, in some etching / reforming operations, the bias power may be higher than the plasma source power, which can supply sufficient power to the plasma to ensure that etching of lower-quality materials, such as materials along sidewalls that may not have been processed during the deposition operation, occurs.

[0053] By applying a larger bias power, the ability to etch the deposited material can be enhanced. The bias power during deposition can be decreased to limit the etching effect, but during the etching / modification operation, the bias power, which can be any of the frequencies described above, can be increased to about 500 W or more, about 800 W or more, about 1000 W or more, about 1200 W or more, about 1400 W or more, about 1600 W or more, or about 1800 W or more. However, since the bias power can impart directivity, the bias power may be pulsed as described below, which can provide etching of low-quality materials while maintaining the previously processed material and can modify and / or densify the material. Then, the plasma emissions can etch the fluid film in operation 220 and can remove the fluid film from the sidewalls of the trench.

[0054] At the same time, advantageously, the more directionally supplied plasma emissions can penetrate into the remaining film formed at the bottom of the feature and, in an optional operation 225, can reduce hydrogen uptake and densify the film. As shown in FIG. 3C, the material 317 can be removed from the sidewalls and overhang regions of the substrate 305, whereby the deposited material can be maintained at the bottom region of the feature and along the top region of the structure. As an additional advantage, the densified material 319 at the top of the structure can also protect the underlying material from damage by suppressing the impact on the substrate material 305. This process can also reduce hydrogen uptake in the remaining material, such as to about 40 atomic % or less, about 35 atomic % or less, about 30 atomic % or less, about 25 atomic % or less, about 20 atomic % or less, about 15 atomic % or less, about 10 atomic % or less, or about 5 atomic % or less.

[0055] Additional adjustments can be made to further increase the etching of the material deposited along the sidewalls of the feature by adjusting one or more characteristics of the supplied plasma output or bias power. For example, in some embodiments, both the plasma power supply and the bias power supply can be operated in continuous wave mode. Additionally, one or both of the power supplies can be operated in pulse mode. In some embodiments, the source power may be operated in continuous wave mode while the bias power is operated in pulse mode. The pulse frequency of the bias power can be any of the pulse frequencies described above. The duty cycle of the bias power can be 75% or less, and the bias power can be operated at a duty cycle of 70% or less, 60% or less, 50% or less, 40% or less, 30% or less, 20% or less, 10% or less, 5% or less, or less. By operating the bias power at a reduced duty cycle such as a 50% or less on-time duty cycle, more time per cycle, such as during the off-time, can be spent performing more isotropic etching within the feature, thereby enabling better removal of material from the sidewalls.

[0056] Additional power configurations can also include the amount of synchronization between the source power and the bias power in a master / slave relationship. For example, both power supplies can be operated pulsingly (in a pulsing orientation), and the bias power can be synchronized and applied after the source power is applied in each pulse. A between-levels pulsing scheme may also be applied. For example, while the duty of the bias power is on, the source power can be operated at a first plasma output. During the remainder of the cycle when the bias power is off, the source power can be operated at a second plasma output that may be greater than the first plasma output. This can not only enhance isotropic etching by eliminating bias-induced directionality but also improve the etching characteristics of the isotropic etching. The deposition and etching processes can be repeated any number of times within a cycle to fill the feature.

[0057] In addition, in some embodiments where silicon may be required to be converted within the feature, the cycle may also include a conversion operation. By converting during each cycle, the issue of penetration into the feature can be completely resolved. Also, by performing the conversion operation following curing and etching / modification, the deposited material can be removed from the sidewalls prior to conversion, which, as described above, can limit trench between sidewalls or lateral film expansion within the feature. The conversion may be performed in a chamber different from deposition and processing, but in some embodiments, two or more operations, including all operations, can be performed within a single processing chamber. This can reduce the waiting time compared to conventional processes.

[0058] Method 200 continues by converting the amorphous silicon to another material. For example, following etching and densification, one or more conversion precursors can be supplied to the processing region of the chamber. For example, a nitrogen-containing precursor, an oxygen-containing precursor, and / or a carbon-containing precursor may be supplied to the processing region of the chamber along with any carrier gas or dilution gas. A plasma may be formed from the conversion precursor and can then contact the amorphous silicon material within the feature. In any operation 230, the plasma emissions of the conversion precursor interact with the amorphous silicon material within the trench and convert this material, along with any other material that can be used to convert the amorphous silicon film, to silicon nitride, silicon oxide, silicon carbide, silicon oxynitride, silicon oxycarbide, silicon carbonitride, or silicon oxycarbonitride. The plasma output may be similar to the power described above, for example, in the case of a capacitively coupled system, it may be from about 100 W to a maximum of about 1,000 W or more, and in the case of an inductively coupled plasma system, it may be up to 10 kW or more, but any type of conversion can also be performed.

[0059] The deposition may be formed up to several nanometers or more, but by performing the etching process as described above, the thickness of the densified material may be controlled to be about 500 Å or less, about 450 Å or less, about 400 Å or less, about 350 Å or less, about 300 Å or less, about 250 Å or less, about 200 Å or less, about 150 Å or less, about 100 Å or less, about 50 Å or less, or less than that. By controlling the thickness of the deposited material, conversion across the entire thickness can be performed more easily, and the problem of penetration common in conventional processes can be solved. After converting the deposited material, this process can be sufficiently repeated to continue generating the material converted through the features.

[0060] Regarding the deposition precursors used during any of the forming operations, in the present technology, any number of precursors can be used. Silicon-containing precursors that can be used during silicon formation, silicon oxide formation, or silicon nitride formation include silane (SiH4), disilane (Si2H6), trisilane, tetrasilane, or other organosilanes including cyclohexasilane, silicon tetrafluoride (SiF4), silicon tetrachloride (SiCl4), dichlorosilane (SiH2Cl2), tetraethyl orthosilicate (TEOS), and any other silicon-containing precursors that can be used in silicon-containing film formation, but are not limited thereto. By utilizing higher-order silanes, longer material chains can potentially be generated, which may improve fluidity in some embodiments. The silicon-containing material may, in some embodiments, not contain nitrogen, not contain oxygen, and / or not contain carbon. Oxygen-containing precursors used in any of the operations described throughout the present technology can include O2, N2O, NO2, O3, H2O, H2O2, and any other oxygen-containing precursors that can be used in silicon oxide film formation or other film formation. Nitrogen-containing precursors used in any of the operations may include N2, N2O, NO2, NH3, N2H2, and any other nitrogen-containing precursors that can be used in silicon nitride film formation. The carbon-containing precursor can be any carbon-containing material such as any hydrocarbon or any other precursor containing carbon, or may include it. In any of the operations, one or more additional precursors may be included, such as an inert precursor that may contain other materials such as Ar, He, Xe, Kr, or nitrogen, ammonia, etc.

[0061] Temperature and pressure can also affect the operation of the present technology. For example, in some embodiments for promoting membrane fluidity, the process may be carried out at a temperature of about 20 °C or less, about 0 °C or less, about -20 °C or less, about -50 °C or less, about -75 °C or less, about -100 °C or less, or less. The temperature may be maintained within any of these ranges throughout the method, including during processing and etching, as well as during conversion. The pressure within the chamber may similarly be kept relatively low for any of the processes, such as a chamber pressure of about 20 Torr or less, and the pressure may be maintained at about 15 Torr or less, about 10 Torr or less, about 5 Torr or less, about 3 Torr or less, about 2 Torr or less, about 1 Torr or less, about 0.1 Torr or less, or less. By performing the process according to some embodiments of the present technology, improved filling of narrow features can be generated using silicon-containing materials.

[0062] As described above, the etching process for removing material from the sidewalls of the feature may be performed before or after converting the material. In some embodiments, after deposition, the material is converted as described above. The process conditions are maintained such that the conversion process acts more readily on the bottom material 315 and the top material 319. In contrast, the sidewall material 317 is less affected by the conversion process.

[0063] After converting the bottom material 315 and the top material 319, an etching process similar to the above can be applied to remove the sidewall material 317 without substantially affecting the converted bottom material and the converted top material.

[0064] Spatially relative terms such as "directly below", "lower", "bottom", "upper", "above", etc. may be used in this specification to facilitate description when explaining the relationship of one element or feature to another element or feature, as shown in the figures. It should be understood that spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation shown in the figures. For example, if the device in the figure is turned over, an element described as "below" or "directly below" another element or feature will be oriented "above" the other element or feature. Thus, the exemplary term "below" may encompass both upward and downward orientations. The device may be oriented in other ways (rotated 90 degrees or otherwise), and the spatially relative descriptors used in this specification will be interpreted accordingly.

[0065] In the context of describing the materials and methods discussed in this specification (particularly in the context of the following claims), the use of the terms "a", "an", "the", and similar referents should be interpreted to include both the singular and plural forms unless otherwise indicated in this specification or clearly contradicted by the context. The recitation of a range of values in this specification is intended, unless otherwise indicated herein, merely as a shorthand way of referring individually to each separate value falling within the range, and each separate value is incorporated herein as if it were individually recited herein. All methods described in this specification can be executed in any suitable order unless otherwise indicated in this specification or clearly contradicted by the context. The use of all examples, or exemplary language (e.g., "such as") provided herein is merely intended to better explain the materials and methods and is not limiting of the scope thereof unless otherwise claimed. No language in this specification should be construed as indicating that any non-claimed element is essential to the practice of the disclosed materials and methods.

[0066] Throughout this specification, references to "one embodiment", "certain embodiments", "one or more embodiments", or "an embodiment" mean that a particular feature, structure, material, or characteristic described in connection with the embodiment is included in at least one embodiment of the present disclosure. Thus, appearances of the phrases "in one or more embodiments", "in certain embodiments", "in one embodiment", or "in an embodiment" in various places throughout this specification are not necessarily referring to the same embodiment of the present disclosure. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments.

[0067] The disclosure of this specification has been described with reference to particular embodiments, but those skilled in the art will understand that the described embodiments are merely examples of the principles and uses of the present disclosure. It will be apparent to those skilled in the art that various modifications and variations can be made to the methods and apparatuses of the present disclosure without departing from the spirit and scope of the present disclosure. Therefore, the present disclosure can include modifications and variations that are within the scope of the appended claims and their equivalents.

Claims

1. A step of depositing a flowable silicon film on a surface having at least one feature therein, wherein the feature has an opening width, one or more sidewalls, extends from the upper surface to the bottom of the substrate, and the flowable silicon film is deposited as an upper material on the upper surface, as a sidewall material on the one or more sidewalls, and as a bottom material on the bottom; A step of selectively etching the sidewall material with respect to the upper material and the bottom material; A step of converting the upper material and the bottom material to form a converted material; A method for depositing a silicon-based gap fill, comprising:

2. The method according to claim 1, wherein the feature has an opening width of about 10 nm or less.

3. The method according to claim 1, wherein the feature has a ratio of the depth to the opening width in the range of about 3:1 to about 30:

1.

4. The method according to claim 1, wherein the step of depositing the flowable silicon film comprises exposing the substrate surface to a deposition plasma containing a plasma of a silicon-containing precursor.

5. The method according to claim 4, wherein the silicon-containing precursor comprises one or more of silane, disilane, trisilane, or tetrasilane.

6. The method according to claim 4, wherein the deposition plasma further comprises one or more of H2, Ar, or He.

7. The method according to claim 1, wherein the step of selectively etching the sidewall material comprises exposing the substrate to a directional plasma containing H2.

8. The method according to claim 1, wherein the step of forming the converted material comprises exposing the substrate surface to an oxidant plasma, and the converted material comprises silicon oxide.

9. The method according to claim 8, wherein the oxidant plasma includes cycles of O2 / Ar plasma and Ar / He plasma.

10. The method according to claim 1, wherein the substrate is maintained at a temperature of about 200 °C or lower.

11. Depositing a flowable silicon film on a substrate surface having at least one feature therein, the feature having an opening width, one or more sidewalls, and extending from the top surface to the bottom of the substrate, and depositing the flowable silicon film as an upper material on the top surface, as a sidewall material on the one or more sidewalls, and as a bottom material on the bottom; Selectively converting the upper material and the bottom material to form a converted material; Selectively etching the sidewall material with respect to the converted material; A method for depositing a silicon-based gap fill, comprising:

12. The method according to claim 11, wherein the feature has an opening width of about 10 nm or less.

13. The method according to claim 11, wherein the feature has a ratio of the depth to the opening width in the range of about 3:1 to about 30:

1.

14. The method according to claim 11, wherein depositing the flowable silicon film includes exposing the substrate surface to a deposition plasma including a plasma of a silicon-containing precursor.

15. The method according to claim 14, wherein the silicon-containing precursor includes one or more of silane, disilane, trisilane, or tetrasilane.

16. The method according to claim 14, wherein the deposition plasma further includes one or more of H2, Ar, or He.

17. The method according to claim 11, wherein the step of forming the converted material includes exposing the substrate surface to a directional oxidant plasma, and the converted material includes silicon oxide. **Claim 18** The method according to claim 17, wherein the oxidant plasma includes a cycle of O2 / Ar plasma and Ar / He plasma. **Claim 19** The method according to claim 11, wherein the step of selectively etching the sidewall material includes exposing the substrate to a plasma containing H2. **Claim 20** The method according to claim 11, wherein the substrate is maintained at a temperature of about 200 °C or less.

Images