Method for manufacturing a semiconductor device

Abstract

The present invention relates to a layer formation method, and more particularly, to a method for manufacturing a semiconductor device for forming a semiconductor device in a low-temperature process. The layer formation method according to an embodiment of the present invention includes a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed, and manufactures a semiconductor device including an undoped gallium nitride (Undoped GaN) layer, an N-type gallium nitride (N-type GaN) layer, an active layer, and a P-type gallium nitride (P-type GaN) layer. A step of forming at least one or more gallium nitride layers among the undoped gallium nitride (Undoped GaN) layer, the N-type gallium nitride (N-type GaN) layer, the active layer, and the P-type gallium nitride (P-type GaN) layer includes: a) a step of sequentially supplying a gallium (Ga) precursor and a nitrogen (N2) precursor at 500 °C or lower to form a gallium nitride (GaN) layer on the substrate; and b) a step of exposing the gallium nitride (GaN) layer to hydrogen-containing plasma, and includes a step of repeating the steps a) to b) a plurality of times.

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a semiconductor device.

Background Art

[0002] As display devices, LCD (liquid crystal display) and OLED (Organic Light Emitting Diode) displays are widely used. In recent years, technology for manufacturing high-resolution display devices using micro-sized LED elements (Micro Light Emitting Diode Device) has been in the spotlight.

[0003] Conventional Micro-LEDs are created as self-emitting structure displays in which micro-LEDs are mounted at pixel positions on a driving substrate in units of μm, and have advantages such as high brightness, high power efficiency, long lifespan, and realization of various form factors. However, although the transfer process of positioning micro-LEDs in units of μm at pixel positions on the driving substrate is performed by the pick and place method, it is difficult to ensure productivity and economy. In particular, the need for other methods has emerged for manufacturing large-area micro-LED displays.

[0004] Also, in order to form an existing gallium nitride layer, generally, the metal organic chemical vapor deposition (MOCVD) method is used. In such a metal organic chemical vapor deposition method, the gallium nitride layer is deposited while adjusting the temperature of the substrate to a high temperature of about 1200°C. That is, when the substrate is maintained at a high temperature of about 1200°C, the gallium nitride layer can be deposited on the substrate.

[0005] By the way, when forming the gallium nitride layer with the substrate heated to a high temperature in this way, there arises a problem that damage occurs to the substrate or the layer formed on the substrate. This acts as a factor that reduces the light emission of Micro-LEDs or causes defects, and particularly has a problem of greatly degrading the quality and reliability of display devices that must involve a stable switching operation.

Summary of the Invention

Problems to be Solved by the Invention

[0006] The present invention provides a manufacturing method capable of forming a gallium nitride layer and a gallium arsenide layer by atomic layer deposition (ALD) at low temperature.

Means for Solving the Problems

[0007] A method for manufacturing a semiconductor device according to an embodiment of the present invention includes forming at least one gallium nitride layer of an undoped gallium nitride (Undoped GaN) layer, an N-type gallium nitride (N-type GaN) layer, an active layer, and a P-type gallium nitride (P-type GaN) layer on a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed. The step of forming at least one gallium nitride layer of an undoped gallium nitride (Undoped GaN) layer, an N-type gallium nitride (N-type GaN) layer, an active layer, and a P-type gallium nitride (P-type GaN) layer includes: a) a step of sequentially supplying a gallium (Ga) precursor and a nitrogen (N2) precursor at 500 °C or lower to form a gallium nitride (GaN) layer on the substrate; and b) a step of exposing the gallium nitride (GaN) layer to hydrogen-containing plasma, and the steps a) to b) can be repeated a plurality of times.

[0008] A method for manufacturing a semiconductor device according to an embodiment of the present invention includes a step of forming a gallium nitride (GaN) layer on a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed. In the method for manufacturing a semiconductor device, the step of forming the gallium nitride layer includes a step of sequentially supplying a gallium (Ga) precursor and a nitrogen (N2) precursor into a chamber. The step of sequentially supplying the gallium (Ga) precursor and the nitrogen (N2) precursor into the chamber includes: a) a step of flowing the gallium (Ga) precursor into the chamber at 500°C or lower through gas injection means; and b) a step of flowing the nitrogen (N2) precursor into the chamber through the gas injection means to form a gallium nitride (GaN) layer on the substrate.

[0009] A method for manufacturing a semiconductor device according to an embodiment of the present invention includes a step of forming at least one gallium nitride layer among an undoped gallium nitride (Undoped GaN) layer, an N-type gallium nitride (N-type GaN) layer, an active layer, and a P-type gallium nitride (P-type GaN) layer on a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed. In the method for manufacturing a semiconductor device, the step of forming at least one or more gallium nitride layers among the undoped gallium nitride (Undoped GaN) layer, the N-type gallium nitride (N-type GaN) layer, the active layer, and the P-type gallium nitride (P-type GaN) layer includes a step of sequentially supplying a gallium (Ga) precursor and a nitrogen (N2) precursor at 500°C or lower to form a gallium nitride (GaN) layer on the substrate, and plasma can be formed in the step of supplying the nitrogen (N2) precursor.

[0010] After the step of forming the gallium nitride layer, the method may further include a step of exposing the gallium nitride layer to hydrogen-containing plasma.

[0011] The step of forming the N-type gallium nitride (N-type GaN) layer may further include a step of supplying a silicon (Si) precursor, the step of forming the active layer may further include a step of supplying an indium (In) precursor, and the step of forming the P-type gallium nitride (P-type GaN) layer may further include a step of supplying a magnesium (Mg) precursor.

[0012] A step of forming a hydrogen-containing plasma may further be included between the step of supplying the gallium (Ga) precursor and the step of supplying the nitrogen (N2) precursor.

[0013] Before the step of supplying the gallium (Ga) precursor, a step of exposing the substrate to a gas containing at least one of fluorine (F) and chlorine (Cl) to remove the oxide film and impurities on the substrate may further be included.

[0014] The step of removing the oxide film and impurities on the substrate can be performed in the same chamber or system as the chamber or system for forming the gallium nitride layer.

[0015] In a method for manufacturing a semiconductor device according to an embodiment of the present invention, in a method for manufacturing a semiconductor device including a step of forming at least one gallium arsenide layer among an undoped gallium arsenide (Undoped GaAS) layer, an N-type gallium arsenide (N-type GaAs) layer, an active layer, and a P-type gallium arsenide (P-type GaAs) layer on a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed, the step of forming at least one gallium arsenide layer among the undoped gallium arsenide (Undoped GaAS) layer, the N-type gallium arsenide (N-type GaAs) layer, the active layer, and the P-type gallium arsenide (P-type GaAs) layer includes: a) a step of sequentially supplying a gallium (Ga) precursor and an arsenic (As) precursor at 500 °C or lower to form a gallium arsenide (GaAs) layer on the substrate; and b) a step of exposing the gallium arsenide (GaAs) layer to a hydrogen-containing plasma, and the steps a) to b) can be repeated a plurality of times.

[0016] A method for manufacturing a semiconductor device according to an embodiment of the present invention is a method for manufacturing a semiconductor device including a step of forming a gallium arsenide (GaAs) layer on a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed. The step of forming the gallium arsenide (GaAs) layer includes a step of sequentially supplying a gallium (Ga) precursor and an arsenic (As) precursor into a chamber. The step of sequentially supplying the gallium (Ga) precursor and the arsenic (As) precursor into the chamber includes: a) a step of flowing the gallium (Ga) precursor into the chamber at 500 °C or lower through gas injection means; and b) a step of flowing the arsenic (As) precursor into the chamber through the gas injection means to form the gallium arsenide (GaAs) layer on the substrate.

[0017] A method for manufacturing a semiconductor device according to an embodiment of the present invention is a method for manufacturing a semiconductor device including a step of forming at least one gallium arsenide layer among an undoped gallium arsenide (Undoped GaAS) layer, an N-type gallium arsenide (N-type GaAs) layer, an active layer, and a P-type gallium arsenide (P-type GaAs) layer on a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed. The step of forming at least one gallium arsenide layer among the undoped gallium arsenide (Undoped GaAS) layer, the N-type gallium arsenide (N-type GaAs) layer, the active layer, and the P-type gallium arsenide (P-type GaAs) layer includes a step of sequentially supplying a gallium (Ga) precursor and an arsenic (As) precursor at 500 °C or lower to form the gallium arsenide (GaAs) layer on the substrate, and plasma can be formed in the step of supplying the arsenic (As) precursor.

[0018] After the step of forming the gallium arsenide (GaAs) layer, the method may further include a step of exposing the gallium arsenide (GaAs) layer to hydrogen-containing plasma.

[0019] The step of forming the N-type gallium arsenide (N-type GaAs) layer may further include a step of supplying a silicon (Si) precursor, the step of forming the active layer may further include a step of supplying an indium (In) precursor, and the step of forming the P-type gallium arsenide (P-type GaAs) layer may further include a step of supplying a magnesium (Mg) precursor.

[0020] The step of forming the gallium (Ga) precursor supply and the step of supplying the arsenic (As) precursor may further include a step of forming a hydrogen-containing plasma.

[0021] Before the step of supplying the gallium (Ga) precursor, the method may further include a step of exposing the substrate to a gas containing at least one of fluorine (F) and chlorine (Cl) to remove an oxide film and impurities on the substrate.

[0022] The step of removing the oxide film and impurities on the substrate can be performed in the same chamber or system as the chamber or system for forming the gallium arsenide layer.

[0023] The method may further include a step of forming a sealing film on the substrate to prevent penetration of moisture or oxygen.

[0024] The method may further include a step of forming a pure silicon layer on a germanium (Ge)-containing silicon substrate or a substrate on which a germanium (Ge)-containing silicon layer is formed.

[0025] The method for manufacturing a semiconductor device according to an embodiment of the present invention includes a step of disposing one or two or more substrates (the substrates are silicon substrates containing germanium (Ge) or substrates on which a silicon layer containing germanium (Ge) is formed) on a substrate support portion of an atomic layer deposition chamber including gas injection means, a step of maintaining the substrate support portion at 500° C. or lower, a) a step of flowing a gallium precursor into the chamber through the gas injection means, b) a step of flowing a purge gas for purging the gallium precursor into the chamber, c) a step of flowing a nitrogen precursor or an arsenic precursor into the chamber through the gas injection means to form a gallium nitride layer or a gallium arsenide layer on the substrate, d) a step of flowing a hydrogen-containing gas into the chamber to form a hydrogen plasma, and a step of repeating the steps a) to d). The present invention relates to a method for manufacturing a nitride compound semiconductor device including these steps.

Advantages of the Invention

[0026] According to an embodiment of the present invention, a gallium nitride layer and a gallium arsenide layer can be formed in a low-temperature process, preventing the semiconductor device from being damaged by high-temperature heat. In addition, a transfer process for forming the gallium nitride layer and the gallium arsenide layer can be omitted, thereby shortening the manufacturing time of the display device and reducing the manufacturing cost.

Brief Description of the Drawings

[0027]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Modes for Carrying Out the Invention

[0028] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but can be embodied in various forms, and the embodiments of the present invention are provided only to make the disclosure of the present invention complete and to fully inform those with ordinary knowledge of the scope of the invention.

[0029] Throughout the specification, when referring to one component such as a layer, film, region, or substrate being "on" another component, it can be interpreted that the one component directly contacts the other component "on", or there can be other components intervening therebetween.

[0030] Also, relative terms such as "upper" or "lower" can be used in this specification to describe the relative relationship of any element to other elements, as shown in the figures. It can be understood that the relative terms are intended to include other directions of the element in addition to the directions depicted in the figures. For the purpose of describing the invention in detail, the figures can be shown exaggerated, and the same reference numerals in the figures refer to the same elements.

[0031] Hereinafter, the structure and manufacturing method of the semiconductor device of the present invention will be described in detail with reference to FIG. 1.

[0032] FIG. 1 is a diagram schematically showing a semiconductor device structure such as a green (Green) LED or a blue (Blue) LED as an example according to an embodiment of the present invention.

[0033] A semiconductor device structure according to an embodiment of the present invention may include a substrate 200, an undoped gallium nitride (Undoped GaN) layer 210, an N-type gallium nitride (N-type GaN) layer 220, an active layer 230, and a P-type gallium nitride (P-type GaN) layer 240. The structure of the semiconductor device may include at least one of InN, GaN, AlN, InP, InAs, InSb, GaAs, and GaSb, and the substances may be included in different ratios.

[0034] A sealing film can be further formed on at least one of the lower and upper portions of the semiconductor device structure of FIG. 1.

[0035] The substrate 200 may be a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed.

[0036] The manufacturing method of the semiconductor device structure of FIG. 1 may include a step of forming at least one or more gallium nitride layers among the undoped gallium nitride (Undoped GaN) layer 210, the N-type gallium nitride (N-type GaN) layer 220, the active layer 230, and the P-type gallium nitride (P-type GaN) layer 240.

[0037] The step of forming the gallium nitride layer, particularly the step of forming the undoped gallium nitride layer 210, may include: a) a step of sequentially supplying a gallium (Ga) precursor and a nitrogen (N2) precursor at 500 °C or lower to form a gallium nitride (GaN) layer on the substrate 200. Thereafter, b) a step of further exposing the gallium nitride (GaN) layer to hydrogen-containing plasma may be included. The plasma gas may include hydrogen gas, and an inert gas, that is, a gas such as helium (He) and argon (Ar) can also be used as the plasma gas, and preferably hydrogen gas can be used as the plasma gas. By exposing the gallium nitride (GaN) layer to hydrogen-containing plasma, impurities and the like present in the gallium nitride (GaN) layer can be removed to improve the film quality.

[0038] Between the step of supplying the gallium (Ga) precursor and the step of supplying the nitrogen (N2) precursor, a step of forming a hydrogen-containing plasma can further be included. In this case, impurities in the gallium (Ga) precursor adsorbed on the substrate 200 are removed by the plasma, and the film quality of the resulting gallium nitride (GaN) layer can be improved. As the plasma gas in this case, in addition to hydrogen gas, helium (He), argon (Ar), etc. can be used.

[0039] Also, plasma can be formed when supplying the nitrogen (N2) precursor.

[0040] Also, a step of further forming a pure silicon layer can be included between a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed and the gallium nitride (GaN) layer. The step of forming the pure silicon layer can include a silicon (Si) epitaxial growth (Epi, epitaxy growth) method.

[0041] The steps a) to b) can be repeated multiple times. Only the step a) can be repeated, and only the step b) can be repeated.

[0042] The step of forming the N-type gallium nitride (N-type GaN) layer 220 can further include a step of supplying a silicon (Si) precursor to the steps a) and b), and the step of forming the active layer 230 can further include a step of supplying an indium (In) precursor to the steps a) and b), and the step of forming the P-type gallium nitride (P-type GaN) layer 240 can further include a step of supplying a magnesium (Mg) precursor to the steps a) and b).

[0043] The gallium (Ga) precursor and the nitrogen (N2) precursor can be sequentially supplied to form a gallium nitride (GaN) layer on the substrate 200. This can be performed using an atomic layer deposition (ALD) method. Specifically, the step of forming the gallium nitride (GaN) layer can include: a) flowing a gallium (Ga)-containing precursor into the chamber through a gas injection means; and b) flowing a nitrogen (N2)-containing precursor into the chamber through the gas injection means to form a gallium nitride (GaN) layer on the substrate.

[0044] To prevent moisture and oxygen from penetrating through the substrate 200, an encapsulation layer can be formed on the substrate 200, for example, below the substrate 200.

[0045] Also, after the step of forming the gallium nitride (GaN) layer, an encapsulation layer can be further formed on the gallium nitride layer to prevent the penetration of moisture or oxygen.

[0046] Also, before the step of supplying the gallium (Ga) precursor, the step of exposing the substrate 200 to a gas containing at least one of fluorine (F) and chlorine (Cl) to remove the oxide film and impurities on the substrate 200 can be further included. Here, the step of removing the oxide film and impurities on the substrate 200 can be performed in the same chamber or system as the chamber or system for forming the gallium nitride layer.

[0047] FIG. 2 is a diagram showing a semiconductor device structure such as a red (Red) LED according to another embodiment of the present invention.

[0048] The semiconductor device structure according to FIG. 2 can include a substrate 300, an undoped gallium arsenide (Undoped GaAs) layer 310, an N-type gallium arsenide (N-type GaAs) layer 320, an active layer 330, and a P-type gallium arsenide (P-type GaAs) layer 340. The semiconductor device structure can include at least one of InN, GaN, AlN, InP, InAs, InSb, GaAs, and GaSb, and the substances can be included in different ratios.

[0049] The substrate 300 can be a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed.

[0050] On the substrate 300, the semiconductor device can be manufactured by forming an undoped gallium arsenide (Undoped GaAS) layer 310, an N-type gallium arsenide (N-type GaAs) layer 320, an active layer 330, and a P-type gallium arsenide (P-type GaAs layer) 340.

[0051] The step of forming at least one or more of the gallium arsenide layers including the undoped gallium arsenide (Undoped GaAS) layer 310, the N-type gallium arsenide (N-type GaAs) layer 320, the active layer 330, and the P-type gallium arsenide (P-type GaAs) layer 340 can include: c) a step of sequentially supplying a gallium (Ga) precursor and an arsenic (As) precursor at 500° C. or lower to form a gallium arsenide (GaAs) layer on the substrate 300; and d) a step of exposing the gallium arsenide (GaAs) layer to hydrogen-containing plasma, and the steps c) to d) can be repeated multiple times.

[0052] Further, a step of further forming a pure silicon layer between a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed and the gallium arsenide (GaAS) layer can be included. The step of forming the pure silicon layer can include a silicon (Si) epitaxial growth method.

[0053] The step of forming the N-type gallium arsenide (N-type GaAs) layer 320 further includes the step of supplying a silicon (Si) precursor to the steps c) and d), and the step of forming the active layer 330 may further include the step of supplying an indium (In) precursor, or the step of forming the P-type gallium arsenide (P-type GaAs) layer 340 may further include the step of supplying a magnesium (Mg) precursor.

[0054] In addition, the step of sequentially supplying the gallium (Ga) precursor and the arsenic (As) precursor to form the undoped gallium arsenide (GaAs) layer 310 on the substrate 300 may include: a) flowing a gallium (Ga)-containing precursor into the chamber through a gas injection means; and flowing an arsenic (As)-containing precursor into the chamber through the gas injection means to form a gallium arsenide (GaAs) layer on the substrate 300.

[0055] By exposing the gallium arsenide (GaAs) layer to hydrogen-containing plasma, impurities and the like present in the gallium arsenide (GaAs) layer can be removed to improve the film quality.

[0056] The step of forming the gallium (Ga) precursor and the step of supplying the arsenic (As) precursor may further include the step of forming hydrogen-containing plasma. In this case, impurities in the gallium (Ga) precursor adsorbed on the substrate 300 can be removed by the plasma to improve the film quality of the resulting gallium arsenide (GaAs) layer. In this case, the plasma gas can be helium (He), argon (Ar), etc. in addition to hydrogen gas.

[0057] In addition, plasma can also be formed when supplying the arsenic (As) precursor.

[0058] In order to prevent moisture or oxygen from penetrating through the substrate 300, a sealing film can be formed on the substrate 300. Further, after the step of forming the gallium arsenide (GaAs) layer, a step of forming an encapsulation layer for preventing the penetration of moisture or oxygen can be further performed on the gallium arsenide layer.

[0059] Further, before the step of supplying the gallium (Ga) precursor, the step of exposing the substrate 300 to a gas containing at least one of fluorine (F) and chlorine (Cl) to remove the oxide film and impurities on the substrate 300 can also be included. Here, the step of removing the oxide film and impurities on the substrate 300 can be performed in the same chamber or system as the chamber or system for forming the gallium arsenide layer.

[0060] FIG. 3 is a diagram schematically showing a method of manufacturing a semiconductor device according to another embodiment of the present invention.

[0061] The method of manufacturing a semiconductor device according to FIG. 3 can be used for manufacturing a transistor, and includes a step (S500) of preparing a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed, a step (S510) of sequentially supplying a gallium precursor and a nitrogen precursor at 500° C. or lower on the substrate to form a gallium nitride layer, and a step (S520) of exposing the gallium nitride layer to a hydrogen-containing plasma, and can include a step (S530) of repeating the steps a) and b) a plurality of times. Alternatively, only the step a) or only the step b) can be repeated in the step S530.

[0062] Further, a step of further forming a pure silicon layer can be included between the silicon substrate containing germanium (Ge) or the substrate on which a silicon layer containing germanium (Ge) is formed and gallium nitride (GaN). This step can include a silicon (Si) epitaxial growth method.

[0063] In the step of supplying a reactant gas containing a nitrogen precursor onto the substrate, a plasma containing hydrogen can be formed.

[0064] The step (S500) of preparing a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed may include a step of loading the substrate into the process space of the chamber 160 of FIG. 5 described later. The substrate loaded into the process space can be seated on the substrate support portion 172 of FIG. 5 described later. Here, the substrate may be any one of a silicon substrate containing germanium (Ge) for forming a gallium nitride layer, a substrate on which a silicon layer containing germanium (Ge) is formed, a sapphire substrate, a sapphire substrate on which a silicon layer containing germanium (Ge) is formed, a glass substrate, a glass substrate on which a silicon layer containing germanium (Ge) is formed, and a silicon wafer, as described above.

[0065] Also, the step (S500) of loading the substrate can also be performed by loading a substrate on which a predetermined functional layer is formed. For example, in the step (S500) of preparing and loading the substrate, a substrate on which a gate electrode is formed on the upper surface of the substrate and a gate insulating film is formed on the gate electrode so as to cover the gate electrode can also be loaded. Alternatively, a substrate on which a sealing layer is formed and drain and source electrodes are formed can also be loaded.

[0066] Here, the substrate support portion 172 of FIG. 5 described later is provided with, for example, an electrostatic chuck or the like so that the substrate can be seated and supported, and the substrate can be adsorbed and maintained by electrostatic force, or the substrate can be supported by vacuum adsorption or mechanical force.

[0067] a) The step (S510) of forming a gallium nitride layer by sequentially supplying a gallium precursor and a nitrogen precursor onto the substrate at 500 °C or lower includes the step of forming a gallium nitride layer on the substrate carried into the process space of chamber 160 of FIG. 5 described below. Here, the gallium nitride (GaN) layer can be at least part of the active layer of a transistor (TFT: Thin Film Transistor) used as a switching circuit in a semiconductor device or a display device. For example, the gallium nitride layer can form a channel region between the gate electrode, source electrode, and drain electrode of a transistor.

[0068] In an embodiment of the present invention, a) the step (S510) of forming a gallium nitride layer by sequentially supplying a gallium precursor and a nitrogen precursor onto the substrate at 500 °C or lower can be performed in a low-temperature process. That is, a) the step (S520) of forming a gallium nitride layer by sequentially supplying a gallium precursor and a nitrogen precursor onto the substrate at 500 °C or lower can be performed by controlling the process space of chamber 160 to a temperature of 50 °C or higher and 500 °C or lower.

[0069] The gallium nitride layer can be formed in a low-temperature process of 50 °C to 600 °C by an atomic layer growth (ALG) process or an atomic layer deposition (ALD) process, and this will be described in more detail below.

[0070] The gallium precursor can include trimethyl gallium (TMGa) gas containing gallium as a main component. A source gas containing gallium is injected onto the substrate for adsorption or vapor deposition.

[0071] While supplying the gallium precursor, or after supplying the gallium precursor, a step of supplying a dopant gas onto the substrate can be performed. As described above, the gallium nitride layer forms at least a part of the active layer, and such an active layer can be formed from a p-type active layer or an n-type active layer depending on the type. Therefore, while supplying the gallium precursor, i.e., the source gas, or after supplying the source gas, a step of supplying a p-type dopant gas or a step of supplying an n-type dopant gas onto the substrate can be performed. The dopant gas can be supplied through at least one of a first gas supply path and a second gas supply path, where the p-type dopant gas can include bis(cyclopentadienyl)magnesium (Cp2Mg; bis-cyclopentadienyl magnesium) gas, and the n-type dopant gas can include di-isopropylaminosilane (DIPAS; di-isopropylaminosilane) gas.

[0072] In this way, by injecting the gallium precursor and supplying the p-type dopant gas or the n-type dopant gas before injecting the nitrogen precursor, a p-type gallium nitride layer or an n-type gallium nitride layer can be formed. The gallium precursor can be injected, a purge gas can be injected, a dopant (p-type dopant or n-type dopant) gas can be injected, a purge gas can be injected, the nitrogen precursor can be injected, and a purge gas can be injected. Or, the dopant (p-type dopant or n-type dopant) gas can be injected simultaneously with the injection of the gallium precursor, a purge gas can be injected, the nitrogen precursor can be injected, and a purge gas can be injected.

[0073] While sequentially supplying the gallium precursor and the nitrogen precursor, a purge gas can be injected to discharge the gas outside the chamber 160, and the source gas and the reactant gas remaining in the process space of the chamber 160 can be removed. The purge gas can be performed by supplying an inert gas, such as argon (Ar) gas, and argon (Ar) gas can be supplied.

[0074] b) After forming the gallium nitride layer, the gallium nitride layer can be exposed to a hydrogen (H2)-containing plasma. Here, hydrogen gas can be activated and supplied.

[0075] When supplying a reactant gas that is nitrogen gas, the reactant gas can be activated and supplied in order to effectively react the nitrogen component with the gallium component. By activating the nitrogen-containing gas with nitrogen radicals and reacting it with the gallium component, a gallium nitride layer can be formed on the substrate at a lower process temperature. That is, when the reactant gas is activated and supplied to the substrate, the chamber for forming the gallium nitride layer can be controlled at a low temperature.

[0076] After injecting such a reactant gas to form a gallium nitride layer or after exposing it to a hydrogen-containing plasma, an inert gas, for example, argon (Ar) gas, that purges the gas remaining in the chamber 160 can be supplied to perform purging.

[0077] An amorphous gallium nitride layer can be crystallized by hydrogen (H2) plasma. When simply injecting a source gas and a reactant gas to form a gallium nitride layer, the gallium nitride layer is deposited on the substrate in an amorphous state. However, when, as in the embodiment of the present invention, a gas containing hydrogen is activated and supplied to the substrate after purging the reactant gas, the amorphous gallium nitride layer can be crystallized to have a polycrystalline or single-crystalline structure. Also, in addition to hydrogen gas, Ar and He gases, which are inert gases, can also be used.

[0078] Also, when the temperature inside the chamber 160 or the substrate is low, for example, a gallium nitride layer can be formed at a low temperature of 500 °C or lower. Moreover, a hydrogen plasma can be formed on the substrate to effectively remove impurities remaining in the chamber 160 and impurities contained in the gallium nitride layer.

[0079] Here, the formation of the gallium nitride layer according to an embodiment of the present invention can be repeatedly performed until a gallium nitride layer with a desired thickness and a desired crystallization layer are formed by successively performing: a) a step (S510) of supplying a gallium precursor and a nitrogen precursor at 500°C or lower, and b) a step (S520) of exposing the gallium nitride layer to a hydrogen-containing plasma, either continuously or by repeating the cycle of each step multiple times (S530).

[0080] FIG. 4 is a diagram schematically showing a transistor manufactured according to an embodiment of the present invention. This embodiment relates to an embodiment of a bottom gate, and the present invention can also include a top gate structure. FIG. 4 shows a transistor including a gallium nitride layer manufactured by the manufacturing method according to FIG. 3 described above as an active layer 130.

[0081] Referring to the structure of FIG. 4, a transistor according to an embodiment of the present invention includes a gate electrode 110, a source electrode 142 and a drain electrode 144 which are arranged above or below the gate electrode 110 and are horizontally spaced apart from each other, an active layer 130 disposed between the gate electrode 110 and the source electrode 142 and between the gate electrode 110 and the drain electrode 144, and a gate insulating film 120 disposed between the gate electrode 110 and the active layer 130.

[0082] At least a part of the active layer 130 is formed of a gallium nitride layer.

[0083] Here, a transistor according to an embodiment of the present invention can be a bottom gate type transistor including a gate electrode 110 formed on a substrate 100, a gate insulating film 120 formed on the gate electrode 110, an active layer 130 formed on the gate insulating film 120, and a source electrode 142 and a drain electrode 144 formed separately from each other on the active layer 130 as shown in FIG. 4. Needless to say, the present invention can be similarly applied to a top gate type transistor in which the gate electrode 110 is disposed above the active layer 130.

[0084] Here, the substrate 100 can include various substrates for forming a gallium nitride (GaN) layer. For example, the substrate 100 can be any one of a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed, a sapphire substrate, a sapphire substrate on which a silicon layer containing germanium (Ge) is formed, a glass substrate, a glass substrate on which a silicon layer containing germanium (Ge) is formed, and a silicon wafer. Needless to say, the substrate 100 can also use various other substrates such as a transparent substrate or a flexible substrate.

[0085] The gate electrode 110, the source electrode 142, and the drain electrode 144 can be formed using a conductive material. For example, they can be formed of at least any one of the metals aluminum (Al), neodymium (Nd), silver (Ag), chromium (Cr), titanium (Ti), tantalum (Ta), molybdenum (Mo), and copper (Cu) or an alloy containing them. In addition, the gate electrode 110 can be formed not only of a single layer but also of a multilayer composed of a plurality of metal layers. As an example, the gate electrode 110 can also be formed of a bilayer including a metal layer such as chromium (Cr), titanium (Ti), tantalum (Ta), molybdenum (Mo) with excellent physicochemical properties and a metal layer of an aluminum (Al) series, a silver (Ag) series, or a copper (Cu) series with low specific resistance.

[0086] The gate insulating film 120 is formed on the gate electrode 110. That is, the gate insulating film 120 can be formed on the upper surface of the substrate 100 including the upper and side portions of the gate electrode 110. The gate insulating film 120 can be formed of a layer using any one or more insulating materials among silicon oxide (SiO2), silicon nitride (SiN), Hi-K (high-K) dielectric, and aluminum oxide (Al2O3), which have excellent adhesion to metal substances and excellent breakdown voltage. Here, the Hi-K (high-K) dielectric is a dielectric having a higher dielectric constant than silicon oxide (SiO2), and can include hafnium oxide (HfO2), zirconium oxide (ZrO2), and the like.

[0087] The active layer 130 is formed on the gate insulating film 120 and is formed so that at least a part thereof overlaps with the gate electrode 110. The active layer 130 can be formed to include a gallium nitride layer. Such a gallium nitride layer includes the process of loading the substrate into the process space of the chamber and the process of forming the gallium nitride layer on the substrate as described above. The process of forming the gallium nitride layer can include the process of supplying a source gas containing gallium onto the substrate, the process of supplying a reactant gas containing nitrogen onto the substrate, and the process of activating and supplying a post-treatment gas containing hydrogen onto the substrate to which the reactant gas has been supplied.

[0088] Although not shown in FIG. 4, such a gallium nitride layer can be directly formed on the gate insulating film 120, or a buffer layer can be formed on the gate insulating film and a gallium nitride layer can be formed on the buffer layer. Here, the buffer layer is a layer formed before the gallium nitride layer and can be a seed layer that helps the gallium nitride layer to be more effectively crystallized. That is, the buffer layer can be a seed layer that makes the crystallization of the gallium nitride layer easier when forming the gallium nitride layer. Such a buffer layer can be formed of an aluminum nitride (AlN) layer and can be formed by various layer formation processes such as atomic layer deposition and chemical vapor deposition.

[0089] The source electrode 142 and the drain electrode 144 are formed on the active layer 130, i.e., the gallium nitride layer, partially overlap with the gate electrode 110, and can be formed separately from each other with the gate electrode 110 interposed therebetween. The source electrode 142 and the drain electrode 144 can be formed by the same process using the same material for each other, and can be formed using a conductive material. For example, they can be formed of at least any one of metals such as aluminum (Al), neodymium (Nd), silver (Ag), chromium (Cr), titanium (Ti), tantalum (Ta), and molybdenum (Mo) or an alloy containing them. That is, the source electrode 142 and the drain electrode 144 can be formed of the same material as the gate electrode 110, but can also be formed of different materials. Further, the source electrode 142 and the drain electrode 144 can be formed not only of a single layer but also of a multilayer of a plurality of metal layers.

[0090] Further, a step of further forming a pure silicon layer on a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed can be included. This step can include a silicon (Si) epitaxial growth (Epi) method.

[0091] The LED element emits light in Red, Green, and Blue. Among them, Green and Blue can be formed of gallium nitride (GaN), and Red of LED emission can be formed of gallium arsenide (GaAs).

[0092] FIG. 5 is a diagram schematically showing a vapor deposition apparatus according to an embodiment of the present invention.

[0093] Referring to FIG. 5, the atomic layer deposition apparatus according to an embodiment of the present invention is an apparatus for depositing a gallium nitride layer, and includes an upper dome 152 and a lower dome 158. Process gases, namely source gas and reactant gas, can be respectively injected into the upper dome 152, and the process gases, namely source gas and reactant gas, can be exhausted from the upper dome 152. The source gas and the reactant gas can be injected through a gas injection part. The gas injection part includes one or more injectors, and the process gas can be injected into the process space by the one or more injectors. A process space can be located below the upper dome 152. A purge gas is supplied to the lower dome 158, and a process gas is supplied to the upper dome 152, so that the process gas can be prevented from flowing into the lower dome 158, and the deposition of an abnormal layer on the lower dome 158 can be suppressed. Further, a uniform plasma can be formed to form a uniform layer without rotating the substrate 174.

[0094] Furthermore, gallium nitride (GaN) and gallium arsenide (GaAs) in this process can also be formed as a plasma enhanced ALD (PEALD) apparatus by adopting an inductively coupled plasma source.

[0095] The atomic layer deposition apparatus including the upper dome 152 and the lower dome 158 is provided with liners 154 and 156 to prevent the deposition of unnecessary layers on the inner wall of the chamber 160. The liners 154 and 156 can be periodically replaced or cleaned.

[0096] The lamp heater 166 disposed below the lower dome 158 is a ring-shaped lamp heater, and a plurality of them can be provided. The plurality of lamp heaters 166 can independently control the power to uniformly heat the substrate 174.

[0097] The high-vacuum pump 190 consisting of a turbo molecular pump (TMP) connected to the exhaust section of the chamber 160 maintains a base vacuum inside the chamber 160, thereby enabling the formation of a stable plasma at a pressure of several Torr or less even during the process.

[0098] The atomic layer deposition (ALD) apparatus of the present invention can provide infrared rays reflected by the electromagnetic wave shielding housing 130 back to the substrate 174 while reducing the performance degradation due to infrared heating of the antenna 110 that forms inductively coupled plasma disposed above the upper dome 152, and can form a high-speed and uniform layer on the substrate 174.

[0099] Referring to FIG. 5, an atomic layer deposition (ALD) apparatus 100 according to an embodiment of the present invention includes a chamber 160 having side walls, a substrate support unit 172 provided inside the chamber to support a substrate, an upper dome 152 covering the upper surface of the chamber 160 and formed of a transparent dielectric material, an antenna 110 disposed above the upper dome 152 to form inductively coupled plasma, and an electromagnetic wave shield housing 130 disposed so as to surround the antenna 110. The electromagnetic wave shield housing 130 can be heated by a heater.

[0100] The antenna 110 includes two one-turn unit antennas, and the two one-turn unit antennas can be connected in parallel to the RF power supply 140.

[0101] The plasma in the step of generating hydrogen plasma performed after the step of injecting a reactant gas and the step of generating plasma performed between the source gas injection step and the reactant gas injection step can be formed by the antenna 110.

[0102] The source gas and the reactant gas can be injected into the process spaces in the upper dome 152 and the lower dome 158 by an injector (not shown). The source gas and the reactant gas can be injected by the injector in the direction of the upper dome 152 or horizontally and injected into the chamber 160.

[0103] The chamber 160 is formed of a conductor. The internal space of the chamber 160 has a cylindrical shape, and the external shape of the chamber 160 can be a rectangular parallelepiped shape. The chamber 160 can be cooled by cooling water. The chamber 160, the upper dome 152, and the lower dome 158 are combined to provide a sealed space.

[0104] A substrate inlet / outlet 160a is provided on one side surface of the chamber 160, and an exhaust port 160b can be provided on the other side surface of the chamber 160 opposite to the substrate inlet / outlet 160a. The exhaust port 160b can be connected to a high-vacuum pump 190. The high-vacuum pump 190 can be a turbo molecular pump. The high-vacuum pump 190 maintains a low base pressure and can maintain a pressure of several torr or less even during the process. The upper surface of the exhaust port 160b may be the same as or lower than the upper surface of the substrate inlet / outlet 160a.

[0105] The upper dome 152 can be made of a transparent dielectric such as quartz, sapphire, or ceramic. The upper dome 152 can be made of a ceramic material. The ceramic material has better corrosion resistance and corrosiveness than quartz.

[0106] The upper dome 152 is inserted into a jaw (step) formed on the upper surface of the chamber 160 and can be coupled to the chamber 160. The coupling portion of the upper dome 152 that is coupled to the chamber 160 for vacuum sealing can be in the shape of a washer. The upper dome 152 can be arc-shaped or elliptical. The upper dome 152 can transmit infrared rays incident from below.

[0107] The infrared rays reflected by the electromagnetic wave shielding housing 130 can pass through the upper dome 152 and be incident on the substrate 174.

[0108] The lower dome 158 can be made of quartz or sapphire, which is a transparent dielectric. The lower dome 158 can include a washer-shaped coupling portion that couples to a jaw (step) formed on the lower surface of the chamber 160, a funnel-shaped lower dome body that extends below the coupling portion, and a cylindrical pipe that extends downward from the center of the lower dome body. The lower dome 158 can be inserted into a jaw (step) formed on the lower surface of the chamber 160 and coupled to the chamber 160. The coupling portion of the lower dome 158 that couples to the chamber 160 for vacuum sealing can be washer-shaped.

[0109] The drive shaft of the first lifter 184 and the drive shaft of the second lifter 182 can be inserted and arranged in the cylindrical pipe of the lower dome 158. The purge gas supplied through the lower dome 158 can be supplied through a flow path. The flow path can be the cylindrical pipe of the lower dome 158. The purge gas can be an inert gas such as argon.

[0110] The upper liner 154 can be formed of a transparent dielectric material. As an example, the upper liner 154 can be made of quartz, alumina, sapphire, or aluminum nitride. The upper liner 154 can be made of a material that suppresses the deposition of abnormal layers.

[0111] The heat insulation part 162 can be arranged between the lower surface of the chamber 160 and the reflector 161 and can be ring-shaped. The heat insulation part 162 can reduce the heat transfer from the heated reflector 161 to the chamber 160. The heat insulation part 162 can be made of a ceramic material. The upper surface of the heat insulation part 162 can be provided with a jaw (step). The jaw (step) of the heat insulation part 162 and the jaw (step) of the lower surface of the chamber 160 can accommodate the washer-shaped coupling portion of the lower dome 158 and perform vacuum sealing.

[0112] The concentric-ring-shaped lamp heater 166 includes a plurality of concentric-ring-shaped ring heaters and can be connected to the power supply 164. The concentric-ring-shaped ring heaters 166 are arranged at regular intervals along the inclined surface of the lower dome 158. The concentric-ring-shaped lamp heater 166 is divided into three groups and can be independently powered. The concentric-ring-shaped ring heaters 166 can be inserted and aligned in ring-shaped grooves formed on the inclined surface of the reflector 160.

[0113] For example, the concentric-ring-shaped lamp heater 166 is a halogen lamp heater and may be eight in number. The three lower lamp heaters can form a first group, the two middle lamp heaters can form a second group, and the three upper lamp heaters can form a third group. The first group can be connected to the first power supply 164a, the second group can be connected to the second power supply 164b, and the third group can be connected to the third power supply 164c. The first to third power supplies 164a to 164c can be independently controlled for heating a uniform substrate.

[0114] The RF power supply 140 can supply RF power to the antenna 110 via the impedance matching box 142 and the power supply line 143. The antenna 110 through which RF current flows must ensure a sufficient cross-sectional area due to the high current, and preferably forms a closed loop to form sufficient magnetic flux. The antenna 110 can use a strip line erected vertically to absorb infrared rays incident from its upper or lower part and minimize the increase in resistance due to heating. The antenna 110 provides high light transmittance to infrared rays.

[0115] In addition, the antenna 110 can be coated with gold (Au) or silver (Ag) to increase infrared reflection. Also, in order to ensure sufficient magnetic flux, an antenna 110 with a two-layer structure can be used. In the one-turn unit antenna, the position where RF power is supplied is arranged on the upper surface, and power loss due to inductive coupling can be reduced.

[0116] The lower dome 158 covers the lower surface of the chamber 160 and is formed of a transparent dielectric material, and can have a curvature like that of the upper dome 152. The lamp heater 166 can be arranged on the lower surface of the lower dome 158. The reflector 161 can be arranged on the lower surface of the lamp heater 166.

[0117] In addition, it can further include a control unit (not shown) for controlling the RF power supply 140. Here, for example, a source gas supply path (not shown) and a reactant supply path (not shown) for supplying raw material gas can be separately formed.

[0118] On the other hand, a silicon substrate containing germanium (Ge) can be seated in the chamber 160 on the substrate support 172 for the layer formation process. The substrate 174 can include various substrates for forming a gallium nitride (GaN) layer. For example, the substrate 174 can be any one of a silicon germanium (SiGe) substrate containing germanium (Ge), a substrate on which a silicon layer containing germanium (Ge) is formed, a sapphire substrate, a sapphire substrate on which a silicon layer containing germanium (Ge) is formed, a glass substrate, a glass substrate on which a silicon layer containing germanium (Ge) is formed, and a silicon wafer.

[0119] The substrate support 172 is provided with, for example, an electrostatic chuck so that the substrate 174 can be seated and supported, and the substrate 174 can be adsorbed and maintained by electrostatic force, or the substrate 174 can be supported by vacuum adsorption or mechanical force.

[0120] The clamp 150 can be arranged to cover the end of the upper dome 152. The clamp 150 is formed of a conductor and can be cooled by cooling water. The lower surface of the clamp 150 is provided with jaws (steps) so as to be coupled to the washer-shaped coupling portion of the upper dome 152, and can include a curved surface portion 150a so as to cover a part of the curved portion of the upper dome 152. The curved surface portion 150a of the clamp 150 can be gold-plated to reflect infrared rays. The inner diameter of the clamp 150 can be substantially the same as the inner diameter of the upper liner 154. Also, the inner diameter of the clamp 150 can be the same as the diameter of the antenna housing 130.

[0121] The chamber housing 132 can be arranged on the clamp 150 so as to cover the antenna housing 130.

[0122] On the other hand, it can be configured to supply a gas containing gallium (Ga) as a source gas, and a gas containing nitrogen (N) as a reactant gas. Here, the source gas, for example, the gas containing gallium can include trimethyl gallium (TMGa; Trimethyl Gallium) gas, and the reactant gas, for example, the gas containing nitrogen can include ammonia (NH3) gas.

[0123] In the above, the preferred embodiments of the present invention have been described and illustrated using specific terms, but such terms are merely for clearly explaining the present invention, and it is obvious that various changes and variations can be made to the embodiments and the terms described without departing from the technical idea and scope of the following claims. Such modified embodiments should not be individually understood as departing from the idea and scope of the present invention, but should be considered to fall within the scope of the claims of the present invention.

Claims

1. In a method for manufacturing a semiconductor device including a step of forming at least one gallium nitride layer or at least one gallium arsenide layer among an undoped gallium nitride (Undoped GaN) layer, an undoped gallium arsenide (Undoped GaAs) layer, an N-type gallium nitride (N-type GaN) layer, an N-type gallium arsenide (N-type GaAs) layer, an active layer, a P-type gallium nitride (P-type GaN) layer, and a P-type gallium arsenide (P-type GaAs) layer on a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed, The step of forming the at least one gallium nitride layer or the at least one gallium arsenide layer, a) At a temperature of 500 °C or lower, i) a gallium (Ga) precursor and ii) a nitrogen (N ２ ) precursor or an arsenic (As) precursor are sequentially supplied to form a gallium nitride (GaN) layer or a gallium arsenide (GaAs) layer on the substrate, and b) includes a step of exposing the gallium nitride (GaN) layer or the gallium arsenide (GaAs) layer to a hydrogen-containing plasma, Characterized by including repeating the steps a) to b) a plurality of times, a method for manufacturing a semiconductor device.

2. In a method for manufacturing a semiconductor device including a step of forming a gallium nitride (GaN) layer or a gallium arsenide (GaAs) layer on a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed, The step of forming the gallium nitride layer or the gallium arsenide (GaAs) layer includes the steps of sequentially supplying i) a gallium (Ga) precursor and ii) a nitrogen (N ２ ) precursor or an arsenic (As) precursor into the chamber, The step of sequentially supplying i) a gallium (Ga) precursor and ii) a nitrogen (N ２ ) precursor or an arsenic (As) precursor into the chamber is a) a step of flowing the gallium (Ga) precursor into the chamber at 500 °C or lower through a gas injection means, and b) flowing the nitrogen (N ２ ) precursor or arsenic (As) precursor into the chamber through the gas injection means to form a gallium nitride (GaN) layer or a gallium arsenide (GaAs) layer on the substrate, wherein the method for manufacturing a semiconductor device is characterized by including the step of forming the gallium nitride (GaN) layer or the gallium arsenide (GaAs) layer on the substrate.

3. In a method for manufacturing a semiconductor device including a step of forming at least one gallium nitride layer or at least one gallium arsenide layer among an undoped gallium nitride (Undoped GaN) layer, an undoped gallium arsenide (Undoped GaAs) layer, an N-type gallium nitride (N-type GaN layer, an N-type gallium arsenide (N-type GaAs) layer, an active layer, a P-type gallium nitride (P-type GaN) layer, and a P-type gallium arsenide (P-type GaAs) layer on a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed, The step of forming the at least one or more gallium nitride layers or at least one gallium arsenide layer includes sequentially supplying i) a gallium (Ga) precursor and ii) a nitrogen (N ２ precursor or an arsenic (As) precursor at 500° C. or lower to form a gallium nitride (GaN) layer or a gallium arsenide (GaAs) layer on the substrate, and forming plasma in the step of supplying the nitrogen (N ２ precursor or the arsenic (As) precursor), and a method for manufacturing a semiconductor device.

4. After the step of forming the gallium nitride layer or the gallium arsenide (GaAs) layer, further including a step of exposing the gallium nitride layer or the gallium arsenide (GaAs) layer to a hydrogen-containing plasma, the method for manufacturing a semiconductor device according to claim 2 or 3.

5. The step of forming the N-type gallium nitride (N-type GaN) layer or the N-type gallium arsenide (N-type GaAs) layer further includes a step of supplying a silicon (Si) precursor, The step of forming the active layer further includes a step of supplying an indium (In) precursor, The method for manufacturing a semiconductor device according to claim 1 or 3, wherein the step of forming the P-type gallium nitride (P-type GaN) layer or the P-type gallium arsenide (P-type GaAs) layer further includes a step of supplying a magnesium (Mg) precursor.

6. The step of supplying the gallium (Ga) precursor, and during the step of supplying the nitrogen (N ２ ), or the step of supplying the arsenic (As) precursor, further comprising the step of forming a hydrogen-containing plasma, the method for manufacturing a semiconductor device according to any one of claims 1 to 3.

7. Before the step of supplying the gallium (Ga) precursor, the method further includes a step of exposing the substrate to a gas containing at least one of fluorine (F) and chlorine (Cl) to remove an oxide film and impurities on the substrate. The method for manufacturing a semiconductor device according to any one of claims 1 to 3.

8. The method for manufacturing a semiconductor device according to claim 7, wherein the step of removing the oxide film and impurities on the substrate is performed in the same chamber or system as the chamber or system for forming the gallium nitride layer or the gallium arsenide layer.

9. The method for manufacturing a semiconductor device according to any one of claims 1 to 3, further including a step of forming a sealing film (encapsulation layer) for preventing penetration of moisture or oxygen on the substrate.

10. The method for manufacturing a semiconductor device according to any one of claims 1 to 3, further including a step of forming a pure silicon layer on a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed.

11. As a method for manufacturing a semiconductor device, On a substrate support portion of an atomic layer deposition chamber including gas injection means, A step of disposing one or two or more substrates - the substrate is a silicon substrate containing germanium (Ge) or a substrate on which a silicon layer containing germanium (Ge) is formed - A step of maintaining the substrate support portion at 500 °C or lower: a) A step of flowing a gallium precursor into the chamber through the gas injection means, b) A step of flowing a purge gas for purging the gallium precursor into the chamber, c) A step of flowing a nitrogen precursor or an arsenic precursor into the chamber through the gas injection means to form a gallium nitride layer or a gallium arsenide layer on the substrate; d) A step of flowing a hydrogen-containing gas into the chamber to form a hydrogen plasma, and including: A method for manufacturing a nitride compound semiconductor device, including a step of repeating the steps a) to d).

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