High-Speed LCR Meter with Sub-Balancing

Abstract

The LCR meter that improves the balancing accuracy adopts a sub-balancing method in addition to analog balancing by a transimpedance amplifier (TIA). For this reason, the LCR meter based on the TIA applies an inverted voltage equal to the unbalanced voltage to the non-inverting input of the TIA in order to correct the analog auto-balancing. Also, the voltage measurement can be completed in one time.

Description

Technical Field

[0001] The present invention relates to an apparatus for measuring impedance over a wide frequency range.

Background Art

[0002] The main parameters of an LCR meter are the accuracy and speed of measurement. When an LCR meter is used as part of an impedance analyzer or in manufacturing, the measurement speed is important. Impedance measurement is based on measuring the voltage drop across a device under test (DUT) placed in series with a range resistor having a known impedance. The impedance of the DUT is calculated by knowing the current through the DUT and the voltage drop.

[0003] In this case, the main cause of the error [Figure 1] is that the leakage current flowing through the leakage impedance between the midpoint of the DUT and the range resistor flows to the ground. The leakage current is the reason why the currents through the range resistor and the DUT are not equal.

[0004] Various methods are used to reduce the leakage current.

[0005] One of them is the guard method, which helps to reduce the voltage between the midpoint and the shield in the cable from the low potential (LP) terminal of the LCR meter to the DUT. This method is performed by applying a voltage to the guard via a voltage follower. This method is used in the digital impedance meter ESI model 251 "A History of Impedance Measurements by Henry P. Hall" p.49.

[0006] Another method is the automatic balance bridge using a transimpedance amplifier (TIA). This method is used in the digital impedance meter GR type 1685-A "A History of Impedance Measurements by Henry P. Hall" p.49.

[0007] Both of these methods respond immediately to balancing, but at high frequencies the gain is low, resulting in low common voltage suppression between the midpoint of the cable and the shield. There may also be stability issues.

[0008] An LCR meter equipped with a modem-type automatic balance bridge has good balance accuracy at high frequencies. For example, the Hewlett Packard 4271A LCR meter, "A History of Impedance Measurements by Henry P. Hall", p. 49. However, it includes a slow integrator and requires a stabilization time of several cycles of the signal frequency, resulting in long measurement times at low and medium frequencies. It is also expensive. A digital version of the modem-type automatic balancing bridge exists in U.S. Patent No. 7,616,008 B1, Rayman et al. (2009). However, it has the same drawbacks as the analog version. Slow at low and medium frequencies.

[0009] Other digital methods also exist, for example, U.S. Patent No. 10,013,015 B2, Ida et al. (2018), Chinese Patent Application Publication No. 110320410 A, Fajie et al. (2019), "A Novel Fast Balance Technique for the Digital AC Bridge", Zhang et al. (1998). However, all of them require at least two voltage measurements and at least two signal frequency cycles for balancing. SUMMARY OF THE INVENTION

[0010] A transimpedance amplifier (TIA) provides an analog method to achieve low-cost and high-speed equalization. The TIA instantaneously equalizes at all frequencies. However, the TIA has a low gain at high frequencies. As a result, at the midpoint between the DUT and the range resistor at high frequencies, there is a significant residual imbalance voltage. The present invention uses a sub-equalization method to remove this residual imbalance voltage. The sub-equalization method includes measuring the imbalance voltage and applying a voltage of opposite polarity to the non-inverting input of the TIA from an additional digital-to-analog converter (DAC). This is a fast and non-iterative method to improve accuracy. An LCR meter using the sub-equalization method requires only one voltage measurement at high frequencies and instantaneously equalizes at low and medium frequencies.

Problems to be Solved by the Invention

[0011] Some LCR meters use a transimpedance amplifier (TIA) to exclude the current passing through the leakage impedance for equalization. This is a low-cost solution for impedance measurement. However, this solution has low accuracy at high frequencies because the TIA has a low gain at high frequencies.

Means for Solving the Problems

[0012] The present invention solves the problem of a low-accuracy TIA-based LCR meter by measuring the imbalance voltage at the inverting input of the TIA and applying it to the non-inverting input of the TIA with the opposite polarity by an additional voltage source. Therefore, the setting accuracy of the output voltage of the TIA that generates a compensation current through the range resistor for equalization is not limited by the gain of the TIA.

Effects of the Invention

[0013] The TIA-based LCR meter has the best measurement time at ultra-low and low frequencies. The measurement time of the TIA-based LCR meter is limited only by the entire one period of the measurement frequency at these frequencies. The present invention extends the high impedance measurement accuracy to a wider frequency range. The hardware structure further extends the frequency range by mutually calibrating the voltage channels.

Brief Description of the Drawings

[0014]

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Figure 8

Figure 9

Figure 10

Explanation of Reference Numerals

[0015] 1002 First voltage source (VoltSrc1) 1004 High current (HC) terminal 1006 High potential (HP) terminal 1008 Device under test (DUT) 1010 Low Potential (LP) Terminal 1012 Intermediate Point between DUT and Range Resistor 1014 Leakage Impedance (Zleak) 1016 Low Current (LC) Terminal 1018 Set of Range Resistor and Reference Resistor (Zrange) 1020 Voltage at the Second Terminal of the Range Resistor (Vrr) 1022 Second Voltage Source (VoltSrc2) 3002 Output Impedance of the First Voltage Source (Zout1) 3004 Impedance of the Series Current Limiting Resistor (Zser_res) 3006 Output Impedance of the Buffer of the First Voltage Source (Zbuff1) 3008 Impedance of the Cable Wire between the High Current Terminal and the Device Under Test (Zwire1) 3010 Capacitance of the Cable between the HP Terminal and the DUT (Ccable1) 3011 Impedance of the Cable Wire between the LC Terminal and the Device Under Test (Zwire2) 3012 Switch Connecting the Non-Inverting Input of the Transimpedance Amplifier (TIA) to Ground or the Second Voltage Source 3014 Transimpedance Amplifier (TIA) 3016 Voltage of the Output of the Second Voltage Source (Vsb) 3018 Switch Connecting the Second Terminal of the Range Resistor to the Output of the TIA or the Output of the Second Voltage Source 3020 Output Impedance of the Second Voltage Source Buffer (Zbuff2) 8010 High Potential Voltage Input Buffer 8012 Low Potential Voltage Input Buffer 8014 Low Current Voltage Input Buffer 8016 Range Resistor Voltage Input Buffer 8018 Voltage Input Buffer of the Second Voltage Source 8024 Output Buffer of the First Voltage Source 8026 Output Buffer of the Second Voltage Source 8028 First Low-Pass Filter (LPF1) 8030 Input Multiplexer 8032 Output Buffer of the Multiplexer 8033 Control Interface of the Multiplexer 8034 Second Low-Pass Filter (LPF2) 8036 First Digital-to-Analog Converter (DAC) (DAC1) 8038 First Analog-to-Digital Converter (ADC) (ADC1) 8040 Second DAC (DAC2) 8042 Digital Signal to the First DAC 8044 Digital Signal from the First ADC 8046 Digital Signal to the Second DAC 8048 Processor 9002 Set of First Memory Buffers 9004 Set of Second Memory Buffers 9006 Direct Fourier Transform (DFT) Block 9008 Cosine Multiplier 9010 Sine Multiplier 9012 Demultiplexer and Accumulator 9014 Software Direct Digital Synthesizer (DDS) 9016 Control and Processing Core 10002 Common Direct Memory Access (DMA) Flowchart 10004 Direct Fourier Transform Processing Flowchart for ADC Data Flow 10006 DMA Data Preparation Flowchart for DAC and Reference Buffer.

Best Mode for Carrying Out the Invention

[0016] [Fig. 3] shows a schematic diagram of the present invention. The present invention uses a transimpedance amplifier (TIA) to bring the voltage at the midpoint between the DUT and the range register closer to zero and minimize the leakage current. The TIA has good instantaneous balancing for low and medium frequencies. However, the TIA has low gain at high frequencies, and as a result, the remaining unbalanced voltage becomes significant.

[0017] [Equation 1] Impedance measurement is based on Ohm's law. Zdut = Vdut / Idut

[0018] [Equation 2] Ideally, the currents through the DUT and the range register are equal. Idut = Irange

[0019] However, there is a slight remaining unbalanced voltage Vlp at the midpoint between the DUT and the range register.

[0020] [Equation 3] Therefore, there is also a current through the leakage impedance Zleak. Ileak = Vlp / Zleak

[0021] The leakage current causes an error in the impedance measurement. The present invention removes the error in two ways.

[0022] The first method is the sub-balancing method. The sub-balancing method is based on the characteristic that the operational amplifier has the same amplification for both the inverting input and the non-inverting input. To obtain the same output voltage, it is not important whether the input voltage is applied to each input of the operational amplifier. The only difference is the polarity of the input voltage. When the input voltage is applied to the inverting input, it must have the opposite polarity to the output voltage. When the input voltage is applied to the non-inverting input, it must have the same polarity as the output voltage. Therefore, by measuring the voltage at the inverting input of the TIA and applying a voltage with the same value but opposite polarity to the non-inverting input of the TIA, the voltage at the inverting input approaches zero. And the current through the leakage impedance also approaches zero.

[0023] When a sub - balancing voltage is applied, the current passing through the DUT, the fixture, and the output impedance of the first voltage source changes. The new current passing through the DUT depends on the output impedance of the first voltage source and the parasitic impedance of the fixture. These are constants, measured during calibration, and stored in memory for use during measurement. Knowing these impedances allows for a more accurate calculation of the required sub - balancing voltage. The second voltage source 1022 and the switch 3012 provide this sub - balancing voltage. For this operation, only one additional voltage measurement is required.

[0024] The second method is leakage current correction. If the voltage drop across the leakage impedance is known, the leakage current can be calculated.

[0025] [Equation 4] The actual current passing through the DUT is obtained as follows. Idut = Irange - Ileak

[0026] Since the leakage impedance of the fixture used is constant, it can be measured during calibration and stored in memory for use during measurement. [Figure 2] shows a method for measuring the leakage impedance.

[0027] The leakage impedance is high at low and medium frequencies, and the balancing error of the TIA is small. However, sub - balancing takes time even in one step. In this case, only leakage correction is required. Leakage correction is particularly important for low frequencies and very high DUT impedances, and sub - balancing alone is not sufficient to obtain high - precision measurements.

[0028] Both sub - balancing and leakage correction are required at high frequencies, especially when using a long cable to the fixture.

[0029] The First Embodiment The first embodiment [Figure 8] includes a processor 8048 that provides digital signals 8042 and 8046 to a first voltage source 1002 and a second voltage source 1022. The first embodiment also includes DACs 8036 and 8040, low-pass filters 8028 and 8034, and output buffers 8024 and 8026. The processor receives a digital signal 8044 from an ADC 8038 and controls an analog multiplexer 8030.

[0030] The output of the first voltage source 1002 is connected to the DUT 1008 via an output impedance 3002 [Figure 3]. The output impedance 3002 includes the output impedance 3006 of the buffer 8024, a series resistor 3004, a wire impedance 3008, and the capacitance of a cable 3010 between the HC1004 and HP1006 terminals of the LCR meter and the DUT 1008.

[0031] One side of the DUT 1008 is connected to the HC terminal 1004 and the HP terminal 1006. The other side of the DUT 1008 is connected to the LP terminal 1010, the LC terminal 1016, and the first terminal of a range resistor 1018.

[0032] The first embodiment includes a TIA 3014 whose inverting input is connected to the LP terminal 1010. The non-inverting input of the TIA is connected to ground or the output of the second voltage source via a switch 3012. The first terminal of the range resistor 1018 is connected to the LC terminal 1016. The second terminal of the range resistor 1018 is connected to the output of the TIA or the output of the second voltage source via a switch 3018. The switch 3018 is required for leakage impedance measurement. This measurement is performed by applying a voltage from the second voltage source to the second terminal of the range resistor and measuring the voltages at the LP terminal, the HP terminal, and both terminals of the range resistor.

[0033] The HP terminal 1006 is connected to the input buffer 8010. The LP terminal 1010 is connected to the input buffer 8012. The first terminal of the range register 1018 is connected to the input buffer 8014. The second terminal of the range register 1018 is connected to the input buffer 8016. The output of the second voltage source 1022 is connected to the input buffer 8018. The outputs of the input buffers 8010, 8012, 8014, 8016, and 8018 are connected to the inputs of the multiplexer 8030. The output of the multiplexer 8030 is connected to the ADC8038 via the buffer 8032.

[0034] Operation of the First Embodiment In the first embodiment, the leakage impedance and the series impedance are measured during the open / short calibration [Fig. 2], [Fig. 3], and [Fig. 8].

[0035] The first embodiment can also use a guard to reduce the voltage between the cable shield and the midpoint. In this case, all the equations are the same. The only difference is that the leakage impedance is high. Leakage Calibration and Correction

[0036] [Fig. 2] shows the method for measuring the leakage impedance. The method includes the following. Remove the DUT and set the fixture to the open state, Apply a predetermined voltage through a range register of a predetermined impedance, Measure the voltage of the open fixture, To eliminate the influence of the open fixture, set the same voltage on the HP terminal and the LP terminal, and adjust to obtain the closest value of these voltages with a predetermined number of repetitions to reduce the current passing through the open fixture, Measure the leakage impedance and the voltage of the range register, Calculate the leakage impedance.

[0037] To set the required voltage on the HP terminal, use the methods of equations 22 and 23 to calculate the value of the input signal of the first voltage source.

[0038] For leakage impedance measurement, switch 3018 needs to connect the second terminal of the range register to the second voltage source 1022.

[0039] [Equation 5] Leakage impedance Zleak = Vlp * Zrange / (Vlc - Vrr) All values are complex numbers.

[0040] When measuring the parameters of the DUT, the leakage impedance is used to calculate the leakage current and to compensate for its effect by subtracting the current value through the range register from the current value through the leakage impedance (Equations 12 - 14).

[0041] Calibration of series impedance [Figure 3] shows a method for measuring the series impedance including the output impedance of the first voltage source 1002 and the impedance of the wire between the DUT and the low - current terminal 3011. These impedances are necessary for calculating a precise sub - balanced voltage. These impedances are measured due to the fixtures used. To measure and calculate the series impedance, both the open - circuit and short - circuit states of the measurement circuit are required. In the calibration process, all voltage sets measured in both the open and short - circuit states are saved and used for the calculation of the series impedance.

[0042] [Equation 6] Current change of the first voltage source dI=(Vlc_short - Vrr_short) / Zrange + Vlp_short / Zleak

[0043] [Equation 7] Output impedance of the first voltage source Zout1=(Vhp_open - Vhp_short) / dI

[0044] [Equation 8] Impedance of the wire between the DUT and the LP terminal Zwire2=(Vlp_short-Vlc_short) / dI All values are complex numbers.

[0045] Sub-balancing method The first embodiment includes TIA3014 and performs instantaneous analog automatic balancing. However, the TIA has insufficient gain at high frequencies and cannot make the automatic balancing voltage approximately zero.

[0046] [Equation 9] The gain of the operational amplifier used as TIA, G_opamp=-Vrr / Vlp

[0047] [Equation 10] and the input voltage Vlp=-Vrr / G_opamp This voltage strongly depends on the gain of TIAG_opamp. This voltage is the residual imbalance voltage. However, if a voltage equal to the residual imbalance voltage but with the opposite polarity is applied to the non-inverting input of the TIA instead of the zero voltage, the voltage at the inverting input becomes approximately zero. This is "simple sub-balancing".

[0048] [Equation 11] A more accurate sub-balancing voltage, Vsb=(Vrr-Vlp)*(G_opamp+1) / (G_opamp)^2

[0049] This is the "medium sub-balancing" method. This method takes into account increasing the current through the range register after applying the sub-balancing voltage.

[0050] A detailed description of "accurate sub-balancing" is given below. The start conditions of the first embodiment [Figure 8] are as follows. The first voltage source 1002 provides an excitation voltage. The switch 3012 connects the non-inverting input of the TIA3014 to ground. The switch 3018 connects the second terminal of the range register 1018 to the output of the TIA. The second voltage source 1022 provides a predetermined voltage Vsb3016. When there is no load, the voltage of the second voltage source is equal to the electromotive force (EMF).

[0051] After all input voltages are measured, the required sub-balancing voltage is calculated and applied to the non-inverting input of the TIA for more accurate balancing (Equations 12 to 23).

[0052] [Equation 12] New current through the range register, Irange=(Vlc-Vrr) / Zrange

[0053] [Equation 13] Current through the leakage impedance, Ileak=-Vlp / Zleak

[0054] [Equation 14] Current through the DUT, Idut=Irange-Ileak

[0055] [Equation 15] Rough impedance of the DUT, Zdut=(Vhp-Vlp) / Idut

[0056] [Equation 16] Gain of the op-amp used as the TIA, G_opamp=-Vrr / Vlp

[0057] [Equation 17] Electromotive force (EMF) of the first voltage source, EMF1=Vhp+Idut*Zout1

[0058] [Equation 18] New current through the DUT (after Vlp = 0), Idut_New=EMF1 / (Zdut+Zout1)

[0059] [Equation 19] New current through the range register for accurate balancing, Irange_New=Idut_New

[0060] [Equation 20] New voltage of the range register, Vrr_New = -Irange_New * (Zwire2 + Zrange)

[0061] [Equation 21] Electromotive force (EMF) of the second voltage source without load Vsb_New = Vrr_New / G_opamp

[0062] [Equation 22] Correction coefficient of the electromotive force (EMF) of the second voltage source CorrCoeff = Vsb_New / Vsb

[0063] [Equation 23] New value of the digital signal 8046 of the second voltage source S2_New = CorrCoeff * S2 All values are complex numbers.

[0064] Calculating the correction coefficient (CorrCoeff) as the relationship between the old and new EMFs is an implicit replacement for the explicit calculation of the frequency response of the low-pass filter (LPF). [Figure 7] shows an example of the high-order LPF amplitude and phase frequency response of an LCR meter with a maximum signal frequency of 1 MHz and a sampling frequency of 3 Msps. By calculating the correction coefficient, the need for calibration of the LPF with a very steep slope at high frequencies can be eliminated.

[0065] After applying the new digital signal S2_New8046 and connecting the non-inverting input of the TIA to the second voltage source, the accurate DUT impedance can be measured. After measuring the voltage under balanced conditions, the calculation of the DUT parameters is repeated using equations 12 to 15.

[0066] Low-level processing In the first embodiment, a structure that uses one ADC and a 5-channel multiplexer to switch the voltage channels is adopted to reduce costs. [Figure 4] shows the input voltage, and [Figure 5] shows the voltage at the ADC input.

[0067] The channels of the multiplexer generate crosstalk noise, and the noisy time intervals after switching of the multiplexer need to be excluded from the ADC signal processing. [Fig. 6] shows the noisy time intervals and the appropriate time intervals.

[0068] According to the Nyquist theorem, the sampling frequency must be at least twice the signal bandwidth. To measure the vector voltage directly by discrete Fourier transform (DFT), at least one period of the signal frequency is required. Therefore, the minimum vector voltage measurement time is limited by one period of the signal frequency and at least three ADC samples for each measured voltage. Therefore, all voltages must be measured simultaneously [Fig. 5], and at least three sample groups are required. Equations 24 to 28 describe the conditions for low and medium frequencies when the minimum measurement time is required.

[0069] [Equation 24] Sampling period, Tsample = 1 / Fsample

[0070] [Equation 25] Signal period, Tsignal = 1 / Fsignal

[0071] [Equation 26] Buffer time interval, Tbuffer = Tsample * BufferSize

[0072] [Equation 27] Sample group interval, Tsmpl_gr = Tbuffer * Nchannels

[0073] [Equation 28] Minimum measurement time, Tmeas_Minimum = Tsignal = M * Tsmpl_gr (M ≥ 3) All values are complex numbers.

[0074] BufferSize, Nchannels, and M are integers. BufferSize is the size of the direct memory access (DMA) buffer, Nchannels is the number of voltage channels, and M is the number of sample groups.

[0075] [Figure 9] shows the signal processing of the first embodiment in more detail. The processor 8048 performs low-level processing of the instantaneous digital values of the input and output voltages and high-level processing of the digital representations of these voltages, and calculates the results with the control and processing core 9016.

[0076] The low-level processing includes the following. A direct digital synthesizer 9014, A first 9002 and a second 9004 memory buffer set for storing samples of the input and output voltages and reference values, Multipliers 9008 and 9010 for direct Fourier transform (DFT), A demultiplexer and accumulator 9012 for separating input voltage samples from different voltage channels and accumulating them in the DFT process, An interface for transferring digital signals S1 and S2 to the DACs 8042 and 8046, An interface for transmitting digital signals from the ADC 8038 to the memories 9002 and 9004. To speed up the processing, direct memory access (DMA) is used to transfer data from the memory to the DACs 8036 and 8040 and from the ADC 8038 to the memory buffers 9002 and 9004.

[0077] [Figure 10]'s flowchart shows the data processing flow. First, the data from the ADC and the reference data already filled in the previous DMA cycle are processed. These data are used for the DFT. Next, the data for the next DMA cycle are prepared. These data are used for the DAC and the DFT. The reference data are filled with DAC data to save the time of the DFT process.

[0078] This process is described in terms of implementation on a processor, but it can also be implemented on a microcontroller, DSP, FPGA, ASIC, and other hardware.

Industrial Applicability

[0079] The present invention can be used in any industry where impedance measurement is required. The current invention reduces the manufacturing cost at the same accuracy and frequency range, or improves the accuracy to expand the frequency range of the device. List of Prior Art Documents

[0080] The list of prior art documents is as follows.

Table 1

Claims

【Claim 1】 A sub - balancing method, a high - current (HC) terminal, a high - potential (HP) terminal, a low - potential (LP) terminal, a low - current (LC) terminal, a fixture for connecting to a device under test (DUT), a set of reference resistors having first and second terminals, wherein the first terminal is connected to the LC terminal, a first voltage source, wherein the output of the first voltage source is connected to the HC terminal, a second voltage source having an output, measuring means for measuring the voltages at the HP terminal, the LP terminal, the LC terminal, the second terminal of the set of reference resistors, and the output of the second voltage source, a trans - impedance amplifier (TIA) having an inverting input, a non - inverting input, and an output, wherein the inverting input is connected to the LP terminal and the output of the TIA is connected to the second terminal of the set of reference resistors, a switch for connecting the non - inverting input of the TIA to either ground or the output of the second voltage source, providing an LCR meter having a processor, attaching the fixture to the DUT, connecting the fixture to the HC terminal, the HP terminal, the LP terminal, and the LC terminal, connecting the non - inverting input of the TIA to ground by the switch, setting the set of reference resistors to a predetermined impedance, setting the output of the first voltage source to a predetermined voltage on the output of the first voltage source, setting the output of the second voltage source to a predetermined voltage on the output of the second voltage source, measuring the voltages at the HP terminal, the LP terminal, the LC terminal, the second terminal of the set of reference resistors, and the output of the second voltage source, calculating a sub - balancing voltage that produces a zero voltage at the LP terminal when it must be applied to the non - inverting input of the TIA, setting the output of the second voltage source to the sub - balancing voltage on the output of the second voltage source, connecting the non - inverting input of the TIA to the output of the second voltage source by the switch, Measuring the voltage at the second terminal of the set of the HP terminal, the LP terminal, the LC terminal, and the reference resistor in a state where the sub-balanced voltage is applied to the non-inverting input of the TIA; A method including calculating an impedance value of the DUT.

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