Parts for semiconductor manufacturing equipment and method for manufacturing the same

Abstract

The present invention relates to a component for a semiconductor manufacturing apparatus and a heat-resistant material. The component for a semiconductor manufacturing apparatus according to the present invention includes a plurality of layers of steps on a cross section, and the plurality of layers include a first surface exposed to plasma and a second surface placed on the semiconductor manufacturing apparatus.

Description

Technical Field

[0001] The present invention relates to a component for a semiconductor manufacturing apparatus and a method for manufacturing the same.

Background Art

[0002] Generally, dry etching used in semiconductor manufacturing processes includes plasma etching that uses a gaseous etching gas and plasma. In this process, after introducing the etching gas into the reaction chamber and ionizing it, the gas is accelerated on the surface of the wafer to physically and chemically remove the uppermost layer of the wafer surface. Since it is easy to adjust etching, has high productivity, and can form fine patterns on the order of several tens of nanometers, it is widely used.

[0003] Actually, when viewed based on the wafer on which etching is performed, it is essential to apply a uniform high-frequency having a uniform energy distribution over the entire surface of the wafer. Applying a uniform energy distribution when applying such a high-frequency cannot be achieved only by adjusting the output of the high-frequency. To solve this problem, it depends greatly on the form of the stage and the anode as the high-frequency electrode used to apply the high-frequency to the wafer, and the etching ring that substantially functions to fix the wafer. The etching ring prevents the diffusion of plasma in the reaction chamber of a dry etching apparatus under severe conditions where plasma exists, and serves to limit the plasma around the wafer on which the etching process is performed.

[0004] Generally, when producing a material by the CVD method, a plurality of vapor deposition layers are laminated for production. Although the plasma resistance is excellent compared to a material produced by the sintering method and containing compact pores, there is a problem that the workability deteriorates.

[0005] In particular, in the case of a complex shape with a plurality of steps, precise processing is difficult, the processing time increases, the productivity decreases, and the cost increases.

[0006] In addition, when the boundaries of multiple vapor deposition layers are exposed through processing, there are problems such as non-uniform plasma etching at the laminated boundaries and the induction of particle generation.

[0007] Therefore, among semiconductor manufacturing processes, technologies for minimizing particle generation and improving product processability in components used in plasma etching processes, particularly in the manufacturing method of etch rings for use in semiconductor processes, still remain as areas that require core development to reduce the production cost of semiconductor products.

Summary of the Invention

Problems to be Solved by the Invention

[0008] The present invention is for solving the above-mentioned problems, and an object of the present invention is to provide a component for a semiconductor manufacturing apparatus and a manufacturing method thereof that can minimize processing steps that consume a lot of time in manufacturing semiconductor manufacturing equipment components and improve productivity. Another object of the present invention is to prevent particle generation due to non-exposure of the boundary surface in the plasma etching process.

[0009] However, the problems to be solved by the present invention are not limited to those mentioned above, and further problems not mentioned can be clearly understood by those skilled in the art from the following description.

Means for Solving the Problems

[0010] The component for a semiconductor manufacturing apparatus of the present invention has a plurality of steps in cross-section, and the plurality of layers include a first surface exposed to plasma and a second surface placed on the semiconductor manufacturing apparatus.

[0011] The first surface may be the same laminated surface.

[0012] The plasma resistance of the first surface is greater than that of the second surface, and the cross-section can include a laminated surface formed by laminating along the first surface.

[0013] The same surface of the plurality of layers can include grains with a size deviation of ±10% from the average value.

[0014] The first surface may be an inclined surface exposed to plasma, and the second surface may be a base surface.

[0015] The first surface may be a CVD substrate surface, and the second surface may be a CVD growth surface.

[0016] The component is formed by CVD growth from the first surface.

[0017] Grains on the same surface among the plurality of layers can have a size within ±10% of the average grain size.

[0018] The grain size of the first surface may be smaller than that of the second surface.

[0019] The component for the semiconductor manufacturing apparatus is an etching component, and the first surface may include a step and be a wafer placement surface.

[0020] The component may be made of SiC or B4C as a plasma-resistant material.

[0021] The component may be a component in which the boundary of the vapor deposition layer is not exposed to plasma.

[0022] The method for manufacturing a component for a semiconductor manufacturing apparatus according to the present invention includes a step of preparing a base material, a step of forming a vapor deposition layer containing SiC or B4C so as to surround the base material, a step of processing the vapor deposition layer, and a step of removing the base material to obtain a component for a semiconductor manufacturing apparatus containing at least one or more SiC or B4C.

[0023] The base material can contain a carbon-based substance.

[0024] The vapor deposition layer can be formed by CVD growth from a first surface in contact with the base material to a second surface which is the surface to be processed.

[0025] The plasma resistance of the first surface is greater than that of the second surface.

[0026] The first surface may be an inclined surface exposed to plasma, and the second surface may be a base surface.

[0027] The grain size of the first surface is smaller than that of the second surface.

[0028] The base material has an up-and-down symmetric shape, and the component for a semiconductor manufacturing apparatus containing one or more SiC or B4C may have the same shape.

[0029] The component for a semiconductor manufacturing apparatus is an etching component, and the base material can include steps on the upper surface and the lower surface.

Advantages of the Invention

[0030] The component for a semiconductor manufacturing apparatus according to an embodiment of the present invention is excellent in plasma resistance because the surface exposed to plasma is formed as the same surface even when laminated by the CVD method, so the etching rate by plasma can be reduced. Therefore, since the life of the component for a semiconductor manufacturing apparatus is extended and the replacement cycle of the component is increased, the replacement cost of the component for a semiconductor manufacturing apparatus can be saved.

[0031] In addition, since the replacement cycle of the component for a semiconductor manufacturing apparatus becomes longer, the interruption of the etching process can be reduced and the productivity of the semiconductor plasma etching process can be improved.

[0032] According to a manufacturing method of a component for a semiconductor manufacturing apparatus according to an embodiment of the present invention, in the manufacturing process of the component for a semiconductor manufacturing apparatus, some of the conventional processing steps can be omitted, so that the processability is improved, and ultimately the production cost of semiconductor products can be reduced. In addition, since at least one or more components for a semiconductor manufacturing apparatus can be obtained in a single step, the manufacturing process is shortened, and an effect of improving the production efficiency of the components for a semiconductor manufacturing apparatus is expected.

[0033] Further, according to an embodiment of the present invention, an effect that particles are not generated can be obtained because the interface is not exposed in the plasma etching process.

Brief Description of the Drawings

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Embodiments for Carrying Out the Invention

[0035] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description of the present invention, when it is determined that a specific description of a related known function or configuration makes the gist of the present invention unnecessarily ambiguous, the detailed description thereof will be omitted. Also, the terms used in this specification are used as terms for appropriately expressing preferred embodiments of the present invention, and these may vary depending on the intention of the user, operator, or the convention in the field to which the present invention belongs. Therefore, the definitions of these terms must be made based on the content throughout this specification. The same reference numerals presented in each drawing indicate the same members.

[0036] Throughout the specification, when any member is located "above" a different member, this includes not only the case where any member is in contact with a different member, but also the case where there is a further member between the two members.

[0037] Throughout the specification, when any part "includes" any component, this means that it further includes other components rather than excluding other components.

[0038] Hereinafter, embodiments and drawings will be specifically referred to for parts for a semiconductor manufacturing apparatus of the present invention and a manufacturing method thereof. However, the present invention is not limited to such embodiments and drawings.

[0039] The parts for a semiconductor manufacturing apparatus of the present invention include steps between a plurality of layers (between a plurality of layers) in cross-section, and the plurality of layers include a first surface exposed to plasma and a second surface placed on the semiconductor manufacturing apparatus.

[0040] The component for a semiconductor manufacturing apparatus of the present invention relates not to the semiconductor itself but to a part of an apparatus for manufacturing a semiconductor. That is, it relates to a component of an apparatus for manufacturing a semiconductor.

[0041] The component for a semiconductor manufacturing apparatus according to an embodiment of the present invention has excellent plasma resistance, so that the etching rate by plasma can be reduced. Therefore, the life of the component for a semiconductor manufacturing apparatus can be extended, the replacement cost of the component for a semiconductor manufacturing apparatus can be saved, the interruption of the etching process associated with the component for a semiconductor manufacturing apparatus can be reduced, and the productivity of the etching process can be improved. Further, according to the present invention, since no particles are generated because the interface is not exposed in the plasma etching process, problems in the process due to particles can be solved.

[0042] FIG. 1 is a cross-sectional view of a component for a semiconductor manufacturing apparatus according to an embodiment of the present invention.

[0043] Referring to FIG. 1, a component 100 according to an embodiment of the present invention includes a first surface 110 and a second surface 120.

[0044] According to an embodiment, there is a difference in plasma resistance between the first surface 110 and the second surface 120, and this difference causes a difference in the tendency of etching with respect to plasma. Therefore, the plasma resistance of the first surface 110, which is the periphery of the wafer where the etching process is performed in a semiconductor manufacturing apparatus under severe conditions where plasma exists, for example, in the reaction chamber of a dry etching apparatus, is greater than that of the second surface 120, and the life of the component for a semiconductor manufacturing apparatus can be extended.

[0045] According to one embodiment, the first surface may be the same lamination surface. If the first surface exposed to the plasma environment includes the boundary of lamination because it is not the same lamination surface (the same vapor deposition surface), particles may be generated from the boundary of the corresponding lamination. In contrast, the component for a semiconductor manufacturing apparatus of the present invention has the first surface exposed to the plasma environment being the same lamination surface (the same vapor deposition surface) and not including the boundary of lamination, so that the generation of particles or the generation of defective parts is reduced and the plasma resistance characteristics are further improved.

[0046] The first surface 110 may be an inclined surface exposed to plasma, and the second surface 120 may be a base surface. The inclined surface exposed to the plasma means the surface exposed to the plasma generated in the semiconductor manufacturing apparatus when the component 100 is mounted. The base surface is the surface on which the component 100 is processed after being grown by chemical vapor deposition (CVD) and then mounted on the manufacturing apparatus.

[0047] In particular, since the component 100 is formed in a chemical vapor deposition process, it may have sufficient corrosion resistance and strength and have a homogeneous surface without pores. Also, the component 100 may be made of SiC (Silicon carbide) or B4C (Boron Carbide) as a plasma-resistant material.

[0048] According to one embodiment, the first surface is an inclined surface exposed to plasma, the second surface is a base surface, the first surface may be a CVD base material surface, and the second surface may be a CVD growth surface.

[0049] The CVD base material surface is the surface on which the deposition of the component 100 is started by CVD. The CVD growth surface is the surface on which the material grows through the deposition of the component 100 by CVD.

[0050] According to one embodiment, the component 100 is formed by CVD growth from the first surface 110.

[0051] According to one embodiment, the first surface 110 is a non-form-processed surface (particularly, a surface that does not form a shape according to intention) without processing for substantially deforming the shape. The non-form-processed surface means that some processes such as planarization are performed, but there is no processing for substantially changing the form.

[0052] The first surface 110 may be a non-form-processed surface that has not been form-processed and on which deposition is started by CVD.

[0053] The plasma resistance of the first surface may be greater than that of the second surface, and may include a laminated surface formed by laminating along the first surface.

[0054] FIG. 2 is a cross-sectional view exemplarily showing a laminated surface of a component for a semiconductor manufacturing apparatus according to an embodiment of the present invention.

[0055] Referring to FIG. 2, a component for a semiconductor manufacturing apparatus according to an embodiment of the present invention is formed by laminating SiC along the first surface 110. On the cross-section, a plurality of lamination boundaries 130, 130', 130'' indicate lamination lines bent according to the shape of the first surface.

[0056] The laminated surface of the component for the semiconductor manufacturing apparatus may be laminated such that each layer is parallel to the laminated surface of the component for the semiconductor manufacturing apparatus.

[0057] Referring to FIG. 2, since the plasma-resistant surface is formed of the same deposition surface, it has uniform etching characteristics, and thus the etching degree is also uniform. When the boundary where different deposition surfaces are in contact is exposed, particles are easily generated at the corresponding boundary portion by plasma. If the corresponding location is etched relatively, continuous etching concentration will occur and trigger a decrease in overall physical properties. However, according to the present invention, since there is no boundary of the deposition surface on the plasma-resistant surface, the generation of the above-mentioned particles, etching concentration, and acceleration can be prevented.

[0058] The same vapor deposition surface as meant in the present invention means a vapor deposition surface showing the same degree of transmittance. The transmittance is the degree to which light passes through the material layer, and is the value obtained by dividing the intensity of the light emerging from passing through the material layer by the intensity of the incident light on the material layer. The transmittance can be measured in various ways, but is measured with a test piece fabricated to a thickness of 3 mm, using a light source with a luminous intensity of 150 Lux or more and with the distance between the test piece and the light source within 7 cm.

[0059] The test piece is fabricated to a thickness of 2 mm, and for a test piece fabricated to 2 mm, a clear same vapor deposition surface can be confirmed when confirmed with a photograph or video. When the test piece is fabricated to a thickness of 1 mm, a clearly same vapor deposition surface can be confirmed when confirmed with the naked eye. Since the transmittance can vary depending on the thickness or the light source and the distance between the test piece and the light source, it is considered as a relative value when having the same thickness.

[0060] According to one embodiment, the laminated surface may include a curved surface.

[0061] According to one embodiment, the same surface of the plurality of layers may include grains with a size deviation of ±10% from the average value. The grain size is the average diameter of the grains. As going to the laminated surface laminated from the first surface 110 to the above-mentioned second surface 120, the grain size gradually becomes larger or becomes similar.

[0062] According to one embodiment, the same surface of the plurality of layers may include grains with a size deviation of ±10% from the average value. According to one embodiment, the grain size of the first surface 110 is smaller than the grain size of the second surface 120.

[0063] Since each layer is formed in the same vapor deposition process, the surface of each layer may include grains with a size deviation of ±10% from the average value.

[0064] FIG. 3 is a cross-sectional view exemplarily showing the grain sizes of the first surface and the second surface according to one embodiment of the present invention.

[0065] Referring to FIG. 3, the grain size of the first surface 110 is relatively small and compactly deposited while the raw material is deposited by CVD method and the material of the component begins to grow. As the deposition progresses, that is, as it goes towards the second surface 120, the grain size of SiC gradually increases. Therefore, the component 100 has a plurality of stacked surfaces repeatedly formed, and the same stacked surface has the same grain size.

[0066] In one embodiment, there is a difference in the grain size of SiC between the first surface 110 and the second surface 120, and a difference in the etching tendency with respect to the plasma occurs. For example, the first surface 110 of SiC with a small and compact grain size around the wafer where the etching process is performed in the reaction chamber of a semiconductor manufacturing apparatus, such as a dry etching apparatus, has a smaller grain size than the second surface 120 and can reduce the etching rate of being etched by the plasma. That is, the smaller the grain size, the greater the plasma resistance, and the larger the grain size, the smaller the plasma resistance.

[0067] According to one embodiment, the component for the semiconductor manufacturing apparatus is an etch ring, the first surface includes a step, and is a placement surface of the wafer. The etch ring fixes the wafer in the reaction chamber of the semiconductor manufacturing apparatus to prevent the diffusion of the plasma, and causes the plasma to concentrate around the wafer where the etching process is performed. The first surface 110 with a small grain size of the etch ring is exposed to the plasma, and the etching rate at which the etch ring is etched by the plasma can be reduced. Therefore, the life of the etch ring can be extended, the replacement cost of the etch ring can be saved, the interruption of the etching process due to the replacement of the etch ring can be reduced, and the productivity of the etching process can be improved.

[0068] According to one embodiment, the component for the semiconductor manufacturing apparatus may be an electrode in addition to etching. The electrode is used in a plasma etching apparatus, is provided with a plurality of holes, and serves to evenly disperse the etching gas supplied from the outside into the plasma etching apparatus and supply it to the inside of the plasma etching apparatus. On the lower side of the electrode, the supplied etching gas is plasmaized to etch a specific thin film on the substrate. Therefore, since the bottom surface of the electrode is in contact with the plasma, when the electrode according to one embodiment of the present invention is used, the etching rate at which the electrode is etched by the plasma can be reduced, and the life of the electrode can be extended. Since the bottom surface of the electrode is in contact with the plasma, when the electrode according to one embodiment of the present invention is used, the etching rate at which the electrode is etched by the plasma can be reduced, and the life of the electrode can be extended.

[0069] The component may be made of SiC or B4C as a plasma-resistant material. According to one embodiment, the component for the semiconductor manufacturing apparatus is used as a component applicable to the formation of various components of a dry etching apparatus for semiconductor manufacturing applied to an environment where SiC or B4C such as an etching, an electrode, and various suscepts are exposed to plasma. Further, the component is a component in which the boundary of the vapor deposition layer is not exposed to the plasma.

[0070] The method for manufacturing a component for a semiconductor manufacturing apparatus of the present invention includes the steps of preparing a base material; forming a vapor deposition layer containing SiC or B4C so as to surround the base material; processing the vapor deposition layer; and removing the base material to obtain a component for a semiconductor manufacturing apparatus containing at least one or more SiC or B4C.

[0071] The method for manufacturing a component for a semiconductor manufacturing apparatus according to one embodiment of the present invention can omit a part of the conventional processing steps in the manufacturing process of the component for a semiconductor manufacturing apparatus, improving the workability and ultimately saving the production cost of semiconductor products. In addition, since at least one or more components for a semiconductor manufacturing apparatus can be obtained in a single process, it is expected that the manufacturing process will be shortened and the production efficiency of the components for a semiconductor manufacturing apparatus will be improved.

[0072] Figures 4 to 7 are schematic diagrams showing the manufacturing process of parts for a semiconductor manufacturing apparatus according to an embodiment of the present invention. Referring to Figures 4 to 7, the manufacturing process of parts for a semiconductor manufacturing apparatus according to an embodiment of the present invention includes a base material preparation step (Figure 4), a deposition layer formation step (Figure 5), a deposition layer processing step (Figure 6), and a part acquisition step (Figure 7).

[0073] Referring to Figure 4, the base material preparation step is a step of preparing the base material 200.

[0074] According to an embodiment, the base material 200 includes a carbon-based substance. The base material 200 may include, for example, graphite, carbon black, etc. Any material may be used as long as it is a carbon-based material on which a deposited substance such as SiC or B4C is well and uniformly deposited on the surface. Preferably, a material that can be easily separated from a deposited layer of a substance such as SiC or B4C is preferred.

[0075] According to an embodiment, the form of the base material 200 is not particularly limited as long as a deposited layer of a deposited substance such as SiC or B4C can be formed uniformly on the upper and lower portions. However, considering the structure of the deposition chamber in which a deposited substance such as SiC or B4C can be deposited, the form of the base material may be formed in a ring shape for the formation of a deposited layer of a deposited substance such as SiC or B4C uniformly on the base material.

[0076] Referring to Figure 5, the deposition layer formation step is a step of forming the SiC or B4C deposition layer 100a so as to surround the base material 200. A uniform SiC or B4C deposition layer can be formed not only on the upper and lower portions of the base material 200 but also on the side surface.

[0077] According to one embodiment, when the vapor deposition layer 100a is SiC, the source gas may be a gas containing at least any one selected from the group consisting of CH3SiCl3, (CH3)2SiCl2, (CH3)3SiCl, (CH3)4Si, and CH3SiHCl2, or SiCl4 gas containing at least any one selected from the group consisting of CH4, C3H8, C6H14, C7H8, and CCl4. When the vapor deposition layer 100a is B4C, the source gas may contain at least any one selected from the group consisting of BCl3, B2H6, BF3, CH4, C2H6, and C3H8.

[0078] According to one embodiment, the step of forming the vapor deposition layer is performed at a vapor deposition temperature of 1000°C to 1900°C, and the film formation rate can be set to 20 μm / h to 400 μm / h.

[0079] According to one embodiment, when the temperature of the vapor deposition layer forming step is less than 1000°C, the temperature is extremely low and an amorphous phase is included, the plasma resistance characteristics rapidly decrease, and the vapor deposition layer formation rate decreases, resulting in a problem in productivity. When the temperature of the vapor deposition layer forming step exceeds 1900°C, problems such as peeling occur in the vapor deposition layer, resulting in problems in the vapor deposition quality. When the film formation rate is less than 20 μm / hour, the vapor deposition layer formation rate is low, resulting in a problem in productivity. When the film formation rate exceeds 400 μm / hour, there is a problem that homogeneous vapor deposition cannot be performed, such as pores existing between the base material and the vapor deposition layer due to an excessively high speed.

[0080] According to an embodiment, the vapor deposition layer is formed by chemical vapor deposition (CVD) growth from a first surface in contact with the base material to a second surface which is the surface to be processed. The first surface and the second surface are the same as the first surface 110 and the second surface 120 shown in the cross-sectional view of the component 100 for a semiconductor manufacturing apparatus according to an embodiment of the present invention in FIG. 1. Since the SiC or B4C vapor deposition layer is formed by chemical vapor deposition method, it can have a homogeneous surface without pores. Therefore, due to the chemical properties of SiC and B4C materials, it is excellent in strength and corrosion resistance, and has the characteristic that the etching rate for plasma is low due to the excellent surface homogeneity in the manufacturing method.

[0081] Referring to FIG. 6, in the vapor deposition layer 100a processing step, it is for easily securing the SiC or B4C vapor deposition layer 100a surrounding the base material 200 as a component for a semiconductor manufacturing apparatus, and it is processed into a component shape.

[0082] Referring to FIG. 7, in the component acquisition step, the base material 200 can be removed to obtain the component 100 for a semiconductor manufacturing apparatus including one or more SiC or B4C. After the SiC or B4C vapor deposition layer surrounding the base material is processed, the base material and the component for the semiconductor manufacturing apparatus can be easily separated.

[0083] According to an embodiment, when the base material 200 is removed, since one surface of the base material is formed to correspond to the shape of the component, the SiC or B4C surface in contact with and laminated on the base material becomes the shape of one surface of the component. Therefore, the processing step for changing the form can be omitted, and the number of processing steps for the whole component can be reduced. That is, the form of the corresponding surface is determined in the vapor deposition process on the base material, and there is no need to change its form by additional processing.

[0084] According to one embodiment, the plasma resistance of the first surface may be greater than that of the second surface. There is a difference in plasma resistance between the first surface and the second surface in SiC or B4C, and this difference can cause a difference in the etching tendency with respect to plasma. Therefore, the first surface, which is the periphery of the wafer where etching treatment is performed in a reaction chamber of a semiconductor manufacturing apparatus under harsh conditions where plasma exists, such as a dry etching apparatus, has greater plasma resistance than the second surface, and the life of the component for the semiconductor manufacturing apparatus can be extended.

[0085] According to one embodiment, the first surface may be an inclined surface exposed to plasma, and the second surface may be a base surface. The inclined surface exposed to the plasma may be a surface near the surface on which a wafer or the like is placed as the surface exposed to the plasma generated in the semiconductor manufacturing apparatus. The base surface is the surface that is post-processed after SiC or B4C is grown by chemical vapor deposition (CVD).

[0086] The first surface is a CVD base material surface, the second surface is a CVD growth surface, and the component is formed by CVD growth from the first surface.

[0087] Among the laminated surfaces, the grains on the same surface may have a size within ±10% of the average value of the grain size.

[0088] According to one embodiment, the grain size of the first surface may be smaller than the grain size of the second surface. The grain size of the first surface and the grain size of the second surface are as described with reference to FIG. 2. The grain size of the first surface is relatively small when SiC or B4C starts to grow and is deposited compactly. As the deposition proceeds, that is, as it goes to the second surface, the grain size of SiC or B4C becomes larger. There is a difference in the grain size of SiC or B4C between the first surface and the second surface, and a difference in the etching tendency with respect to the plasma occurs. The first surface with a small and compact grain size of SiC or B4C around the wafer on which the etching process is performed in the reaction chamber of a semiconductor manufacturing apparatus, for example, a dry etching apparatus, has a smaller grain size than the second surface, and the etching rate etched by the plasma can be reduced. That is, the smaller the grain size, the greater the plasma resistance, and the larger the grain size, the smaller the plasma resistance.

[0089] According to one embodiment, the size of the crystal grains is measured using the Scherrer equation based on the full width at half maximum (FWHM) of the preferred growth peak in X-ray diffraction analysis.

[0090] The full width at half maximum means the full width at half maximum of the preferred growth peak appearing in X-ray diffraction analysis, and the Scherrer equation means the equation represented by Equation 1.

[0091] [Equation 1] Scherrer equation: Grain size (nm) = 0.9 × (λ / (B × cosθ))

[0092] Here, λ is the measurement wavelength of X-ray diffraction analysis, B is the full width at half maximum (rad) of the preferred growth peak, and θ means the angle value (rad) of the preferred growth peak.

[0093] According to one embodiment, the base material has an up-and-down symmetric shape, and the component for a semiconductor manufacturing apparatus containing the one or more SiC or B4C has the same shape. The base material has an up-and-down symmetric shape of the component for a semiconductor manufacturing apparatus to be obtained, and one or more components for a semiconductor manufacturing apparatus containing SiC or B4C after SiC or B4C vapor deposition layer processing surrounding the base material can be formed.

[0094] According to one embodiment, among the components for a semiconductor manufacturing apparatus, the surface exposed by removing the base material is not processed. Since the surface exposed by removing the base material has a small grain size, it has excellent plasma resistance and can be used without processing.

[0095] According to one embodiment, in the step of processing the vapor deposition layer, the surface of the vapor deposition layer that does not contact the base material can be processed. Among the vapor deposition layer, since the surface that does not contact the base material has a large grain size, even if it is processed due to a somewhat lower plasma resistance compared to the surface with a small grain size, it does not matter.

[0096] According to one embodiment, the component for a semiconductor manufacturing apparatus is an edge ring, the base material includes steps on the upper surface and the lower surface, the component for a semiconductor manufacturing apparatus is an edge ring, the first surface includes steps, and it is a mounting surface for a wafer.

[0097] The component for a semiconductor manufacturing apparatus can be used as a component applicable to the formation of various components of a dry etching apparatus for semiconductor manufacturing applied to an environment exposed to plasma containing SiC or B4C, such as not only edge rings but also various electrodes and susceptors.

[0098] Figs. 8 to 11 are schematic views showing the manufacturing process of parts for a semiconductor manufacturing apparatus according to another embodiment of the present invention. Referring to Figs. 8 to 11, parts for a semiconductor manufacturing apparatus of the present invention can be manufactured in the same manner using a non-symmetrical base material. It is the same manner as that described with reference to Figs. 4 to 7, but since the base material is not located between two parts as shown in Figs. 4 to 7, parts cannot be obtained on both sides with the base material as the center. However, the same advantages are expected to be obtained by removing the base material and using the unformed processed surface directly for an inclined surface or the like that is exposed to the plasma.

[0099] As described above, although the embodiments have been described by way of limited embodiments and drawings, those having ordinary knowledge in the art can make various modifications and variations from the above description. For example, the described technology may be executed in a different order from the described method, and / or the described components may be combined or assembled in a different form from the described method, or may be replaced or substituted by other components or equivalents to achieve appropriate results. Therefore, the scope of the present invention is not defined by being limited to the disclosed embodiments, but is defined by the claims and those equivalent to the claims.

Claims

1. A component for a semiconductor manufacturing apparatus, wherein the component includes a plurality of layers of steps in cross-section, and the plurality of layers include a first surface exposed to plasma and a second surface mounted on the semiconductor manufacturing apparatus, a component for a semiconductor manufacturing apparatus.

2. The component for a semiconductor manufacturing apparatus according to claim 1, wherein the first surface is the same laminated surface.

3. The component for a semiconductor manufacturing apparatus according to claim 1, wherein the plasma resistance of the first surface is greater than the plasma resistance of the second surface, and the cross-section includes a laminated surface formed by laminating along the first surface.

4. The component for a semiconductor manufacturing apparatus according to claim 1, wherein the same surface of the plurality of layers includes grains with a size deviation of ±10% from the average value.

5. The component for a semiconductor manufacturing apparatus according to claim 1, wherein the first surface is an inclined surface exposed to plasma and the second surface is a base surface.

6. The component for a semiconductor manufacturing apparatus according to claim 1, wherein the first surface is a CVD substrate surface and the second surface is a CVD growth surface.

7. The component for a semiconductor manufacturing apparatus according to claim 1, wherein the component is formed by CVD growth from the first surface.

8. The component for a semiconductor manufacturing apparatus according to claim 1, wherein the grains on the same surface of the plurality of layers have a size within ±10% of the average grain size.

9. The component for a semiconductor manufacturing apparatus according to claim 1, wherein the grain size of the first surface is smaller than the grain size of the second surface.

10. The component for a semiconductor manufacturing apparatus is an etching, and the first surface includes steps and is a wafer mounting surface, the component for a semiconductor manufacturing apparatus according to claim 1.

11. The component for a semiconductor manufacturing apparatus according to claim 1, wherein the component is made of SiC or B4C as a plasma-resistant material.

12. The component for a semiconductor manufacturing apparatus according to claim 1, wherein the component is such that the boundary of the vapor deposition layer is not exposed to plasma.

13. A step of preparing a base material; a step of forming a vapor deposition layer containing SiC or B4C so as to surround the base material; a step of processing the vapor deposition layer; a step of removing the base material and obtaining a component for a semiconductor manufacturing apparatus containing at least one or more of SiC or B4C; A method for manufacturing a component for a semiconductor manufacturing apparatus, including.

14. The method for manufacturing a component for a semiconductor manufacturing apparatus according to claim 13, wherein the base material contains a carbon-based substance.

15. ​ The vapor deposition layer is formed by CVD growth from a first surface in contact with the base material to a second surface which is the surface to be processed. The method for manufacturing a component for a semiconductor manufacturing apparatus according to claim 13.

16. The method for manufacturing a component for a semiconductor manufacturing apparatus according to claim 15, wherein the plasma resistance of the first surface is greater than the plasma resistance of the second surface.

17. The method for manufacturing a component for a semiconductor manufacturing apparatus according to claim 15, wherein the first surface is an inclined surface exposed to plasma, and the second surface is a base surface.

18. The method for manufacturing a component for a semiconductor manufacturing apparatus according to claim 15, wherein the grain size of the first surface is smaller than the grain size of the second surface.

19. The method for manufacturing a component for a semiconductor manufacturing apparatus according to claim 13, wherein the base material has a vertically symmetric shape, and the component for a semiconductor manufacturing apparatus containing one or more of SiC or B4C has the same shape.

20. The component for a semiconductor manufacturing apparatus is an etching, The method for manufacturing a component for a semiconductor manufacturing apparatus according to claim 13, wherein the base material includes steps on an upper surface and a lower surface.

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