Short Stripe Repair in Memory Systems

Abstract

Aspects of the present disclosure configure a memory subsystem controller to provide adaptive repair with short stripes. The memory controller groups a plurality of sets of blocks of a set of memory components into respective block stripes. The memory controller calculates an average width across the block stripes, where the average width represents an average amount of blocks within each of the block stripes associated with a reliability grade exceeding a threshold. The memory controller determines that a first block stripe of the block stripes includes a quantity of blocks associated with a reliability grade exceeding the threshold that is less than the average amount of blocks. In response to determining that the first block stripe includes a quantity of blocks that is less than the average amount of blocks, the memory controller associates one or more of a second block stripe of the block stripes with the first block stripe.

Description

Technical Field

[0001] Embodiments of the present disclosure generally relate to memory subsystems, and more particularly to providing adaptive media management for memory components such as memory dies.

Background Art

[0002] A memory subsystem can be a storage system such as a solid state drive (SSD) and can include one or more memory components for storing data. The memory components can be, for example, non-volatile memory components and volatile memory components. Generally, a host system can utilize the memory subsystem to store data in and retrieve data from the memory components.

[0003] The present disclosure will be more fully understood from the following detailed description and the accompanying drawings of various embodiments of the present disclosure.

Brief Description of the Drawings

[0004]

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DETAILED DESCRIPTION OF THE INVENTION

[0005] Aspects of the present disclosure are configured such that system components, such as a memory subsystem controller, perform a block slice repair operation. The memory subsystem controller can calculate an average width across a plurality of block stripes, which represents an average amount of healthy blocks across the plurality of block stripes. Each block stripe can include a set of blocks. In some cases, each block stripe is referred to as a superblock. The average width is compared to the width of a first block stripe to determine whether the first block stripe contains a lesser amount or number of healthy blocks than the average number of healthy blocks across all of the block stripes. If so, the controller associates one or more blocks from a second block stripe with the first block stripe to replace one of the defective blocks in the first block stripe, thereby repairing the first block stripe. This ensures that the performance of the memory system remains optimal by enabling memory operations to be performed on block stripes of at least an average width (e.g., the block stripes on which memory operations are performed contain at least an average amount or number of healthy blocks). This improves the overall efficiency of operating the memory subsystem. As referred to in the present disclosure, a healthy block is a block associated with a reliability grade that exceeds a reliability threshold, and a defective block is a block associated with a reliability grade that is less than or cannot exceed the reliability threshold.

[0006] The memory subsystem can be a storage device, a memory module, or a hybrid of a storage device and a memory module. Examples of storage devices and memory modules are described below in connection with FIG. 1. Generally, a host system can utilize a memory subsystem that includes one or more memory components, such as a memory device (e.g., a memory die) that stores data. The host system can send access requests (e.g., write commands, read commands) to the memory subsystem, such as storing data in the memory subsystem and reading data from the memory subsystem. Data (or a set of data) specified by the host is hereinafter referred to as “host data,” “application data,” or “user data.”

[0007] The memory subsystem can initiate media management operations, such as write operations, on the host data stored in the memory device. For example, the firmware of the memory subsystem can rewrite previously written host data from a location on the memory device to a new location as part of a garbage collection management operation. Data that is rewritten when initiated by, for example, the firmware is hereinafter referred to as “garbage collection data.” “User data” can include host data and garbage collection data. Hereinafter in this specification, “system data” refers to data created and / or maintained by the memory subsystem to perform operations in response to host requests and for media management. Examples of system data include, but are not limited to, system tables (e.g., logical-to-physical address mapping tables), data from logging, scratch pad data, and the like.

[0008] Many different media management operations can be performed on a memory device. For example, media management operations can include different scan rates, different scan frequencies, different wear leveling, different read interference management, different near-miss error correction (ECC), and / or different dynamic data refresh. Wear leveling ensures that all blocks within a memory component approach a defined erase cycle budget at the same time, rather than some blocks approaching it earlier. Read interference management counts all read operations to a memory component. When a specific threshold is reached, the surrounding area is refreshed. Near-miss ECC refreshes all data read by an application that exceeds a set threshold of errors. A dynamic data refresh scan reads all data and identifies the error status of all blocks as a background operation. In this scan read, if a specific threshold of errors per block or ECC unit is exceeded, a refresh operation is triggered.

[0009] The memory device can be a non-volatile memory device. A non-volatile memory device is a package of one or more dies (or multiple dies). Each die can be composed of one or more planes. In the case of some types of non-volatile memory devices (e.g., NAND devices), each plane is composed of a set of physical blocks. In some memory devices, a block is the smallest area that can be erased. Each block is composed of a set of pages. Each page is composed of a set of memory cells that store bits of data. The memory device can be, for example, a raw memory device (e.g., NAND) that is externally managed by an external controller. The memory device can be a managed memory device (e.g., managed NAND), which is a raw memory device combined with a local embedded controller for memory management within the same memory device package.

[0010] There are challenges in efficiently managing or performing media management operations in typical memory devices. Specifically, certain memory devices, such as NAND flash devices, include significant die-to-die reliability (RWB) variations. As the technology for such memory devices continues to scale down, this die-to-die reliability variation becomes more prominent and problematic when performing memory management. Current memory systems (e.g., SSD drives or die package systems) associate all of the memory devices within the memory system with specific reliability specifications. In some cases, each block of each memory device is associated with a reliability grade or specification that is used to determine whether the block is a normal block or a bad block. A normal block is a block that has a reliability grade above a reliability threshold, and a bad block is a block that has a reliability grade below the reliability threshold. The reliability grade can be set during manufacturing or during operation of the memory device, such as by measuring the data retention rate and / or error rate associated with a specific block.

[0011] A typical memory system utilizes a superblock or a block stripe (BS) that is a collection of blocks across memory planes and / or dies. That is, each superblock can be of equal size and can include each collection of blocks across multiple planes and / or dies. When allocated, the superblock enables the controller to write data simultaneously to most of the memory at a single address (across (multiple) planes and / or dies to multiple blocks). Sometimes, a superblock includes a bad block or a block having a reliability grade below a threshold. These can be referred to as an incomplete superblock, a short stripe, or a short block stripe. A normal system allocates these incomplete superblocks in the same way as a complete superblock (e.g., a superblock that includes only normal blocks having a reliability grade above the threshold). This usually results in a degradation of memory performance because executing a memory operation on an incomplete superblock can increase the amount of errors or reduce the reliability of the memory operation. Also, some of the bad blocks in the incomplete superblock cannot be used to execute a memory operation. This reduces the memory space available for executing a memory operation, further reducing the efficiency of allocating such an incomplete superblock (e.g., a memory operation can only be executed on the normal blocks of the incomplete superblock). Therefore, applying a uniform approach to a memory system with a mixture of complete and incomplete superblocks is inefficient and can result in degraded memory performance or loss of reliability.

[0012] Aspects of the present disclosure address the above and other deficiencies by providing a memory controller that can repair short stripes by replacing defective blocks of a short block stripe with normal blocks of other block stripes. In some cases, this replacement is performed in response to detecting that the amount of normal blocks within an individual block stripe is less than the average amount of normal blocks across a plurality of block stripes, e.g., more than a threshold amount. In such cases, the memory controller can select a target block stripe from which one or more blocks are selected, which is based on determining that the target block stripe contains more than a threshold number of normal blocks than the average amount of normal blocks. In this case, the memory controller can associate one or more normal blocks of the target block stripe with the individual block stripe to repair and extend the width of the individual block stripe.

[0013] For example, the memory controller can group multiple sets of blocks of a set of memory components into respective block stripes and calculate an average width across the block stripes, where the average width represents the average number of blocks within each of the block stripes associated with a reliability grade exceeding a threshold. The memory controller can determine that a first block stripe of the block stripes contains an amount of blocks associated with a reliability grade exceeding a threshold that is less than the average amount of blocks. In response, the memory controller can associate one or more blocks of a second block stripe of the block stripes with the first block stripe. As a result, the memory controller can adjust memory management operations to a particular reliability grade of the memory components without sacrificing performance by assigning memory operations to the short block stripe. This improves the efficiency of operating the memory system.

[0014] In some examples, the memory controller obtains a plurality of widths of block stripes, and each of the plurality of widths represents the amount of blocks within each block stripe associated with a reliability grade that exceeds a threshold. The memory controller determines that the individual width of a second block stripe is at least one block greater than the average width, and in response to determining that the individual width of the second block stripe is greater than the average width, selects the second block stripe.

[0015] In some examples, the memory controller calculates an average width based on the average of a plurality of widths of block stripes. The memory controller associates one or more blocks of a third block stripe of the block stripes with a first block stripe.

[0016] In some examples, the memory controller generates a replacement table that includes a first block identifier of a first block of a first block stripe associated with a reliability grade that is less than a threshold. The memory controller can associate the first block identifier with a second block identifier of one or more blocks of a second block stripe associated with the first block stripe. The replacement table can be stored in a DRAM.

[0017] In some examples, the memory controller generates a bad block table that includes a first block identifier of a first block of a first block stripe associated with a reliability grade that is less than a threshold. The memory controller associates the first block identifier with an indication of whether the first block of the first block stripe has been repaired.

[0018] In some examples, the memory controller receives a write operation associated with a first block stripe. The memory controller accesses a set of blocks of the first block stripe and determines that a first block of the set of blocks of the first block stripe is associated with a bad block indication. The bad block indication represents a block associated with a reliability grade below a threshold. The memory controller determines whether the first block is associated with a repaired indication. In response to determining that the first block of the set of blocks of the first block stripe is not associated with a repaired indication, the memory controller omits writing to the first block and obtains a second block of a set of blocks adjacent to the first block. In response to determining that the first block of the set of blocks of the first block stripe is associated with a repaired indication, the memory controller accesses a second block of one or more blocks of a second stripe identified by a replacement table and performs a write operation on the second block.

[0019] In some examples, the memory controller accesses configuration data. The configuration data includes a table that associates individual blocks of a set of memory components with respective reliability grades, where the reliability grades indicate at least one of data retention parameters, read interference parameters, error rates, leakage currents, cross temperature parameters, or endurance parameters. The set of blocks of the first block stripe can be distributed across multiple memory dies or across multiple memory planes. Each of the block stripes can be of equal size and includes a respective set of blocks across multiple planes or dies.

[0020] In some examples, the memory controller performs determining that a first block stripe includes fewer blocks than an average amount of blocks by determining that the first block stripe includes blocks that are less than a threshold amount less than the average amount of blocks.

[0021] In some examples, the second block stripe includes individual blocks associated with virtual defects. In such cases, in response to the memory controller associating one or more blocks of the second block stripe with the first block stripe, the virtual defects are prevented from being associated with the individual blocks.

[0022] In some examples, the determination by the memory controller that the first block stripe of the block stripes includes fewer blocks is performed when the first block stripe is in a garbage or erased state. The second block stripe can be selected from a garbage pool or a free pool of block stripes. After a certain period of time, the memory controller can associate one or more blocks of the second block stripe with a third block stripe instead of the first block stripe. One or more blocks of the second block stripe can be selected in response to determining that the program erase count (PEC) of the one or more blocks is lower than the PEC count of the set of blocks of the first block stripe.

[0023] Although various embodiments are described herein as implemented with respect to a memory subsystem (e.g., a controller of a memory subsystem), some or all of a portion of an embodiment can be implemented with respect to a host system, such as a software application or an operating system of the host system.

[0024] FIG. 1 shows an exemplary computing environment 100 that includes a memory subsystem 110, according to some embodiments of the present disclosure. The memory subsystem 110 can include media such as memory components 112A-112N (hereinafter also referred to as “memory devices”). The memory components 112A-112N can be volatile memory devices, non-volatile memory devices, or a combination of such. The memory components 112A-112N can be implemented by individual dies, such that a first memory component 112A can be implemented by a first memory die (or a first set of memory dies), and a second memory component 112N can be implemented by a second die (or a second set of memory dies).

[0025] In some examples, the first memory component 112A, a block, or a page of the first memory component 112A, or a group of memory components including the first memory component 112A, can be associated with a first reliability (function) grade, value, or measure. The terms "reliability grade", "value", and "measure" can be used interchangeably throughout and can have the same meaning. The second memory component 112N, or a group of memory components including the second memory component 112N, can be associated with a second reliability (function) grade, value, or measure. In some examples, each of the memory components 112A - 112N can store respective configuration data specifying respective reliability grades. In some examples, a memory or a register can be associated with all of the memory components 112A - 112N, which can store a table mapping different groups, bins, or sets of the memory components 112A - 112N to respective reliability grades. In some examples, a memory or a register can be associated with all of the memory components 112A - 112N, which can store a table indicating which blocks of each block stripe are normal and which are defective. Optionally, the table can indicate the amount of normal blocks within each block stripe.

[0026] In some embodiments, blocks within the first memory component 112A can be grouped with blocks within the second memory component 112N to form a superblock or block stripe. A superblock (or block stripe) can be addressed collectively using a single address. In such a case, the LTP table can store a single address and the associations between that single address and each block of the first memory component 112A and the second memory component 112N associated with that single address. In some embodiments, a portion of the blocks of a superblock (or block stripe) can have a reliability grade that is below a reliability threshold. These can be referred to as bad blocks. In some embodiments, a portion of the blocks of a superblock (or block stripe) can have a reliability grade that exceeds the reliability threshold. These can be referred to as good blocks. A superblock (or block stripe) that includes one or more bad blocks can be referred to as an incomplete superblock or short stripe. A superblock or block stripe that includes no bad blocks and only good blocks is referred to as a complete superblock or complete block stripe.

[0027] In some embodiments, the memory subsystem 110 is a storage system. The memory subsystem 110 can be a storage device, a memory module, or a hybrid of a storage device and a memory module. Examples of storage devices include solid state drives (SSDs), flash drives, universal serial bus (USB) flash drives, embedded multimedia controllers (eMMC) drives, universal flash storage (UFS) drives, and hard disk drives (HDDs). Examples of memory modules include dual in-line memory modules (DIMMs), small outline DIMMs (SO-DIMMs), and non-volatile dual in-line memory modules (NVDIMMs).

[0028] Computing environment 100 can include a host system 120 coupled to a memory system. The memory system can include one or more memory subsystems 110. In some embodiments, host system 120 is coupled to different types of memory subsystems 110. FIG. 1 shows an example of host system 120 coupled to one memory subsystem 110. Host system 120 uses memory subsystem 110, for example, to write data to and read data from memory subsystem 110. As used herein, "coupled to" generally refers to a connection between components that can be a wired or wireless, indirect or direct communication connection (e.g., without intervening components), including connections such as electrical, optical, magnetic, etc.

[0029] The host system 120 can be a computing device such as a desktop computer, laptop computer, network server, mobile device, embedded computer (e.g., those included in vehicles, industrial equipment, or networked commercial devices), or such a computing device including a memory and a processing device. The host system 120 may include or be coupled to the memory subsystem 110 so that the host system 120 can read data from or write data to the memory subsystem 110. The host system 120 can be coupled to the memory subsystem 110 via a physical host interface. Examples of the physical host interface include, but are not limited to, a Serial Advanced Technology Attachment (SATA) interface, a Peripheral Component Interconnect Express (PCIe) interface, a Universal Serial Bus (USB) interface, a Fibre Channel interface, a Serial Attached SCSI (SAS) interface, etc. Data can be transmitted between the host system 120 and the memory subsystem 110 using the physical host interface. When the memory subsystem 110 is coupled to the host system 120 by a PCIe interface, the host system 120 can further utilize a Non-Volatile Memory Express (NVMe) interface to access the memory components 112A - 112N. The physical host interface can provide an interface for passing control signals, address signals, data signals, and other signals between the memory subsystem 110 and the host system 120.

[0030] Memory components 112A - 112N can include any combination of various types of non - volatile memory components and / or volatile memory components. An example of a non - volatile memory component includes a negative - AND (NAND) type flash memory. Each of the memory components 112A - 112N can include one or more arrays of memory cells such as single - level cells (SLC) or multi - level cells (MLC) (e.g., TLC or QLC). In some embodiments, a particular memory component 112 can include both an SLC portion and an MLC portion of memory cells. Each of the memory cells can store one or more bits of data (e.g., a block) used by the host system 120. Although non - volatile memory components such as NAND type flash memory are described, the memory components 112A - 112N can be based on any other type of memory such as volatile memory. In some embodiments, the memory components 112A - 112N can be, but are not limited to, random access memory (RAM), read - only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), phase - change memory (PCM), magnetoresistive random access memory (MRAM), negative - OR (NOR) flash memory, electrically erasable programmable read - only memory (EEPROM), and cross - point arrays of non - volatile memory cells.

[0031] The cross-point array of non-volatile memory cells can perform bit storage based on changes in bulk resistance in conjunction with a stackable cross-grid data access array. Further, in contrast to many flash-based memories, cross-point non-volatile memory can perform in-place write operations that can program non-volatile memory cells without pre-erasing the non-volatile memory cells. Further, the memory cells of memory components 112A - 112N can be grouped as memory pages or blocks that can reference units of memory component 112 used to store data. For example, a single first row spanning memory components 112A - 112N can correspond to or be grouped as a first block stripe, and a single second row spanning memory components 112A - 112N can correspond to or be grouped as a second block stripe. If the single first row contains all normal blocks (e.g., if each block within the single first row has a reliability grade exceeding a threshold), the first block stripe is a first complete block stripe. If the single first row contains some bad blocks (e.g., if one or more blocks within the single first row have a reliability grade below a threshold), the first block stripe is a first short block stripe.

[0032] Memory subsystem controller 115 can communicate with memory components 112A - 112N to perform operations such as reading data, writing data, or erasing data at memory components 112A - 112N and other such memory operations. Memory subsystem controller 115 can communicate with memory components 112A - 112N to perform various memory management operations such as different scan rates, different scan frequencies, different wear leveling, different read disturbance management, different near-miss ECC operations, and / or different dynamic data refresh.

[0033] The memory subsystem controller 115 can include hardware such as one or more integrated circuits and / or discrete components, buffer memory, or combinations thereof. The memory subsystem controller 115 can be a microcontroller, a dedicated logic circuit (e.g., a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), etc.), or another suitable processor. The memory subsystem controller 115 can include a processor (processing device) 117 configured to execute instructions stored in the local memory 119. In the illustrated example, the local memory 119 of the memory subsystem controller 115 includes embedded memory configured to store instructions for executing routines that control the operation of the memory subsystem 110, including processing of various processes, operations, logic flows, and communication between the memory subsystem 110 and the host system 120. In some embodiments, the local memory 119 can include memory registers that store memory pointers, fetched data, etc. The local memory 119 can also include read only memory (ROM) for storing microcode. The exemplary memory subsystem 110 of FIG. 1 is shown as including the memory subsystem controller 115, but in other embodiments of the present disclosure, the memory subsystem 110 may not include the memory subsystem controller 115 and instead may rely on external control (e.g., provided by an external host or by another processor 117 or controller separate from the memory subsystem 110).

[0034] Generally, the memory subsystem controller 115 can receive commands or operations from the host system 120 and convert the commands or operations into instructions or appropriate commands to achieve the desired access to the memory components 112A-112N. In some examples, the commands or operations received from the host system 120 can specify the configuration data of the memory components 112N-112N. The configuration data can indicate reliability grades associated with different groups of the memory components 112N-112N and / or different blocks within each of the memory components 112N-112N. In some cases, the reliability grade is dynamic and can be updated by the memory subsystem controller 115 in response to determining that a particular error rate has been reached that exceeds an error rate threshold (e.g., a reliability threshold) during operation of the memory subsystem 110. For example, a normal block can become a bad block if that normal block begins to have an error rate that exceeds the reliability threshold. In such a case, the configuration data is updated and any block stripe that includes the bad block at that time is designated as a short block stripe.

[0035] The memory subsystem controller 115 is responsible for other memory management operations such as wear leveling operations, garbage collection operations, error detection and error correction code (ECC) operations, encryption operations, caching operations, and address translation. The memory subsystem controller 115 can further include a host interface circuit for communicating with the host system 120 via a physical host interface. The host interface circuit can convert a command received from the host system 120 into a command instruction to access the memory components 112A-112N and convert a response associated with the memory components 112A-112N into information for the host system 120.

[0036] Memory subsystem 110 can also include additional circuitry or components not shown. In some embodiments, memory subsystem 110 includes a cache or buffer (e.g., DRAM or other temporary storage location or device), and an address circuit (e.g., a row decoder and a column decoder) that receives an address from memory subsystem controller 115 and decodes the address to access memory components 112A - 112N.

[0037] The memory device can be, for example, a raw memory device (e.g., NAND) that is externally managed by an external controller (e.g., memory subsystem controller 115). The memory device can be a managed memory device (e.g., managed NAND), which is a raw memory device combined with a local embedded controller (e.g., a local media controller) for memory management within the same memory device package. Any one of memory components 112A - 112N can include a media controller (e.g., media controller 113A and media controller 113N) for managing the memory cells of the memory component (e.g., performing one or more memory management operations), communicating with memory subsystem controller 115, and executing memory requests (e.g., read or write) received from memory subsystem controller 115.

[0038] The memory subsystem controller 115 can include a media operation manager 122. The media operation manager 122 can be configured to group multiple sets of blocks of a set of memory components into respective block stripes, and can be configured to calculate an average width across the block stripes, where the average width represents the average number of blocks within each of the block stripes associated with a reliability grade exceeding a threshold. The memory subsystem controller 115 can determine that a first block stripe of the block stripes includes an amount of blocks associated with a reliability grade exceeding the threshold that is less than an average amount of blocks. In response, the memory subsystem controller 115 can associate one or more blocks of a second block stripe of the block stripes with the first block stripe. As a result, the memory subsystem controller 115 can adjust memory management operations to a particular reliability grade of the memory components without sacrificing performance by allocating memory operations to short block stripes. Thereby, the efficiency of operating the memory system is improved.

[0039] According to an embodiment, the media operation manager 122 can include logic (e.g., a set of temporary or non-temporary machine instructions such as firmware) or one or more components that cause the media operation manager 122 to perform the operations described herein. The media operation manager 122 can include a tangible or non-tangible unit that can perform the operations described herein. Further details regarding the operations of the media operation manager 122 are described below.

[0040] FIG. 2 is a block diagram of an exemplary media operation manager 200 (representing media operation manager 122) according to some embodiments of the present disclosure. As shown, media operation manager 122 includes configuration data 220, a block stripe specification table 230, a replacement table 240, and a bad block table 250. In some embodiments, media operation manager 122 may differ in components or arrangement (e.g., fewer or more components) from that shown in FIG. 2.

[0041] Configuration data 220 accesses and / or stores configuration data associated with memory components 112A - 112N. In some examples, configuration data 220 is programmed within media operation manager 122. For example, media operation manager 122 can communicate with memory components 112A - 112N to obtain configuration data and locally store the configuration data in media operation manager 122. In some examples, media operation manager 122 communicates with host system 120. Host system 120 receives input from an operator or user specifying parameters including reliability grades for different bins, groups, blocks, block stripes, and / or sets of memory components 112A - 112N. Media operation manager 122 receives configuration data from host system 120 and stores the configuration data within configuration data 220.

[0042] In some examples, the media operation manager 122 executes one or more test operations on different groups or blocks of the memory components 112A-112N. The test operations are configured to determine the reliability of each block of the memory components 112A-112N. Based on the results of the test operations, the media operation manager 122 can store or update the reliability grades stored in the configuration data 220 for different groups or blocks of the memory components 112A-112N. In some examples, the media operation manager 122 can execute the test operations periodically or daily. The media operation manager 122 can determine, based on the configuration data 220, that an individual memory component 112A is associated with a first reliability grade. The media operation manager 122 can execute a set of test operations on the individual memory component 112A and, based on the results of the test operations, determine that the reliability grade of the individual memory component 112A has increased or decreased and is now a second reliability grade. In response, the media operation manager 122 can move the individual memory component 112A from being associated with a first group of the individual memory components 112A-112N to a second group of the individual memory components 112A-112N associated with the second reliability grade.

[0043] In some examples, media operation manager 122 processes configuration data 220 to generate a block stripe designation table 230 that enumerates the addresses of block stripes along with respective indications of the amount or number of good blocks and / or bad blocks included in each block stripe. For example, the first address in the table may be associated with a first row of good blocks and / or bad blocks across a plurality of dies or planes representing a first block stripe. The second address in the table may be associated with a second row of good blocks and / or bad blocks across a plurality of dies or planes representing a second block stripe. Specifically, as shown in FIG. 3, a configuration of memory components 112A - 112N is provided. The individual configurations include a set of dies 0 - 15 (e.g., memory components 112A - 112N).

[0044] Media operation manager 122 processes configuration data 220 to determine that a first row of blocks across a plurality of planes 0 - 3 of a set of dies 0 - 15 has a reliability grade corresponding to a reliability threshold (e.g., has an error rate below a specified error rate threshold). In such a case, media operation manager 122 stores an indication that the first block stripe includes all good blocks and stores the address or identifier of the first block stripe in block stripe designation table 230. The identifier of the first block stripe can include an address that accesses all blocks across planes 0 - 3 of the set of dies 0 - 15. Similarly, media operation manager 122 associates other block stripe identifiers with other rows of good blocks (across a plurality of planes 0 - 3 of the set of dies 0 - 15).

[0045] In some cases, the media operation manager 122 identifies bad blocks 322 in the individual rows of blocks of a block stripe that also includes a set of normal blocks. In response, the media operation manager 122 stores a display in the block stripe designation table 230 of the short block stripe 320, along with the amount of normal or bad blocks included in the short block stripe 320.

[0046] In some examples, the media operation manager 122 can generate or calculate the average width across the block stripes of the memory components 112A-112N. To do so, the media operation manager 122 can access the block stripe designation table 230 to generate a display of the width of each block stripe. Specifically, the block stripe designation table 230 can store a first number or amount representing a first width of the total number of normal blocks of the first block stripe, and a second number or amount representing a second width of the total number of normal blocks of a second block stripe (e.g., the short block stripe 320). The media operation manager 122 can calculate the average of all of the widths or amounts of the normal blocks available across all of the block stripes. The media operation manager 122 stores this average width in association with the block stripe designation table 230. This results in an initial configuration 310 of block stripes within the memory components 112A-112N.

[0047] Periodically, or in response to detecting that a given block stripe contains bad blocks, media operation manager 122 can perform a set of repair operations to generate a second configuration 330 of the block stripes within memory components 112A - 112N. For example, media operation manager 122 can obtain the width of a given block stripe representing the total amount of good blocks available in the given block stripe. Media operation manager 122 compares the width of the given block stripe with the average width stored in block stripe specification table 230. In response to determining that the width of the given block stripe is less than the average width, media operation manager 122 can perform a repair operation to associate good blocks from another block stripe with the given block stripe. In some cases, media operation manager 122 performs a repair operation in response to determining that the width of the given block stripe is less than the average width by more than a threshold value. That is, media operation manager 122 can determine that the given block stripe contains fewer good blocks than the average width by more than a threshold value.

[0048] In some examples, media operation manager 122 generates a bad block table 250 that includes block identifiers of blocks of a block stripe associated with a reliability grade below a threshold. Specifically, media operation manager 122 can add the identifier of bad block 322 of short block stripe 320 within bad block table 250 to bad block table 250. Media operation manager 122 can also store an indication of whether bad block 322 has been repaired in relation to bad block 322.

[0049] To repair a given block stripe, the media operation manager 122 searches for the widths of other block stripes in the block stripe specification table 230. The media operation manager 122 can set a threshold amount (e.g., 2 or more) that controls which block stripe should be selected and used to repair a given block stripe. That is, the media operation manager 122 can compare the width of the second block stripe (representing the amount of normal blocks) with the average width. In response to determining that the width of the second block stripe is less than or equal to the average width, the media operation manager 122 discards the second block stripe from the selection target and accesses the width of the third block stripe. The media operation manager 122 can compare the width of the third block stripe (representing the amount of normal blocks) with the average width. In response to determining that the width of the second block stripe is greater than the average width but only less than the threshold (e.g., only 1 block larger instead of 2 normal blocks), the media operation manager 122 discards the third block stripe from the selection target and accesses the width of the fourth block stripe. The media operation manager 122 can compare the width of the fourth block stripe (representing the amount of normal blocks) with the average width. In response to determining that the width of the fourth block stripe is at least greater than the average width by the threshold, the media operation manager 122 selects the fourth block stripe to repair the given block stripe.

[0050] In some examples, the media operation manager 122 identifies healthy blocks within a selected fourth block stripe. For example, the media operation manager 122 can identify that block stripe 350 includes a width that is at least a threshold greater than the average width, and can identify healthy block 352 included in block stripe 350. The media operation manager 122 can replace bad block 324 of block stripe 320 (e.g., a given block stripe) with healthy block 352 of block stripe 350. In some cases, the media operation manager 122 updates the indication associated with bad block 324 in bad block table 250 to specify that bad block 324 has been repaired. The media operation manager 122 also generates a replacement table 240 to identify healthy block 352 used to replace bad block 324. The replacement table 240 can be stored outside the chip, such as in DRAM.

[0051] In some examples, the media operation manager 122 can select a healthy block from the fourth block stripe based on the PEC count of each healthy block in the fourth block stripe. That is, the media operation manager 122 can access the PEC count of the healthy blocks in the fourth block stripe. The media operation manager 122 can select a healthy block from the fourth block stripe to be used to replace a bad block in a given block stripe based on the PEC count being the minimum or maximum value among the PEC counts of the healthy blocks in the fourth block stripe. In some cases, the media operation manager 122 can obtain the average PEC count of the healthy blocks from a given block stripe (including the bad block to be repaired). The media operation manager 122 selects a healthy block from the fourth block stripe corresponding to or associated with a PEC count within a threshold of the average PEC count of the healthy blocks in the given block stripe. In some examples, a healthy block is selected in response to determining that the PEC count of the healthy block is less than the PEC of the given block stripe. In some examples, the media operation manager 122 determines that the fourth block stripe is currently in the garbage pool of the block stripe scheduled for erasure rather than the free pool of the block stripe that has already been erased and is ready to be written to. In such a case, the media operation manager 122 can erase the fourth block stripe or the selected healthy block before or after associating the selected healthy block with the bad block in the given block stripe. The healthy blocks of the block stripe used to replace the bad blocks of other block stripes can also be referred to as "sacrificial blocks" or "sacrificial physical blocks".

[0052] In some examples, the media operation manager 122 can store the indication within the replacement table 240 of the bad block 324 and a reference to the normal block 352. Thus, when subsequent memory operations (e.g., read / write / garbage collection) are performed with respect to a given block stripe (e.g., block stripe 320), the media operation manager 122 can perform the memory operations on all of the normal blocks of the given block stripe and on any block of a different block stripe associated with the bad blocks of the given block stripe, such as the normal block 352. In some examples, a hash table can be used to reduce the size of the replacement table 240. The key value within the hash table can be the block stripe index. Each entry of the hash table can include the replaced block number and the next entry pointer. The next pointer can be up to 34 bits to represent something larger than 4GB DRAM. Six bytes can be used to represent the next pointer. A total of eight bytes can be stored in each hash table entry using a 2-byte replaced block index. The following is an example of a hash table.

Table 1

[0053] In some examples, the media operation manager 122 determines that a fourth block stripe 350 from which normal blocks are selected to repair bad blocks in a given block stripe contains one or more virtual defects. Virtual defects are introduced by the media operation manager 122 into one or more block stripes to prevent access to such blocks when memory operations are performed on the block stripes having the virtual defects. These virtual defects can be treated as bad blocks for a temporary period. Virtual defects can be introduced to maintain a particular geometry provided to the host, in which case all of the block stripes have a similar amount of blocks even though some block stripes have actual bad blocks and some block stripes have virtual defects or virtual bad blocks. In response to determining that the fourth block stripe 350 contains virtual defects, the media operation manager 122 can remove the virtual defects after associating normal blocks with the given block stripe. Thereby, the geometry provided to the host continues to be maintained. That is, since normal blocks are removed from the fourth block stripe 350 and another block stripe is being repaired, the media operation manager 122 can now make the virtually defective blocks available as normal blocks and keep the same amount of normal blocks available in the fourth block stripe 350.

[0054] Specifically, if the width of the block stripe varies due to actual defects, the host and the SSD can quickly get out of sync, which can lead to unnecessary garbage collection and a significant increase in write amplification. By including variable virtual defects in all block stripes that decrease each time a grown bad block is added, the size of the logical block stripe can be kept constant throughout the life of the SSD and across all drives.

[0055] In some cases, for virtual defects where the position of the virtual defect is fixed, those physical blocks are not used until an actual defect is detected or until the normal blocks of the block stripe with the virtual defect are used to repair another bad block. To wear evenly across the block stripe with the virtual defect, the start offset of the virtual defect within the block stripe can be incremented based on the physical PEC. In one embodiment, the offset can be calculated according to the following formula. Offset = Physical PEC % (Physical BS width - Grown bad blocks)

[0056] Virtual defects may skip the actual defect positions within the block stripe and can spread at a fixed cadence, for example, to ensure they do not cluster on the same NAND channel. In some cases, the physical PEC of the block stripe is higher than the actual PEC of each block. Thus, the adjusted PEC of the block stripe can be maintained separately to account for the dilution of virtual defects. The adjusted PEC that supports a block stripe with 256 dies can be divided into two components (an adjusted PEC upper component that may include 8 bits and an adjusted PEC lower component that may include 8 bits). Each time the block stripe is erased, the adjusted PEC lower component is incremented by 1 and can be compared with (Physical BS width - Grown bad blocks). When the adjusted PEC lower component is equal to the difference between the physical block stripe width and the grown bad blocks, the adjusted PEC upper component is incremented by 1 and the adjusted PEC lower component is reset to 0. The following formula can be used to calculate the final adjusted PEC of the block stripe. Adjusted PEC = (Adjusted PEC upper × Logical BS width) + Min(Adjusted PEC lower, Logical BS width) In such a case, as long as the logical block stripe width is constant throughout the life of the SSD, the adjusted PEC represents the actual PEC of each individual block within the block stripe.

[0057] The media operation manager 122 can also update the width stored in the block stripe designation table 230 for a given block stripe to increment the amount of normal blocks resulting from replacing a bad block with a normal block from another block stripe. Similarly, the media operation manager 122 can also update the width stored in the block stripe designation table 230 for block stripe 350 to decrement the amount of normal blocks resulting from replacing a bad block with a normal block from the fourth block stripe 350. That is, since one or more normal blocks of the fourth block stripe 350 are assigned or used to repair the bad block of a given block stripe, the width of the fourth block stripe 350 decreases by the amount of normal blocks assigned to other block stripes.

[0058] In some examples, the media operation manager 122 can recalculate the average width based on the width stored in the block stripe specification table 230. The media operation manager 122 can determine that, even after repair, a given block stripe still contains normal blocks that are less than the average width. In such a case, the media operation manager 122 can identify another block stripe from which to obtain normal blocks to repair other bad blocks within the given block stripe. For example, the media operation manager 122 can determine that the fifth block stripe 340 contains normal blocks 342 that can be used to repair the bad block 322. In such a case, after repair, the bad block 322 is here associated with the normal block 342 within the replacement table 240 and becomes known as the first repaired block 328 within the repaired block stripe 326. That is, the repaired block stripe 326 includes the first repaired block 328 based on the association between the bad block 322 of the block stripe 320 and the normal block 342 of the fifth block stripe 340, and includes the second repaired block 329 based on the association between the bad block 324 of the block stripe 320 and the normal block 352 of the fourth block stripe 350.

[0059] In some examples, the media operation manager 122 can associate the normal block 352 with different bad blocks of a different block stripe instead of the block stripe 326. As a result, the block stripe 326, which was previously repaired using the normal block 352, returns to having the bad block 324, and a different block stripe comes to have the repaired blocks. The media operation manager 122 can update the bad block table 250 to indicate that the bad block 324 has not been repaired, and can update the replacement table 240 to remove the association between the bad block 324 and the normal block 352.

[0060] In some examples, the media operation manager 122 can initiate a search for target block stripes to repair and sacrificial blocks to use for replacing bad blocks during device manufacturing. That is, the media operation manager 122 can receive from the host commands that include a low-level format process or other vendor-specific commands. In response, the media operation manager 122 calculates an average width and searches for block stripes that include a width smaller than the average width and performs an operation to repair those bad blocks with good blocks from other block stripes.

[0061] In some examples, a given block stripe can be repaired while in any one of several states. For example, a given block stripe can be repaired while the given block stripe is in the garbage pool and waiting to be erased. A given block stripe can be repaired while in an open state where it is ready to be written after being erased. A given block stripe can be repaired when it is in a closed state after being written.

[0062] In some examples, when a suitable sacrificial candidate block stripe is found, the media operation manager 122 can trigger folding to move the candidate block stripe from a closed state to a garbage state and then apply a repair process. Before the candidate BS can be released as a garbage pool, the media operation manager 122 can hold shorter stripes in the free pool.

[0063] In some examples, the media operation manager 122 can determine that read / write operations are random memory operations rather than sequential memory operations. That is, if the memory operation does not utilize a substantial or threshold amount of normal blocks of the block stripe, the media operation manager 122 can assign such a memory operation to a block stripe having a width smaller than the average width (e.g., the memory operation is assigned to a short block stripe). Thereby, a complete block stripe is reserved for sequential memory operations that utilize all or substantially all or more than a threshold of the blocks of the block stripe. In some cases, data that is read more frequently, or read at a particular read frequency, can be moved or maintained within a block stripe having a width greater than a particular threshold, or greater than most or all of other block stripes, to improve quality of service (QoS) by having fewer die collisions.

[0064] FIG. 4 is a flowchart of an exemplary method 400 for repairing a block stripe, according to some embodiments of the present disclosure. Method 400 can be executed by processing logic that includes hardware (e.g., a processing device, circuitry, dedicated logic, programmable logic, microcode, hardware of a device, an integrated circuit, etc.), software (e.g., instructions that run or execute on a processing device), or a combination thereof. In some embodiments, method 400 is executed by the media operation manager 122 of FIG. 1. Although the processes are shown in a particular sequence or order, unless otherwise specified, the order of the processes can be modified. Accordingly, the illustrated embodiments should be understood only as examples, and the illustrated processes can be executed in a different order and some processes can be executed in parallel. Additionally, in various embodiments, one or more processes can be omitted. Thus, all processes are not required in all embodiments. Other process flows are possible.

[0065] Referring now to FIG. 4, method (or process) 400 begins at operation 405, where media operation manager 122 of a memory subsystem (e.g., memory subsystem 110) groups a set of multiple blocks of a set of memory components into respective block stripes. Next, at operation 410, media operation manager 122 of the memory subsystem calculates an average width across the block stripes, where the average width represents an average amount of blocks within each of the block stripes associated with a reliability grade exceeding a threshold. Thereafter, at operation 415, media operation manager 122 determines that a first block stripe of the block stripes includes an amount of blocks associated with a reliability grade exceeding the threshold that is less than the average amount of blocks. In response to determining at operation 420 that the first block stripe includes fewer blocks than the average amount of blocks, media operation manager 122 associates one or more of a second block stripe of the block stripes with the first block stripe.

[0066] FIG. 5A is a flowchart of an exemplary method 501 for writing to a repaired block stripe, according to some embodiments of the present disclosure. Method 501 can be performed by processing logic that can include hardware (e.g., a processing device, circuitry, dedicated logic, programmable logic, microcode, hardware of a device, an integrated circuit, etc.), software (e.g., instructions run or executed on a processing device), or a combination thereof. In some embodiments, method 501 is performed by media operation manager 122 of FIG. 1. Although the processes are shown in a particular sequence or order, unless specifically stated otherwise, the order of the processes can be modified. Accordingly, the illustrated embodiments should be understood only as examples, and the illustrated processes can be performed in a different order, and some processes can be performed in parallel. Additionally, in various embodiments, one or more of the processes can be omitted. Accordingly, not all processes are required in all embodiments. Other process flows are possible.

[0067] Referring now to FIG. 5A, method (or process) 501 begins at operation 511 where media operation manager 122 of a memory subsystem (e.g., memory subsystem 110) receives a command to write to a specified block stripe from a host. In response, at operation 521, media operation manager 122 checks whether a block within the specified block stripe is associated with a bad block and / or has been repaired, for example, by accessing information from bad block table 250. At operation 531, media operation manager 122 determines whether a bad block bit is set in bad block table 250. In response to determining that bad block table 250 indicates that a block within the specified block stripe is bad, at operation 551, media operation manager 122 determines whether bad block table 250 includes an indication that the block has been repaired. In response to determining that bad block table 250 indicates that a block within the specified block stripe is not bad or is normal, at operation 541, media operation manager 122 performs a memory operation on the block and selects the next block in the sequential processing of the blocks of the specified block stripe.

[0068] If the media operation manager 122 determines in operation 551 that a repair bit is set in a block, the media operation manager 122 accesses the replacement table 240 in operation 571. In operation 581, the media operation manager 122 obtains a reference or identifier of a healthy block associated with the defective block from the replacement table 240. The media operation manager 122 performs a memory operation on the identified healthy block associated with the defective block and then selects the next block in the sequential processing of the specified block stripe. If in operation 551 the media operation manager 122 determines that a repair bit is not set in the block, the media operation manager 122 skips performing a memory operation on that block and accesses the next block in the sequential processing of the blocks of the specified block stripe in operation 561. In some examples, if in operation 551 the media operation manager 122 determines that a repair bit is not set in the repair bit block, the media operation manager 122 executes method 502 of FIG. 5B to repair the defective block.

[0069] FIG. 5B is a flowchart of an exemplary method 502 for repairing a block stripe, according to some embodiments of the present disclosure. Method 502 can be executed by processing logic that can include hardware (e.g., a processing device, circuitry, dedicated logic, programmable logic, microcode, hardware of a device, an integrated circuit, etc.), software (e.g., instructions that run or execute on a processing device), or a combination thereof. In some embodiments, method 502 is executed by the media operation manager 122 of FIG. 1. Although the process is shown in a particular sequence or order, unless otherwise specified, the order of the process can be modified. Accordingly, the illustrated embodiments should be understood only as examples, and the illustrated process can be executed in a different order, and some processes can be executed in parallel. Additionally, in various embodiments, one or more processes can be omitted. Accordingly, not all processes are required in all embodiments. Other process flows are possible.

[0070] Referring now to FIG. 5B, method (or process) 502 begins at operation 512 where media manager 122 of a memory subsystem (e.g., memory subsystem 110) identifies a short block stripe (e.g., a block stripe having at least one bad block and having a width less than the average width of all block stripes). Next, at operation 522, media manager 122 searches for a sacrificial block stripe in the garbage or free pool. At operation 532, media manager 122 determines whether all block stripes have been processed and finds a sacrificial block stripe or sacrificial block. If processed, media manager 122 ends the repair operation.

[0071] In response to determining that there are remaining block stripes to process, at operation 552, media manager 122 determines whether the next block stripe meets the repair condition. That is, media manager 122 can determine whether the width (number of good blocks) of the next block stripe is at least a threshold amount greater than the average width (average number of good blocks) of all block stripes. In response to determining at operation 552 that the next block stripe does not meet the repair condition, media manager 122 returns to operation 522 to search for another block stripe. In response to determining at operation 552 that the next block stripe meets the repair condition, media manager 122, at operation 562, applies a replacement, which, for example, selects a good block (e.g., a sacrificial block) from the next block stripe and associates the selected good block with the bad block of the short block stripe identified at operation 512. At operation 572, media manager 122 determines whether the sacrificial block is from the garbage pool. If so, media manager 122, at operation 542, erases the sacrificial block associated with the bad block of the short block stripe.

[0072] In view of the above disclosure, various embodiments are shown below. It should be noted that one or more features of the embodiments, considered alone or in combination, should be considered within the disclosure of this application.

[0073] Example 1: A system comprising a set of memory components of a memory subsystem and a processing device operably coupled to the set of memory components, the method comprising grouping a plurality of sets of blocks of the set of memory components into respective block stripes, calculating an average width across the block stripes, the average width representing an average amount of blocks within each of the block stripes associated with a reliability grade exceeding a threshold, determining that a first block stripe of the block stripes contains an amount of blocks associated with a reliability grade exceeding the threshold that is less than the average amount of blocks, and in response to determining that the first block stripe contains an amount of blocks less than the average amount of blocks, associating one or more blocks of a second block stripe of the block stripes with the first block stripe, the processing device configured to perform an operation comprising the above.

[0074] Example 2: The system of Example 1, wherein the operation comprises obtaining a plurality of widths of the block stripes, each of the plurality of widths representing an amount of blocks within the respective block stripe associated with the reliability grade exceeding the threshold.

[0075] Example 3: The system of Example 1 or 2, wherein the operation comprises determining that an individual width of the second block stripe is at least one block greater than the average width, and selecting the second block stripe in response to determining that the individual width of the second block stripe is greater than the average width.

[0076] Example 4: The system according to any one of Examples 1 to 3, wherein the operation includes calculating the average width based on the average of the plurality of widths of the block stripes.

[0077] Example 5: The system according to any one of Examples 1 to 4, wherein the operation includes associating one or more blocks of a third block stripe of the block stripes with the first block stripe.

[0078] Example 6: The system according to any one of Examples 1 to 5, wherein the operation includes generating a replacement table including a first block identifier of a first block of the first block stripe associated with a reliability grade exceeding (e.g., below) the threshold, and associating the first block identifier with a second block identifier of the one or more blocks of the second block stripe associated with the first block stripe.

[0079] Example 7: The system according to Example 6, wherein the replacement table is stored in a DRAM.

[0080] Example 8: The system according to any one of Examples 1 to 7, wherein the operation includes generating a defective block table including a first block identifier of a first block of the first block stripe associated with a reliability grade less than the threshold, and associating the first block identifier with an indication of whether the first block of the first block stripe has been repaired.

[0081] Example 9: The operation includes receiving a write operation associated with the first block stripe, accessing a set of blocks of the first block stripe, and determining that a first block of the set of blocks of the first block stripe is associated with a bad block indication, where the bad block indication represents a block associated with a reliability grade less than the threshold, the determining, and determining whether the first block is associated with a repaired indication, the system according to any one of Examples 1 to 8.

[0082] Example 10: The operation includes omitting writing to the first block in response to determining that the first block of the set of blocks of the first block stripe is not associated with the repaired indication, and obtaining a second block of the set of blocks adjacent to the first block, the system according to Example 9.

[0083] Example 11: The operation includes accessing a second block of the one or more blocks of the second stripe identified in a replacement table and performing the write operation on the second block in response to determining that the first block of the set of blocks of the first block stripe is associated with the repaired indication, the system according to any one of Examples 1 to 10.

[0084] Example 12: The operation includes accessing configuration data, where the configuration data includes a table associating individual blocks of the set of memory components with respective reliability grades, and the reliability grades indicate at least one of data retention parameters, read disturbance parameters, error rates, leakage currents, cross temperature parameters, or durability parameters, the system according to any one of Examples 1 to 11.

[0085] Example 13: The determination that the first block stripe includes a block amount less than the average amount of the blocks includes determining that the first block stripe includes a block that is less than the average amount of the blocks by a threshold amount. The system according to any one of Examples 1 to 12.

[0086] Example 14: The set of blocks of the first block stripe is distributed across a plurality of memory dies or across a plurality of memory planes, each of the block stripes is of equal size, and each includes a respective set of blocks across the plurality of planes or dies. The system according to any one of Examples 1 to 13.

[0087] Example 15: The second block stripe includes individual blocks associated with virtual defects, and the operation includes causing the virtual defects to cease to be associated with the individual blocks in response to associating the one or more blocks of the second block stripe with the first block stripe. The system according to any one of Examples 1 to 14.

[0088] Example 16: The determination that the first block stripe of the block stripes includes the small amount of blocks is performed when the first block stripe is in a garbage state or an erased state, and the second block stripe is selected from a garbage pool of the block stripe or a free pool of the block stripe. The system according to any one of Examples 1 to 15.

[0089] Example 17: The operation includes, after a certain period, associating the one or more blocks of the second block stripe with a third block stripe instead of the first block stripe. The system according to any one of Items 1 to 16 of Examples 1 to 16.

[0090] Example 18: The system according to any one of Examples 1 to 17, wherein one or more blocks of the second block stripe are selected in response to determining that a program erase count (PEC) of the one or more blocks is lower than a PEC count of a set of blocks of the first block stripe.

[0091] A method and a computer-readable storage medium containing instructions for executing any one of the above examples.

[0092] FIG. 6 shows an exemplary machine in the form of a computer system 600, in which a set of instructions can be executed to cause the machine to execute any one or more of the methods described herein. In some embodiments, the computer system 600 may correspond to a host system (e.g., host system 120 of FIG. 1) that includes, is coupled to, or utilizes a memory subsystem (e.g., memory subsystem 110 of FIG. 1), or may be used to execute operations of a controller (e.g., to execute an operating system to perform operations corresponding to media operation manager 122 of FIG. 1). In alternative embodiments, the machine can be connected (e.g., network-connected) to other machines within a local area network (LAN), intranet, extranet, and / or the Internet. The machine can function as a server or client machine in a client-server network environment, as a peer machine in a peer-to-peer (or distributed) network environment, or as a server or client machine in a cloud computing infrastructure or environment.

[0093] The machine may be a personal computer (PC), tablet PC, set-top box (STB), personal digital assistant (PDA), cellular phone, web appliance, server, network router, network switch, network bridge, or any machine capable of executing (sequentially or otherwise) a set of instructions that specify actions to be taken by that machine. Further, although a single machine is shown, the term "machine" shall also be construed to include any collection of machines (or set of machines) that individually or jointly execute a set (or multiple sets) of instructions to perform any one or more of the methodologies described herein.

[0094] An exemplary computer system 600 includes a processing device 602, main memory 604 (e.g., read only memory (ROM), flash memory, dynamic random access memory (DRAM) such as synchronous DRAM (SDRAM) or Rambus DRAM (RDRAM)), static memory 606 (e.g., flash memory, static random access memory (SRAM)), and a data storage system 618, which communicate with each other via a bus 630.

[0095] The processing device 602 represents one or more general-purpose processing devices, such as a microprocessor, a central processing unit, etc. More specifically, the processing device 602 can be a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, a processor implementing other instruction sets, or a processor implementing a combination of instruction sets. The processing device 602 can also be one or more dedicated processing devices such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a digital signal processor (DSP), a network processor, etc. The processing device 602 is configured to execute instructions 626 for performing the operations and steps described herein. The computer system 600 can further include a network interface device 608 for communicating via the network 620.

[0096] The data storage system 618 can include a machine-readable storage medium 624 (also known as a computer-readable medium) in which one or more sets of instructions 626 or software embodying any one or more of the methods or functions described herein are stored. The instructions 626 can also reside, completely or at least partially, within the main memory 604 and / or within the processing device 602 during execution of the processing device by the computer system 600, and the main memory 604 and / or the processing device 602 also constitute a machine-readable storage medium. The machine-readable storage medium 624, the data storage system 618, and / or the main memory 604 may correspond to the memory subsystem 110 of FIG. 1.

[0097] In one embodiment, instruction 626 implements functions corresponding to media operation manager 122 of FIG. 1. Although machine-readable storage medium 624 is shown as a single medium in the exemplary embodiment, the term "machine-readable storage medium" should be construed to include a single medium or multiple media storing one or more sets of instructions. The term "machine-readable storage medium" should also be construed to include any medium capable of storing or encoding a set of instructions for execution by a machine, and causing the machine to perform any one or more of the methods of the present disclosure. Thus, the term "machine-readable storage medium" is construed to include, but not be limited to, solid-state memory, optical media, and magnetic media.

[0098] Some of the foregoing detailed description has been presented from the perspective of symbolic representations of algorithms and operations on data bits within computer memory. Such algorithmic descriptions and representations are the means used by those skilled in the data processing arts to most effectively convey the substance of their work to others skilled in the art. An algorithm is here, and generally, conceived to be a self-consistent sequence of operations leading to a desired result. The operations are those requiring physical manipulation of physical quantities. Usually, though not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, combined, compared, and otherwise manipulated. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, etc.

[0099] However, it should be borne in mind that all of these and similar terms are to be associated with appropriate physical quantities, and are merely convenient labels applied to these quantities. The present disclosure can refer to the operations and processes of a computer system, or similar electronic computing devices, that manipulate data represented as physical (electronic) quantities within the registers and memories of the computer system, and transform the data into other data similarly represented as physical quantities within the memories or registers of the computer system or other information storage systems.

[0100] The present disclosure also relates to an apparatus for performing the operations of this specification. This apparatus can be specifically constructed for the intended purpose, or the apparatus can include a general-purpose computer selectively activated or reconfigured by a computer program stored in the computer. Such a computer program can be stored in a computer-readable storage medium, which is any type of disk, including floppy disks, optical disks, CD-ROMs, and magneto-optical disks, read-only memory (ROM), random access memory (RAM), erasable programmable read-only memory (EPROM), EEPROM, magnetic or optical cards, or any other type of medium suitable for storing electronic instructions, each coupled to a computer system bus, but not limited to these.

[0101] The algorithms and displays presented herein are not inherently related to a particular computer or other device. It will be appreciated that various general-purpose systems can be programmed according to the teachings herein, or it may be convenient to construct more specialized devices to perform the method. The structure of various of these systems will appear as described in the above description. Additionally, the present disclosure is not described with respect to any particular programming language. It should be understood that various programming languages can be used to implement the teachings of the present disclosure as described herein.

[0102] The present disclosure can be shown as a computer program product or software that can include a machine-readable medium storing instructions that can be used to program a computer system (or other electronic device) to execute a process in accordance with the present disclosure. A machine-readable medium includes any mechanism for storing information in a form readable by a machine, e.g., a computer. In some embodiments, the machine-readable (e.g., computer-readable) medium includes a machine-readable (e.g., computer-readable) storage medium such as a read-only memory (ROM), random access memory (RAM), magnetic disk storage media, optical storage media, flash memory components, and the like.

[0103] In the foregoing specification, embodiments of the present disclosure have been described with reference to specific exemplary embodiments thereof. It will be apparent that various modifications may be made without departing from the broader spirit and scope of the embodiments of the present disclosure as set forth in the following claims. Accordingly, the specification and drawings are to be regarded in an illustrative rather than a limiting sense.

Claims

1. A system comprising: A set of memory components of a memory subsystem; A processing device operably coupled to the set of memory components, the processing device configured to: Group a plurality of sets of blocks of the set of memory components into respective block stripes; Calculate an average width across the block stripes, the average width representing an average amount of blocks within each of the block stripes associated with a reliability grade exceeding a threshold; Determine that a first block stripe of the block stripes includes a quantity of blocks associated with a reliability grade exceeding the threshold that is less than the average amount of blocks; In response to determining that the first block stripe includes the quantity of blocks that is less than the average amount of blocks, associate one or more blocks of a second block stripe of the block stripes with the first block stripe; The processing device configured to perform operations including the above; The system including the above.

2. The operations further include: Obtaining a plurality of widths of the block stripes, each of the plurality of widths representing an amount of blocks within each of the respective block stripes associated with the reliability grade exceeding the threshold; The system according to claim 1, including the above.

3. The operations further include: Determining that an individual width of the second block stripe is at least one block greater than the average width; In response to determining that the individual width of the second block stripe is greater than the average width, selecting the second block stripe; The system according to claim 2, including the above.

4. The operations further include: Calculating the average width based on an average of the plurality of widths of the block stripes; The system according to claim 2, including the above.

5. The operations further include: Associating one or more blocks of a third block stripe of the block stripes with the first block stripe; The system according to claim 1, including the above.

6. The operations further include: Generating a replacement table including a first block identifier of a first block of the first block stripe associated with a reliability grade less than the threshold; associating, with the first block identifier, the second block identifier of the one or more blocks of the second block stripe associated with the first block stripe; The system according to claim 1, comprising: **Claim 7** The system according to claim 6, wherein the replacement table is stored in a DRAM. **Claim 8** The operation is generating a bad block table including the first block identifier of the first block of the first block stripe associated with the reliability grade less than the threshold; associating, with the first block identifier, an indication of whether the first block of the first block stripe has been repaired; The system according to claim 6, comprising: **Claim 9** The operation is receiving a write operation associated with the first block stripe; accessing a set of blocks of the first block stripe; determining that a first block of the set of blocks of the first block stripe is associated with a bad block indication, the bad block indication representing a block associated with a reliability grade less than the threshold; determining whether the first block is associated with a repaired indication; The system according to claim 1, comprising: **Claim 10** The operation is omitting writing to the first block and obtaining a second block of a set of blocks adjacent to the first block in response to determining that the first block of the set of blocks of the first block stripe is not associated with the repaired indication; The system according to claim 9, comprising: **Claim 11** The operation is accessing the second block of the one or more blocks of the second stripe identified by the replacement table in response to determining that the first block of the set of blocks of the first block stripe is associated with the repaired indication; performing the write operation on the second block; The system according to claim 9, comprising: **Claim 12** The operation is Accessing configuration data, wherein the configuration data includes a table associating individual blocks of the set of memory components with respective reliability grades, and the reliability grades indicate at least one of a data retention parameter, a read interference parameter, an error rate, a leakage current, a cross temperature parameter, or a durability parameter, said accessing The system according to claim 1, comprising.

13. Said determining that the first block stripe includes an amount of blocks less than the average amount of the blocks includes determining that the first block stripe includes blocks that are less than a threshold amount by the average amount of the blocks. The system according to claim 1.

14. The set of blocks of the first block stripe is distributed across a plurality of memory dies or across a plurality of memory planes, each of the block stripes being of equal size and including a respective set of blocks across the plurality of planes or dies. The system according to claim 1.

15. The second block stripe includes individual blocks associated with virtual defects, and the operation is Deleting the virtual defect from the association with the individual blocks in response to associating the one or more blocks of the second block stripe with the first block stripe The system according to claim 1, comprising.

16. Said determining that the first block stripe of the block stripes includes the smaller amount of blocks is performed when the first block stripe is in a garbage state or an erased state, and the second block stripe is selected from a garbage pool of the block stripe or an empty pool of the block stripe. The system according to claim 1.

17. The system according to claim 1, wherein the operation includes, after a certain period, associating the one or more blocks of the second block stripe with a third block stripe instead of the first block stripe.

18. The system of claim 1, wherein one or more blocks of the second block stripe are selected in response to determining that a program erase count (PEC) of the one or more blocks is lower than a PEC count of a set of blocks of the first block stripe.

19. A computerized method, comprising: grouping a plurality of sets of blocks of a set of memory components into respective block stripes; calculating an average width across the block stripes, the average width representing an average amount of blocks within each of the block stripes associated with a reliability grade exceeding a threshold; determining that a first block stripe of the block stripes includes an amount of blocks associated with a reliability grade exceeding the threshold that is less than the average amount of blocks; associating one or more blocks of a second block stripe of the block stripes with the first block stripe in response to determining that the first block stripe includes the amount of blocks that is less than the average amount of blocks; The computerized method comprising the above steps.

20. A non-transitory computer-readable storage medium including instructions that, when executed by a processing device, cause the processing device to: group a plurality of sets of blocks of a set of memory components into respective block stripes; calculate an average width across the block stripes, the average width representing an average amount of blocks within each of the block stripes associated with a reliability grade exceeding a threshold; determine that a first block stripe of the block stripes includes an amount of blocks associated with a reliability grade exceeding the threshold that is less than the average amount of blocks; associate one or more blocks of a second block stripe of the block stripes with the first block stripe in response to determining that the first block stripe includes the amount of blocks that is less than the average amount of blocks; The non-transitory computer-readable storage medium that causes the above operations to be executed.

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