Systems and methods for dark current elimination

Abstract

According to a disclosed embodiment, a system includes a photodetector (PD) that generates a first type of charge and a second type of charge, an integrating capacitor connected to the PD, and a controller configured to switch between a first collection state of the integrating capacitor and a second collection state of the integrating capacitor, wherein during the first collection state, the integrating capacitor is charged by a first type of charge derived from the photocurrent and by a first type of charge derived from the dark current, and during the second collection state, the integrating capacitor is discharged by a second type of charge derived from the dark current, the first type of charge being reversed with respect to the second type of charge such that the charge derived from the dark current is thereby substantially eliminated.

Description

[Technical Field]

[0001] The present disclosure relates to photonic systems, and more particularly to systems and methods for eliminating or substantially reducing dark current effects in such systems. [Background technology]

[0002] A light-detecting device, such as a photodetector array, can include a large number of photosites, each of which includes one or more photodetectors for detecting impinging light and a capacitor for storing the charge provided by the photodetector. The capacitor may be implemented as a dedicated capacitor and / or using the parasitic capacitance of the photodiode, transistor, and / or other components of the photosite.

[0003] In use, a photodiode (photodetector) having p- and n-doped regions is reverse-biased by connecting an applied voltage (positive voltage to the cathode (n region) and negative voltage to the anode (p region)), thereby increasing the depletion region at the pn junction. Photons from incident light that illuminate the photodiode and are absorbed in (or near) the depletion region generate electron-hole pairs that migrate to opposite ends of the photodiode due to the electric field from the applied voltage. The electrons migrate toward a positive potential on the cathode, and the holes migrate toward a negative potential on the anode. These migrating charge carriers (electrons and holes) form a photocurrent in the photodiode that is proportional to the illumination intensity. The charge associated with this photocurrent can be collected in a capacitor during an "integration time" or "integration period," i.e., a period during which current flowing into the capacitor causes charge to accumulate, after which the level of accumulated charge can be determined. The length of the integration time can be selected based on factors such as, but not limited to, the sensitivity of the photodetector and / or the brightness of the incident light.

[0004] Dark current is a well-known phenomenon in the industry of charge-coupled devices (CCDs) and photosensitive integrated circuits. Dark current results from thermal energy within the material lattice that comprises the CCD. Charge, e.g., electrons, is generated over time and is independent of the light incident on the detector. When referring to a photodetector or photodiode, dark current refers to the current that flows through the photodetector, including when no photons are entering the device, such as when the photodetector is not illuminated. Dark current in a photodetector can result from the random generation of electrons and holes within the depletion region of the photodetector. When the photodetector is connected to an integration capacitor (e.g., in a camera), the dark current can be "counted" as a signal and can fill the capacitor with redundant charge, e.g., a null signal, which can prevent longer integration times required in some conditions, such as low light conditions. Those skilled in the art will understand that this signal increase is also accompanied by statistical fluctuations known as "dark current noise."

[0005] Current approaches to reducing such dark current may include using a "dummy" photodetector that is shielded from the illumination and subtracting the signal detected by the "dummy" photodetector from the signal of another photodetector that is exposed to the illumination. Disadvantages of such methods may include large area requirements and higher levels of sophisticated electronic circuitry, for example in a readout integrated circuit (ROIC).

[0006] Therefore, in photodetectors characterized by dark current accumulation, it is necessary and advantageous to physically eliminate the dark current using a simple and cost-effective solution implemented at the photodetector level. Summary of the Invention [Means for solving the problem]

[0007] According to a disclosed embodiment, a system includes a photodetector (PD) that generates a first type of charge and a second type of charge, an integrating capacitor connected to the PD, and a controller configured to switch between a first collection state of the integrating capacitor and a second collection state of the integrating capacitor, wherein during the first collection state, the integrating capacitor is charged by a first type of charge derived from the photocurrent and by a first type of charge derived from the dark current, and during the second collection state, the integrating capacitor is discharged by a second type of charge derived from the dark current, the first type of charge being reversed with respect to the second type of charge such that the charge derived from the dark current is thereby substantially eliminated.

[0008] In some embodiments, the first collection state is synchronized with illumination reaching the PD and the second collection state is synchronized with the absence of illumination reaching the PD, hi some embodiments, the first collection state is synchronized with the generation of a first type of charge and the second collection state is synchronized with the generation of a second type of charge.

[0009] In some embodiments, the first type of charge and the second type of charge are holes and electrons, respectively, or vice versa. In some embodiments, the controller is configured to alternately send the first type of charge to the integration capacitor during the first collection state and the second type of charge to the integration capacitor during the second collection state. In some embodiments, the system further comprises an optical shutter configured to allow or block irradiation reaching the PD. In some embodiments, the optical shutter is controlled by the controller and configured to allow or block irradiation reaching the PD in synchronization with switching between the first collection state and the second collection state. In some embodiments, the optical shutter is one of a mechanical optical shutter, a liquid crystal optical shutter, a MEMS optical shutter, or an active grating resonant coupling.

[0010] In some embodiments, the system further includes a switching system connecting the PD and the integration capacitor, the switching system configured to switch between a first collection state and a second collection state. In some embodiments, the switching system includes first, second, and third switches, the first switch being between the PD and the integration capacitor, the second switch being between the PD and the third switch, and the third switch being between the power source, the PD, and the integration capacitor.

[0011] According to a disclosed embodiment, a method includes providing a photodetector (PD) connected to an integrating capacitor and a controller, wherein the PD generates a first type of charge and a second type of charge opposite to the second type of charge; switching, by the controller, to a first collection state of the integrating capacitor; charging the integrating capacitor with the first type of charge derived from the photocurrent and the first type of charge derived from the dark current during the first collection state; switching, by the controller, to a second collection state of the integrating capacitor; and discharging, during the second collection state, with the second type of charge derived from the dark current, thereby substantially eliminating the charge derived from the dark current.

[0012] In some embodiments, the first collection state is synchronized with illumination reaching the PD and the second collection state is synchronized with the absence of illumination reaching the PD, hi some embodiments, the first collection state is synchronized with the generation of a first type of charge and the second collection state is synchronized with the generation of a second type of charge.

[0013] In some embodiments, the first type of charge and the second type of charge are holes and electrons, respectively, or vice versa. In some embodiments, the controller is configured to send the first type of charge and the second type of charge to the integration capacitor in the first collection state and the second collection state, respectively.

[0014] In some embodiments, the method further includes providing an optical shutter configured to allow or block illumination of the PD. In some embodiments, the optical shutter is controlled by a controller, and the allowing or blocking of illumination is substantially synchronized by the controller with the switch between the first collection state and the second collection state. In some embodiments, the optical shutter is one of a mechanical optical shutter, a liquid crystal optical shutter, a MEMS optical shutter, or an active grating resonant coupling.

[0015] In some embodiments, the method further includes providing a switching system connecting the PD and the integration capacitor, the switching system configured to switch between a first collection state and a second collection state. In some embodiments, the switching system includes first, second, and third switches, the first switch being between the PD and the integration capacitor, the second switch being between the PD and the third switch, and the third switch being between the power source, the PD, and the integration capacitor.

[0016] According to a disclosed embodiment, a system includes a photodetector (PD), the PD generating a first type of charge resulting from a combination of photocurrent and dark current and a second type of charge resulting from the dark current; an integrating capacitor connected to the PD; a switching system; and a controller configured to switch between a first collection state of the integrating capacitor and a second collection state of the integrating capacitor using the switching system, wherein during the first collection state, the integrating capacitor is charged with the first type of charge and during the second collection state, the integrating capacitor is discharged with the second type of charge, and the first type of charge is inverted with respect to the second type of charge by the switching system, such that the inversion substantially results in cancellation or elimination of the charge resulting from the dark current when the net number of charges resulting from the dark current and collected by the integrating capacitor becomes substantially zero.

[0017] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate several embodiments and, together with the description, serve to explain the disclosed principles. [Brief explanation of the drawings]

[0018] [Figure 1] FIG. 1 is a schematic block diagram illustrating a system for dark current removal in accordance with some implementations of the disclosed subject matter. [Figure 2A] FIG. 2A is an example electrical circuit diagram of a system for dark current removal according to some implementations of the disclosed subject matter. [Figure 2B] FIG. 2B is an example electrical circuit diagram of a system for dark current removal according to some implementations of the disclosed subject matter. [Figure 3] FIG. 3 is a flowchart of an exemplary process for dark current removal in an imaging system, according to some implementations of the disclosed subject matter. [Figure 4A] FIG. 4A is an exemplary graph illustrating the accumulated voltage across an integration capacitor during multiple successive collection states, according to some implementations of the disclosed subject matter. [Figure 4B] FIG. 4B is an exemplary graph illustrating the accumulated voltage across the integration capacitor during multiple successive collection states, according to some implementations of the disclosed subject matter. [Figure 5] FIG. 5 is a flowchart of an exemplary process for dark current removal in an imaging system, according to some implementations of the disclosed subject matter. [Figure 6] FIG. 6 is an exemplary graph illustrating the accumulated voltage across the integration capacitor during multiple successive collection states, according to some implementations of the disclosed subject matter. DETAILED DESCRIPTION OF THE INVENTION

[0019] In the following detailed description, numerous specific details are set forth to provide a thorough understanding of the present disclosure. However, it will be understood by those skilled in the art that the present disclosure may be practiced without these specific details. In other instances, well-known methods, procedures, and components have not been described in detail so as not to obscure the present disclosure. In the drawings and written description, like reference numerals indicate components that are common to different embodiments or configurations. It will be understood that for simplicity and clarity of illustration, elements shown in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity.

[0020] The present disclosure describes systems and methods that can substantially reduce or eliminate dark current generated by a photodetector. Eliminating dark current generated by a photodetector can allow for longer integration times of an integrating capacitor connected to the photodetector, since the charge accumulated by the capacitor can be reduced due to dark current elimination. Dark current elimination or cancellation can be performed by subtracting the signal generated by the photodetector while illuminated from the signal generated by the same photodetector while not illuminated. To eliminate or cancel dark current, the net collection of charge resulting from dark current is ensured to be substantially zero. In some embodiments, the accumulated signal may have statistical fluctuations known as "dark current noise," which may not be eliminated by elimination or cancellation of dark current generated by the photodetector.

[0021] In some embodiments, the disclosed system may be configured to alternately allow or prevent illumination of the photodetector to generate the same photodetector signal under illuminated and non-illuminated conditions. In some embodiments, an optical shutter may be used to alternately enable or block illumination of the photodetector. The illuminated and non-illuminated states of the photodetector may be synchronized, for example, by one or more electrical switches configured to switch between collecting a first type of charge and a second type of charge. For example, between collecting holes and electrons generated by the photodetector, when the photodetector is illuminated, a first type of charge derived from a combination of photocurrent and dark current is collected by the integrating capacitor, and when the photodetector is not illuminated, a second type of charge derived from dark current is collected by the integrating capacitor. Because the collected charges have opposite signs, for example, a signal (charge) related to the dark current collected when the photodetector is not illuminated can cancel out the dark current collected when the photodetector is illuminated, leaving only the desired photosignal-related charge collected when the photodetector is illuminated, e.g., the signal generated by the photocurrent. In some embodiments, the first type of charge is reversed by a switching system relative to the second type of charge such that the reversal substantially cancels or eliminates collected charge resulting from dark current. By eliminating, canceling, or substantially reducing charge generated by dark current, longer integration periods are possible, allowing for collection of primarily or only desired photosignal-related charge.

[0022] Advantageously, the disclosed systems and methods of use rely on physical cancellation of collected charge and therefore may not require complex analog circuitry or additional "dummy" photodetectors, thus further saving space in the implementation of the photodetector. Even more advantageously, the disclosed systems and methods of use can substantially reduce or eliminate dark current from the photodetector without reducing the responsivity of the detector. Use of the disclosed systems and methods can be particularly advantageous when the material used in the photodetector may be characterized by a relatively high dark current, for example, when using germanium-based photodiodes.

[0023] Hereinafter, in this description, for simplicity, the term “photodetector array” may be replaced with the acronym “PDA,” and the terms “photodetector” or “photodiode” may be replaced with the acronym “PD.” In some embodiments, a PDA may include multiple photosites, each containing one or more photodetectors, and the PDA and / or photosites may also include some circuitry or additional components in addition to the photodetectors. A device configured to alternately allow or prevent illumination of a photodetector may be referred to herein as an “optical shutter” or “shutter” for convenience, although it should be understood that such devices are not limited to optical shutters. The terms “optical signal” or “optical current” or “photocharge” or “photocurrent” may be used interchangeably herein to refer to a signal generated by a PD that represents the desired detected illumination. The terms “inverted,” “reverse,” and “inverted” (referring to the charge generated by a PD) may be used interchangeably herein.

[0024] 1 is a schematic block diagram illustrating a system configured for dark current removal in accordance with some implementations of the subject matter of this disclosure. The system 100 can include a photodetector 110, a switching system 112, an integrator 114, an optical shutter 116, and a controller 118.

[0025] PD 110 can detect incident radiation or illumination, such as reflected, ambient, or direct illumination from illumination source 120, and generate an electrical signal representative of the amount of incident illumination within the detectable spectral range of PD 110. In some embodiments, illumination source 120 can be external to system 100, while in some embodiments, illumination source 120 can be integrated into or part of system 100. In addition to incident illumination, the electrical signal generated by PD 110 can also include dark current, which can accumulate over an integration time and can be removed according to embodiments of the present disclosure.

[0026] In some embodiments, the PD 110 may include an anode and a cathode that may be electrically connected to a voltage source, e.g., voltage source 122 of FIGS. 2A-2B, to apply a voltage across the PD 110 to bias it (e.g., reverse bias for operation as a photodetector). The PD 110 may generate free charge carriers, e.g., a first type of charge and a second type of charge. In some embodiments, the first type of charge is opposite to the second type of charge, e.g., electrons and holes. For example, the PD 110 may include a PN junction that generates electrons and holes in a semiconductor. Those skilled in the art will appreciate that any type of junction or interface between two or more types of semiconductor materials that can generate electrons and holes may be used.

[0027] The switching system 112 can be used, activated, or controlled, for example, by the controller 118, to enable desired operation and synchronization of the components of the system 100. According to some embodiments, the switching system 112 can be connected to the PD 110, the controller 118, the integrator 114, and the shutter 116. Any connection that enables desired operation of the components can be made, for example, the switching system 112 can be connected to the PD 110 at the anode and cathode of the PD 110.

[0028] In some embodiments, the switching system 112 may include one or more electrical switches, such as voltage-controlled switches, current-controlled switches, or any type of electrical switch. The switching system 112 may be connected to and controlled by the controller 118. The switching system 112 may be configured to control switching between at least two states, also referred to herein as “collection states,” that enable the integrating capacitor 114 to collect the signal generated by the PD 110. A collection state may be a period or duration during which the integrating capacitor 114 is charged or discharged. A collection state may be defined by a predetermined time during which the integrating capacitor 114 is charged or discharged while the elements of the system 100 are connected in a predetermined configuration.

[0029] The switching system 112 can control the configuration of the system 100 as described in embodiments of the present invention. For example, a first collection state can be synchronized with illumination reaching the PD 110, and a second collection state can be synchronized with the absence of illumination reaching the PD 110 (or vice versa). In some embodiments, the first (illuminated) collection state can include collection of charge from the PD 110, including charge from photocurrent and charge from dark current, and the second (unilluminated) collection state can include collection of charge from the PD 110, including charge from reverse dark current.

[0030] The integrator or “integration capacitor” 114 may be any capacitive device known in the art for allowing the storage of electrical energy and building up charge over an integration period, including cumulative charge collected during the integration period. The integrator 114 may be connected to the PD 110 via the switching system 112 such that in each of a plurality of collection states, the integrator 114 may be charged and / or discharged with charge generated by the PD 110. For example, opposite charges (alternatively referred to herein as “opposite charge carriers,” “inversion charge carriers,” or “electrons and holes”) may be alternately collected in a first collection state and a second collection state. In accordance with the disclosed operation of the system 100, alternating dark current-related opposite charges may be collected by the integrator 114, and the collected opposite dark current-related charges may cancel each other (or alternatively may be said to “charge and discharge” the integrator 114), thereby reducing, subtracting, or eliminating charge from the dark current during the integration period. In some embodiments, the integration period may be controlled by the controller 118. In some embodiments, following completion of the integration period, the accumulated signal collected within the integrator 114 may be read by or provided to an external device (not shown) to determine the signal generated by the PD 110 so that this signal can be used, for example, as part of an imaging system.

[0031] The optical shutter 116 may be configured to prevent or allow exposure of the PDs 110 to illumination. In the present disclosure, the optical shutter 116 may block illumination of the PDs 110 when the optical shutter 116 is said to be “on” or “activated,” and may allow illumination of the PDs 110 when the optical shutter 116 is said to be “off” or “deactivated.” In some embodiments, the optical shutter 116 may include, but is not limited to, a mechanical light shutter, a liquid crystal light shutter, a MEMS light shutter, and / or an active grating resonant coupling. In some embodiments, a single optical shutter 116 may be provided over each PD 110 in the PDA to block / allow illumination for each PD 110, or a single optical shutter 116 may be provided over multiple PDs 110 to simultaneously block or allow illumination for the covered PDs 110.

[0032] The controller 118 can control the operation and synchronization of the components of the system 100. The controller 118 can be a computing device as described herein or can include a non-transitory computer-readable medium containing instructions configured to perform the functions and / or actions necessary to provide the functionality described herein when executed by at least one processor. When the system 100 is referred to herein as providing a particular function or performing an action, it should be understood that the function or action can be performed by the controller 118, which can control other components of the system 100. For example, the controller 118 can activate the optical shutter 116, thereby preventing the PD 110 from receiving any illumination, while simultaneously controlling the switching system 112 to change the collection state of the integrator 114 from a first collection state to a second collection state, e.g., from holes to electrons, or vice versa.

[0033] In some embodiments, the functionality of controller 118 is provided by other components. In a non-limiting example, optical shutter 116 may include embedded switching logic that is connected to and activates switching system 112 (or vice versa).

[0034] For simplicity, FIG. 1 shows system 100 having a single PD 110, switching system 112, integrator 114, and optical shutter 116, but it should be understood that in practice system 100 may include any suitable number of PDs 110 formed in a PDA, along with a corresponding number of switching systems 112, integrators 114, and optical shutters 116.

[0035] In use, system 100 may function as follows: PD 110, connected to integrator 114, may generate a first type of charge when exposed to illumination and may generate a second type of charge that may be reversed relative to the first type when illumination of PD 110 is prevented. For example, the first type of charge may include electrons and the second type of charge may include holes, or vice versa.

[0036] The controller 118 may use, control, or operate the switching system 112 to switch between a first collection state of the integrator 114 and a second collection state of the integrator 114. The first collection state may be synchronized with illumination reaching the PD 110, and the second collection state may be synchronized with the absence of illumination reaching the PD 110 (or vice versa). The first collection state may be synchronized with the generation of a first type of charge (by the PD 110), and the second collection state may be synchronized with the generation of a second type of charge (by the PD 110). During the first collection state, the integrator 114 may be charged with the first type of charge, and during the second collection state, the integrator 114 may be discharged with a second type of charge opposite to the first type of charge. The amount of charge from the first type may result from photocurrent and dark current, while the amount of charge from the second type may result from dark current only (or vice versa). The opposite or reversal charge of the first and second types of charge, e.g., holes and electrons, may remove charge resulting from or attributable to dark current, leaving the integrating capacitor 114 with only charge resulting from light impinging on the PD 110 (and no charge resulting from unwanted dark current). The amount of charge resulting from or attributable to dark current in the first collection state is the reversal charge relative to substantially the same amount of charge resulting from or attributable to dark current in the second collection state, and thus the charge resulting from or attributable to dark current is cancelled out, subtracted, or removed after every two successive collection states, e.g., the first and second collection states.

[0037] According to some embodiments, during the first collection state, the shutter 116 is “off,” so that illumination can reach the PD 110. The PD 110 can generate a first type of charge, e.g., electrons, derived from or resulting from both photocurrent (due to impinging light energy) and dark current (due to thermal energy in the PD structure). Thus, during the first collection state, the integration capacitor 114 can be charged by the first type of charge derived from the photocurrent and by the first type of charge derived from the dark current. During the second collection state, the shutter 116 is “on,” so that illumination cannot reach the PD 110, i.e., the PD can be in a dark condition. Although illumination is not reaching the PD 110, the PD 110 can generate charges derived from or resulting from the dark current alone. The PD 110 can generate a second type of charge, e.g., holes, derived from or resulting from the dark current (due to thermal energy in the PD structure). Thus, during the second collection state, the integration capacitor may be discharged with a second type of charge derived from the dark current, thereby substantially eliminating the charge due to the dark current.

[0038] 2A and 2B are exemplary electrical circuit diagrams of a system for dark current removal according to some implementations of the presently disclosed subject matter. The circuit diagrams of FIGS. 2A-2B show exemplary and illustrative circuit implementations of the system 100 of FIG. 1. Additionally, the circuit diagrams of FIGS. 2A-2B are simplified and may exclude other circuit components that are not considered essential to understanding the concepts disclosed herein. Those skilled in the art will appreciate that the circuit diagrams of FIGS. 2A-2B are merely exemplary implementations of the system 100 of FIG. 1, and that any other circuit or implementation including the same or different components and elements may be used to perform or implement embodiments of the disclosed subject matter.

[0039] Circuit 200 may include integrating capacitor 114, voltage source 122, PD 110, switching system 112, and shutter 116. Circuit 200 may be configured to enable switching between a first collection state of integrating capacitor 114 and a second collection state of integrating capacitor 114, where the first collection state is synchronized with illumination reaching PD 110 and the second collection state is synchronized with the absence of illumination reaching PD 110. In some embodiments, some or all of the components of circuit 200 may be controlled by a controller, such as controller 118 described above. In some embodiments, such as shown in the exemplary circuit diagrams of FIGS. 2A-2B, the switching system may include first, second, and third switches, where the first switch is between the PD and the integrating capacitor, the second switch is between the PD and the third switch, and the third switch is between the power supply, the PD, and the integrating capacitor.

[0040] In some embodiments, such as shown in the exemplary circuit diagrams of FIGS. 2A-2B, the integrating capacitor 114 may include a capacitor 114-1 and an operational amplifier (OP AMP) 114-2 in an inverse feedback configuration. The PD 110 may include two terminals, an anode designated "A" and a cathode designated "B," which output charges having opposite signs. The voltage source 122 may include a cathode voltage (Vc) and an anode voltage (Va), where Vc may be applied to the cathode (C) of the PD 110 and Va may be applied to the anode (A) of the PD 110. Vc is the voltage applied to the cathode, and Va is the voltage applied to the anode. The voltages Va and Vc may be applied to the PD 110 to enable it to operate. For reverse biasing of the PD 110 to function as a PD, Vc may be positive and Va may be negative.

[0041] In some embodiments, the switching system 112 can be configured to direct electrical connectivity within portions of the circuit 200 to enable switching between a first collection state and a second collection state. The switching system 112 can connect the PD 110 and the integrating capacitor 114 to enable alternating collection of first and second charge types. As shown in FIGS. 2A-2B , the switching system 112, e.g., the switching system 112 of FIG. 1, can include switches 112-1, 112-2, and 112-3. Those skilled in the art will appreciate that the use of three switches represents an exemplary design, and any number of switches can be used to switch between two or more configurations of terminals of the PD 110, the terminals of the integrating capacitor 114, and the terminals of the voltage source 122, as described in the embodiments of the present disclosure.

[0042] In some embodiments, circuit 200 can be configured to collect a first type of charge or a second type of charge by switching system 112. For example, as shown in FIG. 2B, when the cathode (C) is connected to the positive terminal of capacitor 114-2 and a cathode voltage Vc is connected to the negative terminal of capacitor 114-2, the first type of charge can be collected by integrating capacitor 114. The anode (A) is connected to an anode voltage Va.

[0043] 2A, when the anode (A) is connected to the positive terminal of capacitor 114-2 and the anode voltage V is connected to the negative terminal of capacitor 114-2, a second type of charge can be collected by integrating capacitor 114. The cathode (C) is connected to V.

[0044] Switches 112-1, 112-2, and 112-3 may be configured for operation such that Vc is applied to C and Va is applied to A in both the first and second collection states to ensure that PD 110 is reverse biased and allows photocurrent and dark current to flow from C to A.

[0045] 2A, switches 112-1, 112-2, and 112-3 may be configured and substantially synchronized with optical shutter 116 such that in a first collection state, when PD 110 is not illuminated, e.g., because optical shutter 116 is “on” (light 130 is not reaching PD 110), a first type of charge from PD 110, including dark current-related charge, may be collected by integrating capacitor 114. As shown in FIG. 2B, switches 112-1, 112-2, and 112-3 may be configured and substantially synchronized with optical shutter 116 such that in a second collection state, when PD 110 is illuminated, e.g., because optical shutter 116 is “off” (light 130 is reaching PD 110), a second type of charge from PD 110, including photocurrent- and dark current-related charge, may be collected by integrating capacitor 114.

[0046] 2A and 2B, rearrangement of circuit 200 by switching switches 112-1, 112-2, and 112-3 results in a first type of charge collected in the first collection state being the opposite of the second type of charge collected in the second collection state, such that integration capacitor 114 is charged with a first type of charge derived from dark current and discharged with an opposite second type of charge derived from dark current, thereby substantially eliminating or canceling the charge derived from dark current. As described in embodiments of the present disclosure, with reference to FIG. 1, controller 118 may direct the substantially synchronized switching of switches 112-1, 112-2, and 112-3 and optical shutter 116. It should be understood that in some embodiments, the first collection state of the switching system 112 may be substantially synchronized with the illumination of the PD 110 (the optical shutter 116 is “off”) and the second collection state may be substantially synchronized with the absence of illumination of the PD 110 (the optical shutter 116 is “on”), and in other embodiments, the first collection state of the switching system 112 may be substantially synchronized with the absence of illumination of the PD 110 (the optical shutter 116 is “on”) and the second collection state may be substantially synchronized with the illumination of the PD 110 (the optical shutter 116 is “off”).

[0047] Because charge associated with or resulting from dark current may be present in both the first and second types of collected charge, the opposite first and second types of charge associated with dark current cancel each other out, thereby substantially reducing, eliminating, or canceling out dark current charge collection in the integration capacitor 114. In contrast, photocurrent-related charge, e.g., charge resulting from light impinging on the PD 110 that is collected only in the second collection state, accumulates in the integration capacitor 114 for the duration of the integration period.

[0048] FIG. 3 is a flowchart of an exemplary process for dark current removal in an imaging system according to some embodiments of the disclosed subject matter.

[0049] Flowchart 300 represents a process that may be performed, for example, by system 100 of Figure 1 and / or circuit 200 of Figures 2A-2B. According to some embodiments of the disclosed subject matter, a non-transitory computer-readable medium associated with system 100 includes instructions that, when executed by at least one processor, perform the operations described in each step as part of flowchart 300. The at least one processor may correspond, for example, to controller 118 of Figure 1.

[0050] In step 302, an integration period for an integration capacitor may begin, such as when an integration capacitor, eg, integration capacitor 114, is discharged.

[0051] In step 304, illumination may reach the PD, and for example, the optical shutter 116 may be deactivated to allow or enable illumination of the PD 110. The PD 110 may generate a first type of charge, including dark current-related charge and photocurrent-related charge. Substantially simultaneously, the controller 118 and / or the switching system 112 may switch the integration capacitor 114 to a first collection state, in which the integration capacitor 114 may collect or be charged by the first type of charge (electrons or holes) generated by the PD 110. In some embodiments of the present disclosure, the optical shutter is controlled by a controller, and allowing or blocking illumination is substantially synchronized by the controller with the switch between the first and second collection states.

[0052] In step 306, illumination can be prevented from reaching the PD, e.g., the optical shutter 116 can be activated to prevent illumination of the PD 110. The PD 110 can generate a second type of charge that includes dark current-related charge (and, because illumination is prevented, does not include photocurrent-related charge). Substantially simultaneously, the controller 118 and / or the switching system 112 can switch the integrating capacitor 114 to a second collection state, in which the integrating capacitor 114 can collect or be charged by a second type of charge that is inverted relative to the first type (electrons or holes) generated by the PD 110. Because the PD 110 is not illuminated in step 306, no photocurrent-related charge is generated by the PD 110.

[0053] It should be appreciated that the opposing charges associated with the dark current collected during both steps 304 and 306 may substantially cancel each other, thereby eliminating the effects of the dark current generated by the PD 110. Dark current cancellation may be enabled by charging and discharging the integration capacitor by the same amount of charge due to the reversal charge resulting from the dark current in each collection state.

[0054] The first collection state is synchronized with the illumination reaching the PD and the generation of the first type of charge, while the second collection state is not synchronized with the illumination reaching the PD and the generation of the second type of charge, so that during both the first and second collection state cycles, the charge from the dark current collected by the integrating capacitor is canceled out and only the charge from the photocurrent is collected by the integrating capacitor.

[0055] It should be understood that the process represented by flowchart 300 may alternatively provide a non-illumination step (such as step 306) followed by an illumination step (such as step 304) such that a first type of charge, including only dark current-related charges, may be collected in a first collection state, and a second type of charge, including dark current-related charges and photocurrent-related charges, may be collected in a second collection state.

[0056] Steps 304 and 306 may be repeated, as indicated by arrow 310, until the end of the integration period in step 308, at which time the collected charge in integration capacitor 114 may be read and integration capacitor 114 may be discharged to begin a successive integration period. For example, the discharge of integration capacitor 114 may be performed by a readout integrated circuit (ROIC), which may use the collected charge indicative of photocurrent for imaging purposes.

[0057] It should be understood that the process represented by flowchart 300 may be repeated for each successive integration period. It should be understood that the process represented by flowchart 300 may be replicated for all PDs 110 that form part of the PDA.

[0058] 4A and 4B are example graphs illustrating the accumulated voltage across an integrating capacitor during multiple iterations of the process in flowcharts 300 and / or 500, according to some implementations of the disclosed subject matter.

[0059] 4A-4B illustrate illumination periods (denoted "a") and non-illumination periods (denoted "b") of PD 110, as may be generated by on / off switching of optical shutter 116. According to embodiments of the present disclosure, illumination period "a" and non-illumination period "b" may be synchronized with predetermined collection states of the integrating capacitor, such that illumination period "a" may be associated with a first collection state and non-illumination period "b" may be associated with a second collection state, or vice versa.

[0060] Line 410 shows the accumulated dark current associated with the voltage across the integrating capacitor 114. As shown, when alternating dark current-related charges are collected by the integrating capacitor 114, the dark current-related charges can cancel each other out, substantially reducing or eliminating the effect of dark current on the collected charge. During each illumination period "a," the integrating capacitor is charged with a first type of charge derived from the dark current, and during each non-illumination period "b," the integrating capacitor is discharged with an equal amount of reversed second type of charge derived from the dark current, as shown by line 410. Exemplary line 412 shows the incoming photocurrent associated with a voltage signal representative of illumination detected by the PD 110. As shown, during the non-illumination periods of the PD 110 (the "b" periods), no photocurrent is generated by the PD 110, and therefore no photocurrent-related charge is collected.

[0061] Without the system disclosed herein, as shown by exemplary line 414, dark current-related charge would undesirably add to the accumulated photocurrent-related charge, thereby undesirably increasing the collected charge in the integrating capacitor 114 such that the integrating capacitor 114 may reach its capacity before the completion of the desired integration time or such that the voltage read across the integrating capacitor 114 may be unduly affected by the collection of dark current-related charge.

[0062] Exemplary line 416 shows the accumulated combined photocurrent-related and dark current-related voltage across the integrating capacitor 114 using system 100 as disclosed herein. For example, as shown at point 418 (where lines 416 and 412 intersect), following completion of the combined first and second collection states (one state where PD 110 is illuminated and one state where PD 110 is not illuminated), the voltage across the integrating capacitor 114 is the result of only the photocurrent-related charge, since the dark current-related charge has been cancelled out as shown by line 410.

[0063] It should be understood that by reducing to substantially zero, counteracting or eliminating the effect of dark current, charge collection can be lowered or eliminated, and therefore integration times can be increased relative to integration times where dark current has an effect.

[0064] In Figure 4A, system 100 is configured for collection of positive photocurrent charges, and in Figure 4B, it is configured for collection of negative photocurrent charges. Alternative collection configurations may be activated depending on which collection state (Figure 2A or Figure 2B) is selected by controller 118 during illumination or non-illumination of PD 110, as shown in Figures 2A and 2B. While Figure 2A shows a non-illuminated state and Figure 2B shows an illuminated state, it should be understood that these may be interchanged to result in collection of positive photocurrent charges or collection of negative photocurrent charges.

[0065] FIG. 5 is a flowchart of an exemplary process for dark current removal in an imaging system, according to some embodiments of the disclosed subject matter.

[0066] Flowchart 500 represents a process that may be performed, for example, by system 100 of Figure 1 and / or circuit 200 of Figures 2A-2B. Thus, the steps or process described by flowchart 500 may first include providing a photodetector (PD) connected to an integrating capacitor and a controller, such as those presented in Figure 1. The PD may generate a first type of charge and a second type of charge that is inverted relative to the second type of charge, for example, positive and negative charges, e.g., holes and electrons.

[0067] As indicated by step 510, the integration period may begin by, for example, a controller switching an integration capacitor, for example, integration capacitor 114 of FIG. 1, into a first collection state. It should be understood that the integration period of an integration capacitor may begin when the integration capacitor is discharged, etc.

[0068] Step 520 may indicate a first collection state, which may include allowing illumination to reach the PD, as indicated by step 522, and generating a first type of charge by the PD, as indicated by step 524. In some embodiments of the present disclosure, the first collection state may be synchronized with illumination reaching the PD and the generation of a first type of charge, while the second collection state (indicated by step 540) may be synchronized with the absence of illumination reaching the PD and the generation of a second type of charge that is inverted relative to the first type. In some embodiments of the present disclosure, the first collection state may be synchronized with the absence of illumination reaching the PD, while the second collection state (indicated by step 540) may be synchronized with illumination reaching the PD. For example, the optical shutter 116 may be deactivated to permit or enable illumination of the PD 110. During the first collection state, when illumination is reaching the PD, the PD may generate photocurrent-related charges of a first type, e.g., from holes or electrons, and dark current-related charges of a second type, e.g., from holes or electrons. According to embodiments of the present disclosure, if the first type of charge is a hole, the second type of charge may be an electron, and vice versa.

[0069] Step 520 may further include charging an integrating capacitor with a first type of charge derived from the photocurrent and with a first type of charge derived from the dark current during the first collection state, as indicated by step 526. For example, if the first type of charge is holes, the holes generated by the photocurrent and the holes generated by the dark current may be collected by an integrating capacitor that may be charged with positive charges associated with the photocurrent and the dark current.

[0070] In step 530, a switching of an integrating capacitor, such as integrating capacitor 114 of FIG. 1, to a second collection state may be performed, for example, by a controller. Step 540 may indicate the second collection state, which may include disabling or preventing illumination from reaching the PD, as indicated by step 542, and generating a second type of charge by the PD, as indicated by step 544. During the second collection state, while illumination is prevented from reaching the PD, the PD may generate only dark current-related charge and not photocurrent-related charge. The generated charge, resulting from the dark current, may be a second type of charge opposite to the first type. For example, if the first type of charge is a hole, the second type of charge is an electron, and vice versa. The controller may be configured to send the first type of charge and the second type of charge to the integrating capacitor in the first and second collection states, respectively.

[0071] Step 540 further includes discharging the integration capacitor with a second type of charge derived from the dark current during the second collection state, thereby substantially eliminating the charge derived from the dark current, as indicated by step 546.

[0072] For example, if the first type of charge is holes, during the first collection state, the holes generated by the photocurrent and the holes generated by the dark current may be collected by an integrating capacitor that may be charged with the positive charge associated with the photocurrent and the dark current. During the second collection state, a second charge type opposite to the first type, e.g., electrons generated by the dark current, may be collected by an integrating capacitor that may be charged with the negative charge associated with the dark current, thereby discharging the integrating capacitor by the same amount of positive charge derived from the dark current collected in the first collection state. The reverse charges of the dark current-related charges in the first and second collection states may cancel each other out, so that only the charge derived from the photocurrent may be collected in the integrating capacitor, and the dark current-related charge may be removed.

[0073] Steps 520 and 540 may be repeated until the end of the integration period or until a predetermined period is reached, as indicated by arrow 550. Charge from dark current may be removed after each cycle of steps 520 and 540. When the collected charge in integration capacitor 114 is read, for example, by an ROIC, the collected charge, which may represent only photocurrent, may be used by the ROIC for imaging purposes.

[0074] It should be understood that the process represented by flowchart 500 may be repeated for each successive integration period. It should be understood that the process represented by flowchart 500 may be replicated for all PDs 110 that form part of the PDA.

[0075] According to some embodiments of the disclosed subject matter, a non-transitory computer-readable medium may include instructions that, when executed by at least one processor, perform the operations described in each step as part of flowchart 500. The at least one processor may correspond, for example, to controller 118 of FIG.

[0076] 6 is an exemplary graph showing the accumulated voltage across the integration capacitor during multiple iterations of the process in flowcharts 300 and / or 500 according to some implementations of the presently disclosed subject matter. FIG. 6 illustrates illumination periods (denoted "shutter off") and non-illumination periods (denoted "shutter on") of PD 110, as may be generated by on / off switching of optical shutter 116 and / or by controller 118. According to embodiments of the present disclosure, the illumination and non-illumination periods may be synchronized with predetermined collection states of the integration capacitor, such that illumination periods may be associated with a first collection state and non-illumination may be associated with a second collection state, or vice versa. The synchronization between illumination and non-illumination periods, and the collection states, may be controlled by controller 118 via switching system 112 of FIG. 1.

[0077] Line 611 indicates that the reset value of the integrating capacitor represents the reference value of the integrating capacitor while it is being discharged. Line 610 indicates the accumulated dark current-related charge across the integrating capacitor 114. As shown, when alternating dark current-related charges are collected by the integrating capacitor 114, the dark current-related charges can cancel each other out, substantially reducing or eliminating the effect of dark current on the collected charge. During each illumination period (“shutter off”), the integrating capacitor is charged with a first type of charge, e.g., electrons, derived from the dark current, while during each non-illumination period (“shutter on”), the integrating capacitor is discharged with an equal amount of reversed second type of charge, e.g., holes, derived from the dark current, as shown by line 610. Those skilled in the art will understand that line 610 of accumulated dark current-related charge can also be generated under complete dark conditions, i.e., when the shutter is in the “always on” position so that light is prevented from reaching the PD 100. Line 610 may be affected only by charge resulting from dark current that may be generated when no photons enter PD 110. In such an embodiment, an alternative collection configuration, such as that shown in Figures 2A and 2B, may be activated by controller 118 without being synchronized to the state of shutter 116, e.g., shutter 116 may always be on.

[0078] An exemplary line 612 shows the input accumulated photocurrent related to the voltage charge, which represents the illumination detected by the PD 110. As shown, during periods of non-illumination of the PD 110 ("shutter-on" periods), no photocurrent is generated by the PD 110, and therefore no photocurrent-related charge is collected.

[0079] Without the system disclosed herein, as shown by exemplary line 614, dark current-related charge would undesirably add to the accumulated photocurrent-related charge, thereby undesirably increasing the collected charge in the integrating capacitor 114 such that the integrating capacitor 114 may reach its capacity before the completion of the desired integration time or such that the voltage read across the integrating capacitor 114 may be unduly affected by the collection of dark current-related charge.

[0080] It should be understood that by reducing, canceling, or eliminating the effect of dark current to substantially zero as disclosed in the embodiments of the present disclosure, the collection of charge resulting from dark current can be eliminated, and therefore the integration time can be increased relative to the integration time during which dark current affects the integration capacitor 114.

[0081] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The materials, methods, and examples provided herein are illustrative only and are not intended to be limiting.

[0082] Unless otherwise indicated, and as will be apparent from the following description, throughout this specification, descriptions utilizing terms such as "processing," "calculating," "computing," "determining," "generating," "setting," "configuring," "selecting," "defining," and the like, are understood to include computer actions and / or processes that manipulate and / or transform data into other data, wherein said data are represented as physical quantities, e.g., electronic quantities, and / or wherein said data represent physical objects.

[0083] The terms "computer," "processor," and "controller" should be interpreted broadly to encompass any type of electronic device having data processing capabilities, including, by way of non-limiting example, a personal computer, a server, a computing system, a communication device, a processor (e.g., a digital signal processor (DSP), a microcontroller, a field programmable gate array (FPGA), an application specific integrated circuit, etc.), any other electronic computing device, and / or any combination thereof.

[0084] An operation or operations according to the teachings herein may be performed by a specially constructed computer for the desired purpose, or by a general-purpose computer specially configured for the desired purpose by a computer program stored on a computer-readable storage medium.

[0085] As used herein, the phrases "for example," "such as," "e.g.," and "for example," and variations thereof, describe non-limiting embodiments of the presently disclosed subject matter. Reference herein to "in one instance," "in some instances," "in other instances," or variations thereof means that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of the presently disclosed subject matter. Thus, appearances of the phrases "in one instance," "in some instances," "in other instances," or variations thereof do not necessarily refer to the same embodiment.

[0086] It should be understood that certain features of the presently disclosed subject matter, which are, for clarity, described in the context of separate embodiments, may also be provided in combination in a single embodiment. Conversely, various features of the presently disclosed subject matter, which are, for brevity, described in the context of a single embodiment, may also be provided separately or in any suitable subcombination.

[0087] In embodiments of the presently disclosed subject matter, one or more of the stages or steps shown in the figures may be performed in a different order, and / or one or more groups of stages may be performed simultaneously, or vice versa. The figures show schematic diagrams of system architectures according to embodiments of the presently disclosed subject matter. Each module in the figures may be comprised of any combination of software, hardware, and / or firmware that performs the functions defined and described herein. The modules in the figures may be centralized in one location or distributed across two or more locations.

[0088] References herein to a method should, mutatis mutandis, apply to a system capable of carrying out the method, and should, mutatis mutandis, apply to a non-transitory computer-readable medium storing instructions that, when executed by a computer, result in the performance of the method.

[0089] References herein to a system should also apply mutatis mutandis to methods that may be performed by the system, and to non-transitory computer-readable media that store instructions that may be executed by the system.

[0090] References herein to non-transitory computer-readable medium or similar terms should be applied mutatis mutandis to a system capable of executing instructions stored on the non-transitory computer-readable medium, and should be applied mutatis mutandis to a method that can be executed by a computer reading instructions stored on the non-transitory computer-readable medium.

[0091] Implementation of the disclosed method and system involves performing or completing certain selected tasks or steps manually, automatically, or a combination thereof. Furthermore, depending on the actual instrumentation and equipment of preferred embodiments of the disclosed method and system, some selected steps may be implemented by hardware, or by software on any operating system of any firmware, or a combination thereof. For example, as hardware, selected steps of the disclosed method and system may be implemented as a chip or circuit. As software, selected steps of the disclosed method and system may be implemented as multiple software instructions executed by a computer using any suitable operating system. In either case, selected steps of the disclosed method and system may be described as being performed by a data processor, such as a computing platform for executing multiple instructions.

[0092] The connections described herein may be any type of connection suitable for transferring signals to or from a respective node, unit, or device, e.g., via an intermediate device. Thus, unless otherwise indicated or described, a connection may be, for example, a direct connection or an indirect connection. A connection may be illustrated or described with reference to being a single connection, multiple connections, a unidirectional connection, or a bidirectional connection. However, different embodiments may vary the implementation of a connection. For example, separate unidirectional connections may be used rather than a bidirectional connection, or vice versa. Also, multiple connections may be replaced with a single connection that transfers multiple signals serially or in a time-multiplexed manner. Similarly, a single connection carrying multiple signals may be separated into various different connections that carry subsets of these signals. Thus, many options exist for transferring signals.

[0093] Optionally, the illustrated examples may be implemented as circuits located on a single integrated circuit or within the same device. Alternatively, the examples may be implemented as any number of separate integrated circuits or separate devices interconnected with each other in an appropriate manner. Optionally, appropriate portions of the methods may be implemented as soft or code representations of physical circuits, or logical representations that can be converted into physical circuits, such as in any suitable type of hardware description language.

[0094] Other modifications, variations, and alternatives are also possible. Accordingly, the specification and drawings are to be regarded in an illustrative rather than a restrictive sense. While certain features of the present disclosure have been illustrated and described herein, many modifications, substitutions, changes, and equivalents will occur to those skilled in the art. It is therefore to be understood that the appended claims are intended to cover all such modifications and alterations as fall within the true spirit of the present disclosure. The above-described embodiments are cited by way of example, and it will be understood that the various features thereof and combinations of these features can be varied and modified. While various embodiments have been shown and described, it will be understood that it is not intended to limit the disclosure by such disclosure, but rather to cover all modifications and alternative arrangements that fall within the scope of the present disclosure, as defined by the appended claims.

[0095] In the claims or specification of this application, unless otherwise specified, adjectives such as "substantially" and "about" modifying a condition or relationship property of one or more features of an embodiment are understood to mean that the condition or property is defined within an acceptable tolerance for operation of the embodiment for its intended use. When a claim or specification refers to "a" or "an" element, it is understood that such a reference should not be interpreted as meaning that only one of that element is present.

Claims

1. 1. A system comprising: a photodetector (PD) that generates a first type of charge and a second type of charge; an integration capacitor connected to the PD; a controller configured to switch between a first collection state of the integrating capacitor and a second collection state of the integrating capacitor; Equipped with During the first collection state, the integration capacitor is charged with the first type of charge derived from photocurrent and with the first type of charge derived from dark current; During the second collection state, the integration capacitor is discharged with the second type of charge derived from dark current, and the first type of charge is reversed with respect to the second type of charge such that charge derived from dark current is thereby substantially eliminated.

2. The system of claim 1 , wherein the first acquisition state is synchronized with illumination reaching the PD and the second acquisition state is synchronized with the absence of illumination reaching the PD.

3. The system of claim 2 , wherein the first collection state is synchronized with the generation of the first type of charge and the second collection state is synchronized with the generation of the second type of charge.

4. The system of claim 1 , wherein the first type of charge and the second type of charge are holes and electrons, respectively, or vice versa.

5. 2. The system of claim 1, wherein the controller is configured to alternately send the first type of charge to the integrating capacitor during the first collection state and the second type of charge to the integrating capacitor during the second collection state.

6. The system of claim 1 , further comprising an optical shutter configured to allow or block radiation reaching the PD.

7. 7. The system of claim 6, wherein the optical shutter is controlled by the controller and configured to allow or block radiation from reaching the PD in synchronization with switching between the first collection state and the second collection state.

8. The system of claim 6 , wherein the light shutter is one of a mechanical light shutter, a liquid crystal light shutter, a MEMS light shutter, or an active grating resonant coupling.

9. 10. The system of claim 1, further comprising a switching system connecting the PD and the integration capacitor, the switching system configured to switch between the first collection state and the second collection state.

10. 10. The system of claim 9, wherein the switching system includes first, second, and third switches, the first switch being between the PD and the integrating capacitor, the second switch being between the PD and the third switch, and the third switch being between a power source, the PD, and the integrating capacitor.

11. providing a photodetector (PD) connected to an integrating capacitor and a controller, the PD generating a first type of charge and a second type of charge opposite to the first type of charge; switching, by the controller, the integrating capacitor into a first collection state; charging the integration capacitor with a first type of charge derived from photocurrent and with a first type of charge derived from dark current during the first collection state; switching, by the controller, the integration capacitor into a second collection state; and discharging the integration capacitor with the second type of charge from dark current during the second collection state, thereby substantially eliminating charge from dark current.

12. 12. The method of claim 11, wherein the first collection state is synchronized with illumination reaching the PD and the second collection state is synchronized with the absence of illumination reaching the PD.

13. The method of claim 11 , wherein the first collection state is synchronized with the generation of the first type of charge and the second collection state is synchronized with the generation of the second type of charge.

14. The method of claim 11 , wherein the first type of charge and the second type of charge are holes and electrons, respectively, or vice versa.

15. The method of claim 11 , wherein the controller is configured to deliver the first type of charge and the second type of charge to the integration capacitor in the first collection state and the second collection state, respectively.

16. The method of claim 11 , further comprising providing an optical shutter configured to allow or block illumination of the PD.

17. 17. The method of claim 16, wherein the optical shutter is controlled by the controller, and the allowing or blocking of the illumination is substantially synchronized by the controller with switching between the first collection state and the second collection state.

18. 17. The method of claim 16, wherein the light shutter is one of a mechanical light shutter, a liquid crystal light shutter, a MEMS light shutter, or an active grating resonant coupling.

19. 12. The method of claim 11, further comprising providing a switching system connecting the PD and the integration capacitor, the switching system configured to switch between the first collection state and the second collection state.

20. 20. The method of claim 19, wherein the switching system includes first, second, and third switches, the first switch being between the PD and the integrating capacitor, the second switch being between the PD and the third switch, and the third switch being between a power source, the PD, and the integrating capacitor.

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