Battery Management and Analysis

Abstract

The system includes a battery assembly. The system includes a circuit board including circuitry. The circuitry includes a first trace. The system includes an integrated circuit mounted on the circuit board. The integrated circuit includes a thermistor pin. The thermistor pin is configured to initiate a first mode of the integrated circuit. The integrated circuit is configured to monitor cells of the battery assembly. The system includes a first switch mounted on the circuit board. The first switch has a first position and a second position. The first position constitutes a conducting position and the second position constitutes a blocking position. The circuitry is configured to vary a voltage at the thermistor pin based on the first trace in response to the first switch.

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 427,615, filed November 23, 2022, the entire contents of which are incorporated herein by reference. [Background technology]

[0002] background

[0002] Batteries and energy storage devices provide electricity for a variety of appliances. Batteries and energy storage devices can experience failures and other problems. For example, individual cells of a battery may charge or discharge at different rates, leading to premature failure of the cells. Short circuits can cause failure due to high discharge currents or high temperatures. These and other constraints may require limiting the output current from the entire battery system or may change the shape and size of the battery. Summary of the Invention [Means for solving the problem]

[0003] overview It is to be understood that both the following general description and the following detailed description are exemplary and explanatory only and are not restrictive. Methods, apparatus, and systems for battery management and analysis are described.

[0004] The system may include a battery assembly. The system may include a circuit board including circuitry. The circuitry may include a first trace. The system may include an integrated circuit mounted on the circuit board. The integrated circuit may include a thermistor pin. The thermistor pin may be configured to initiate a first mode of the integrated circuit. The integrated circuit may be configured to monitor cells of the battery assembly. The system may include a first switch mounted on the circuit board. The first switch may have a first position and a second position. The first position may constitute a conducting position, and the second position may constitute a blocking position. The circuitry may be configured to vary a voltage at the thermistor pin based on the first trace in response to the first switch.

[0005] The system may include a first transistor. The system may include a second transistor. The system may include a circuit board fabricated to form a first plane. The circuit board may include a first trace and a second trace. The system may include an integrated circuit mounted on the circuit board. The integrated circuit may be configured to control the first transistor with the first trace. The integrated circuit may be configured to control the second transistor with the second trace. The system may include a first conductor fabricated to form a second plane. The second plane may be offset from the first plane, and the second plane may be parallel to the first plane. The first conductor may be configured to conduct electricity between a first terminal of the first transistor and a second terminal of the second transistor.

[0006] The system may include a battery assembly, and the battery assembly may include one or more battery cells. The system may include an integrated circuit configured to output a regulated voltage. The output of the regulated voltage may be based on the battery assembly. The system may include a voltage converter. The voltage converter may include a first input. The first input may be configured to receive a first input voltage. The voltage converter may include a field effect transistor. The voltage converter may include a converted voltage. The voltage converter may be configured to output based on the first input and the field effect transistor. The voltage converter may include a second input. The second input may be configured to receive a second input voltage based on the regulated voltage. The second input may be configured to disable the output based on the second input voltage.

[0007] BRIEF DESCRIPTION OF THE DRAWINGS To provide an understanding of the described technology, the figures provide non-limiting examples according to one or more implementations of the present disclosure. [Brief explanation of the drawings]

[0008] [Figure 1] 1 illustrates an example battery manager in accordance with one or more implementations of the present disclosure. [Figure 2]

[0009] 1 illustrates an example circuit configuration according to one or more implementations of the present disclosure. [Figure 3]

[0010] 1 illustrates an example circuit configuration according to one or more implementations of the present disclosure. [Figure 4]

[0011] 1 illustrates an exemplary circuit board and conductors according to one or more implementations of the present disclosure. [Figure 5]

[0012] 1 illustrates an exemplary configuration according to one or more implementations of the present disclosure. [Figure 6]

[0013] 1 illustrates an exemplary side view according to one or more implementations of the present disclosure. [Figure 7]

[0014] 1 illustrates an exemplary side view according to one or more implementations of the present disclosure. [Figure 8]

[0015] 1 illustrates an example circuit configuration according to one or more implementations of the present disclosure. [Figure 9]

[0016] 1 illustrates an example circuit configuration according to one or more implementations of the present disclosure. [Figure 10]

[0017] 1 illustrates an example system according to one or more implementations of the present disclosure. [Figure 11]

[0018] 1 illustrates a flowchart of an exemplary method according to one or more implementations of the present disclosure. [Figure 12]

[0019] 1 illustrates a flowchart of an exemplary method according to one or more implementations of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0009] Detailed Description

[0020] As used in this specification and the appended claims, the singular forms "a," "an," and "the" include the plural forms unless the context clearly requires a different interpretation. Ranges may be specified herein as from "about" one particular value and / or to "about" another particular value. When such a range is specified, another configuration includes from that particular value and / or to the other particular value. When values ​​are stated as approximations, by use of the preposition "about," it is to be understood that the particular value forms another configuration. It is further understood that the endpoints of each range are significant in relation to the other endpoint, and independently of the other endpoint.

[0010]

[0021] Where combinations, subsets, interactions, collections, etc. of components are described, it should be understood that reference to various individual and collective combinations and permutations of these may not be explicitly set forth, but each is specifically contemplated and described herein. This applies to all parts of this application, including, but not limited to, the steps of the described methods. Thus, where there are various additional steps that may be performed, it should be understood that each of these additional steps may be performed in any particular configuration or combination of configurations of the described methods.

[0011]

[0022] Those skilled in the art will appreciate that hardware, software, or a combination of software and hardware may be implemented. Furthermore, the methods and systems may take the form of a computer program product on a computer-readable storage medium (non-transitory) having processor-executable instructions (e.g., computer software) embodied on the storage medium. Any suitable computer storage medium may be utilized including hard disks, CD-ROMs, optical storage devices, magnetic storage devices, memo registers, non-volatile random access memory (NVRAM), flash memory, or combinations thereof.

[0012]

[0023] Throughout this application, reference is made to block diagrams and flowcharts. It will be understood that each block of the block diagrams and flowcharts, and combinations of blocks in the block diagrams and flowcharts, respectively, can be implemented by processor-executable instructions. These processor-executable instructions can be loaded into a computer (e.g., a special-purpose computer) or other programmable data processing apparatus to produce a machine, whereby the processor-executable instructions executing on the computer or other programmable data processing apparatus create a device for performing the functions specified in one or more blocks of the flowcharts.

[0013]

[0024] In the detailed description, reference may be made to an entity performing an operation. It should be understood that this language may, in some cases, mean that a system (e.g., a computer) owned and / or controlled by that entity actually performs the operation.

[0014]

[0025] The blocks in the block diagrams and flowcharts support combinations of devices for performing the specified functions, combinations of steps for performing the specified functions, and program instruction means for performing the specified functions. It should also be understood that each block of the block diagrams and flowcharts, and combinations of blocks in the block diagrams and flowcharts, can be implemented by a computer system based on special purpose hardware that performs the specified functions, or a combination of special purpose hardware and computer instructions.

[0015]

[0026] The method steps described throughout this disclosure may be combined, omitted, rearranged, or otherwise rearranged in any of the figures presented herein and are not intended to be limited to the scope of each sheet presented.

[0016]

[0027] 1 illustrates an example battery manager 100 according to one or more implementations of the present disclosure. A battery stack may include multiple battery assemblies 102. The battery assemblies 102 may include one or more cells. For example, the cells may be based on lithium-ion chemistry (e.g., LiFePO4). The cells may be arranged in a stack (e.g., in series, parallel) to generate a desired voltage or current output.

[0017]

[0028] The battery manager 100 may be configured to manage one or more battery assemblies 102 to ensure cell voltage and temperature balance is maintained. For example, the battery manager may include circuitry connected to one or more of the cells to enable charging, monitoring, or a combination thereof. For example, the battery manager 100 may include individual connections 122 to one or more cells. The cells may be connected in series. The battery manager 100 may include one or more integrated circuits 104 configured to monitor or control the operation of the battery assemblies. For example, the integrated circuits 104 may include input and output pins for monitoring, charging, and discharging the cells. The input and output pins may include thermistor pins for measuring the temperature associated with the battery assemblies. For example, circuitry for monitoring the temperature of the battery stack may be included (e.g., thermistor connection 120).

[0018]

[0029] The battery manager 100 may be associated with transistors or other switches to control the flow of electricity between the battery assembly 102 and a load, charger, or other battery assemblies. For example, the battery assembly 102 may be daisy-chained or placed in series with other battery assemblies due to the current throughput of the bus bars described herein. The bus bars may be arranged to keep current off to the circuit board 108, thereby allowing for higher currents than previously achieved.

[0019]

[0030] Additionally, the integrated circuit 104 may be associated with permanent programming, allowing operation without a microcontroller or processor. The integrated circuit 104 may interact through a programming port 160. The programming port 160 may require a specific voltage or voltage range to enable programming. This voltage range may differ from the typical voltage range of the battery assembly. For example, a typical voltage range for the battery assembly 102 may be 150-200 volts. The programming port may be enabled by application of a voltage of 10-12 volts.

[0020]

[0031] An integrated circuit (e.g., integrated circuit 104) may be designed to operate in combination with a microcontroller. For example, the microcontroller may be configured to control or monitor the integrated circuit 104 to ensure proper functionality and voltage consumption. For example, the microcontroller may send commands to the integrated circuit 104 to place the circuit 104 in one or more operating modes, such as power-up, wake-up, shutdown, sleep, or other operating modes. The microcontroller may also receive information about the status of the battery assembly from the integrated circuit 104. For example, the microcontroller may receive information about the state of charge or temperature from the integrated circuit 104.

[0021]

[0032] The combination of a microcontroller and an integrated circuit may introduce security vulnerabilities into the battery manager 100. For example, the microcontroller's commands may be spoofed or intercepted to reprogram the integrated circuit 104 or to change the control or monitoring of the battery assembly. Therefore, the microcontroller may be removed to increase security and remove necessary functionality. For example, mode changes for the integrated circuit 104 may be unavailable without another interface to interact with the integrated circuit 104.

[0022]

[0033] The integrated circuit 104 may be disposed on a circuit board (e.g., circuit board 108). The circuit board may include connectors and interfaces for controlling and monitoring the battery assembly 102. For example, leads may connect the individual cells of the battery assembly to the circuit board and the integrated circuit. The thermistor may be connected to the integrated circuit 104 through a connector. The connector may be soldered with traces on the circuit board that lead to the integrated circuit 104. The traces may be conductive elements etched into the circuit board 108 or other wiring associated with the circuit board 108.

[0023]

[0034] The battery manager 100 may include a programming port 160. The programming port 160 may include an interface for programming the integrated circuit 104. For example, the programming port 160 may require a programming voltage (e.g., 10-12 volts) that is different from the typical voltage of the battery assembly 102. The programming port 160 may be an I2C header.

[0024]

[0035] A universal asynchronous receiver-transmitter (UART) converter 162 may be configured to interface with the integrated circuit 104. For example, the UART converter 162 may convert UART protocol communications to I2C protocol communications for off-board communications. For example, the UART converter 162 may be interconnected with an RS-422 converter 164 or other type of port for off-board communications. For example, the integrated circuit 104 may provide information regarding the status or health of a battery. For example, this information may be aggregated from multiple battery managers to identify battery performance and maintenance needs. The integrated circuit 104 may communicate with one or more indicators (e.g., indicators 140, 142). The indicators 140, 142 may provide operator-perceptible indications of normal operation and fault conditions (e.g., the illumination of light-emitting diodes 144, 146). The UART converter may be connected to specific pins, such that the RS-422 converter 164 cannot be used to program one-time programmable memory or modify other registers or memory of the integrated circuit 104.

[0025]

[0036] The integrated circuit 104 may be associated with circuitry capable of controlling the charging and discharging of the battery assembly 102. For example, the integrated circuit 104 may be configured to operate elements 112, 114 configured to block or allow the flow of electrons from the battery assembly 102. The elements 112, 114 may be transistors, switches, other means, or a combination thereof. For example, the elements 112, 114 may include solenoid-type switches. The elements 112, 114 may be field-effect transistors (FETs) or metal-oxide-semiconductor field-effect transistors (MOSFETs). The elements 112, 114 may be interconnected through conductors 130, 131, 132. For example, the conductors 130, 131, 132 may be bus bars (e.g., solid or woven conductors). The conductors 130, 131, 132 may be formed from a conductive material (e.g., copper, silver, gold), an alloy, or a combination thereof. For example, conductors 130, 131, 132 may be connected to a circuit board through leads or traces 116. For example, traces 116 may be configured to operate elements 112, 114 with control signals from integrated circuit 104 to control the flow of electricity through conductors 130, 131, 132.

[0026]

[0037] The integrated circuit 104 may be associated with one or more resistors (e.g., resistor 118). The resistor 118 may be associated with the conductor 136. For example, the resistor 118 may be a neck or narrowed portion of the conductor 136. The resistor 118 may be associated with the integrated circuit 104 through leads or traces 110. The conductors 132, 136 may be attached to the load or charger 106 through couplings 134, 138. Communication from the circuit board 108 may be facilitated through connectors 150, 152. The voltage drop across or associated with the resistor may be measured for column counting. For example, the discharge current from the battery assembly 102 may be monitored by measuring the voltage drop associated with the resistor 118. Additionally, the charge current to the battery assembly 102 may be monitored by measuring the voltage drop associated with the resistor 118. In this manner, the integrated circuit 104 may be configured to monitor a state of charge, state of health, or other parameter associated with the battery assembly 102. In some examples, resistor 118 may be omitted.

[0027]

[0038] 2 illustrates an example circuit configuration 200 according to one or more implementations of the present disclosure. The circuit configuration 200 may illustrate the operation of the discharge element 114 and the charge element 112 in more detail. For example, the charge element 112 may be operated by a charge pin and associated trace or lead of the integrated circuit 104. For example, a trace may be connected to the gate of the charge element 112. In this manner, the charge element 112 may be configured to enable charging of the battery assembly 102.

[0028]

[0039] The discharge element 114 may be operated by a discharge pin and associated trace or lead of the integrated circuit 104. For example, a trace may be connected to the gate of the discharge element 114. In this manner, the discharge element 114 may be configured to allow the battery assembly 102 to discharge.

[0029]

[0040] The integrated circuit 104 may be configured (e.g., programmed) to enable a regulated voltage 226. For example, the regulated voltage may be REG18, a regulated voltage of 1.8V. The 1.8V may be a low-dropout regulated voltage. The regulated voltage 226 may be provided on a pin or a trace. The integrated circuit 104 may be configured to shut down based on a voltage applied to the RST_SHUT pin 224. The DDSG pin 222 and the DCHG pin 220 may be used to enable or disable one or more of the indicators 140, 142, as shown in FIG. 3. Additionally, the integrated circuit 104 may include a thermistor pin 210 configured to change the power state of the integrated circuit 104, as shown in FIG. 3.

[0030]

[0041] FIG. 3 illustrates an exemplary circuit configuration according to one or more implementations of the present disclosure. The integrated circuit 104 may include a shutdown pin 224. For example, the shutdown pin 224 may be coupled to logic of the integrated circuit 104 to place the integrated circuit 104 in a sleep, shutdown, or other reduced power mode. The integrated circuit 104 may include a thermistor pin 210. The thermistor pin 210 may be configured to receive a signal from one or more thermistors associated with the battery assembly 102. The thermistor pin 210 may be coupled to logic of the integrated circuit 104 to wake the integrated circuit 104 from a sleep, shutdown, or other power mode and return it to a higher power mode (e.g., a normal operating mode). The integrated circuit 104 may include a reference voltage (e.g., REG18 or REG1). The reference voltage may be set by a register of the integrated circuit 104, which may be programmed in response to the port 160. For example, the reference voltage may be indicated by a one-time programmable memory associated with the integrated circuit 104. The reference voltage may be adjusted to a voltage indicated in the register or one-time programmable memory.

[0031]

[0042] Circuitry may be mounted with or included on the circuit board and interact with the shutdown pin 224 and thermistor pin 210. For example, a switch 310 may be mounted on the circuit board. The switch 310 may be a push button switch. For example, the switch 310 may be configured to be normally open or to normally block current from passing through the switch 310 element. The switch 310 may include two positions. For example, a user may press the switch 310 to a first position to allow current to flow, and the user may release the switch 310 to a second position to prevent current from flowing.

[0032]

[0043] Switch 310 may be configured to complete a circuit through a trace (e.g., trace 312) between thermistor pin 210 and a ground connection. For example, switch 310 may be configured to drive thermistor pin 210 to ground. Thermistor pin 210 may be set to a predetermined voltage when integrated circuit 104 is in shutdown or sleep mode. The predetermined voltage may be a digital high voltage. Switch 310 may reduce the digital high voltage to a digital low voltage or reduce the voltage to a value below a threshold that indicates to integrated circuit 104 to wake up or exit sleep or shutdown mode.

[0033]

[0044] The transistor 320 may be implemented on a circuit board. For example, the transistor 320 may be a P-channel enhancement mode MOSFET. The transistor 320 may be included with circuitry that establishes a conductive connection between a regulated reference voltage 340 and a source terminal 326 of the transistor 320. The transistor 320 may further include a drain terminal 324. The conductive connection may be formed between the drain terminal 324 of the transistor 320 and the shutdown pin 224. For example, a trace may be etched into the circuit board to form the conductive connection. The transistor 320 may include a gate terminal 322. The conductive connection may be formed through the trace 314 and the switch 310. For example, the switch 310 may be configured to pull the gate terminal 322 of the transistor 320 to ground.

[0034]

[0045] The transistor 320 may be associated with a resistive component 316. The resistive component 316 may provide a preset resistance (e.g., 300 kΩ). The resistive component 316 may be disposed between a source terminal 326 and a gate terminal 322. Therefore, the source terminal 326 may have a reference voltage. When the switch 310 is closed, the gate terminal 322 may be set to ground, and the voltage between the gate terminal 322 and the source terminal 326 may exceed a threshold, allowing the MOSFET to conduct based on the voltage drop across the resistor. For example, the switch 310 may allow current to flow through the transistor 320, such that the voltage at the shutdown pin 224 is based on the regulated reference voltage.

[0035]

[0046] One or more of the shutdown pin 224 and thermistor pin 210 may be associated with a predetermined duration. If the shutdown pin 224 exceeds the regulated reference voltage 340 for a period longer than the predetermined duration, the integrated circuit 104 may enter shutdown mode. The thermistor pin 210 may initiate a wake-up of the integrated circuit 104 as soon as the voltage on the thermistor pin 210 is pulled to ground. Thus, a single switch may enable both shutdown of the integrated circuit 104 and wake-up of the integrated circuit 104. For example, a long press (e.g., longer than a predetermined duration) of the switch 310 may initiate a shutdown of the integrated circuit 104, and a short press (e.g., shorter than a predetermined duration) may initiate a wake-up of the integrated circuit 104. A second switch 330 may be used to directly couple the regulated reference voltage 340 to the shutdown pin 224, providing further flexibility in initiating a shutdown of the integrated circuit 104.

[0036]

[0047] 4-5 show an example circuit board 108 and conductors 130, 131, 132, 136 according to one or more implementations of the present disclosure. The circuit board 108 may form one or more planes, such as plane 402. The circuit board 108 may define holes or other openings for receiving fasteners.

[0037]

[0048] Conductors 130, 131, 132, and 136 may be separate or individual components. One or more of conductors 130, 131, 132, and 136 may be unitary. For example, conductors 130, 131, and 132 may be unitary parts connected by insulators. Conductors 130, 131, and 132 may form respective planes (e.g., planes 410, 412, and 414). Conductor 136 may further form one or more planes 420, 422, and 424.

[0038]

[0049] Conductor 131 may include one or more nonlinear sections for connecting the drain terminals of elements 112 and 114. For example, the nonlinear sections may include right angles (e.g., 90°). Conductor 131 may include L-shaped, zigzag, or bent sections. For example, conductor 131 may include one or more (e.g., two) nonlinear or angled sections having angles between 90° and 180°. The nonlinear or angled sections may have equal and opposite angles, such that a first section of conductor 131 and a second section of conductor 131 are parallel, and an intermediate section of conductor 131 maintains conductive continuity between the first section of conductor 131 and the second section of conductor 131, as shown in FIG. 4 .

[0039]

[0050] The conductor 136 may include a neck or narrowed portion that may resist the flow of electrons in the conductor 136 (e.g., act as a resistor 118). The neck portion may be machined. The neck portion may have holes for securing additional resistors (e.g., resistors 202, 204). The resistors 202, 204 may have a similar form factor as the elements 112, 114 (e.g., transistors). For example, the resistors 202, 204 may have the same or similar thickness as the elements 112, 114. The resistors 202, 204 and elements 112, 114 may be fixed or fastened to the battery assembly 102, the circuit board 108, and the conductors 130, 131, 132, 136. Thus, the battery assembly 102, resistors 202, 204, elements 112, 114, circuit board 108, and conductors 130, 131, 132, 136 may each include one or more planes arranged in parallel, and the resistors 202, 204 may be arranged in a bridge configuration, and resistor 118 may be omitted.

[0040]

[0051] 6-7 show exemplary side views according to one or more implementations of the present disclosure. The side views show the thickness of the components (e.g., conductors 130, 131, 132, 136) in the figures. For example, planes 402, 414 are shown from a different perspective than that shown in FIG. 4. As shown in FIGS. 6-7, planes 402, 414 can be offset and substantially parallel, as indicated by parallel lines 612, 624 extending from planes 402, 414. Element 114 and battery assembly 102 can have respective planes parallel to parallel lines 612, 624. Element 114 can be fixed to one or more of circuit board 108, conductors 132, 131, or battery assembly 102. The element 114 may include fastener receivers 632, 634, 636, 638 (eg, receivers with internal threads) for receiving fasteners through defined holes or openings through the circuit board 108 or one or more of the conductors 132, 131.

[0041]

[0052] The conductors 130, 131, 132, 136 may include internal resistance and other characteristics that may generate heat (e.g., Joule heating). The conductive layers 704, 706 may be positioned between the circuit board 108 and the conductors 131, 132. The material for the conductive layers 704, 706 may be selected to have high thermal conductivity and low electrical conductivity. The conductive layers 704, 706 may be connected to a heat sink. The conductive layers 704, 706 may have surface areas comparable to the cross-sectional areas of the associated conductors (e.g., the conductor 131 and the conductive layer 704). For example, the conductor 131 may be positioned below the circuit board 108 when attached to the battery assembly 102. The conductive layer 704 may have a surface area equal to or greater than the surface area of ​​the surface of the conductor 131 that may face or face the circuit board 108.

[0042]

[0053] The conductive layers 704, 706 may be spaced apart by the conductors 130, 131, 132, 136 and the spacers 702, 708, 710. For example, the spacers 702, 708, 710 may be insulators (e.g., thermal, electrical). The spacers 702, 708, 710 may be sized to maintain parallelism between the circuit board 108, the conductors 130, 131, 132, 136, the elements 112, 114, the battery assembly 102, or other flat surfaces. For example, the element 114 may include four fastener receiving portions, and the conductors 131, 132 may be positioned over only three of the fastener receiving portions. Thus, the spacer 702 may be sized to have the thickness of the spacers 708, 710 and the thickness of one or more of the conductors 131, 132.

[0043]

[0054] 8 illustrates an example circuit configuration 800 according to one or more implementations of the present disclosure. For example, the circuit configuration 800 may be configured to communicate off-board (e.g., outside of the circuit board 108) with a data aggregator. The circuit configuration 800 may include a UART converter 162 configured to interface with the integrated circuit 104. For example, the UART converter 162 may convert UART protocol communications to I2C protocol communications or I2C communications to the UART protocol. For example, the UART converter 162 may be interconnected with an RS-422 converter 164 or other type of port. The RS-422 may be configured to communicate information about the battery assembly (e.g., state of charge, state of health, temperature, operating hours, coulomb count) to the aggregator.

[0044]

[0055] FIG. 9 illustrates an example circuit configuration 900 according to one or more implementations of the present disclosure. The circuit configuration 900 can be used to ensure that the integrated circuit 104 can change modes regardless of the current state of the integrated circuit. For example, the circuit configuration 900 can receive power from the drain connection 232 of the elements 112 and 114. Therefore, the circuit configuration 900 can be energized when the battery assembly 102 has a sufficient supply. The output can be regulated to approximately 3 volts. For example, the circuit configuration board 900 can include a step-down converter 902. The step-down converter 902 can be in a flyback configuration. For example, the step-down converter 902 can include a field-effect transistor. The enable pin of the step-down converter 902 can be energized by the 1.8 volt regulated voltage 226 or the drain connection 232 of the elements 112 and 114. An RC network 904 can be used to minimize ripple in the regulated reference voltage 340.

[0045]

[0056] FIG. 10 illustrates an exemplary battery stack 1000 according to one or more implementations of the present disclosure. The battery stack 1000 may include one or more battery assemblies 102, 1003 and respective battery managers 100, 1002. The battery assemblies 102, 1003 may be arranged in series or parallel. The battery managers 100, 1002 may include the same or similar circuitry and components (e.g., as shown in FIG. 1). For example, the battery managers 100, 1002 may include one or more converters (e.g., converters 162, 164, 1164) configured to provide battery data to the stack manager 1004. The stack manager 1004 may aggregate the battery data. The battery data may include information (e.g., state of charge, state of health) determined by the battery managers 100, 1002.

[0046]

[0057] 11 illustrates an example method 1100 according to one or more implementations of the present disclosure. The method may be performed by one or more devices described herein (e.g., battery manager 100, stack manager 1004).

[0047]

[0058] In step 1102, first battery data may be received. The first battery data may indicate or relate to a state of charge, state of health, or other information for a battery manager (e.g., battery manager 100). The first battery data may be based on a converter (e.g., converter 164). The converter 164 may be configured to convert UART communication to RS-422 communication or protocol. The first battery data may be based on an integrated circuit (e.g., integrated circuit 104).

[0048]

[0059] As an example, second battery data may be received. For example, the second battery data may indicate or relate to a state of charge, state of health, or other information related to a battery manager (e.g., battery manager 1002). The second battery data may be based on a converter (e.g., converter 1164). The converter 1164 may be configured to convert UART communication to RS-422 communication or protocol. The second battery data may be based on an integrated circuit (e.g., integrated circuit 104). The second battery data may perform multiple conversions between protocols. For example, the second battery data may be converted from I2C to UART and then to RS-422.

[0049]

[0060] In step 1104, the first battery data and the second battery data may be aggregated into battery information. For example, the first battery data and the second battery data may be aggregated to identify an overall state of health or an individual indication of the state of health of each of the battery assemblies 102, 1003. The stack manager 1004 may be configured to output the indication or status of the battery assemblies 102, 1003.

[0050]

[0061] In step 1106, the stack manager 1004 may be configured to send commands or coordinate one or more operations of the battery assemblies 102, 1003 or other means. For example, the stack manager 1004 may be configured to connect or disconnect a load associated with the battery assemblies 102, 1003, or to connect or disconnect a charger associated with the battery assemblies 102, 1003.

[0051]

[0062] FIG. 12 illustrates an example method 1200 according to one or more implementations of the present disclosure. In step 1202, a switch (e.g., switch 310) may be operated or a switch operation may be performed. For example, the operation of the switch may be based on mechanical interaction or user manipulation. In step 1204, a transistor may be changed from a first state to a second state. For example, the transistor (e.g., transistor 320) may be configured to interrupt or conduct electricity between terminals based on the operation of the switch (e.g., switch 310). In step 1206, an integrated circuit of the battery manager may be changed from a first state to a second state. For example, the integrated circuit (e.g., integrated circuit 104) may be changed from a standby or shutdown mode to a normal operating mode based on the transistor (e.g., transistor 320). For example, a thermistor pin (e.g., pin 210) of the integrated circuit (e.g., integrated circuit 104) may be changed from high to low based on the transistor (e.g., transistor 320). A battery manager (eg, battery manager 100) may be configured to further balance one or more cells of a battery assembly (eg, battery assembly 102).

[0052]

[0063] Although the methods and systems have been described with reference to particular examples, it is not intended that the scope be limited to the particular embodiments described, as the embodiments herein are intended in all respects to be illustrative and not restrictive.

[0053]

[0064] Unless expressly stated otherwise, no method described herein is intended to be construed as requiring that its steps be performed in a particular order. Thus, unless a method claim actually specifies the order its steps are to follow, or the claim or description otherwise specifically specifies that the steps are limited to a particular order, no order is intended to be implied in any way. This applies to any possible explicit basis for interpretation, including matters related to the logic of the arrangement of steps or operational flow, the plain meaning derived from grammatical construction or punctuation, and the number or type of embodiments described herein.

[0054]

[0065] It will be apparent to those skilled in the art that various modifications and variations can be made without departing from the scope or spirit. Other embodiments will be apparent to those skilled in the art from consideration of the specification and practice disclosed herein. It is intended that the specification and examples be considered exemplary only, with the true scope and spirit being indicated by the following claims.

Claims

1. a battery assembly; a circuit board including circuitry, the circuitry including a first trace; an integrated circuit mounted on the circuit board and including a thermistor pin, the thermistor pin configured to initiate a first mode of the integrated circuit, the integrated circuit configured to monitor cells of the battery assembly; and a first switch mounted on the circuit board, the first switch having a first position and a second position, the first position constituting a conducting position and the second position constituting a blocking position, the circuit configuration configured to vary a voltage at the thermistor pin based on the first trace in response to the first switch; Including, the system.

2. the circuitry includes a second trace; the integrated circuit further includes a shutdown pin; the shutdown pin is configured to initiate a second mode of the integrated circuit; the first switch is operable to vary the voltage of the shutdown pin based on the second trace; The system of claim 1 .

3. the integrated circuit is further configured to provide a regulated voltage; The system further includes a transistor having a gate terminal and a source terminal; the first position is a position where the gate terminal is pulled to ground; the shutdown pin is set based on the regulated voltage and the transistor; The system of claim 2 .

4. further comprising a resistor disposed between the gate terminal and the source terminal; the resistor has a resistance configured to cause a voltage drop to exceed a threshold value of the resistor; The system of claim 3.

5. The first position is a position where the thermistor pin is pulled to ground. The system of claim 2 .

6. The second mode consumes less power than the first mode. The system of claim 2 .

7. the second mode is a shutdown mode; The first mode is a normal mode. The system of claim 2 .

8. based on the first switch being in the first position for more than a duration; the integrated circuit enters the second mode and enters the first mode based on the first switch being in the first position for less than the duration. The system of claim 2 .

9. the integrated circuit is further configured to provide a regulated voltage; the system further includes a second switch mounted on the circuit board; the second switch is disposed between the shutdown pin and the regulated voltage; The system of claim 2 .

10. a first transistor; a second transistor; and a circuit board fabricated to form a first plane, the circuit board including a first trace and a second trace; an integrated circuit mounted on the circuit board, the integrated circuit configured to control the first transistor via the first trace and the second transistor via the second trace; a first conductor fabricated to form a second plane, the second plane being offset from the first plane and parallel to the first plane, the first conductor configured to conduct electricity between a first terminal of the first transistor and a second terminal of the second transistor; Including, the system.

11. further comprising a second conductor parallel to the first plane and the second plane; the second conductor is configured to be electrically conductive with the battery assembly; The system of claim 10.

12. further comprising the battery assembly; the first transistor and the second transistor are disposed between the battery assembly and the circuit board; The system of claim 11.

13. further including a third conductor parallel to the first plane and the second plane; the third conductor is configured to be electrically conductive with a battery stack including the battery assembly; The system of claim 11.

14. a conductive layer between the second conductor and the circuit board; the area of ​​the conductive layer is equal to the area of ​​the rectangular cross section of the second conductor; The system of claim 11.

15. a conductive layer between the first conductor and the circuit board; The area of ​​the conductive layer is equal to or greater than the area of ​​the cross section of the first conductor. The system of claim 10.

16. the first conductor is between the first transistor and the circuit board; the first transistor includes a gate controlled by the first trace; The system of claim 10.

17. a spacer between the first trace and the gate; the spacer has a thickness similar to that of the first conductor such that the first transistor is positioned parallel to the first conductor and the circuit board; 17. The system of claim 16.

18. the first conductor includes a right angle; The system of claim 10.

19. further comprising a fourth conductor; the fourth conductor has a first portion having a thickness substantially similar to a thickness of the first conductor and a second portion having a thickness less than the first conductor and a width less than the first portion; The system of claim 10.

20. further comprising a resistor disposed between the battery assembly and the circuit board; the thickness of the resistor is substantially similar to the thickness of the first transistor; The system of claim 11.

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