Charge leakage compensation in piezoelectric transducer circuits.

Abstract

In drivers for piezoelectric transducers, when the transducer circuit and the sensing circuit are the same circuit, there are many limitations on the accuracy of sensing due to multiple parasitic effects arising from the interconnection of power devices. These limitations can limit the feasibility of sensing for many applications, especially the accurate determination of when the force on the piezoelectric transducer is completely removed. The system self-evaluates the charge leakage of the piezoelectric transducer in a given system and applies corrections so that the read data represents the actual electrical signal corresponding to the application of force.

Description

[Technical Field]

[0001] The present invention relates to piezoelectric transducer circuits, and more particularly to a system for compensating for charge leakage in piezoelectric transducer circuits. [Background technology]

[0002] In a conventional haptic feedback system using the piezoelectric effect, a driver circuit applies a high-voltage signal to a piezoelectric transducer, and in response to the applied high-voltage signal, the piezoelectric transducer generates sufficient mechanical motion to provide a tactile sensation to the user. Furthermore, when a force is applied to the piezoelectric transducer by the user, a sensing circuit generates a sensing voltage signal, which allows the piezoelectric transducer to function as a switch.

[0003] When the driver circuit and the sensing circuit are the same circuit, there are many limitations on the accuracy of the sensing due to multiple parasitic effects arising from the interconnection of power devices, which can limit the feasibility of sensing for many applications.

[0004] Piezoelectric transducers typically respond well to AC signals—that is, as long as the applied force changes relatively rapidly, the signal is very accurate and represents the amount of force or mechanical stress the piezoelectric transducer is experiencing. However, piezoelectric transducers may not respond as well to DC or other slowly changing signals. This is because, in all systems, there is some charge leakage. When a piezoelectric transducer generates or absorbs charge, this typically changes the voltage at the piezoelectric transducer's terminals. However, as charge leaks through various parasitic paths within the system, the voltage difference between the piezoelectric transducer's terminals decreases over time. This behavior is problematic because in systems that use piezoelectric transducers to estimate force applied to a surface, leakage affects the force reading based on how quickly the force is applied. For example, in a trackpad, a typical trigger point is 150 gf (gram-force), but if the force is applied slowly, charge leakage may cause the system to trigger only at 200 gf. Summary of the Invention [Problem to be solved by the invention]

[0005] SUMMARY OF THE INVENTION It is an object of the present invention to overcome the shortcomings of the prior art by providing a more reliable sensing driver circuit for any electro-active transducer, such as a piezoelectric transducer. [Means for solving the problem]

[0006] Accordingly, the present invention relates to a method of operating a piezoelectric driver circuit, the method comprising: obtaining a leakage characteristic of the piezoelectric driver circuit; repeatedly sensing a first sense voltage generated by a first force applied to a first piezoelectric transducer; zeroing the first sense voltage each time the first sense voltage reaches a threshold voltage, thereby generating a plurality of first voltage segments; generating a digital representation of each of the plurality of first voltage segments; generating an adjusted digital representation based on the leakage characteristics; updating the first running sum with each adjusted digital representation; determining a first total sensed voltage across the first piezoelectric transducer from the first cumulative sum; Includes.

[0007] According to any of the aforementioned embodiments, the threshold voltage may be based on a first trigger level of a first parasitic conduction path of a first switch in the piezoelectric driver circuit.

[0008] According to any of the aforementioned embodiments, the leakage characteristics may include an amount of leakage voltage over time.

[0009] According to any of the aforementioned embodiments, the step of determining the first total sensed voltage may further include generating an intermediate digital representation of each first sensed voltage each time the first sensed voltage is sensed, adjusting the intermediate digital representation of each first sensed voltage based on the leakage characteristic, and determining the first total sensed voltage across the first piezoelectric transducer from the first cumulative sum and the intermediate digital representation.

[0010] According to any of the aforementioned embodiments, the first switch in the piezoelectric driver circuit may comprise a driver circuit switch including a first parasitic conduction path, and the method includes sending a driver voltage signal to the first piezoelectric transducer to generate a force or displacement response on the first piezoelectric transducer.

[0011] According to any of the aforementioned embodiments, the method may further include generating an intermediate digital representation of each first sensed voltage each time the first sensed voltage is sensed, and sending the driver voltage signal includes sending the driver voltage signal if the first total sensed voltage plus the intermediate digital representation is greater than a predetermined operating level.

[0012] According to any of the aforementioned embodiments, the first threshold voltage may be greater than the negative first turn-on voltage of the first parasitic conduction path.

[0013] According to any of the aforementioned embodiments, the first threshold voltage may be less than the first positive turn-on voltage of the first parasitic conduction path.

[0014] The present disclosure may also relate to an apparatus for operating a first piezoelectric transducer configured to couple to a voltage source providing an input voltage and configured to send a driver voltage signal across the first piezoelectric transducer, the apparatus comprising: a driver circuit including a first driver circuit switch configured to be connected to a first piezoelectric transducer and including a first parasitic conduction path, the driver circuit configured to receive an input voltage and send a driver voltage signal to generate a force or displacement response to the first piezoelectric transducer; a sensing circuit configured to sense a first sense voltage generated by a first force applied to the first piezoelectric transducer, the sensing circuit including a first sensing switch; a controller configured to control the first driver switch and the first sense switch, obtain a leakage characteristic of the driver circuit, repeatedly sense a first sense voltage generated by a first force applied to the first piezoelectric transducer, zero the first sense voltage each time the first sense voltage reaches a threshold voltage, thereby generating a plurality of first voltage segments, generate digital representations of each of the plurality of first voltage segments, generate adjusted digital representations based on the leakage characteristic, update a first cumulative sum with the adjusted digital representation, and determine a first total sense voltage across the first piezoelectric transducer from the first cumulative sum; Equipped with.

[0015] According to any of the aforementioned embodiments, the threshold voltage may be based on a first trigger level of the first parasitic conduction path.

[0016] According to any of the aforementioned embodiments, the controller may also be configured to generate intermediate digital representations of the first sensed voltages each time the first sensed voltages are sensed, adjust one or more of the intermediate digital representations of the first sensed voltages based on the leakage characteristics, and determine a first total sensed voltage across the first piezoelectric transducer from the first cumulative sum and the intermediate digital representations.

[0017] According to any of the aforementioned embodiments, the controller may also be configured to generate intermediate digital representations of the first sensed voltages each time the first sensed voltage is sensed, adjust each intermediate digital representation of the first sensed voltage based on the leakage characteristic, and determine a first total sensed voltage across the first piezoelectric transducer from the first cumulative sum and the intermediate digital representations.

[0018] According to any of the aforementioned embodiments, the controller may also be configured to generate intermediate digital representations of the first sensed voltages each time the first sensed voltages are sensed, adjust one or more of the intermediate digital representations of the first sensed voltages based on the leakage characteristics, and send the driver voltage signal when a first total sensed voltage comprising the first cumulative sum plus the intermediate digital representations is greater than a predetermined operating level.

[0019] According to any of the aforementioned embodiments, the threshold voltage may be greater than the negative turn-on voltage of the first parasitic conduction path.

[0020] Accordingly, the present invention may also be directed to a method of operating a piezoelectric transducer using a piezoelectric driver circuit including a first switch having a first parasitic conduction path, the method comprising: determining a charge leakage characteristic of the piezoelectric driver circuit; repeatedly sensing a first sense voltage generated by a first force applied to the piezoelectric transducer; generating a digital representation of the first sensed voltage; generating an adjusted digital representation of the first sensed voltage based on the leakage characteristic; sending a driver voltage signal to the first piezoelectric transducer to generate a force or displacement response for the first piezoelectric transducer when the adjusted digital representation of the first sense voltage reaches a target force threshold voltage; Includes.

[0021] According to any of the aforementioned embodiments, the threshold voltage may be based on a first trigger level of the first parasitic conduction path.

[0022] According to any of the aforementioned embodiments, the leakage characteristics may include an amount of leakage voltage over time.

[0023] The present disclosure also relates to an apparatus for operating a first piezoelectric transducer configured to couple to a voltage source providing an input voltage and configured to send a drive voltage across the first piezoelectric transducer, the apparatus comprising: a driver circuit including a first driver circuit switch configured to be connected to a first piezoelectric transducer and including a first parasitic conduction path, the driver circuit configured to receive an input voltage and send a drive voltage to generate a force or displacement response to the first piezoelectric transducer; a sensing circuit configured to sense a first sense voltage generated by a first force applied to the first piezoelectric transducer, the sensing circuit including a first sensing switch; and a controller configured to determine a charge leakage characteristic of the driver circuit, repeatedly sense a first sense voltage produced by a first force applied to the piezoelectric transducer, generate a digital representation of the first sense voltage, generate an adjusted digital representation of the first sense voltage based on the leakage characteristic, and deliver a drive voltage to the first piezoelectric transducer to generate a force or displacement response to the first piezoelectric transducer when the adjusted digital representation of the first sense voltage reaches a target force threshold voltage.

[0024] According to any of the aforementioned embodiments, the threshold voltage may be based on a first trigger level of the first parasitic conduction path.

[0025] According to any of the aforementioned embodiments, the leakage characteristics may include an amount of leakage voltage over time.

[0026] The present invention will now be described in more detail with reference to the accompanying drawings, which show preferred embodiments thereof. [Brief explanation of the drawings]

[0027] [Figure 1] FIG. 1 is a schematic diagram of a piezoelectric transducer system according to one embodiment of the present disclosure. [Figure 2A] FIG. 1 is a schematic diagram of a piezoelectric transducer driver circuit according to one embodiment of the present disclosure. [Figure 2B] FIG. 1 is a schematic diagram of a piezoelectric transducer driver circuit according to one embodiment of the present disclosure. [Figure 3] 1 is a schematic diagram of a piezoelectric transducer system according to one embodiment of the present invention. [Figure 4] Figure 3 is a graph of output voltage versus time for the piezoelectric transducer system without the sense / drive algorithm running. [Figure 5] 4 is a graph of output voltage versus time during operation of the sense / drive algorithm of the piezoelectric transducer system of Figure 1 or Figure 3. [Figure 6] 1 is a flow diagram of an algorithm for controlling a piezoelectric transducer. [Figure 7] FIG. 1 is a schematic diagram of a multi-channel piezoelectric transducer system according to another embodiment of the present disclosure. [Figure 8] 1 is a graph of the piezoelectric sensed voltage versus time for a conventional multi-channel piezoelectric transducer system. [Figure 9] Figure 7 is a graph of the piezoelectric sensed voltage versus time for the multi-channel piezoelectric transducer system. [Figure 10]1 is a graph of threshold force versus press speed with and without leak compensation. [Figure 11] 10 is a graph of the piezoelectric sensed voltage versus time during a characterization test. [Figure 12] 10 is a graph of voltage versus time of the piezoelectric sensed voltage for the first embodiment of the leakage compensation system. [Figure 13] 10 is a graph of the voltage versus time of the piezoelectric sensed voltage for the second embodiment of the leakage compensation system. DETAILED DESCRIPTION OF THE INVENTION

[0028] While the present teachings are described in conjunction with various embodiments and examples, it is not intended that the present teachings be limited to such embodiments. On the contrary, the present teachings encompass various alternatives and equivalents, as will be appreciated by those skilled in the art.

[0029] FIG. 1 shows a piezoelectric transducer system 1 that can use a piezoelectric transducer P1, or some other form of transducer, such as an electroactive polymer transducer, as both an actuator for driving (e.g., haptic feedback) and for force sensing (e.g., switch or level control). Typically, a circuit is designed to either drive the piezoelectric transducer P1 or sense the force applied to the piezoelectric transducer P1. Combining both functions within the same system and / or operating multiple piezoelectric transducers simultaneously creates problems due to parasitic paths created by the output devices (transistors) in the driver section of the system. Conventional systems, such as the system disclosed in EP 3065029 (Kyocera), require four or five switches in addition to the drive and sensing units to switch between different modes and isolate the parasitic paths.

[0030] Piezoelectric transducer system 1 includes a piezoelectric transducer circuit 2 with an input stage 3, a driver stage 4, an amplifier bias / switch control 5, and an output stage 6 containing a piezoelectric transducer P1 or some other electroactive transducer. Piezoelectric transducer circuit 2 may be implemented on a single chip or using discrete components due to the high power it must handle. Input stage 3 is connected to a high voltage source V, typically between 20 V and 200 V. HV , whereby the driver stage 4 simply HV and V ref The desired driver voltage V DR Drives V DR is the high voltage source V HV , or a stepped-down magnitude, typically between 20V and 80V for example, forming an output voltage Vout at the output node 13 and at the output stage 6, for example across the piezoelectric transducer P1.

[0031] Alternatively, the input stage 3 may be connected to a low voltage source V, such as a battery, typically between 2V and 10V, preferably between 3.6V and 5V. IN , whereby the driver stage 4 may include or be connected to an input voltage V in For example, a higher peak AC driver voltage V of 30V to 60V DR The power converter circuit 18 also includes a power converter circuit 18 that includes a plurality of switches, e.g., power conversion transistors, and a power converter circuit 18 for converting an input voltage V in the desired driver voltage V DR The signal may include other electrical components such as inductors and capacitors to amplify the signal.

[0032] Driver stage 4 is driven by the driver voltage V DR to the output stage 6, the output node 13 is connected to the required driver voltage V DR output voltage V out a first driver stage switch Q, such as a first driver transistor and a second driver transistor Q, configured to be biased asDR1 and second driver stage switch Q DR2 and a second driver stage switch Q DR2 Also, the piezoelectric transducer P1 has an output node 13 and a reference node 20 (V ref ) and may be configured to discharge the output node 13, for example back to 0 V, after the driver stage 4 has activated the piezoelectric transducer P1 to allow normal sensing to proceed.

[0033] The amplifier bias / switch control 5 controls the driver stage switches, e.g., the first driver stage switch Q DR1 and second driver stage switch Q DR2 , as well as a controller 50 for controlling the bias of the power converter switches as needed. There are many ways to design the amplifier bias / switch control 5 to achieve the desired system specifications. The controller 50 may also monitor the output voltage V from the output node 13, for example, to determine if an external force has been applied to the piezoelectric transducer P1 by, for example, a user. out Specifically, the controller 50 may continuously detect the external force and the output voltage V out The resulting sensed voltage V from the piezoelectric transducer P1 measured as Sens exceeds an activation level, and as a result, the controller 50 activates the driver stage 4 to apply the driver voltage signal V to the piezoelectric transducer P1. DR to generate a haptic response, e.g., vibration, translation, and / or noise. out is connected between the output node 13 and the reference node 20 (reference voltage V ref ) and this voltage corresponds to the sensed voltage V depending on the current activity of the piezoelectric transducer system 1. Sens and / or driver voltage signal V DRThe controller 50 may also be responsive to an external command signal from the outside world, e.g., a host electronic device incorporating the piezoelectric transducer system 1, such as a smart watch, a smart phone, or a tablet, to operate the driver stage 4 to generate a driver voltage signal V to the piezoelectric transducer P1. DR may be sent to generate a tactile response.

[0034] The output stage 6 receives the output of the piezoelectric transducer circuit 2, e.g., a driver voltage signal V, in parallel with a load 15, e.g., one or more piezoelectric transducers P1. DR A passive filter 8 may be provided that is configured to filter the driver voltage signal V before it reaches the load 15. The passive filter 8 is optional, but can be used without changing the high-level behavior of the piezoelectric transducer system 1. The passive filter 8 filters the driver voltage signal V before it reaches the load 15. DR A passive filter 8 may be inserted between the driver stage 4 and the load 15 to remove high frequency components. Passive filters 8 are particularly useful when the driver stage 4 uses a class D amplifier topology.

[0035] Reference voltage V ref represents the voltage reference of the load 15, e.g., the piezoelectric transducer P1. ref is ground or any other convenient voltage in the system, e.g., V in It can be said that:

[0036] A high voltage protection circuit 9 may be included within the amplifier bias / switch control 5 or separate from the amplifier bias / switch control 5, which protects the output voltage V from the output node 13. out , i.e., the sensed voltage signal V from the load 15 Sens , and / or the driver voltage V from the driver stage 4 DR to a suitable, e.g., safe, voltage level for one or more analog-to-digital converters (ADCs) 17. The one or more ADCs 17 may generate an output voltage V out, i.e., the sensed voltage signal V Sens and / or driver voltage signal V DR is converted into a digital representation and the detected voltage signal V Sens and / or driver voltage signal V DR , and communicates the corresponding digital value of the magnitude of the signal to the controller 50 in the amplifier bias / switch control 5.

[0037] The sense / drive algorithm 10 may be in the form of computer hardware and / or computer software stored in non-transitory memory, either as part of the piezoelectric transducer system 1 or as a separate memory storage device, and controls the generation of the sense voltage signal V during various applications. Sens is any driver stage switch directly connected to the piezoelectric transducer P1, e.g., the first driver stage switch Q DR1 or second driver stage switch Q DR2 Even if any parasitic conduction path, e.g., a body diode, is forward biased, the amplifier bias / switch control 5, specifically the controller 50, detects the sensed voltage V across the load, e.g., the piezoelectric transducer P1. Sens For example, during removal of the force on the piezoelectric transducer P1 after actuation of the piezoelectric transducer P1, a negative voltage, e.g., −2 V, may be generated, which may cause at least one of the driver stage switches, e.g., the second driver stage switch Q DR2 Parasitic leakage occurs at the Sens If is large enough to exceed the activation level, the controller 50 will not be able to accurately determine the force applied to the piezoelectric transducer P1.

[0038] Therefore, the output voltage V from output node 13 out , i.e., the detection voltage V Sens is repeatedly set to zero to detect the actual sensed voltage V Sens To allow editing of the voltage segment used to determine SFor example, a detection switch Q S , e.g., a sensing transistor, with a control terminal, e.g., gate, connected to the controller 50, connected across the piezoelectric transducer P1, e.g., output node 13 and reference node 20 (reference voltage V ref ), e.g., V in , or ground, and, as disclosed in detail below, may detect a sensed voltage V across the piezoelectric transducer P1, if desired. Sens is set to zero, i.e., the reference voltage V ref The second driver stage switch Q DR2 , or any other suitable switch, e.g., a transistor, already provided in the piezoelectric transducer system 1, can be used as the sensing switch Q S It can also be used as.

[0039] The communications interface 19 enables the piezoelectric transducer system 1 to send and receive signals related to driving one or more piezoelectric transducers P1 and / or sensing the application of force to one or more piezoelectric transducers P1 to and from the external world, e.g., a host electronic device incorporating the piezoelectric transducer system 1, such as a smart watch, smartphone, or tablet. The actuation of one or more piezoelectric transducers P1 may provide any form of user input, e.g., an indication of on / off, volume up, volume down, input, etc., to the host device.

[0040] 2A and 2B show two embodiments of a piezoelectric transducer circuit 2. The driver stage 4 may be based on different amplifier architectures, e.g., Class A, Class AB, Class D, etc., but from an architecture and component standpoint, a load 15, e.g., one or more electroactive or piezoelectric transducers P1, is connected to an output node 13 and a reference node 20 or reference voltage V for a unipolar output. refIn the case of a bipolar output, e.g., FIG. 2B, each end of the load 15 is connected to a different output node 13+ and 13−. In all cases, the output voltage V at the output nodes 13+ and 13− is out , e.g., the driver voltage signal V DR and / or the detection voltage signal V Sens But, Q DR1+ , Q DR1- , Q DR2+ , and Q DR2- The high voltage supply V HV or V in (or current source) and reference voltage V ref , for example, may allow current to flow between the reference node 20 .

[0041] One exception is shown in Figure 3, which shows a two-transistor architecture described in U.S. Patent No. 10,199,555, issued February 5, 2019, in the name of Simon Chaput, which is incorporated herein by reference. The two-transistor driver stage 4 allows current to be sunk and sourced at the load 15 through the second driver stage switch Q2. In all figures, the body diodes of the first driver stage switch Q1 and the second driver stage switch Q2 are shown with diode symbols to explicitly show parasitic paths. For all transistors, the voltage from the conducting terminal to the conducting terminal, e.g., the drain-source voltage (V DS) becomes sufficiently negative, exceeding the leakage or turn-on voltage of the body diode of second driver stage switch Q2, which is connected, for example, to load 15, current begins to flow from a first conductive terminal, e.g., the source, to a second conductive terminal, e.g., the drain, through the body diode. The leakage voltage at which current begins to flow through the diode may typically be between 0.2V and 0.7V, depending on the exact device and semiconductor technology used. For simplicity of explanation, we will assume that N-type MOS transistors are used, but those skilled in the art will understand that a similar situation occurs with other transistors, e.g., P-type devices.

[0042] The piezoelectric transducer system 1 includes a piezoelectric transducer circuit 2 with an input stage 3, a driver stage 4, an amplifier bias / switch control 5, and an output stage 6. The piezoelectric transducer system 1 may be implemented on a single chip or using discrete components due to the high power it must handle. The input stage 3 accepts an input voltage V, typically between 6V and 20V, and preferably between 9V and 16V. in A voltage source V, such as a battery, IN The driver stage 4 may include a power converter circuit 18 that includes a forward boost / reverse buck converter that generates a clean sinusoidal waveform. The power converter circuit 18 of the driver stage 4 is connected to a voltage source V IN, and a driver stage switch, for example, a driver stage switch consisting of a first low-side switch Q1 connected between the inductor L1 and ground and a second driver switch Q2 connected between the inductor L1 and the output stage 6. A control terminal, for example, a gate, of a transistor in the first driver stage switch Q1 may be connected to a first gate driver 11 in the amplifier bias / switch control 5, and a control terminal, for example, a gate, of a transistor in the second switch Q2 may be connected to a second gate driver 12 in the amplifier bias / switch control 5. Both the first gate driver 11 and the second gate driver 12 may be connected to a controller 50, which sends control signals to the first gate driver 11 and the second gate driver 12 to control the operation of the first driver gate switch Q1 and the second driver gate switch Q2, respectively.

[0043] Although the above embodiments are described as being used with sinusoidal waveforms, those skilled in the art will appreciate that the embodiments described herein can operate with any complex analog waveform, e.g., rectangular, triangular, AM modulated, FM modulated waveforms, and are not limited to operation with sinusoidal waveforms.

[0044] Input stage 3 is connected to a low voltage source, V IN A filter capacitor (C VIN ), and a low voltage source V IN A sense resistor (R S ) The single inductor L1 may include a sense resistor R S and the switching node SW of the driver stage 4. A current sensor 7, which may be included in the amplifier bias / switch control 5, may be connected across a sense resistor R to measure the current and / or voltage entering the inductor L1 and the driver stage 4. Sand the controller 50. The current sensor 7 provides bidirectional current sensing under all possible switching conditions during operation, e.g., boundary conduction mode, discontinuous conduction mode, and continuous conduction mode. The current feedback sensor 7 ensures that the first driver stage switch Q1 and the second driver stage switch Q2 are switched on and off in a timely manner to avoid high switching losses at the switching node SW.

[0045] The second driver stage switch Q2 is connected to the switching node SW and drives the switching node voltage V sw 1. The amplifier bias / switch control 5 may be an N-type transistor including a first conductive terminal, e.g., a source, referenced to ground, a second conductive terminal, e.g., a drain, connected to the load 15, and a third control terminal, e.g., a gate, connected to the controller 50. To properly control the control terminals, a level shift block 14 may be included in the amplifier bias / switch control 5 to shift the control signal from the controller 50, which is referenced to ground, to a switching node voltage V at the floating switching node SW. sw In a first embodiment, level shift block 14 allows scaling of the digital control signal amplitude from digital logic levels to a higher amplitude suitable for second driver stage switch Q2, for example from 1.8V to 5V.

[0046] The level shift block 14 shifts the driver voltage signal V DR Reference voltage V ref, i.e., reference node 20 can be changed from ground to any floating node, in this case switching node SW. While FIG. 3 shows N-type transistors for first driver stage switch Q1 and second driver stage switch Q2, in alternative embodiments, different types of switches, e.g., P-type transistors, may be used with similar requirements for the level shifting blocks. In the case of P-type switch transistors, level shifting block 14 can use a floating bootstrap power supply (not shown) to provide the desired level at the output of level shifting block 14.

[0047] Differential drive voltage signal (V DR -V IN ) is very clean, but the output voltage V out , e.g., the driver voltage signal V at output node 13 DR or detection voltage signal V Sens The high voltage protection circuit 9 may include a difference amplifier 16, which is connected to a reference voltage V ref and the output voltage V at output node 13 out , i.e., the driver voltage signal V DR and / or the detection voltage signal V Sens The differential drive voltage between V and V is continuously measured and the difference is converted to a single-ended signal, which is fed to an analog-to-digital converter (ADC) 17, which outputs an output voltage V out , i.e., the drive voltage signal V DR and / or detection voltage V Sens provides a digital representation of the signal to the controller 50.

[0048] The communications interface 19 may comprise a serial peripheral interface (SPI), which implements a communications protocol that allows an external microcontroller (or other device, e.g., a computer) to send and receive information, such as reference waveforms and internal settings used in a particular implementation, to and from the piezoelectric transducer circuit 2 via the controller 50. Note that SPI is one example of several digital communications protocols that may be implemented to interface with the controller 50. Other examples of communications interfaces include, but are not limited to, I2C, TDM, and I2S.

[0049] Inductor L1 may be a 10 μH inductor. The value of inductor L1 may be selected to (1) achieve a target distortion, e.g., lower inductance allows for a higher switching frequency, resulting in less distortion / THD+N, and / or (2) minimize switching frequency, e.g., lower switching frequencies generally result in less power consumption.

[0050] Although embodiments using mixed switches can be used, the first driver stage switch Q1 and the second driver stage switch Q2 can be the same type, which may be the most practical choice for integrated circuit (IC) implementation. The first driver stage switch Q1 and the second driver stage switch Q2 may comprise, for example, GaN, PMOS, among other possible switches.

[0051] Output stage 6 is connected to the input voltage V instead of GND. in The output stage 6 may be connected to a filter 8, e.g., a filter capacitor C HV , and a load 15, e.g., a piezoelectric transducer P1. Thus, for example, in a quiescent state, to make the voltage difference across the piezoelectric transducer P1 0 V, the driver voltage signal V DR and the input voltage V in The reference voltage V is equal to refFor example, in operation, the driver voltage signal V across the load 15 can be DR is the input voltage V in may be achieved by the power converter circuit 18 of the driver stage 4.

[0052] In the piezoelectric transducer system 1 shown in FIG. 3, the conversion ratio of the power conversion circuit 18, for example, the voltage amplification, is set to, for example, 3.6 to 5 V. DC Input voltage V in from 50 to 120V AC The driver voltage signal V DR In this case, the switching node voltage V at the switching node SW may be greater than 10 times, preferably between 10 and 20 times. Initially, the controller 50 turns on the first driver stage switch Q1, and the current in the inductor L1, which is connected to the reference node 20, e.g., ground, rises linearly. When the controller 50 turns off the first driver stage switch Q1, the switching node voltage V at the switching node SW rises linearly. SW is the driver voltage signal V DR to the desired output voltage V out value, causing current to flow from inductor L1 through second driver stage switch Q2, increasing the output voltage V out Now, the body diode of the second driver stage switch Q2, which connects the switching node SW to the load 15, may turn on, or the second driver stage switch Q2 may turn on, charging the load 15, e.g., the piezoelectric transducer P1. When the inductor L1 current reaches zero, the second driver stage switch Q2 turns off, and the switching node voltage V SW returns to 0 V. The controller 50 alternates the states of the first driver stage switch Q1 and the second driver stage switch Q2 to control the amount of energy delivered to or extracted from the load 15. In the power converter circuit 18 of the driver stage 4, the voltage gain of the boost converter is almost always greater than 2, so that the switching node voltage V SWcan go slightly below 0V, turning on the body diode of the first driver stage switch Q1. As a result, the first driver stage switch Q1 turns on again under zero voltage switching conditions (ZVS), thereby reducing the switching losses associated with the parasitic capacitance of the switching node SW.

[0053] When the second driver stage switch Q2 turns off, the first driver stage switch Q1 turns on under ZVS conditions. In this case, the first driver stage switch Q1 turns on when the inductor L1 is connected to the switching node voltage V SW The driver voltage signal V DR When the first driver stage switch Q1 turns off, the switching node voltage V SW is the driving voltage V DR , the second driver stage switch Q2 is turned on in ZVS condition, thereby reducing switching losses.

[0054] A potential problem with the piezoelectric transducer system is the inability to accurately sense a negative voltage across the piezoelectric transducer P1, which may be due to a parasitic conduction path, e.g., a body diode leakage or turn-on voltage V, of at least one of the driver stage switches, e.g., the second driver stage switch Q2. to , for example, limited by -0.3 V. The sensed voltage signal V across the piezoelectric transducer P1 Sens By V Sens -V sw However, the turn-on voltage V is set by the body diode leakage of the driver stage switch, e.g., the second driver stage switch Q2. to When the voltage V is less than 1 V, all other charges generated by the piezoelectric transducer P1 are displaced by body diode conduction, which limits the change in voltage, and the output voltage V read by the controller 50 out is approximately the turn-on voltage V to is limited to.

[0055] Referring to FIG. 4, when a force is first applied to the piezoelectric transducer P1, a sensed voltage signal V Sens , and the detection voltage signal V Sens The output voltage V is then read by the controller 50. out This results in the sensed voltage signal V gradually increasing, e.g., becoming positive, i.e., increasing from zero to a maximum voltage, e.g., 2.0 V. Sens When the driving voltage V reaches the activation level, for example 1.8V, the driver voltage V DR is forced, generating a haptic feedback event and increasing the output voltage V out , the driver voltage V DR The haptic event is generated by increasing the voltage V across the piezoelectric transducer P1 to, for example, 50 V or more. out However, when the force or pressure on the piezoelectric transducer P1 is released, the sensed voltage signal V Sens and output voltage V out gradually decreases, and the turn-on voltage V of the body diode of one of the driver stage switches, for example the second driver stage switch Q2, to , for example, a negative voltage lower than −0.3 V. Unfortunately, at lower voltages, i.e., more negative voltages, the sensed voltage signal V across the piezoelectric transducer P1 Sens is the leakage or turn-on voltage V of the body diode of the second driver stage switch Q2, for example. to and all other charges generated by the piezoelectric transducer P1 are below the upper voltage limit set by out The output voltage V read by the controller 50 is replaced by body diode conduction, which limits the change in out is limited to its upper voltage limit.

[0056] FIG. 5 shows a sensing switch, e.g., a sensing transistor Q S, which is a switch that replaces an existing driver stage switch, e.g., a second driver stage switch Q, to enable the sense / drive algorithm 10 to be executed by the controller 50. DR2 (Fig. 1) The added detection switch Q S (FIG. 1), or a third switch, e.g., transistor Q3 (FIG. 3). The sensed voltage signal V across the load 15, e.g., piezoelectric transducer P1, Sens Typically, when a user applies force to the piezoelectric transducer P1, a sensed voltage signal V Sens increases in a positive direction until it reaches a set activation level to initiate a haptic effect. When the activation level is reached, different driver stage switches, e.g., a first driver stage switch Q1 and a second driver stage switch Q2, are biased by the controller 50 to generate a high voltage drive voltage signal V on the piezoelectric transducer P1. DR The piezoelectric transducer P1 generates a driving voltage signal V DR is converted into a displacement or force that is sensed by the user via the piezoelectric transducer P1. The sensed voltage signal V Sens is returned to 0 at the end of the haptic effect using at least one of the driver stage switches, for example the second driver stage switch Q2. Then, when the user removes the force from the piezoelectric transducer P1, the sensed voltage signal V across the piezoelectric transducer P1 Sens Therefore, the total sensed voltage V SensT can be obtained as an accurate representation, e.g., a digital value, of the total sensed voltage V SensT is the output voltage signal V out , for example, the detection voltage V that is continuously detected at 1 kS / s to 10 kS / s Sens segments are stitched together to provide an interim digital representation of the current at each sample, which is then used to calculate the output voltage, i.e., the sensed voltage V SensHowever, whenever the parasitic conduction path approaches its turn-on voltage, for example every 2 to 4 ms, the detection switch Q S 5, providing a digital representation of a complete segment with each discharge. Although not shown in FIG. 5, the sensed voltage signal V Sens or V SensT When V reaches an activation level, for example, a magnitude (absolute value) below −1.8V or above the magnitude (absolute value) of the activation level value, the next haptic effect may be triggered.

[0057] A sensing switch comprising a third switch Q3, e.g., a sensing transistor Q S has a control terminal, e.g., gate, connected to the controller 50, a piezoelectric transducer P1, and a reference voltage, e.g., V ref , V in , or ground, and the output voltage V across the piezoelectric transducer P1 out , e.g., the detection voltage V Sens If necessary, the reference voltage V ref Therefore, the output voltage V out is a given threshold voltage V th , for example, before reaching the trigger level of the parasitic conduction path, e.g., the turn-on voltage (−0.3 V) of the body diode of the second switch Q2, the third switch Q3 is activated by the controller 50 to increase the output voltage V out , for example, the sensed voltage V across the piezoelectric transducer P1 Sens can be made zero. As a result, V Sens Output voltage V based on out is higher than the negative turn-on voltage (or lower than the positive turn-on voltage), the threshold voltage V th , for example, −0.25V, a full voltage segment is generated and converted to a digital value by the controller 50, resulting in a cumulative sensed voltage value V acc Then, the detection switch Q SFor example, multiple voltage segments, each of which has a magnitude approximately equal to the threshold voltage (0.25 V) but typically increases with the sample rate, are generated sequentially and then discharged. The sense / drive algorithm 10 executed by the controller 50 generates a sensed voltage V across the piezoelectric transducer P1 from the multiple voltage segments. Sens For example, the detection voltage V Sens If accuracy is essential, it can provide a (digital) reconstruction of the total accumulated sensed voltage V SensT Form a digital value representing the current sensed voltage V Sens For example, the sense / drive algorithm executed by the controller 50 may provide an intermediate digital representation of the output voltage V out (see Figure 5) or by summing (digitally) the different voltage segments of the output voltage V out from 0 to the threshold voltage V th , which can provide much better sensing performance for negative voltages across the piezoelectric transducer P1. Thus, the controller 50 may be able to determine when the user has fully released the piezoelectric transducer P1 and / or set a more accurate minimum negative voltage for resetting and determining the application of a secondary force to the piezoelectric transducer P1, for example, above the magnitude of the actuation level. In the architecture of FIG. 3, to enable the sense / drive algorithm 10 to be implemented, the sense switch Q S , for example, a third switch Q3 needs to be added, but in some architectures, adding an extra component, for example, a third switch Q3, may not be necessary to implement the method, and it may be sufficient to utilize an existing component, for example, the second switch Q2, and modify the control algorithm.

[0058] 6, the controller 50 may execute the sense / drive algorithm 10 in the following manner: During normal operation, the controller 50 executes a sensing loop including a sensing step 101, which measures the current sensed voltage V at a typical rate preferably between 1000 samples per second and 10,000 samples per second (1 kS / s to 10 kS / s) for human machine interface applications. Sens Before entering the sensing loop, the first piezoelectric transducer P1 is connected to one side, e.g., V in The reference voltage V ref connected to the driver stage switch, e.g., Q DR1 , Q DR2 , Q1, or Q2, and the detection switch Q S is switched off to create a high impedance node 13, and the controller 50 detects the sense voltage V Sens The output voltage V consists of only out In step 101, the sensed voltage V across the piezoelectric transducer P1 is Sens , (V out -V ref ) is detected. The accumulated voltage V acc The value of is initially set to 0V, and the controller 50 measures the sensed voltage V at the aforementioned sample rate, for example, every 0.1 to 1 ms. Sens Detect and receive an intermediate digital representation of the signal.

[0059] In decision step 102, the controller 50 may, for example, determine whether the sensed voltage signal V Sens , preferably the absolute value of which is the threshold voltage V th , preferably whether or when its absolute value is exceeded, or a threshold voltage V th and the turn-on voltage V of some or all of the parasitic paths toBy determining whether or when the voltage across the piezoelectric transducer P1 is approaching the trigger level of any of the parasitic paths in the circuit, the sensed voltage signal V across the piezoelectric transducer P1 can be determined. Sens When V becomes sufficiently negative, there is a single parasitic path in the implementation of Figure 3. However, Figures 1 and 8 show that the sensed voltage signal V across the piezoelectric transducer P1 Sens , where the upper and lower limits of , can trigger a parasitic path. As a result, decision step 102 determines whether the current sensed voltage signal V across the piezoelectric transducer P1 is Sens The test verifies whether and when the parasitic path is triggered by the voltage V across the piezoelectric transducer P1. Although the test shows a single condition, multiple conditions may be tested in a practical application. If none of the conditions is true, i.e., the sensed voltage signal V across the piezoelectric transducer P1 is Sens If V is not likely to trigger a parasitic path, i.e., is not close to the threshold voltage, algorithm 10 proceeds to summation step 103, where the sum sensed voltage signal V SensT or the new cumulative voltage V acc(i) is the cumulative voltage V acc(i-1) (the result of the accumulation step 105 described below, or 0V if no parasitic path has been triggered before) to the current sample, i.e., the current measured sense voltage V across the piezoelectric transducer P1 according to the intermediate digital representation. Sens The detection loop then proceeds to a comparison step 104, where the sensed voltage V Sens or total cumulative detected voltage V SensT The value of is set to any one or more activation levels V of the piezoelectric transducer P1. act Depending on the result of the comparison step 104, the algorithm 10 calculates the total accumulated sensed voltage V SenT is the operating level V of the piezoelectric transducer P1. act until the detection loop (V SensT <V act) or algorithm 10 exits the sensing loop and enters the drive loop to drive driver stage 4 and piezoelectric transducer P1 at driver step 107, as described below, for other reasons, such as an external prompt from an external device.

[0060] While algorithm 10 cycles through the detection loop, decision step 102 (V Sens ≧V th ), one of the conditions, for example, one of the parasitic paths is approaching the trigger, and V th It may be true that the total sensed voltage V SensT、 Or alternatively, the new accumulated voltage V acc(i) The value of is the current sense voltage V measured across the piezoelectric transducer P1 based on the current sample (intermediate digital representation of the current). Sens (or V out -V ref ) and the previously discharged sense voltage signal V Sens The accumulated voltage V based on the number of voltage segments (digital representation) acci The sum of the current value of acc(i-1) When Algorithm 10 enters the detection loop, the accumulated voltage V acc is always 0 and its value is updated after each pass through the accumulation step 105, so that the controller 50 calculates the total accumulated sensed voltage V generated by the piezoelectric transducer P1, as shown in FIGS. SensT The accumulation step 105 determines the total accumulated sensed voltage V SensT is the new cumulative voltage V acc Then, in discharge step 106, the sensing switch (e.g., Q DR2 or Q S ) to discharge the voltage across the piezoelectric transducer P1 to 0V. Sis turned on for a sufficient time to ensure proper discharge using an implementable filter 8. In a comparison step 104, after each sample, the accumulated voltage V acc(i) + Current detection voltage V Sens the total accumulated sensed voltage V, which may be an intermediate digital representation thereof. SensT However, the operating level V act When the controller 50 detects that the force applied to the piezoelectric transducer P1 is greater than 100 kJ / s, i.e., that the force applied to the piezoelectric transducer P1 is sufficiently large, or when an external prompt is sent from the host device at decision step 102, the controller 50 switches to driver step 107 in the drive loop.

[0061] In driver step 107, the controller 50 selects the appropriately biased driver stage switches, e.g., Q1 and Q2 or Q DR1 and Q DR2 , and a detection switch, e.g., Q S The driver voltage signal V DR During the driving step 107, the driver stage switches, e.g., the first switch Q1 and the second switch Q2, and the sense switching Q s , for example, third switch Q3, is appropriately biased by controller 50 to drive first piezoelectric transducer P1 to generate a haptic response to the user upon some form of notification from the device, such as the application of a force to piezoelectric transducer P1, or in response to an external notification, such as a phone call. Referring to repeat step 108, upon completion of the haptic effect, sense / drive algorithm 10 may repeat drive step 107 if, for example, an external prompt from the host device requests another haptic response, or may return to the sense loop and await user or device input. Before returning to the sense loop at step 101, controller 50 first biases sense switch Q S and / or driver stage switches, e.g., Q1 and Q2 or Q DR1 and Q DR2 Turn on the piezoelectric transducer P1 to generate an output voltage Vout is discharged, for example, to 0V (step 109), and then in a reset step 110, the driver stage switches, for example Q1 and Q2 or Q DR1 and Q DR2 , and detection switch Q S , a first reset step 109 and / or a second reset step 110 are performed by turning off the piezoelectric transducer P1 to accumulate (or drain) the charge generated by the piezoelectric transducer P1 and reset the output node 13 (V out ) and reference voltage V ref , for example, V IN , so that the controller 50 generates a sensed voltage signal V across the first piezoelectric transducer P1. Sens The output voltage V out Receive accurately.

[0062] To avoid parasitic leakage, the controller 50 may select a switch, e.g., a transistor connected to the piezoelectric transducer P1, e.g., the first driver stage switch Q DR1 and second driver stage switch Q DR1 For each output voltage V out When the threshold voltage V th and turn-on voltage V to For example, for a negative voltage, the controller 50 may determine whether the output voltage V out When the threshold voltage V th For a positive voltage, the controller 50 may determine whether the output voltage V out When the threshold voltage V th Alternatively, the controller 50 may determine whether the magnitude (or absolute value) of the output voltage |V out -V ref When | is the magnitude (or absolute value) of the threshold voltage |V th 3, it may be determined whether the threshold voltage V th (e.g., -0.25V) is the turn-on voltage V of the second switch Q2. to(eg, -0.3V), although other switch threshold voltages are within the scope of the present invention.

[0063] Referring to FIG. 1, decision step 102 may determine whether all or at least some of the drive switches, such as the driver stage switches (e.g., Q DR1 , Q DR2 , Q1 and Q2) or the minimum magnitude or maximum value of the turn-on voltage V to For a driver stage switch with to The appropriate threshold voltage V th More generally, the decision step 102 may be applied using the sensed voltage signal V Sens is the threshold voltage V th By comparing with the output voltage V out The question is whether the value approaches a value that triggers existing parasitic paths in the piezoelectric transducer circuit 2. The number of parasitic paths in the piezoelectric transducer circuit 2 can vary. In the example of FIG. 1, there are two paths, e.g., Q DR1 and Q DR2 In the example of FIG. 2B, there are four parasitic paths, e.g., Q DR1+ , Q DR1- , Q DR2+ , and Q DR2- , and in the embodiment of FIG. 3 there is one parasitic path, for example Q2.

[0064] If the answer to decision step 102 is yes for at least one parasitic path under test, then in accumulation step 105, the controller 50 calculates the previous accumulated voltage V acc(i-1) The current voltage segment V Sens , i.e. (V out -V ref ) i The new or current cumulative voltage V acc(i) is calculated, and each voltage segment has a threshold voltage V thEach voltage segment is converted to a digital representation, which is then summed by the controller 50. In this situation, the reconstructed total voltage V SensT is the digital representation of the voltage segment, V Sens or (V out -V ref ) plus V acc(i-1) It may be equal to

[0065] Detection voltage V Sens , (V out -V ref ) reaches a parasitic state in the decision step 102 and the accumulation step 105 is performed, the controller 50 may perform a discharge step 106, during which the controller 50 deactivates the sensing switch Q S , e.g., the second driver switch Q DR2 or at least one of the third switches Q3 is turned on, and the output voltage V out -V ref V is discharged to zero, e.g., to 0 V. The sense / drive algorithm 10 then proceeds to repeat the decision step 102 at a repetition rate faster than the changes in force on the first piezoelectric transducer P1, which typically occur over a few milliseconds. Thus, in a digital system, the sense loop repeats, generating a new intermediate digital representation and a new total sensed voltage V every 100 μs to 1 ms. SensT along with the new sampled sense voltage V Sens can be obtained to achieve excellent detection performance in human-machine interfaces.

[0066] For example, the minimum magnitude or maximum value of the turn-on voltage V to If the answer to decision step 102 is no for all parasitic paths, or at least one or more parasitic paths under test, then during decision step 103, the controller 50 determines whether the cumulative voltage V acc(i-1) and the detection voltage V SensThe current voltage segment of (V out -V ref ) and the reconstructed or total accumulated sensed voltage V SensT If there are no parasitic paths in the driver stage 4, the total accumulated sense voltage V SensT The value of is the output voltage V out represents the voltage at

[0067] A specific example of the sense / drive algorithm 10 is to calculate the total accumulated sense voltage V SensT is the operating level V act Until step 104 determines that the applied force is greater than or the host device sends an external prompt, piezoelectric transducer P1 continues to sense the applied force, which causes controller 50 to activate driver stage 4 in step 107, e.g., biasing driver stage switches Q1 and Q2 to increase driver voltage signal V DR and generates the driver voltage V DR When the application of the voltage waveform to the piezoelectric transducer P1 is completed, for example, after one cycle of a sine waveform with a frequency of 200 Hz and an amplitude of 50 V, the piezoelectric transducer system 1 then returns to the detection loop. In step 109, the driver stage switches, for example, Q1 and Q2 or Q DR1 and Q DR2 , or detection switch Q S One of the switches Q1 and Q2 may be turned on for a time sufficient to discharge the piezoelectric transducer P1, for example, to 0V, and then, as step 110, the driver stage switches, for example, the first switch Q1 and the second switch Q2, are turned off to allow the charge generated by the piezoelectric transducer P1 to accumulate, thereby generating an output voltage V out and the reference voltage V ref The voltage between may increase and / or decrease with the application of force to the piezoelectric transducer P1.

[0068] For example, during the release of the force or during the second successive application of the force, when the application of the original force continues, the controller 50 may, in step 102, measure the sensed voltage V Sens Represents the output voltage V out , i.e., the output voltage V out to the reference voltage V ref In other words, the controller 50 determines whether the output voltage V out is the leakage voltage V of at least one of the driver stage switches, for example the second switch Q2. to a predetermined threshold voltage V th is greater than the output voltage V out is the leakage or turn-on voltage V of the body diode of one of the driver stage switches, for example the second switch Q2. to Determine whether the negative voltage is large enough to overcome the sensed voltage V Sens , and therefore the output voltage V out is the threshold voltage V th , for example, reaches −0.5 V (step 105). In step 105, the controller 50 th typically at a threshold voltage V th The output voltage V out The voltage segments of the cumulative voltage V acc Detection switch Q S The third switch Q3, for example, is turned on by the controller 50 for a time long enough to discharge the first piezoelectric transducer P1 to 0 V (step 106). The accumulation process may be repeated (step 105) at a rate faster than the change in force on the first piezoelectric transducer P1, which typically occurs over a few milliseconds, for example, every 1000 samples per second (1 kS / s) to 10,000 samples per second (10 kS / s). During each sample, the threshold voltage V th is not satisfied, the controller 50 detects the total sensed voltage V SensT may be calculated (step 103), and the total sensed voltage V SensT is the previous cumulative voltage V acc(i-1)The current reference voltage segment value V Sens plus V out to the reference voltage V ref minus the , which may be 0 (for ground).

[0069] Referring to FIG. 7, a single driver circuit can be utilized to independently drive multiple loads 15, each comprising multiple piezoelectric transducers, e.g., P1 and P2 in the illustrated embodiment. The multi-piezoelectric transducer system 21 includes a piezoelectric transducer circuit 2 comprising an input stage 3, a driver stage 4, which may include a power converter circuit, an amplifier bias / switch control 5, and an output stage 6. The piezoelectric transducer system 21 may be implemented on a single chip or using discrete components due to the high power it must handle. The input stage 3 accepts an input voltage V, typically between 2V and 10V, and preferably between 3.6V and 5V. in As previously mentioned, driver stage 4 may be a forward boost / reverse buck converter that generates a clean sinusoidal waveform as previously described. IN , and one or more driver stage switches, e.g., a first low-side switch Q1 connected between the inductor L1 and ground and a second switch Q2 connected between the inductor L1 and the output stage 6. A control terminal, e.g., a gate, of a transistor in the first switch Q1 may be connected to a first gate driver 11, and a control terminal, e.g., a gate, of a transistor in the second switch Q2 may be connected to a second gate driver 12. As mentioned above, both the first gate driver 11 and the second gate driver 12 may be connected to a controller 50, which sends control signals to the first gate driver 11 and the second gate driver 12 to control the operation of the driver stage switches, e.g., the first switch Q1 and the second switch Q2, respectively.

[0070] Input stage 3 is connected to a low voltage source, V IN and high voltage waveform VHV A filter capacitor (C HV ), and a low voltage source V IN and a single inductor L1. S ) The single inductor L1 may include a sense resistor R S and the switching node SW of the power converter circuit of the driver stage 4. As mentioned above, the current sensor 7 may be connected across the sense resistor R to measure the current and / or voltage entering the inductor L1 and the power converter circuit of the driver stage 4. S and the controller 50.

[0071] The one or more driver stage switches may include a fourth (or first piezo selection) switch Q4 connected between the second switch Q2 and the first piezoelectric transducer P1, which may be operated by the controller 50 to independently control the charging / discharging of the first piezoelectric transducer P1, and a fifth (or second piezo selection) switch Q5 connected between the second switch Q2 and the second piezoelectric transducer P2, which may be operated by the controller 50 to independently control the charging / discharging of the first piezoelectric transducer P1 and the second piezoelectric transducer P2, respectively, during tactile actuation thereof. Zero-power wake-up detection mechanisms ZPS1 and ZPS2, as disclosed in U.S. Patent No. 11,302,859, filed in the name of Boreas Technologies, Inc. on September 20, 2018, which is incorporated herein by reference, may be provided to wake up the piezoelectric transducer system 21, specifically the first piezoelectric transducer P1 or the second piezoelectric transducer P2, based on a force applied to the first piezoelectric transducer P1 or the second piezoelectric transducer P2 and a resulting voltage signal received from the first piezoelectric transducer P1 or the second piezoelectric transducer P2.

[0072] The sensed voltage signal V generated by the first piezoelectric transducer P1 and / or the second piezoelectric transducer P2, respectively, Sens1or detection voltage V Sens2 is often a driver stage switch, e.g., Q1, Q2, Q4, and Q5, or a sensing switch, e.g., Q S , Q3, or Q6 body diode turn-on voltage level V to Due to parasitic paths through the driver stage switches, e.g., the fourth switch Q4 and the fifth switch Q5, and / or the sense switch Q3 and the sense switch Q6, when a change in force occurs, a voltage difference is generated across each of the piezoelectric transducers P1 and P2. The sense voltage V Sens1 or V Sens2 Represents the output voltage V out1 or V out2 exceeds the leakage or turn-on voltage of one or more of the parasitic diodes of the driver stage switches or the sensing switches, the driver stage switch and / or the sensing switch Q S This allows the controller 50 to detect the sensed voltage V from the piezoelectric transducer P1 or P2. Sens1 or V Sens2 Based on the output voltage signal V available to measure the change in force applied to them out For example, the output voltage (or the sensed voltage V Sens1 or V Sens2 ): For example, for driver stage switches Q4 and Q5, (V out1 or V out2 )-V HV >V to (approximately 0.3V), or For example, for the detection switches Q3 and Q6, (V out1 or V out2 )-V ref <V to (about -0.3V) , there may be a parasitic path trigger. There are many situations in which this can occur, for example, when the first piezoelectric transducer P1 generates a first sensed voltage signal V that is higher than 0.3V. Sens1While sensing the application of a force that generates

[0073] Figure 8 illustrates the problem using the simple case of Figure 7. A change in force on the first piezoelectric transducer P1 generates a first sensed voltage V across the piezoelectric transducer P1 that has an amplitude large enough to trigger one of two parasitic diodes in one of the driver stage switches, e.g., Q4 or Q5. Sens1 generates a first sensed voltage V across the first piezoelectric transducer P1. Sens1 First output voltage V based on out1 is not proportional to the force applied to the first piezoelectric transducer P1, but rather to the turn-on voltage V of one of the driver stage switches. to In simple terms, the parasitic diode of one of the driver stage switches saturates near the first sense voltage V Sens1 First output voltage V based on out1 When saturating the first piezoelectric transducer P1, the first piezoelectric transducer P1 is insensitive to further changes in force in the same direction.

[0074] For example, referring to Figure 8, in the case of a conventional multi-piezo system, while applying an initial force to the first piezoelectric transducer P1, OUT1 and V ref A positive sense voltage V is applied to the first piezoelectric transducer P1 between Sens1 Assuming that the driver stage 4 does not drive a signal, the sensed voltage V Sens1 However, when the second piezoelectric transducer P2 receives the second driving voltage signal V DR2 are simultaneously applied, the first sensed voltage signal V on the first piezoelectric transducer P1 Sens1 is connected to the high voltage node V of the second piezoelectric transducer P2 due to the body diode of one or more of the driver stage switches, e.g., Q4. HV The second driver voltage signal V DR2Therefore, in this multi-channel architecture, the driver voltage signal, e.g., V DR1 or V DR2 However, the high voltage node V HV When the force applied to either the first piezoelectric transducer P1 or the second piezoelectric transducer P2 is transmitted via

[0075] The detection switch has a control terminal, e.g., a gate, connected to the controller 50 and has a first piezoelectric transducer P1 and a reference voltage V ref and a third switch Q3, the gate of which is connected to the controller 50, that can be connected between the second piezoelectric transducer P2 and the reference voltage V ref , and the sixth switch Q6 may provide a similar function to the third switch Q3 of FIG. 3, i.e., allow the controller 50 to control the discharge of the first piezoelectric transducer P1 and the second piezoelectric transducer P2 independently of each other under all circumstances. Thus, the first output voltage V out1 or the second output voltage V out2 However, whenever the turn-on voltage of the body diode of a driver stage switch or a sensing switch, e.g., Q4, Q5, Q3, or Q6, approaches, e.g., 0.3 V, the output voltage V out1 or V out2 is the turn-on voltage V of the body diode of one or more of the driver stage switches and / or sensing switches, e.g., Q4, Q5, Q3, or Q6. to (or higher in the case of a negative turn-on voltage, or has an absolute value lower than the turn-on voltage) threshold voltage V th1 or V th2 , for example, + / - 0.25V, the third switch Q3 and the sixth switch Q6 are activated by the controller 50 to increase the first sensed voltage V across the first piezoelectric transducer P1. Sens1or a second sensed voltage V across the second piezoelectric transducer P2 Sens2 and a first output voltage V out1 or the second output voltage V out2 may be set to zero. A different first threshold voltage V may be set for each driver stage switch, e.g., Q4 and Q5. th1 may be set, and a different second threshold voltage V may be set for each of the sensing switches Q3 and Q6. th2 Alternatively, a single threshold voltage V may be set for some or all of the piezo select switches and some or all of the sense switches. th1 may be set.

[0076] Typically, when sensing with the first piezoelectric transducer P1 or continuing to sense with either the first or second piezoelectric transducer P1 or P2 while another action is occurring, such as driving the second piezoelectric transducer P2, a parasitic trigger occurs at node V for the driver stage switch Q4. HV The second driver voltage signal V DR2 Based on this, the first (upper) threshold voltage V to1 (approximately 0.2V to 0.4V) is set, and the detection voltage V Sens2 Output voltage V based on out Based on this, the second (lower) threshold voltage V to2 (-0.2V to -0.4V). The same is true for the second piezoelectric transducer P2, i.e., for switches Q4 and Q5, (V out )-V HV >V to1 (approximately 0.3V), or for switches Q3 and Q6 (V out )-V ref <V to2 (approximately -0.3V).

[0077] The algorithm 10 executed by the controller 50 calculates a voltage from 0 to an appropriate threshold voltage V th1 or V th2 The output voltage V fluctuates between out, for example, corresponding driver stage switches, such as Q1 and Q2 or Q DR1 and Q DR2 , or the turn-on voltage V of the body diode of one or more of the corresponding sensing switches, e.g., Q4, Q5, Q3, or Q6 to By summing up the different segments with absolute values ​​lower than (or before reaching) SensT1 or V SensT2 can be digitally reconstructed, which gives the voltage V across the first piezoelectric transducer P1. Sens1 , and the voltage V across the second piezoelectric transducer P2 Sens2 This typically corresponds to the release, or simultaneous or concurrent actuation and / or sensing, of the first piezoelectric transducer P1 and the second piezoelectric transducer P2 at the touch interface.

[0078] To allow for independent and accurate sensing on all channels, e.g., the first piezoelectric transducer P1 and the second piezoelectric transducer P2, the zeroing or sensing of switches Q3 and Q6 may be activated independently of the drive activity of the other channels. Thus, when a force is applied to the first piezoelectric transducer P1, a driver voltage signal V is applied to the second piezoelectric transducer P2. DR2 is applied (see the left side of Figure 8), the first sensed voltage V of the first piezoelectric transducer P1 Sens1 The output voltage signal V is based on out1 However, the body diode of the fourth switch Q4 or the third switch Q3 starts to conduct current, and the leakage or turn-on voltage V to1 or V to2 , for example, a threshold voltage V close to (or less than) + / - 0.3V to1 or V to2, for example, + / - 0.25V, the third switch Q3 is used to discharge the first piezoelectric transducer P1. As described above with reference to Figures 1 and 2, the controller 50 controls the first piezoelectric transducer P1 to discharge from 0V to a corresponding threshold voltage V th1 and V th2 , for example, from a small segment between the negative threshold voltage and the positive threshold voltage, the first total accumulated sensed voltage signal V of the first piezoelectric transducer P1 SensT1 is digitally determined to produce the actual total sensed voltage signal V from the first piezoelectric transducer P1. SensT1 can provide an accurate representation of

[0079] Figure 9 shows the results of the method described in Figure 6. When in sensing mode, the controller 50 generates a sense voltage signal V across the first piezoelectric transducer P1 and the second piezoelectric transducer P2. Sens1 and V Sens2 , i.e., the output voltage V out1 and V out2 respectively, either continuously in the case of an analog implementation, or at a rate that is fast compared to the measurement signal in the case of a digital implementation. In the case of a human-machine interface, the force change typically occurs over a period of a few milliseconds, and therefore the sensed voltage signal V Sens1 and V Sens2 To get a good representation of the signal, a sample rate between 1 kS / s and 10 kS / s is sufficient.

[0080] Referring to the left side of FIG. 9, the second piezoelectric transducer P2 is actively driven by the controller 50, and simultaneously applies a force to the first piezoelectric transducer P1, thereby generating a sensed voltage signal V at the first piezoelectric transducer P1. Sens1 However, the driver stage switches, e.g., Q1 and Q2 or Q DR1 and Q DR2 , or detection switch Q S , for example, approaches the turn-on voltage or leakage voltage of one of the parasitic diodes in the third switch Q3 or the fourth switch Q4, and reaches the first threshold voltage V thWhen this occurs, the third switch Q3 is turned on, and the first detection voltage V of the first piezoelectric transducer P1 is Sens1 The first output voltage V out1 ,V ref , for example, to VDD. The length of time that the third switch Q3 is on is determined by the capacitance of the first piezoelectric transducer P1, the conduction channel resistance R of the third switch Q3, dson , and the presence of filter 8. The third switch Q3 should be on for a time sufficient to substantially discharge the first piezoelectric transducer P1 from the threshold voltage to 0V. In an exemplary embodiment, the time may be between 100 μS and 1 ms. Just before turning on the third switch Q3, the first output voltage V out1 is measured and input to an accumulator in or connected to the controller 50 as the current sensed voltage V Sens are summed to convert each voltage segment into an accumulator voltage V acc The accumulator allows the controller 50 to calculate the actual first sensed voltage V that would have appeared at the piezoelectric transducer P1 or P2 if there were no parasitic paths in the switches, e.g., transistors, of the driver stage 4. Sens1 and the second detection voltage V Sens2 will be able to track.

[0081] In the same situation, i.e., when the driver voltage signal V is applied to the second piezoelectric transducer P2, DR2 If the force is released from the first piezoelectric transducer P1 while it is applied, the same problems as those detailed above with reference to FIGS. 4 and 5 arise.

[0082] Therefore, the first output voltage V out1 For example, the turn-on voltage V of the body diode of the fourth switch Q4 to1 , e.g., 0.3 V, and / or the turn-on voltage V of the third switch Q3 to2 Whenever the first output voltage V approaches out1 is the turn-on voltage V to1 or V to2 A threshold voltage Vth1 and / or V th2 , for example, + / - 0.25V, the third switch Q3 is actuated by the controller 50 to increase the first sensed voltage signal V measured across the first piezoelectric transducer P1. Sens1 or the first output voltage V out1 The algorithm 10 executed by the controller 50 can reduce the voltage V from 0 to the corresponding threshold voltage V to1 or V to2 , i.e., the sense voltage signal V is lower than the turn-on voltage of the body diodes of the third switch Q3 and the fourth switch Q4. Sens Represents the output voltage V out1 (see the right side of Figure 8), the current sensed voltage V Sens , i.e., its intermediate digital representation, and the accumulated voltage V acc By summing up the actual total sensed voltage V across the first piezoelectric transducer P1, SensT1 can be digitally reconstructed, which can provide much better sensing performance for negative voltages across the first piezoelectric transducer P1.

[0083] The voltage multiplexer 40 may be connected between the sensing switches, e.g., the third switch Q3 and the sixth switch Q6, and the controller 50. The voltage multiplexer 40 serves two functions: 1) to multiplex the output voltage signals, e.g., V, from different channels, e.g., the first piezoelectric transducer P1 and the second piezoelectric transducer P2, to an amplifier 41 optimized for a small input range, e.g., 100 μV to 100 mV / bit. out1 and V out2 , thereby multiplexing multiple piezoelectric transducers, e.g., P1 to P n output voltage, e.g., V out1 From V outn 1) the ability to provide highly accurate readings and enable high sensitivity; and 2) multiple piezoelectric transducers P1 to P nWhen driven, the piezoelectric transducers may also function as a high voltage input device to similarly protect low voltage electronics from high voltage actuator signals, e.g., 50V. out1 From V outn voltage segment, i.e., the sensed voltage signal V Sens An analog-to-digital converter (ADC) 42 may be provided for converting the signal into a digital representation. As previously described herein, a communications module 43 may also be provided for communication between the controller 50 and an external device, e.g., a mobile device such as an external prompt.

[0084] Voltages (positive and negative) are threshold voltages V th is limited to less than the threshold voltage V th At point , a switch, e.g., a transistor, e.g., a driver stage switch (transistor), e.g., Q1 and Q2 or Q DR1 and Q DR2 , or current begins to leak through the body diodes of the sensing switches, such as the third switch Q3, the fourth switch Q4, the fifth switch Q5, and the sixth switch Q6. By using sensing switches, for example, the third switch Q3 and the sixth switch Q6, it is possible to transmit sense voltages, for example, V, from multiple piezoelectric transducers while sharing the same power transistor for the driver function of the IC. Sens1 From V Sensn The digital algorithm 10 of the controller 50 allows the sensed voltage signals, e.g., V, from the first piezoelectric transducer P1 and / or the second piezoelectric transducer P2 to be read accurately and independently as if no parasitic paths existed. Sens1 and V Sens2 Based on the reconstructed signal, the piezoelectric transducer system 1 can accurately use multiple piezoelectric transducers as sensors to generate tactile waveforms.

[0085] The sensing algorithm provided by the controller 50 exhibits the following characteristics: 1) provides accurate sensing of pressure increases and decreases on the piezoelectric transducers P1 and P2; 2) is compatible with multi-channel architectures; and 3) uses a single transistor, e.g., Q, per sensing channel. s , may only require Q3 or Q6; 4) allows driving a tactile response on one channel, e.g., piezoelectric transducer P1, while sensing the application of force on another channel, e.g., a second piezoelectric transducer P2; 5) ability to sense positive and negative voltages between multiple piezo transducers; 6) avoids crosstalk or coupling effects when sensing multiple transducers; 7) direct sensing of low voltage signals at high voltage nodes allows for high sensitivity; 8) configurable "reset" threshold to adapt the method to the actual parasitic paths present in the system; 9) may not require extra components for sensing than for driving.

[0086] Another enhancement that can be applied to any piezoelectric transducer system, including the aforementioned piezoelectric transducer systems 1 and 21, is a leak compensation system. The leak compensation system is an algorithm that can be implemented as hardware directly in an integrated circuit chip, such as a piezoelectric transducer driver chip, or as computer software instructions stored in memory and executed by a control processor used in conjunction with the piezoelectric transducer driver chip. Referring to Figure 10, the X-axis represents the pressing speed of the force applied to the surface of the piezoelectric transducer P1 or P2. The Y-axis represents the force threshold at which the piezoelectric transducer P1 or P2 triggers a haptic response. Ideally, the force threshold would be unaffected by pressing speed, i.e., have a flat response to pressing speed. Unfortunately, due to the leak effect, the effective force threshold required to trigger a haptic response increases as the pressing speed decreases, as shown by the solid line. However, when the leak compensation algorithm of the leak compensation system is applied, the effective threshold can be made much more stable at any pressing speed, as shown by the dashed line.

[0087] The first step in the method for reducing the effects of charge leakage is to obtain the charge leakage characteristics of piezoelectric transducers P1 and / or P2, e.g., the charge leakage slope of voltage over time (mV / ms) or amps (mA). If the leakage characteristics are not already known or provided, a test may be performed. The test to determine the charge leakage characteristics may be initially performed at the time of manufacture and stored in memory for future use. Although the charge leakage characteristics may be actively adjusted by controller 50 over time and in response to different operating conditions, tests may also be performed by controller 50 each time piezoelectric transducer system 1 is turned on and / or periodically while piezoelectric transducer system 1 is operating due to operating conditions, e.g., operating temperature and circuit aging. Referring to FIG. 11 , one example of a test may include one or more of the following steps:

[0088] Step 1: Ensure that the piezoelectric transducer system 1 is in a quiescent state, i.e., no force changes are occurring on the piezoelectric transducers P1 and / or P2. A quiescent state is defined as a stable, non-zero output voltage (V) between +1 V and -1 V, typically around -300 mV. out -V in ) readings across the piezoelectric transducer P1. Sens or V out This can be done by monitoring the quiescent voltage to ensure that the electrical signal is stable. The quiescent voltage is the voltage at which the body diode of one of the switches, say Q2, is pulled above the switching node voltage V SW to output voltage V out It may be a voltage at which leakage current begins to flow.

[0089] Step 2: For example, short-circuit the piezoelectric transducers P1 and / or P2, or apply an output voltage (V out -V in) is electrically excited by applying a specific voltage to the piezoelectric transducer system 1.

[0090] Step 3: Reconfigure the piezoelectric transducer system 1, i.e., return it to an electrically active sensing configuration.

[0091] Step 4: Select a voltage signal, e.g. V Sens or V out The change in voltage across the piezoelectric transducers P1 and / or P2 over time is monitored until a quiescent state is reached again.

[0092] Step 5: Calculate the charge leakage characteristics, e.g., the charge leakage slope, from the data in Step 4. The charge leakage slope can be expressed in various units, e.g., Amps, but in this description, volts (mV / ms) over time is used.

[0093] At this point, the charge leakage characteristics are stored in memory and there are multiple configurations that use the charge leakage characteristic information.

[0094] A first configuration, as described above, may completely cancel the effects of charge leakage by implementing hardware integration within the piezoelectric transducer system 1. In the first embodiment, the controller 50 is configured to perform the following operations:

[0095] 1. For example, as previously described with reference to FIG. 5, before the threshold voltage, i.e., the quiescent state, e.g., −300 mV, is reached, the output voltage V across the piezoelectric transducer P1 is shorted and a voltage segment is generated. out Set to zero.

[0096] 2. Discharge the piezoelectric transducer P1 towards its normal quiescent state. Referring to Figure 12, if no signal is applied to the piezoelectric transducer P1, the actual voltage will have a shape similar to the negative sawtooth shown, but with a smaller slope.

[0097] 3. Continually repeat steps 1 and 2. When a voltage signal is present at piezoelectric transducer P1, the timing of 1 may need to be adjusted, e.g., accelerated, based on sense / drive algorithm 10.

[0098] While steps 1 through 3 are repeated, the data generated by the controller 50, i.e., the digital representations of the voltage segments, are processed to be corrected for the charge leakage characteristics, e.g., the charge leakage slope, that characterize the piezoelectric system 1 each time the voltage approaches the turn-on voltage Vto or reaches or exceeds the threshold voltage Vth. For example, the digital controller 50 processes the data so that the negative sawtooth waveform shown in FIG. 12 appears as a flat line. For example, the digital controller 50 may simply add a set value based on the charge leakage characteristics to each digital representation of each voltage segment or to the sum of multiple digital representations of multiple voltage segments based on the charge leakage characteristics. For a given leakage slope, a predetermined adjustment value may be added to each digital representation of each voltage segment or to the sum of multiple digital representations of multiple voltage segments to generate an adjusted voltage value, i.e., an adjusted force value. When a signal, e.g., a force, is applied, the same correction is applied, ensuring that the signal transmitted to the user, e.g., a tactile or electronic response, represents the actual applied force. This, combined with the sensing / actuating algorithm 10, provides a system capable of measuring DC force signals as well.

[0099] Referring to FIG. 12, within the rectangular box, the piezoelectric transducers P1 and / or P2 are connected to, for example, a negative threshold voltage V th A threshold voltage V that is greater than or positive the A threshold voltage V th is zeroed at the output voltage (V out1 -V DD) reaches a quiescent position, e.g., the leakage point of the body diode of Q2. When leakage compensation is applied, the resulting digital signal forms a flat line because the analog voltage changes only at the pace set by the leakage being compensated for.

[0100] 13, an alternative embodiment is shown that may be implemented in hardware or software stored in non-transient memory and executed by controller 50 to achieve the same concept in a piezoelectric transducer system that is not capable of repeatedly automatically zeroing piezoelectric transducers P1 and / or P2. Having already determined the charge leakage characteristics, the leakage compensation system begins monitoring piezoelectric system 1 in a quiescent state, where the voltage across piezoelectric transducer P1 or P2 is typically at some nominal value, e.g., −300 mV, as shown by the dashed line in FIG.

[0101] 1. The leak compensation system, eg, controller 50, monitors the voltage across piezoelectric transducers P1 and / or P2 for any sign of activity, ie, a change in voltage due to the application of force.

[0102] 2. As soon as a weak starting voltage signal, e.g., more than 100 mV, preferably more than 50 mV from the rest voltage, is detected in the piezoelectric transducers P1 and / or P2, the leak compensation system starts to compensate the digital representation of the read voltage signal using the leak characteristics of the system, e.g., the leak slope, and generates an adjusted voltage value.

[0103] 3. The correction signal, i.e., the digital representation of the adjusted voltage value, is continuously or repeatedly compared, e.g., at a sampling rate of 1 ms, to the target force threshold, and when the target force threshold is reached or exceeded, the controller 50 activates the haptic response, i.e., activates the driver stage 4, sending a driver voltage signal across the piezoelectric transducer P1 or P2. Different sampling rates may be used based on system requirements.

[0104] If the raw analog voltage returns to a quiescent voltage, the correction may be stopped since the leak detection system may not be able to distinguish between no signal and a very slow signal.

[0105] In the second system and method, instead of correcting the raw data and comparing it to a target force threshold, the target force threshold may be corrected over time based on the leak characteristics and compared to an uncorrected voltage value, e.g., a digital representation of the measured output voltage.

[0106] The controller 50, e.g., a digital controller, for controlling the piezoelectric transducer circuit 2 may be a computer. The controller 50 may include a processor, a storage device, a memory storing software defining the above-described functionality, input / output (I / O) devices (or peripherals), and a local bus or local interface for enabling communication within the controller 50. The local interface may be, for example, but is not limited to, one or more buses or other wired or wireless connections, as known in the art. The local interface, omitted for simplicity, may include additional elements, such as a controller, buffer (cache), driver, repeater, receiver, etc., to enable communication. Additionally, the local interface may include address, control, and / or data connections to enable appropriate communication between the aforementioned components.

[0107] The processor may be a hardware device specifically for executing software stored in a memory, any custom-made or commercially available single-core or multi-core processor, a central processing unit (CPU), an auxiliary processor among several processors associated with the controller 50 of the present invention, a semiconductor-based microprocessor, e.g., in the form of a microchip or chip set, a microprocessor, or generally any device for executing software instructions.

[0108] The memory may include any one or combination of volatile memory elements, such as random access memory (RAM, such as DRAM, SRAM, SDRAM, etc.), and non-volatile memory elements, such as ROM, hard drives, tape, CD-ROM, etc. Additionally, the memory may incorporate electronic, magnetic, optical, and / or other types of storage media. It should be noted that the memory may have a distributed architecture, where various components are located remotely from one another but are accessible by the processor.

[0109] The software may define the functions performed by the controller 50 in accordance with the present invention. The software in the memory may include one or more separate programs, each containing an ordered list of executable instructions for implementing the logical functions of the controller 50, as described below. The memory may also include an operating system (O / S). The operating system essentially controls the execution of programs in the controller 50 and provides scheduling, input / output control, file and data management, memory management, and communication control and related services.

[0110] I / O devices may include input devices, such as, but not limited to, a keyboard, a mouse, a scanner, a microphone, etc. Additionally, I / O devices may also include output devices, such as, but not limited to, a printer, a display, etc. Finally, I / O devices may also include devices that communicate via both input and output, including, but not limited to, for example, a modulator / demodulator (a modem for accessing another device, system, or network), a radio frequency (RF) or other transceiver, a telephone interface, a bridge, a router, or other device.

[0111] When the controller 50 is operating, the processor may be configured to execute software stored in the memory, communicate data to and from the memory, and generally control the operation of the controller in accordance with the software, as described above.

[0112] When the functions of the controller 50 are operational, the processor may be configured to execute software stored in the memory, communicate data to and from the memory, and control the operation of the controller as a whole in accordance with the software. The operating system may be read by the processor or, in some cases, buffered within the processor, and then executed.

[0113] It should be noted that if the controller 50 is implemented in software, the instructions for implementing the controller 50 may be stored on any computer-readable medium for use by or in connection with any computer-related device, system, or method. In some embodiments, such computer-readable medium may correspond to either a memory or a storage device, or both. In the context of this document, a computer-readable medium is an electronic, magnetic, optical, or other physical device or means that contains or can store a computer program for use by or in connection with a computer-related device, system, or method. The instructions for implementing the system may be embodied on any computer-readable medium for use by or in connection with a processor or other such instruction execution system, apparatus, or device. While a processor is mentioned as an example, in some embodiments, such an instruction execution system, apparatus, or device may be any computer-based system, processor-including system, or other system that can fetch instructions from and execute instructions from the instruction execution system, apparatus, or device. In the context of this document, a "computer-readable medium" may be any means that can store, communicate, propagate, or transfer a program for use by or in connection with a processor or other such instruction execution system, apparatus, or device.

[0114] Such a computer-readable medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, device, or propagation medium. More specific examples, i.e., a non-exhaustive list, of computer-readable media include the following: an electrical connection having one or more wires (electronic), a portable computer diskette (magnetic), a random access memory (RAM) (electronic), a read-only memory (ROM) (electronic), an erasable programmable read-only memory (EPROM, EEPROM, or flash memory) (electronic), an optical fiber (optical), and a portable compact disc read-only memory (CDROM) (optical). Note that a computer-readable medium may even be paper or another suitable medium on which a program is printed, since a program may be captured electronically, for example, via optical scanning of paper or other medium, then compiled, interpreted, or processed in any other suitable manner as needed, and then stored in computer memory.

[0115] In alternative embodiments in which the controller 50 is implemented in hardware, the controller 50 may be implemented using any or a combination of the following technologies, each of which is well known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application specific integrated circuits (ASICs) having appropriate combinatorial logic gates, programmable gate arrays (PGAs), field programmable gate arrays (FPGAs), etc.

[0116] The foregoing description of one or more embodiments of the present invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of the above teachings. It is intended that the scope of the invention be limited not by this detailed description, but rather by the claims appended hereto.

Claims

1. 1. A method of operating a piezoelectric driver circuit, comprising: obtaining a leakage characteristic of the piezoelectric driver circuit; repeatedly sensing a first sense voltage generated by a first force applied to a first piezoelectric transducer; zeroing the first sense voltage each time the first sense voltage reaches a threshold voltage, thereby generating a plurality of first voltage segments; generating a digital representation of each of the plurality of first voltage segments; generating an adjusted digital representation based on the leakage characteristics; updating the first running sum with each adjusted digital representation; determining a first total sensed voltage across the first piezoelectric transducer from the first cumulative sum; A method comprising:

2. The method of claim 1 , wherein the threshold voltage is based on a first trigger level of a first parasitic conduction path of a first switch in the piezoelectric driver circuit.

3. The method of claim 1 , wherein the leakage characteristics include an amount of leakage voltage over time.

4. determining the first total sense voltage; generating an intermediate digital representation of each first sensed voltage each time the first sensed voltage is sensed; adjusting the intermediate digital representation of each first sensed voltage based on the leakage characteristic; determining the first total sensed voltage across the first piezoelectric transducer from the first cumulative sum and the intermediate digital representation; The method of claim 1 further comprising:

5. 3. The method of claim 2, wherein the first switch in the piezoelectric driver circuit comprises a driver circuit switch that includes the first parasitic conduction path, and the method includes sending a driver voltage signal to the first piezoelectric transducer to generate a force or displacement response on the first piezoelectric transducer.

6. generating an intermediate digital representation of each first sensed voltage each time the first sensed voltage is sensed; 6. The method of claim 5, wherein the step of sending the driver voltage signal comprises sending the driver voltage signal if the first total sensed voltage plus the intermediate digital representation is greater than a predetermined operating level.

7. The method of claim 2 , wherein the first threshold voltage is greater than a negative first turn-on voltage of the first parasitic conduction path.

8. The method of claim 2 , wherein the first threshold voltage is less than a first positive turn-on voltage of the first parasitic conduction path.

9. 1. An apparatus for operating a first piezoelectric transducer, configured to be coupled to a voltage source providing an input voltage, and configured to send a driver voltage signal across the first piezoelectric transducer, comprising: a driver circuit including a first driver circuit switch configured to be connected to the first piezoelectric transducer, the first driver circuit switch including a first parasitic conduction path, the driver circuit configured to receive the input voltage and send the driver voltage signal to generate a force or displacement response on the first piezoelectric transducer; a sensing circuit configured to sense a first sense voltage generated by a first force applied to the first piezoelectric transducer, the sensing circuit including a first sensing switch; a controller, controlling the first driver switch and the first sense switch; obtaining a leakage characteristic of the driver circuit; repeatedly sensing the first sense voltage generated by the first force applied to a first piezoelectric transducer; zeroing the first sense voltage each time the first sense voltage reaches a threshold voltage, thereby generating a plurality of first voltage segments; generating a digital representation of each of the plurality of first voltage segments; generating an adjusted digital representation based on the leakage characteristics; updating a first running sum with the adjusted digital representation; a controller configured to determine a first total sensed voltage across the first piezoelectric transducer from the first cumulative sum; An apparatus comprising:

10. 10. The apparatus of claim 9, wherein the threshold voltage is based on a first trigger level of the first parasitic conduction path.

11. The controller also generating an intermediate digital representation of the first sensed voltage each time the first sensed voltage is sensed; adjusting the intermediate digital representation of one or more of the first sense voltages based on the leakage characteristics; determining the first total sensed voltage across the first piezoelectric transducer from the first cumulative sum and the intermediate digital representation; The apparatus of claim 10 configured to:

12. The controller also generating an intermediate digital representation of the first sensed voltage each time the first sensed voltage is sensed; adjusting the intermediate digital representation of each of the first sensed voltages based on the leakage characteristics; determining the first total sensed voltage across the first piezoelectric transducer from the first cumulative sum and the intermediate digital representation; The apparatus of claim 9 , configured to:

13. The controller also generating an intermediate digital representation of the first sensed voltage each time the first sensed voltage is sensed; adjusting the intermediate digital representation of one or more of the first sense voltages based on the leakage characteristics; sending the driver voltage signal when the first total sensed voltage, including the first cumulative sum plus the intermediate digital representation, is greater than a predetermined operating level; The apparatus of claim 9 , configured to:

14. The apparatus of claim 10 , wherein the threshold voltage is greater than a negative turn-on voltage of the first parasitic conduction path.

15. 1. A method of operating a piezoelectric transducer using a piezoelectric driver circuit including a first switch having a first parasitic conduction path, the method comprising: determining a charge leakage characteristic of the piezoelectric driver circuit; repeatedly sensing a first sense voltage generated by a first force applied to the piezoelectric transducer; generating a digital representation of the first sensed voltage; generating an adjusted digital representation of the first sensed voltage based on a leakage characteristic; sending a driver voltage signal to the first piezoelectric transducer to generate a force or displacement response to the first piezoelectric transducer when the adjusted digital representation of the first sense voltage reaches a target force threshold voltage; A method comprising:

16. 16. The method of claim 15, wherein the threshold voltage is based on a first trigger level of the first parasitic conduction path.

17. The method of claim 15 , wherein the leakage characteristics include an amount of leakage voltage over time.

18. 1. An apparatus for operating a first piezoelectric transducer, configured to be coupled to a voltage source providing an input voltage, and configured to send a drive voltage across the first piezoelectric transducer, comprising: a driver circuit including a first driver circuit switch configured to be connected to the first piezoelectric transducer, the first driver circuit switch including a first parasitic conduction path, the driver circuit configured to receive the input voltage and send the drive voltage to generate a force or displacement response on the first piezoelectric transducer; a sensing circuit configured to sense a first sense voltage generated by a first force applied to the first piezoelectric transducer, the sensing circuit including a first sensing switch; a controller, determining a charge leakage characteristic of the driver circuit; repeatedly sensing the first sense voltage generated by the first force applied to the piezoelectric transducer; generating a digital representation of the first sensed voltage; generating an adjusted digital representation of the first sensed voltage based on the leakage characteristic; sending a drive voltage to the first piezoelectric transducer to generate a force or displacement response to the first piezoelectric transducer when the adjusted digital representation of the first sense voltage reaches a target force threshold voltage; With a controller configured as An apparatus comprising:

19. 20. The apparatus of claim 18, wherein the threshold voltage is based on a first trigger level of the first parasitic conduction path.

20. 20. The apparatus of claim 18, wherein the leakage characteristic comprises an amount of leakage voltage over time.

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