Switch stacking circuit and switch stacking device including the same

The switch stacking circuit and device minimize parasitic inductance through opposing current directions and transformer modules, improving the performance of semiconductor switches for high-voltage, high-current pulse generation.

JP2025538821APending Publication Date: 2025-11-28KOREA ELECTROTECH RES INST
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Patent Information

Application Number
JP2025534165
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-01-09
Filing Date
2023-05-25
Publication Date
2025-11-28

AI Technical Summary

Technical Problem

Conventional switch stacking circuits face challenges with parasitic inductance issues due to wiring connections, limiting the performance and application of semiconductor switches in generating high-voltage, high-current pulses.

Method used

A switch stacking circuit and device design that minimizes parasitic inductance by arranging switch groups in series with opposite current directions and using a transformer module for isolated power transmission, along with insulating members to maintain insulation and symmetry.

Benefits of technology

The design reduces parasitic inductance, enhancing the rise time of pulse current and expanding the application field of large-capacity semiconductor switches.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention relates to a switch stacking circuit in which a number of switch elements are stacked in series, and a switch stacking device including the same. The present invention discloses a switch stacking circuit (100) including a first switch group (G1) in which N switch elements (S1, ..., SN, N is a natural number greater than or equal to 1) are connected in series via a first connection (W1), and a second switch group (G2) in which M switch elements (S1, ..., SM, M is a natural number greater than or equal to 1) are connected in series via a second connection (W2), the first switch group (G1) and the second switch group (G2) are connected in series, and when a drive signal (Vd) is applied to the first switch group (G1) and the second switch group (G2), a direction of current flowing in the first connection (W1) is opposite to a direction of current flowing in the second connection (W2).
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Description

[Technical Field]

[0001] The present invention relates to a switch stacking circuit in which a number of switch elements are stacked in series, and a switch stacking device including the same. [Background technology]

[0002] A pulse is a signal that appears at high intensity for a short duration, and can instantly discharge stored energy and apply a high-power (high-voltage) pulse to the load.

[0003] As an example, FIG. 1 shows the application of a pulse of high power P1 for a short instantaneous time (Δt).

[0004] A conventional technique for generating such pulses is a circuit that stores a large amount of energy in an energy storage device such as a capacitor, and then discharges the energy to a load terminal by turning on or off a switch.

[0005] Conventionally, gas switches (spark gap, Thyratron) with high voltage and current ratings have been mainly used, but these switches have technical problems such as limited lifespan, difficulty in control, and jitter.

[0006] As a result, research is being conducted into the use of power semiconductor switches such as IGBTs, MOSFETs, and Thyristors for pulsed power generation.

[0007] For example, IGBTs have a semi-permanent lifespan and, when used, can overcome the drawbacks of conventional mechanical switches, such as enabling control of pulse repetition rate and pulse width.

[0008] However, even in the case of IGBTs, there are strict constraints on operation such as switch driving and uniform voltage distribution, which can cause problems with product reliability. In addition, there are limits to the rated voltage and rated current of commercial power semiconductor devices, so it is necessary to develop technology for serial-parallel stacking of each power semiconductor device to generate high-voltage, high-current pulses.

[0009] In particular, a structure that minimizes stray inductance, which occurs due to the wiring required when connecting multiple switch elements in series, is required. Conventional parasitic inductance limits the rise time of pulse current, which limits the application fields of large-capacity switches using semiconductor elements. Summary of the Invention [Problem to be solved by the invention]

[0010] In consideration of the above-mentioned needs and problems, an object of the present invention is to provide a switch stacking circuit and a switch stacking device including the same, which can minimize parasitic inductance generated by wiring in the process of connecting each switch element stacked in series. [Means for solving the problem]

[0011] The present invention has been made to achieve the above-mentioned object of the present invention, and discloses a switch stacking circuit 100 including a first switch group G1 in which N switch elements S1, ..., SN (N is a natural number greater than or equal to 1) are connected in series via a first connection W1, and a second switch group G2 in which M switch elements S1, ..., SM (M is a natural number greater than or equal to 1) are connected in series via a second connection W2.

[0012] The first switch group G1 and the second switch group G2 may be connected in series.

[0013] When the drive signal Vd is applied to the first switch group G1 and the second switch group G2, the direction of the current flowing through the first wire W1 may be opposite to the direction of the current flowing through the second wire W2.

[0014] The number N of switch elements in the first switch group G1 may be the same as the number M of switch elements in the second switch group G2.

[0015] The first switch group G1 and the second switch group G2 may be connected in series via a third wire W3.

[0016] The first switch group G1 and the second switch group G2 may be arranged in two parallel rows.

[0017] An insulating member 110 for insulation may be installed between the first switch group G1 and the second switch group G2.

[0018] The switch stacking circuit 100 may further include a driving module 120 for applying the driving signal Vd to the first switch group G1 and the second switch group G2.

[0019] The driving module 120 may include a first driving circuit unit 122 for applying the driving signal Vd to the first switch group G1 and a second driving circuit unit 124 for applying the driving signal Vd to the second switch group G2.

[0020] The first driving circuit part 122 may include N first driving units 122_1, ..., 122_N corresponding to the N switch elements S1, ..., SN, respectively.

[0021] The second driving circuit part 124 may include M second driving units 124_1, . . . , 124_M corresponding to the M switch elements S1, .

[0022] The switch stacking circuit 100 may further include a generator 130 that generates driving pulses Pon and Poff for controlling the on / off of the driving signal Vd.

[0023] The switch stacking circuit 100 may further include a transformer module 140 for simultaneously transmitting isolated driving power between the generator 130 and the driving module 120 .

[0024] The transformer module 140 may include N first transformer units 142_1, ..., 142_N installed corresponding to the N first driving units 122_1, ..., 122_N, and M first transformer units 144_1, ..., 144_M installed corresponding to the M second driving units 124_2, ..., 124_M.

[0025] In another aspect, the present invention discloses a switch stacking device 200 including a switch stacking circuit 100, characterized in that it includes: a first stack 210 in which the N switch elements S1, ..., SN of the first switch group G1 are installed; and a second stack 220 in which the M switch elements S1, ..., SM of the second switch group G2 are installed.

[0026] The first stack 210 and the second stack 220 may be disposed opposite to each other with a gap therebetween.

[0027] An insulating member 110 for insulation may be installed between the first stack 210 and the second stack 220 .

[0028] The first stack 210 may include a circuit board PCB on which the N switch elements S1, . . . , SN are installed, and a first frame 214 to which the circuit board PCB is fixed on a first surface.

[0029] The second stack 220 may include a second circuit board PCB on which the M switch elements S1, . . . , SM are installed, and a second frame 224 to which the second circuit board PCB is fixed on a first surface.

[0030] The circuit board PCB and the second circuit board PCB may be disposed opposite each other with a gap therebetween.

[0031] The first frame 214 may further include a first heat dissipation part 310 installed on a second surface opposite the first surface, and a second heat dissipation part 320 installed on a second surface opposite the first surface, of the second frame 224.

[0032] The switch stacking circuit 100 may further include a driving module 120 for applying the driving signal Vd to the first switch group G1 and the second switch group G2, a generator 130 for generating driving pulses Pon and Poff for controlling the on / off of the driving signal Vd, and a transformer module 140 for simultaneously transmitting isolated driving power between the generator 130 and the driving module 120.

[0033] The transformer module 140 may include a primary coil C1 connected to the generator 130, a secondary coil C2 connected to the driving module 120, and a transformer core TC for mutual inductive coupling between the primary coil C1 and the secondary coil C2.

[0034] The transformer core TC may be a toroidal core having a through hole H formed in the center. [Effects of the Invention]

[0035] The switch stacking circuit and the switch stacking device including the same according to the present invention have an advantage in that they can minimize parasitic inductance generated by wiring in the process of connecting serially stacked switch elements in series.

[0036] The present invention provides a circuit and device structure that minimizes parasitic inductance, thereby solving the problem of delayed pulse rise speed due to parasitic inductance, and thereby has the advantage of greatly expanding the application field of large capacity switches using semiconductor switch elements. [Brief explanation of the drawings]

[0037] [Figure 1] 4 is a graph showing pulse power generated by a switch stacking circuit according to an embodiment of the present invention.

[0038] [Figure 2] FIG. 1 is a schematic diagram showing a structure in which multiple switch elements are stacked in series to generate pulsed power.

[0039] [Figure 3] 10 is a schematic diagram illustrating a parasitic inductance formed by wiring in the process of connecting switch elements in series; FIG.

[0040] [Figure 4] FIG. 1 is a block diagram showing a conventional switch element stacking circuit.

[0041] [Figure 5] 4 is a graph showing the relationship between an on / off signal and a driving signal for driving a switch element stacking circuit according to the present invention.

[0042] [Figure 6] 2 is a schematic diagram showing switch elements connected in series in a switch stacking circuit according to the present invention; FIG.

[0043] [Figure 7] 7 is a block diagram showing a switch stacking circuit including the series-connected switch elements of FIG. 6.

[0044] [Figure 8a-8b] 8A and 8B are a plan view and a perspective view showing a part of the configuration of a switch stacking device including the switch stacking circuit of FIG. 7.

[0045] [Figure 9a-9b] 8A and 8B are a plan view and a perspective view showing a part of the configuration of a switch stacking device including the switch stacking circuit of FIG. 7. BEST MODE FOR CARRYING OUT THE INVENTION

[0046] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A switch stacking circuit and a switch stacking device including the same according to the present invention will now be described with reference to the accompanying drawings.

[0047] The switch stacking circuit 100 according to the present invention may include a first switch group G1 in which N switch elements S1, ..., SN (N is a natural number greater than or equal to 1) are connected in series via a first connection W1, and a second switch group G2 in which M switch elements S1, ..., SM (M is a natural number greater than or equal to 1) are connected in series via a second connection W2.

[0048] The first switch group G1 may include N switch elements S1, . . . , SN connected in series via a first wire W1.

[0049] The second switch group G2 may include M switch elements S1, . . . , SM connected in series via a second wire W2.

[0050] It is preferable that the number N of switch elements S1, ..., SN included in the first switch group G1 is configured to be the same as the number M of switch elements S1, ..., SM included in the second switch group G2, but they do not necessarily have to be configured to be the same number.

[0051] The first switch group G1 and the second switch group G2 may be connected in series.

[0052] That is, the switch element SN located at the end of the first switch group G1 may be connected in series with the switch element SM located at the end of the second switch group G2 via a third wire W3.

[0053] The switch elements S1 to SN and S1 to SM are power semiconductor elements and may be various semiconductor elements such as SCR (Thyristor), TRIAC (Triode AC Switch), GTO (Gate turn-off thyristor), IGBT (Insulated Gate Bidirectional Transistor), MOSFET (Metal Oxide Semiconductor Field Effect Transistor), etc., and are not limited to specific elements.

[0054] For example, the switch elements S1 to SN and S1 to SM may be IGBTs.

[0055] When the switch elements S1 to SN and S1 to SM are IGBTs, three terminals, a gate G, a collector C, and an emitter E, are formed, and an on / off operation can be performed by a drive signal Vd (Vge) applied to the gate G.

[0056] As another example, when the switch elements S1 to SN and S1 to SM are MOSFETs, three terminals, a gate G, a drain D, and a source S, are formed, and the on / off operation can be performed by a drive signal Vd (Vgs) applied to the gate G.

[0057] The switching elements S1 to SN and S1 to SM are connected in series and driven in a synchronized manner, so that the voltages applied to the switching elements S1 to SN and S1 to SM are summed up, and finally a high voltage pulse P1 is generated across both ends, which can be applied to a load.

[0058] FIG. 2 shows that a number of switch elements S are connected in series, and a voltage v is formed across each switch element S, so that a high voltage V is ultimately formed across the series-connected circuit.

[0059] The first switch group G1 and the second switch group G2 will be described in detail again after the driver module 120 and the generator 130 of the switch stacking circuit 100 are described.

[0060] The driving module 120 is configured to apply the driving signal Vd to each of the switch elements S1 to SN and S1 to SM, and may have various configurations.

[0061] The driving module 120 may be configured to simultaneously apply the driving signals Vd to the first switch group G1 and the second switch group G2, respectively.

[0062] The driving module 120 may include a first driving circuit unit 122 for applying the driving signal Vd to the first switch group G1 and a second driving circuit unit 124 for applying the driving signal Vd to the second switch group G2.

[0063] The first driving circuit part 122 may include N first driving units 122_1, ..., 122_N corresponding to the N switch elements S1, ..., SN, respectively, to provide isolated power supplies to the switch elements S1, ..., SN.

[0064] The N first driving units 122_1, . . . , 122_N can receive a control signal Vp from a generator 130, which will be described later, and output a driving signal Vd to be applied to corresponding switch elements S1, .

[0065] Similarly, the second driving circuit part 124 may include M second driving units 124_1, ..., 124_M corresponding to the M switching elements S1, ..., SM, respectively, to provide isolated power supplies to each switching element S1, ..., SM.

[0066] The M second driving units 124_1, . . . , 124_M can receive a control signal Vp from a generator 130, which will be described later, and output a driving signal Vd to be applied to corresponding switch elements S1, .

[0067] The first driving units 122_1, ..., 122_N and the second driving units 124_1, ..., 124_N may be configured in the same or similar form, and preferably have the same circuit structure.

[0068] The generator 130 generates driving pulses Pon and Poff for controlling the on / off of the driving signal Vd, and can be configured in various ways.

[0069] For example, the generator 130 may include a pulse generator that generates an on / off control pulse for generating a drive signal Vd to be applied to the switch elements S1-SN and S1-SM, and an inverter that receives an output signal from the pulse generator and outputs a switching signal for the drive module 120, but this is merely one example and the present invention is not limited thereto.

[0070] The pulse generator is configured to generate on / off control pulses for generating the drive signal Vd, and as shown in FIG. 5, can generate on-pulse Pon and off-pulse Poff signals having a short width Δt as on / off control pulses.

[0071] The inverter receives an output from a pulse generator and outputs switching signals for a plurality of first driving units 122_1, ..., 122_N and second driving units 124_1, ..., 124_M, and may have various configurations. For example, the inverter may be configured as a full-bridge circuit including four switch elements, but is not limited thereto.

[0072] The on-pulse Pon and off-pulse Poff signals of the pulse generator drive the switches of the inverter and can be transmitted to each of the first driving units 122_1, ..., 122_N and second driving units 124_1, ..., 124_M via a transformer module 140 described below for isolation.

[0073] For example, the pulse generator may include an on / off signal generating unit that outputs drive pulses Pon and Poff for controlling the on / off of the drive signal Vd, and may include an on-pulse generating unit that generates an on-pulse Pon for turning on the drive signal Vd, and an off-pulse generating unit that generates an off-pulse Poff for turning off the drive signal Vd.

[0074] Referring to FIG. 5, the on-pulse Pon is a pulse signal having a short width Δt and a period T1, which is generated in an on-pulse generating section.

[0075] Similarly, the off pulse Poff is a pulse signal having a short width Δt and a period of T1, which is generated in an off pulse generating section.

[0076] The on-pulse generating unit and the off-pulse generating unit can alternately generate the on-pulse Pon and the off-pulse Poff at a time interval T2 so that the driving signal Vd is maintained for a preset time.

[0077] When the on-pulse Pon is generated, a drive signal Vd is generated from each of the first driving units 122_1, ..., 122_N and the second driving units 124_1, ..., 124_M, and even when the on-pulse Pon generated during the short time Δt disappears, the drive signal Vd can be maintained by a drive signal holding electrical element (e.g., a holding capacitor) provided in each of the first driving units 122_1, ..., 122_N and the second driving units 124_1, ..., 124_M.

[0078] The driving signal Vd may be continuously maintained and then turned off by the off pulse Poff when the off pulse Poff occurs.

[0079] That is, each of the first driving units 122_1, ..., 122_N and second driving units 124_1, ..., 124_M can generate a driving signal Vd having a relatively long width T2 with an on-pulse Pon and an off-pulse Poff having a short width Δt.

[0080] As a result, the switch element stacking circuit 100 according to the present invention has the advantage that it is possible to reduce the size of the transformer module 140 that transmits signals to each of the first driving units 122_1, ..., 122_N and the second driving units 124_1, ..., 124_M, and to ensure an isolated power supply between each of the switch elements S1~SN, S1~SM.

[0081] Meanwhile, the transformer module 140 is a transformer for simultaneously transmitting insulated driving power between the generator 130 and the driving module 120, and may have various configurations.

[0082] As shown in FIG. 7, the transformer module 140 may include N first transformer units 142_1, ..., 142_N installed corresponding to the N first driving units 122_1, ..., 122_N, and M first transformer units 144_1, ..., 144_M installed corresponding to the M second driving units 124_2, ..., 124_M.

[0083] The first transformer units 142_1, ..., 142_N and the second transformer units 144_1, ..., 144_M may be configured in the same or similar form, and preferably have the same circuit structure.

[0084] The first transformer units 142_1, ..., 142_N and the second transformer units 144_1, ..., 144_M may each include a primary coil C1 connected to the generator 130, a secondary coil C2 connected to the driving module 120, and a transformer core TC for mutual inductive coupling between the primary coil C1 and the secondary coil C2.

[0085] An output end of the generator 130 may be connected to primary coils C1 of the first transformer units 142_1, . . . , 142_N and the second transformer units 144_1, .

[0086] The N primary coils C1 included in the N first transformer units 142_1, ..., 142_N and the M second transformer units 144_1, ..., 144_M may be connected in series with each other.

[0087] An input end of the driving module 120 may be connected to the secondary coils C2 of the first transformer units 142_1, . . . , 142_N and the second transformer units 144_1, .

[0088] Specifically, the N first driving units 122_1, ..., 122_N may be connected to the secondary coils C2 of the corresponding first transformer units 142_1, ..., 142_N, respectively, and the M second driving units 124_1, ..., 124_M may be connected to the secondary coils C2 of the corresponding second transformer units 144_1, ..., 144_M, respectively.

[0089] The signal at the output end of the generator 130 is transformed through the primary coil C1 and the secondary coil C2 of each of the transformer units 142_1 to 142_N and 144_1 to 144_M, and can be applied to each of the driving units 122_1 to 122_N and 124_1 to 124_M.

[0090] The transformer core TC is a component for mutual inductive coupling between the primary coil C1 and the secondary coil C2, and may be configured in various ways. The number of the transformer cores TC may correspond to the number N+M of the transformer units 142_1~N, 144_1~M.

[0091] By way of example, the transformer core TC may be, but is not limited to, a toroidal core.

[0092] The switch stacking circuit 100 according to the present invention may further include a voltage balancing unit 150 for maintaining voltage balancing between each of the switch elements S1 to SN, S1 to SM and preventing overvoltage from being applied to a particular switch element S1 to SN, S1 to SM.

[0093] The voltage balancing unit 150 may be, but is not limited to, a snubber circuit.

[0094] Meanwhile, FIGS. 3 and 4 show the structure of a conventional switch stacking circuit 10. In the conventional switch stacking circuit 10, a parasitic inductance SL may be generated by a wiring W for series connection in the process of connecting a number of switch elements S in series.

[0095] If the influence of the parasitic inductance SL component becomes large, it makes fast switching difficult due to the current delay phenomenon when the switch element S is turned off, and is the main cause of overvoltage conditions and switching losses. Therefore, various hardware configurations are required to reduce the parasitic inductance SL.

[0096] FIG. 4 is a schematic diagram illustrating a switch stacking circuit 10 having the switch series connection structure of FIG. 3. In this diagram, a large number of switch elements S are connected in series in a row, and it can be seen that the influence of parasitic inductance SL can be significant due to the wiring structure.

[0097] Reference numerals 12, 13, 14, and 15 not shown in FIG. 4 are respectively a driving module 12, a generator 13, a transformer module 14, and a voltage balancing circuit 15 for driving a plurality of switch elements S, and may be configured in the same or similar manner as the driving module 120, the generator 130, the transformer module 140, and the voltage balancing unit 150 according to the present invention described above.

[0098] On the other hand, in order to minimize the parasitic inductance SL generated by the wiring, the switch stacking circuit 100 according to the present invention may be configured such that when a drive signal Vd is applied to the first switch group G1 and the second switch group G2, the direction of the current flowing through the first wiring W1 is opposite to the direction of the current flowing through the second wiring W2.

[0099] Referring to FIG. 6, the direction of current flowing through the first switch group G1 along the first connection W1 is to the left of the drawing, and the direction of current flowing through the second switch group G2 along the second connection W2 is to the right of the drawing, so that they are opposite directions.

[0100] A current can flow from the bottom to the top of the drawing through a third wire W3 that connects in series the switch element SN located at the end of the first switch group G1 and the switch element SM located at the end of the second switch group G2.

[0101] Since the direction of the current flowing along the first connection W1 and the direction of the current flowing along the second connection W2 are opposite to each other and are positioned adjacent to each other, the influence of the current flowing through the first connection W1 and the influence of the current flowing through the second connection W2 are canceled out, and the inductance generated by the first connection W1 and the inductance generated by the second connection W2 are canceled out, resulting in the effect of no parasitic inductance being generated.

[0102] 6, the first switch group G1 and the second switch group G2 may be arranged in two rows, more preferably in parallel to each other. In particular, the first wire connection W1 and the second wire connection W2 may be arranged adjacent to each other.

[0103] FIG. 7 is a schematic diagram illustrating a switch stacking circuit 100 including the first wire connection W1 and second wire connection W2 structure according to FIG.

[0104] 7, the first switch group G1 and the second switch group G2 may be arranged in two rows at the center, and the generator 130 may be arranged on the side of the third connection W1 where the first switch group G1 and the second switch group G2 are connected in series. As a result, the output terminals Vo− and Vo+ of the switch stacking circuit 100 may be arranged side by side on the other side opposite the third connection W3.

[0105] In addition, each switch element S1 to SN of the first switch group G1 and each switch element S1 to SM of the second switch group G2 may be arranged so that the driving module 120, the voltage balancing unit 150, and the transformer module 140 face outward so that the first connection W1 and the second connection W2 are arranged adjacent to each other.

[0106] The transformer module 140 is arranged along the outermost periphery and can magnetically connect the generator 130 and the driving module 120 arranged on the third connection W3 side.

[0107] As a result, the switch stacking circuit 100 can form a circuit structure that is symmetrical about the first and second wire connections W1 and W2.

[0108] Meanwhile, as shown in FIG. 6, the first switch group G1 and the second switch group G2 are arranged in two rows facing each other, and an insulating member 110 for insulating the first switch group G1 and the second switch group G2 from each other can be installed between the first switch group G1 and the second switch group G2.

[0109] As shown in FIG. 6, a first switch group G1 may be located on one side of the insulating member 110, and a second switch group G2 may be located on the other side.

[0110] The insulating member 110 may be formed of various materials and shapes as long as it can maintain insulation between the first switch group G1 and the second switch group G2.

[0111] For example, the insulating member 110 may be formed in a thin plate shape to minimize the size of the switch stacking circuit 100, but is not limited thereto.

[0112] Although the insulating member 110 is merely omitted from FIG. 7, it can be clearly understood from the above description that the insulating member 110 can be interposed between the first switch group G1 and the second switch group G2.

[0113] A switch stacking device 200 including the switch stacking circuit 100 according to the present invention will now be described in detail with reference to FIGS. 8a to 10c.

[0114] The switch stacking device 200 may include a first stack 210 in which the N switch elements S1, ..., SN of the first switch group G1 are installed; and a second stack 220 in which the M switch elements S1, ..., SM of the second switch group G2 are installed.

[0115] The first stack 210 is a frame in which the N switch elements S1, . . . , SN of the first switch group G1 are installed, and may have various configurations.

[0116] As shown in Figures 8a and 8b, the first stack 210 may include a plurality of circuit boards PCB on which the N switch elements S1, ..., SN are mounted, a first frame 214 to which the plurality of circuit boards PCB are fixedly coupled, and a plurality of bus bars B for electrically connecting adjacent switch elements (S1, ..., SN) in series.

[0117] The bus bar B for electrically connecting the adjacent switch elements S1, . . . , SN in the first frame 214 may be a connecting member forming the first wire connection W1 described above.

[0118] The bus bars B may be formed in various shapes, for example, with reference to FIGS. 8a and 8b, they may be arranged in a zigzag pattern in two rows for compact arrangement.

[0119] The number of the circuit boards PCB may correspond to the number N of the N switch elements S1, . . . , SN.

[0120] In this case, the N circuit boards PCB may be fixedly installed on one surface of the first frame 214 and may be installed in a row along the length direction of the first frame 214. A predetermined interval may be formed between adjacent circuit boards PCB.

[0121] Each circuit board PCB may be provided with the first driving units 122_1, ..., 122_N of the corresponding driving module 120 and a voltage balancing module 150. In addition, the above-mentioned voltage transformer module 140 may be connected to one side of the circuit board PCB.

[0122] More specifically, the first transformer units 142_1, . . . , 142_N of the corresponding transformer module 140 may be electrically connected and coupled to a side surface of each circuit board PCB.

[0123] As shown in FIG. 8a, the N first transformer units 142_1, . . . , 142_N may be alternately arranged in two rows in a zigzag pattern along opposite sides of the first frame 214.

[0124] The first frame 214 is a support member on which the circuit board PCB and the N first transformer units 142_1, ..., 142_N are fixedly installed, and may be a plate-like member having a thickness, or may have a plane formed into a polygonal shape such as a rectangle.

[0125] The first frame 214 is a plate-like plate, and when the circuit boards PCB are installed on a first surface, a first heat dissipation part 310 can be installed on a second surface opposite to the first surface.

[0126] The first heat dissipation unit 310 is a heat sink and may have various configurations. For example, the first heat dissipation unit 310 may include a plurality of heat dissipation members (for example, heat dissipation fins) extending in a direction perpendicular to the second surface.

[0127] The second stack 220 is a frame in which the M switch elements S1, . . . , SM of the second switch group G2 are installed, and may have various configurations.

[0128] As shown in Figures 9a and 9b, the second stack 210 may include a plurality of circuit boards PCB on which the M switch elements S1, ..., SM are mounted, a second frame 224 to which the plurality of circuit boards PCB are fixedly coupled, and a plurality of bus bars B for electrically connecting adjacent switch elements S1, ..., SM in series.

[0129] The bus bar B for electrically connecting the adjacent switch elements S1, . . . , SM in the second frame 224 may be a connecting member forming the second wire connection W2 described above.

[0130] The bus bars B may be formed in various shapes, for example, with reference to FIGS. 9a and 9b, they may be arranged in a zigzag pattern in two rows for compact arrangement.

[0131] The number of the circuit boards PCB may correspond to the number M of the M switch elements S1, . . . , SM.

[0132] In this case, the M circuit boards PCB may be fixedly installed on one surface of the second frame 224 and may be installed in a row along the length direction of the second frame 224. A predetermined interval may be formed between adjacent circuit boards PCB.

[0133] Each circuit board PCB may be provided with the second driving units 124_1, ..., 124_M of the corresponding driving module 120 and a voltage balancing module 150. In addition, the above-mentioned voltage transformer module 140 may be connected to one side of the circuit board PCB.

[0134] More specifically, the second transformer units 144_1, . . . , 144_M of the corresponding transformer module 140 may be electrically connected and coupled to the side of each circuit board PCB.

[0135] As shown in FIG. 9a, the M second transformer units 144_1, . . . , 144_M may be alternately arranged in two rows in a zigzag pattern along opposite sides of the second frame 224.

[0136] The second frame 224 is a support member on which the circuit board PCB and the M second transformer units 144_1, ..., 144_M are fixedly installed, and may be a plate-like member having a thickness, or may have a plane formed into a polygonal shape such as a rectangle.

[0137] The second frame 224 is a plate-like plate, and when the circuit board PCB is installed on a first surface, a second heat dissipation part 320 can be installed on a second surface opposite to the first surface.

[0138] The second heat dissipation unit 320 is a heat sink and may have various configurations. For example, the second heat dissipation unit 320 may include a plurality of heat dissipation members (for example, heat dissipation fins) extending in a direction perpendicular to the second surface.

[0139] It is understood that the first stack 210 and the second stack 220 may be configured in the same or similar manner.

[0140] The first stack 210 and the second stack 220 may be installed facing each other with a gap therebetween. To this end, a housing or a fixing member (not shown) for fixing the first stack 210 and the second stack 220 may be installed.

[0141] In this case, the first surface of the first frame 214 of the first stack 210 and the first surface of the second frame 224 of the second stack 220 may be disposed to face each other.

[0142] As a result, the bus bar B on the first frame 214 side and the bus bar B on the second frame 224 side are installed facing each other with a gap between them, and the insulating member 110 described above may be installed between the first stack 210 and the second stack 220, more specifically, between the first surface of the first frame 214 and the first surface of the second frame 224.

[0143] In this case, the first transformer units 142_1, ..., 142_N installed along the side of the first frame 214 can be positioned alternately with the second transformer units 144_1, ..., 144_M installed along the side of the second frame 224 so as not to interfere with each other.

[0144] That is, by positioning the second transformer units 144_1, ..., 144_M between adjacent first transformer units 142_1, ..., 142_N, and by positioning the first transformer units 142_1, ..., 142_N between adjacent second transformer units 144_1, ..., 144_M, the first frame 214 and the second frame 224 can be configured more compactly.

[0145] The transformer core TC of the first transformer unit 142_1, ..., 142_N and the transformer core TC of the second transformer unit 144_1, ..., 144_M may be configured to be identical or similar to each other, for example, they may be toroidal cores with a through hole H formed in the center so that a high-voltage cable can pass through.

[0146] A secondary coil C2 electrically connected to the corresponding first driving unit 122_1, ..., 122_N or the second driving unit 124_1, ..., 124_M may be wound around the transformer core TC.

[0147] The first frame 214 and the second frame 224 may be provided with core fixing members 216 and 226 for supporting and fixing the transformer core TC.

[0148] The core fixing members 216 and 226 are structures for fixing the transformer core TC, and may be, for example, J-shaped structures, but are not limited thereto and may have various structures and shapes.

[0149] In addition, the switch stacking apparatus 200 may further include a driving unit (not shown) fixedly installed on one side of the first stack 210 or the second stack 220 .

[0150] The driving unit (not shown) may include a circuit board PCB on which the above-described generator 130 is installed, and a driving unit housing (not shown) on which the circuit board PCB is installed.

[0151] For example, the drive unit housing (not shown) may be fixedly coupled to one end of the first frame 214 in the longitudinal direction.

[0152] A high voltage cable extending from a circuit board PCB of the driving unit (not shown) may pass through a central through-hole H of a transformer core TC of the primary coil C1 and be mutually inductively coupled with the secondary coil C2.

[0153] The above content has only described some of the preferred embodiments that can be embodied by the present invention, and as is well known, the scope of the present invention should not be interpreted as being limited to the above embodiments, and it can be said that any technical idea that shares the same fundamental principle as the technical idea of ​​the present invention described above is included in the scope of the present invention.

Claims

1. a first switch group (G1) in which N switch elements (S1, ..., SN, N is a natural number of 1 or more) are connected in series via a first connection (W1); and a second switch group (G2) in which M switch elements (S1, ..., SM, M is a natural number of 1 or more) are connected in series via a second connection (W2), The first switch group (G1) and the second switch group (G2) are connected in series, A switch stacking circuit (100), characterized in that when a drive signal (Vd) is applied to the first switch group (G1) and the second switch group (G2), the direction of current flowing in the first connection (W1) is opposite to the direction of current flowing in the second connection (W2).

2. 2. The switch stacking circuit (100) of claim 1, wherein the number (N) of switch elements in the first switch group (G1) is the same as the number (M) of switch elements in the second switch group (G2).

3. 2. The switch stacking circuit (100) according to claim 1, wherein the first switch group (G1) and the second switch group (G2) are connected in series via a third wire (W3).

4. 2. The switch stacking circuit (100) of claim 1, wherein the first group of switches (G1) and the second group of switches (G2) are arranged in two parallel rows.

5. The switch stacking circuit (100) according to claim 4, wherein an insulating member (110) for insulation is installed between the first switch group (G1) and the second switch group (G2).

6. 2. The switch stacking circuit (100) of claim 1, further comprising a drive module (120) for applying the drive signal (Vd) to the first switch group (G1) and the second switch group (G2).

7. 7. The switch stacking circuit (100) of claim 6, wherein the drive module (120) includes a first drive circuit portion (122) for applying the drive signal (Vd) to the first switch group (G1) and a second drive circuit portion (124) for applying the drive signal (Vd) to the second switch group (G2).

8. the first driving circuit section (122) includes N first driving units (122_1, ..., 122_N) corresponding to the N switch elements (S1, ..., SN), respectively; 8. The switch stacking circuit (100) of claim 7, wherein the second drive circuit section (124) includes M second drive units (124_1, ..., 124_M) corresponding to the M switch elements (S1, ..., SM), respectively.

9. The switch stacking circuit (100) according to claim 8, further comprising a generator (130) that generates driving pulses (Pon, Poff) for controlling the on / off of the driving signal (Vd).

10. 10. The switch stacking circuit (100) of claim 9, further comprising a transformer module (140) for simultaneously transmitting isolated drive power between the generator (130) and the drive module (120).

11. The voltage transformer module (140) 11. The switch stacking circuit (100) according to claim 10, further comprising: N first transformer units (142_1, ..., 142_N) arranged corresponding to the N first drive units (122_1, ..., 122_N); and M first transformer units (144_1, ..., 144_M) arranged corresponding to the M second drive units (124_2, ..., 124_M).

12. A switch stacking device (200) including a switch stacking circuit (100) according to claim 1, A switch stacking device (200) comprising: a first stack (210) in which the N switch elements (S1, ..., SN) of the first switch group (G1) are installed; and a second stack (220) in which the M switch elements (S1, ..., SM) of the second switch group (G2) are installed.

13. The first stack (210) and the second stack (220) are disposed opposite each other with a gap therebetween, The switch stacking device (200) according to claim 12, characterized in that an insulating member (110) for insulation is installed between the first stack (210) and the second stack (220).

14. The first stack (210) includes a circuit board (PCB) on which the N switch elements (S1, ..., SN) are installed, and a first frame (214) to which the circuit board (PCB) is fixed on a first surface, 13. The switch stacking device (200) of claim 12, wherein the second stack (220) includes a circuit board (PCB) on which the M switch elements (S1, ..., SM) are installed, and a second frame (224) to which the circuit board (PCB) is fixed on a first surface.

15. The circuit board (PCB) and the circuit board (PCB) are disposed opposite each other with a gap therebetween, 15. The switch stacking device (200) of claim 14, further comprising: a first heat dissipation section (310) installed on a second surface of the first frame (214) opposite the first surface; and a second heat dissipation section (320) installed on a second surface of the second frame (224) opposite the first surface.

16. The switch stacking circuit (100) The power supply further includes a driving module (120) for applying the driving signal (Vd) to the first switch group (G1) and the second switch group (G2), a generator (130) for generating driving pulses (Pon, Poff) for controlling on / off of the driving signal (Vd), and a transformer module (140) for simultaneously transmitting insulated driving power between the generator (130) and the driving module (120), 16. The switch stacking device (200) of claim 15, wherein the transformer module (140) includes a primary coil (C1) connected to the generator (130), a secondary coil (C2) connected to the drive module (120), and a transformer core (TC) for mutual inductive coupling between the primary coil (C1) and the secondary coil (C2).

17. The switch stacking device (200) according to claim 16, characterized in that the transformer core (TC) is a toroidal core with a through hole (H) formed in the center.

Citation Information

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