Reconfigurable power conversion device and control method

A reconfigurable power conversion device with dynamically controlled switching elements addresses efficiency challenges by reducing losses, enhancing power conversion efficiency and extending battery life in portable devices.

JP2025541575APending Publication Date: 2025-12-19DIODES INC
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Patent Information

Application Number
JP2025536905
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-05-31
Filing Date
2023-09-29
Publication Date
2025-12-19

AI Technical Summary

Technical Problem

Existing power converters in portable devices face challenges in achieving high efficiency across varying load conditions due to dominant conduction or switching losses, necessitating a reliable control method to improve power conversion efficiency.

Method used

A reconfigurable power conversion device with parallel-connected high-side and low-side switching elements, controlled by a controller to dynamically adjust operating parameters such as switching frequency, gate drive voltage, and mode configuration to reduce losses based on load conditions.

Benefits of technology

The solution enhances power conversion efficiency by reducing switching and conduction losses, thereby extending battery life and improving thermal management in portable devices.

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Abstract

The apparatus includes: a plurality of high-side switching elements connected in parallel between a first voltage bus and a switching node, wherein each high-side switching element of the plurality of high-side switching elements is controlled by a corresponding high-side driver; and a plurality of low-side switching elements connected in parallel between the switching node and a second voltage bus, wherein each low-side switching element of the plurality of low-side switching elements is controlled by a corresponding low-side driver, and based on at least one operating parameter, the plurality of high-side switching elements and the plurality of low-side switching elements are controlled such that the plurality of high-side switching elements and the plurality of low-side switching elements form a reconfigurable power stage of a power converter.
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Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This patent application claims priority to, and is specifically a continuation of, U.S. patent application Ser. No. 18 / 203,839, entitled "Reconfigurable Power Conversion Apparatus and Control Method," filed May 31, 2023, which is incorporated herein by reference as if reproduced in its entirety.

[0002] The present invention relates to a reconfigurable power converter, and in a particular embodiment to a control method for improving the power conversion efficiency of a reconfigurable power converter. [Background technology]

[0003]

[0003] As technology continues to advance, various portable devices have become popular, such as mobile phones, tablet PCs, digital cameras, MP3 players, etc. Each portable device may use multiple rechargeable battery cells to power various processors, such as digital signal processors (DSPs), field programmable gate arrays (FPGAs), central processing units (CPUs), etc.

[0004]

[0004] A processor (e.g., a CPU) in a portable device may be powered by a power converter. The power converter may be implemented as a step-down converter (e.g., a buck converter) including two power switches connected in series. The first power switch, which is not connected to ground, is called a high-side switch. The second power switch, which is connected to ground, is called a low-side switch. The common node of the high-side switch and the low-side switch is the switching node of the power converter. A low-side gate drive circuit and a high-side gate drive circuit are employed to control the gates of the low-side switch and the high-side switch. The bias power supply for the low-side gate drive circuit is supplied from a regulated bias voltage source. The high-side gate drive circuit may require a gate voltage higher than the voltage of the input power supply connected to the power converter.

[0005]

[0005] The low-side switch and the high-side switch of the power converter may be implemented as metal-oxide semiconductor field-effect transistors (MOSFETs). A MOSFET is a voltage-controlled device. When a gate drive voltage is applied to the gate of the MOSFET, and the gate drive voltage is greater than the turn-on threshold of the MOSFET, a conductive channel is established between the drain and source of the MOSFET. After the conductive channel is established, the MOSFET is in an on-state, where power flows between the drain and source of the MOSFET. On the other hand, if the gate drive voltage applied to the gate is less than the turn-on threshold of the MOSFET, the MOSFET is accordingly turned off.

[0006]

[0006] Power conversion efficiency is one of the most important performance indicators of switching-mode power supplies (e.g., buck converters) used in battery-powered portable devices. In battery-based applications, it is important to achieve high efficiency over a variety of load conditions. Higher efficiency translates into longer battery operating time between battery charges. Furthermore, an efficient power conversion system can reduce power losses, thereby improving thermal management in portable devices.

[0007]

[0007] The total power loss of a power converter includes two parts: conduction loss and switching loss. Conduction loss is directly related to the on-resistance of the power devices used in the power converter. Switching loss is directly related to the switching frequency of the power converter. Under heavy load conditions, conduction loss is the dominant factor in determining the efficiency of the power converter. On the other hand, under light load conditions, switching loss is the dominant factor in determining the efficiency of the power converter. It is desirable to have a simple and reliable control method for reducing switching loss and / or conduction loss according to various different operating conditions, thereby achieving better power conversion efficiency. Summary of the Invention

[0008]

[0008] These and other problems are generally solved or avoided, and technical advantages are generally achieved, by preferred embodiments of the present disclosure, which provide a reconfigurable power conversion device and a control method for improving the power conversion efficiency of the reconfigurable power conversion device.

[0009]

[0009] According to one embodiment, an apparatus comprises a plurality of high-side switching elements connected in parallel between a first voltage bus and a switching node, wherein each high-side switching element of the plurality of high-side switching elements is controlled by a corresponding high-side driver, and a plurality of low-side switching elements connected in parallel between the switching node and a second voltage bus, wherein each low-side switching element of the plurality of low-side switching elements is controlled by a corresponding low-side driver, and wherein based on at least one operating parameter, the plurality of high-side switching elements and the plurality of low-side switching elements are controlled such that the plurality of high-side switching elements and the plurality of low-side switching elements form a reconfigurable power stage of a power converter.

[0010]

[0010] According to another embodiment, a method includes detecting multiple operating parameters of a power converter having multiple high-side switching elements connected in parallel between a first voltage bus and a switching node and multiple low-side switching elements connected in parallel between the switching node and a second voltage bus, and dynamically reconfiguring the multiple high-side switching elements and the multiple low-side switching elements to achieve improved operating parameters based on at least one operating parameter.

[0011]

[0011] According to yet another embodiment, the system comprises a plurality of high-side switching elements connected in parallel between a first voltage bus and a switching node, a plurality of high-side drivers each connected to a corresponding high-side switching element, a plurality of low-side switching elements connected in parallel between the switching node and a second voltage bus, a plurality of low-side drivers each connected to a corresponding low-side switching element, an inductor connected between the switching node and an output of the system, and a capacitor connected between the output of the system and the second voltage bus.

[0012] The foregoing has outlined rather broadly the features and technical advantages of the present disclosure in order that the detailed description of the disclosure that follows may be better understood. Additional features and advantages of the present disclosure will be described hereinafter which form the subject of the claims of the present disclosure. It should be appreciated by those skilled in the art that the conception and specific embodiments disclosed may be readily utilized as a basis for modifying or designing other structures or processes for carrying out the same purposes of the present disclosure. Those skilled in the art will also appreciate that such equivalent constructions do not depart from the spirit and scope of the present disclosure as set forth in the appended claims.

[0013] For a more complete understanding of the present disclosure and its advantages, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which: [Brief explanation of the drawings]

[0014] [Figure 1] FIG. 1 is a block diagram of a reconfigurable power device according to various embodiments of the present disclosure. [Figure 2] FIG. 2 is a block diagram of a reconfigurable power conversion system with series-connected high-side and low-side switches in accordance with various embodiments of the present disclosure. [Figure 3] 2 is a schematic diagram of a buck converter formed by the reconfigurable power device shown in FIG. 1 in accordance with various embodiments of the present disclosure. [Figure 4]4 illustrates a controller for driving the switches of the buck converter shown in FIG. 3 in accordance with various embodiments of the present disclosure. [Figure 5] 4 is a flowchart for controlling the buck converter shown in FIG. 3 according to various embodiments of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0015]

[0019] Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The drawings are drawn to clearly illustrate relevant aspects of the various embodiments and are not necessarily drawn to scale.

[0016]

[0020] The making and use of presently preferred embodiments are described in detail below. It should be understood, however, that the present disclosure provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments described are merely illustrative of specific ways to make and use the disclosure and do not limit the scope of the disclosure.

[0017]

[0021] The present disclosure will be described with respect to preferred embodiments in a specific context, namely, a reconfigurable power converter and control method for improving the power conversion efficiency of a power converter. However, the present disclosure may be applied to a variety of power conversion systems. Various embodiments are described in detail below with reference to the accompanying drawings.

[0018]

[0022] 1 is a block diagram of a reconfigurable power device according to various embodiments of the present disclosure. The reconfigurable power device 100 includes a plurality of switching elements, including a first switching element 101, a second switching element 102, and a third switching element 103. As shown in FIG. 1, the plurality of switching elements are connected in parallel. The reconfigurable power device 100 shown in FIG. 1 can be used to form a reconfigurable power converter. The detailed structure and operation principle of the reconfigurable power converter will be described below with reference to FIG. 3.

[0019]

[0023] 1 shows only three switching elements of a reconfigurable power device that may include hundreds of such switching elements. The number of switching elements shown herein is limited solely for purposes of clearly illustrating the inventive aspects of various embodiments. The present disclosure is not limited to a particular number of switching elements.

[0020]

[0024] In some embodiments, the multiple switching elements, including the first switching element 101, the second switching element 102, and the third switching element 103, are integrated into a semiconductor package having a first terminal, a second terminal, and multiple gate terminals, including a first gate terminal G1, a second gate terminal G2, and a third gate terminal G3, as shown in FIG.

[0021]

[0025] In some embodiments, each switching element (e.g., first switching element 101) comprises one transistor cell. The gate of the transistor cell is configured to be connected to the output of a corresponding gate drive circuit (e.g., first gate drive circuit 111). In alternative embodiments, each switching element (e.g., first switching element 101) comprises a first number of transistor cells connected in parallel between a first terminal and a second terminal of reconfigurable power device 100. The gates of the first number of transistor cells are connected to each other. As shown in FIG. 1 , the gates of the first number of transistor cells of first switching element 101 are configured to be connected to the output of first gate drive circuit 111.

[0022]

[0026] In some embodiments, the first terminal shown in Figure 1 is a drain terminal of the reconfigurable power device 100. The second terminal shown in Figure 1 is a source terminal of the reconfigurable power device 100. The drain terminal is connected to the drains of the transistor cells of the plurality of switching elements. The source terminal is connected to the sources of the transistor cells of the plurality of switching elements.

[0023]

[0027] The controller 110 is configured to generate gate drive signals for the plurality of switching elements. In some embodiments, the controller 110 is configured to control the operation of the plurality of switching elements based on a plurality of operating parameters (e.g., sensed current, temperature, etc.). In particular, the controller 110 is configured to generate gate drive signals for configuring the plurality of switching elements based on a current flowing through the reconfigurable power device 100, such that at least one switching element of the plurality of switching elements is configured to operate in a constant-off mode to reduce switching losses of the reconfigurable power device 100.

[0024]

[0028] In some embodiments, the controller 110 is configured to control the operation of the plurality of switching elements based on the plurality of operating parameters. In particular, the controller 110 is configured to generate gate drive signals to configure the plurality of switching elements, whereby at least one switching element of the plurality of switching elements is configured to dynamically leave the PWM mode and enter a constant-off mode to achieve better efficiency.

[0025]

[0029] In some embodiments, the controller 110 is configured to control the operation of the plurality of switching elements based on a plurality of operating parameters. In particular, the controller 110 is configured to generate gate drive signals for configuring the plurality of switching elements such that the switching frequencies of the plurality of switching elements are adjusted to reduce switching losses of the reconfigurable power device 100 based on the current flowing through the reconfigurable power device 100.

[0026]

[0030] In some embodiments, the controller 110 is configured to control the operation of the plurality of switching elements based on the plurality of operating parameters. In particular, the controller 110 is configured to generate a gate drive signal to configure the plurality of switching elements such that a gate drive voltage of at least one of the plurality of switching elements is configured to be dynamically adjusted to achieve better efficiency.

[0027]

[0031] In some embodiments, the controller 110 is configured to generate gate drive signals to configure the plurality of switching elements to alternate between three different control methods to achieve better efficiency. In a first control method, at least one switching element of the plurality of switching elements is configured to leave PWM mode and enter constant-off mode to reduce switching losses. In a second control method, the switching frequency of the at least one switching element is adjusted to reduce switching losses. In a third control method, the gate drive voltage of the at least one switching element is adjusted to further reduce switching losses.

[0028]

[0032] 2 illustrates a block diagram of a reconfigurable power conversion system including a high-side switch and a low-side switch connected in series, in accordance with various embodiments of the present disclosure. As shown in FIG. 2, a high-side switch 202 and a low-side switch 204 are connected in series between a first voltage bus and a second voltage bus. In some embodiments, the high-side switch 202 and the low-side switch 204 may be part of a step-down power converter (e.g., a buck power converter). In alternative embodiments, the high-side switch 202 and the low-side switch 204 may be part of another suitable power conversion system, such as a full-bridge power converter, a half-bridge power converter, an LLC resonant converter, a motor driver, or the like.

[0029]

[0033] In some embodiments, the high-side switch 202 is formed by the reconfigurable power device 100 shown in FIG. 1. In particular, the high-side switch 202 includes multiple switching elements connected in parallel. Each switching element of the multiple switching elements is independently controlled by a dedicated driver. A detailed structure of the high-side switch 202 will be described later with reference to FIG. 3.

[0030]

[0034] In some embodiments, the low-side switch 204 is formed by the reconfigurable power device 100 shown in FIG. 1. In particular, the low-side switch 204 includes multiple switching elements connected in parallel. Each switching element of the multiple switching elements is independently controlled by a dedicated driver. A detailed structure of the low-side switch 204 will be described later with reference to FIG. 3.

[0031]

[0035] 3 shows a schematic diagram of a buck converter formed by the reconfigurable power device shown in FIG. 1 in accordance with various embodiments of the present disclosure. The buck converter includes a high-side switch 202 and a low-side switch 204 connected in series between an input voltage bus V and ground. The input voltage bus V is coupled to an input power source. The buck converter further includes an inductor L1 connected between a common node of the high-side switch 202 and the low-side switch 204 and an output bus V of the buck converter. The common node of the high-side switch 202 and the low-side switch 204 is also referred to as the switching node (SW) of the buck converter.

[0032]

[0036] In some embodiments, the high-side switch 202 is implemented as the reconfigurable power device 100 shown in Figure 1. As shown in Figure 3, the high-side switch 202 includes multiple high-side switching elements including a first high-side switching element Q11, a second high-side switching element Q12, and a third high-side switching element Q13 connected in parallel between VIN and a switching node SW.

[0033]

[0037] In some embodiments, the low-side switch 204 is implemented as the reconfigurable power device 100 shown in Figure 1. As shown in Figure 3, the low-side switch 204 includes a plurality of low-side switching elements including a first low-side switching element Q21, a second low-side switching element Q22, and a third low-side switching element Q23 connected in parallel between the switching node SW and ground.

[0034]

[0038] Throughout the description, the buck converter shown in FIG. 3 may alternatively be referred to as a reconfigurable power converter.

[0035]

[0039] 3 (e.g., switches Q11, Q12, Q13, Q21, Q22, and Q23) may be metal-oxide-semiconductor field-effect transistor (MOSFET) devices. Alternatively, the switching elements may be any controllable switches, such as insulated-gate bipolar transistor (IGBT) devices, integrated-gate-commutated thyristor (IGCT) devices, gate-turn-off thyristor (GTO) devices, silicon-controlled rectifier (SCR) devices, junction-gate field-effect transistor (JFET) devices, MOS-controlled thyristor (MCT) devices, gallium nitride (GaN)-based power devices, silicon carbide (SiC)-based power devices, etc.

[0036]

[0040] Note that while FIG. 3 shows switches Q11, Q12, Q13, Q21, Q22, and Q23 implemented as single n-type transistors, those skilled in the art will recognize that many variations, modifications, and alternatives are possible. For example, depending on different applications and design needs, at least some of the switches (e.g., Q11, Q12, and Q13) may be implemented as p-type transistors. Furthermore, each switch shown in FIG. 3 may be implemented as multiple switches connected in parallel. Furthermore, a capacitor may be connected in parallel with one switch to achieve zero voltage switching (ZVS) / zero current switching (ZCS).

[0037]

[0041] A controller (not shown) is configured to generate gate drive signals DRV11, DRV12, and DRV13 for the high-side switch 202 and gate drive signals DRV21, DRV22, and DRV23 for the low-side switch 204. As shown in FIG. 3, the first high-side driver 211 is configured to receive the first high-side drive signal DRV11 and provide the first high-side switching element Q11 with DRV11. The second high-side driver 212 is configured to receive the second high-side drive signal DRV12 and provide the second high-side switching element Q12 with DRV12. The third high-side driver 213 is configured to receive the third high-side drive signal DRV13 and provide the third high-side switching element Q13 with DRV13. As shown in FIG. 3, each switching element (e.g., Q11) of the multiple high-side switching elements is independently controlled by a dedicated driver (e.g., driver 211).

[0038]

[0042] The first low-side driver 221 is configured to receive a first low-side drive signal DRV21 and provide DRV21 to the first low-side switching element Q21. The second low-side driver 222 is configured to receive a second low-side drive signal DRV22 and provide DRV22 to the second low-side switching element Q22. The third low-side driver 223 is configured to receive a third low-side drive signal DRV23 and provide DRV23 to the third low-side switching element Q23. As shown in FIG. 3, each switching element (e.g., Q21) of the multiple low-side switching elements is independently controlled by a dedicated driver (e.g., driver 221).

[0043]

[0039]

[0044] The efficiency of the buck converter shown in FIG. 3 can be improved by reconfiguring the high-side and low-side switching elements to form a reconfigurable power stage suitable for specific operating conditions. For example, under light load conditions, switching losses are the dominant factor in determining efficiency. To reduce switching losses, some switching elements of high-side switch 202 and / or some switching elements of low-side switch 204 can be configured to leave PWM mode and enter constant-off mode, thereby reducing switching losses.

[0040]

[0045] During operation, the current flowing through inductor L1 is detected by an appropriate current sensor. The detected current is provided to a controller. Based on the current flowing through the inductor, the controller is configured to generate drive signals (e.g., DRV11, DRV12, DRV13, DRV21, DRV22, and DRV23). The drive signals are configured to cause at least one switching element of the plurality of high-side switching elements and the plurality of low-side switching elements to leave PWM mode and enter constant-off mode to reduce switching losses of the buck converter. For example, under light-load operating conditions, only one high-side switching element (e.g., Q11) and one low-side switching element (e.g., Q21) are configured to operate in PWM mode. The remaining switching elements are in constant-off mode. The constant-off mode helps reduce switching losses, thereby improving the efficiency of the buck converter.

[0041]

[0046] During operation, the current flowing through inductor L1 is detected by an appropriate current sensor. The detected current is provided to a controller. Based on the current flowing through the inductor, the controller is configured to generate drive signals (e.g., DRV11, DRV12, DRV13, DRV21, DRV22, and DRV23). The drive signals are configured to adjust the switching frequencies of the multiple high-side switching elements and the multiple low-side switching elements to reduce switching losses of the buck converter. For example, under light-load operating conditions, the switching frequency may be reduced. Reducing the switching frequency helps reduce switching losses, thereby improving the efficiency of the buck converter.

[0042]

[0047] During operation, the input current, input voltage, output voltage, and inductor current of the buck converter are detected by appropriate voltage and current sensors. An efficiency value of the buck converter is calculated based on the input current, input voltage, output voltage, and inductor current. In a trial and error process, at least one switching element of the plurality of high-side switching elements and the plurality of low-side switching elements is dynamically configured to leave PWM mode and enter constant-off mode to achieve a better efficiency value.

[0043]

[0048] During operation, a hot spot temperature of the buck converter is detected by an appropriate temperature sensor, and in a trial and error process, at least one switching element of the plurality of high-side switching elements and the plurality of low-side switching elements is dynamically configured to leave PWM mode and enter constant off mode to reduce the hot spot temperature.

[0044]

[0049] During operation, the input current, input voltage, output voltage, and inductor current of the buck converter are detected by appropriate voltage and current sensors. The efficiency value of the buck converter is calculated based on the input current, input voltage, output voltage, and inductor current. In a trial and error process, the switching frequency of the buck converter is dynamically adjusted to achieve a better efficiency value.

[0045]

[0050] During operation, the input current, input voltage, output voltage, and inductor current of the buck converter are detected by appropriate voltage and current sensors. An efficiency value of the buck converter is calculated based on the input current, input voltage, output voltage, and inductor current. In a trial and error process, the gate drive voltages of the multiple high-side switching devices and the gate drive voltages of the multiple low-side switching devices are dynamically adjusted to achieve a better efficiency value.

[0046]

[0051] During operation, the duty cycle of the buck converter is detected / calculated by a suitable processing device. In response to a reduction in the duty cycle, at least one switching element of the plurality of high-side switching elements is configured to leave PWM mode and enter a constant off mode to reduce switching losses in the buck converter. In response to an increase in the duty cycle, at least one switching element of the plurality of low-side switching elements is configured to leave PWM mode and enter a constant off mode to reduce switching losses in the power converter.

[0047]

[0052] During operation, the input current, input voltage, output voltage, and inductor current of the buck converter are detected by appropriate voltage and current sensors. The efficiency value of the buck converter is calculated based on the input current, input voltage, output voltage, and inductor current. Through a trial-and-error process, three control methods are sequentially implemented to achieve a better efficiency value. In the first control method, the multiple high-side switching elements and the multiple low-side switching elements are configured to operate in different operating modes. For example, one switching element is configured to leave PWM mode and enter constant-off mode. In the second control method, the switching frequency of the buck converter is adjusted. In the third control method, the gate drive voltages of the multiple high-side switching elements and the multiple low-side switching elements are adjusted.

[0048]

[0053] 4 illustrates a controller for driving the switches of the buck converter shown in FIG. 3 according to various embodiments of the present disclosure. The controller 400 includes multiple gate drivers and multiple signal processing devices for processing various operating parameters. The multiple gate drivers include both high-side and low-side gate drivers.

[0049]

[0054] 4, the controller 400 is configured to receive a plurality of signals, including a clock (CLK) signal, a PWM signal, and a current sense (CS) signal. Based on the received signals, the controller 400 can generate a plurality of gate drive signals, including DRV11, DRV12, DRV13, DRV21, DRV22, and DRV23.

[0050]

[0055] The first high-side gate driver is configured to generate a first high-side gate drive signal DRV11 applied to the gate of Q11, the second high-side gate driver is configured to generate a second high-side gate drive signal DRV12 applied to the gate of Q12, and the third high-side gate driver is configured to generate a third high-side gate drive signal DRV13 applied to the gate of Q13.

[0051]

[0056] The first low-side gate driver is configured to generate a first low-side gate drive signal DRV21 applied to the gate of Q21, the second low-side gate driver is configured to generate a second low-side gate drive signal DRV22 applied to the gate of Q22, and the third low-side gate driver is configured to generate a third low-side gate drive signal DRV23 applied to the gate of Q23.

[0052]

[0057] It should be noted that the controller 400 having six gate drivers described above is merely an example and should not be construed as unduly limiting the scope of the claims. Those skilled in the art will recognize many variations, alternatives, and modifications. For example, the controller 400 may have additional gate drivers depending on different applications and design needs. In addition, external gate drivers may be used to further improve drive capability.

[0053]

[0058] 5 illustrates a flowchart for controlling the buck converter shown in FIG. 3 in accordance with various embodiments of the present disclosure. The flowchart illustrated in FIG. 5 is merely an example and should not be construed as unduly limiting the scope of the claims. Those skilled in the art will recognize many variations, substitutions, and modifications. For example, various steps illustrated in FIG. 5 may be added, deleted, substituted, rearranged, and repeated.

[0054]

[0059] Referring back to FIG. 3 , the buck converter includes a high-side switch 202 and a low-side switch 204 connected in series between an input voltage bus V and ground. The high-side switch 202 includes multiple high-side switching elements connected in parallel between the input voltage bus V and a switching node SW. Multiple high-side drivers are employed to drive the multiple high-side switching elements. Specifically, each high-side driver is connected to a corresponding high-side switching element. The low-side switch 204 includes multiple low-side switching elements connected in parallel between the switching node SW and ground. Multiple low-side drivers are employed to drive the multiple low-side switching elements. Specifically, each low-side driver is connected to a corresponding low-side switching element. An inductor L1 is connected between the switching node SW and the output of the buck converter. A capacitor Co is connected between the output of the buck converter and ground.

[0055]

[0060] In step 502, a plurality of operating parameters of a power converter are sensed, the power converter comprising a plurality of high-side switching devices connected in parallel between a first voltage bus and a switching node, and a plurality of low-side switching devices connected in parallel between the switching node and a second voltage bus.

[0056]

[0061] In step 504, the plurality of high-side switching elements and the plurality of low-side switching elements are dynamically reconfigured to achieve improved operating parameters based on the at least one operating parameter.

[0057]

[0062] The method further includes detecting a current through an inductor of the power converter and configuring at least one switching element of the plurality of high-side switching elements and the plurality of low-side switching elements to leave a PWM mode and enter a constant-off mode based on the current through the inductor to reduce switching losses in the power converter.

[0058]

[0063] The method further includes sensing a current through an inductor of the power converter and adjusting a switching frequency of the power converter based on the current through the inductor to reduce switching losses in the power converter.

[0059]

[0064] The method further includes detecting an input current, an input voltage, an output voltage, and a current flowing through an inductor of the power converter; calculating an efficiency value of the power converter based on the input current, the input voltage, the output voltage, and the current flowing through the inductor; and dynamically configuring at least one switching element of the plurality of high-side switching elements and the plurality of low-side switching elements to leave a PWM mode and enter a constant-off mode to achieve a better efficiency value in a trial and error process.

[0060]

[0065] The method further includes detecting a hot spot temperature of the power converter and, in a trial and error process, dynamically configuring at least one switching element of the plurality of high-side switching elements and the plurality of low-side switching elements to leave a PWM mode and enter a constant off mode to reduce the hot spot temperature.

[0061]

[0066] The method further includes detecting an input current, an input voltage, an output voltage, and a current through an inductor of the power converter; calculating an efficiency value of the power converter based on the input current, the input voltage, the output voltage, and the current through the inductor; and dynamically adjusting a switching frequency of the power converter to achieve a better efficiency value in a trial and error process.

[0062]

[0067] The method further includes detecting an input current, an input voltage, an output voltage, and a current through an inductor of the power converter; calculating an efficiency value of the power converter based on the input current, the input voltage, the output voltage, and the current through the inductor; and dynamically adjusting gate drive voltages of the plurality of high-side switching elements and the plurality of low-side switching elements to achieve a better efficiency value in a trial and error process.

[0063]

[0068] The method further includes detecting a duty cycle of the power converter; configuring at least one switching element of the plurality of high-side switching elements to leave PWM mode and enter a constant off mode in response to the reduced duty cycle to reduce switching losses in the power converter; and configuring at least one switching element of the plurality of low-side switching elements to leave PWM mode and enter a constant off mode in response to the increased duty cycle to reduce switching losses in the power converter.

[0064]

[0069] The method further includes the steps of detecting an input current, an input voltage, an output voltage, and a current through an inductor of the power converter; calculating an efficiency value of the power converter based on the input current, the input voltage, the output voltage, and the current through the inductor; and reconfiguring operation modes of the plurality of high-side switching elements and the plurality of low-side switching elements, adjusted a switching frequency of the power converter, and adjusted gate drive voltages of the plurality of high-side switching elements and the plurality of low-side switching elements, which are performed sequentially in a trial and error process to achieve a better efficiency value.

[0065]

[0070] Although embodiments of the present disclosure and its advantages have been described in detail, it should be understood that various changes, substitutions, and alterations can be made therein without departing from the spirit and scope of the present disclosure as defined by the appended claims.

[0066]

[0071] Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the processes, machines, manufacture, compositions of matter, means, methods, and steps described herein. As one skilled in the art will readily understand from the present disclosure, any currently existing or later-developed processes, machines, manufacture, compositions of matter, means, methods, or steps that perform substantially the same function or achieve substantially the same results as the corresponding embodiments described herein can be utilized in accordance with the present disclosure. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.

Claims

1. a plurality of high side switching elements connected in parallel between a first voltage bus and a switching node, each high side switching element of the plurality of high side switching elements being controlled by a corresponding high side driver; a plurality of low-side switching elements connected in parallel between the switching node and a second voltage bus, each low-side switching element of the plurality of low-side switching elements being controlled by a corresponding low-side driver, and based on at least one operating parameter, the plurality of high-side switching elements and the plurality of low-side switching elements are controlled such that the plurality of high-side switching elements and the plurality of low-side switching elements form a reconfigurable power stage of a power converter; An apparatus comprising:

2. the first voltage bus is coupled to an input power source; the second voltage bus is coupled to ground; each switching element of the plurality of high-side switching elements comprises at least one high-side transistor cell; each switching element of the plurality of low-side switching elements comprises at least one low-side transistor cell; 10. The apparatus of claim 1.

3. an inductor connected between the switching node and an output of the power converter; a capacitor connected between the output of the power converter and the second voltage bus; The apparatus of claim 1 or 2, further comprising:

4. and configuring at least one switching element of the plurality of high-side switching elements and the plurality of low-side switching elements to operate in a constant off mode based on a current flowing through the inductor to reduce switching losses in the power converter.

4. The apparatus of claim 3.

5. at least one switching element among the plurality of high-side switching elements and the plurality of low-side switching elements is configured to dynamically enter a constant-off mode from a PWM mode to achieve better efficiency, and as a result of configuring the at least one switching element to dynamically enter the constant-off mode, the plurality of high-side switching elements and the plurality of low-side switching elements form the reconfigurable power stage of the power converter.

5. An apparatus according to any one of claims 1 to 4.

6. configuring the at least one switching element to dynamically enter the constant-off mode, adjusting a switching frequency of the at least one switching element, and adjusting a gate drive voltage of the at least one switching element are performed alternately to achieve better efficiency.

6. The apparatus of claim 5.

7. based on the reduced duty cycle of the power converter, at least one switching element of the plurality of high-side switching elements is configured to operate in a constant off mode to reduce switching losses in the power converter; based on an increased duty cycle of the power converter, at least one switching element of the plurality of low-side switching elements is configured to operate in the constant off mode to reduce the switching losses of the power converter.

7. An apparatus according to any one of claims 1 to 6.

8. a plurality of high-side switching devices connected in parallel between the first voltage bus and the switching node; a plurality of low-side switching devices connected in parallel between the switching node and a second voltage bus; sensing a plurality of operating parameters of a power converter comprising: dynamically reconfiguring the plurality of high-side switching elements and the plurality of low-side switching elements to achieve improved operating parameters based on at least one operating parameter; A method comprising:

9. sensing a current through an inductor of the power converter; configuring at least one switching element of the plurality of high-side switching elements and the plurality of low-side switching elements to leave a PWM mode and enter a constant-off mode to reduce switching losses of the power converter based on the current through the inductor; The method of claim 8 further comprising:

10. sensing a current through an inductor of the power converter; adjusting a switching frequency of the power converter based on the current through the inductor to reduce switching losses of the power converter; The method of claim 8 further comprising:

11. sensing an input current, an input voltage, an output voltage, and a current flowing through an inductor of the power converter; calculating an efficiency value of the power converter based on the input current, the input voltage, the output voltage, and the current flowing through the inductor; dynamically configuring at least one switching element of the plurality of high-side switching elements and the plurality of low-side switching elements to leave a PWM mode and enter a constant-off mode in order to achieve better efficiency values ​​in a trial and error process; The method of claim 8 further comprising:

12. detecting a hot spot temperature of the power converter; dynamically configuring at least one switching element of the plurality of high-side switching elements and the plurality of low-side switching elements to leave a PWM mode and enter a constant-off mode in a trial and error process to reduce the hot spot temperature; 12. The method of any one of claims 8 to 11, further comprising:

13. sensing an input current, an input voltage, an output voltage, and a current through an inductor of the power converter; calculating an efficiency value of the power converter based on the input current, the input voltage, the output voltage, and the current through the inductor; dynamically adjusting the switching frequency of the power converter to achieve better efficiency values ​​in a trial and error process. The method of claim 8 further comprising:

14. sensing an input current, an input voltage, an output voltage, and a current through an inductor of the power converter; calculating an efficiency value of the power converter based on the input current, the input voltage, the output voltage, and the current through the inductor; dynamically adjusting gate drive voltages of the plurality of high-side switching devices and gate drive voltages of the plurality of low-side switching devices to achieve better efficiency values ​​in a trial and error process; The method of claim 8 further comprising:

15. detecting a duty cycle of the power converter; configuring at least one switching element of the plurality of high side switching elements to leave a PWM mode and enter a constant off mode in response to a reduced duty cycle to reduce switching losses in the power converter; configuring at least one switching element of the plurality of low-side switching elements to leave the PWM mode and enter the constant off mode in response to an increased duty cycle to reduce the switching losses of the power converter; 15. The method of any one of claims 8 to 14, further comprising:

16. sensing an input current, an input voltage, an output voltage, and a current through an inductor of the power converter; calculating an efficiency value of the power converter based on the input current, the input voltage, the output voltage, and the current through the inductor; reconfiguring the operation modes of the plurality of high-side switching elements and the plurality of low-side switching elements, adjusting the switching frequency of the power converter, and adjusting the gate drive voltages of the plurality of high-side switching elements and the plurality of low-side switching elements, which are performed sequentially in a trial and error process to achieve a better efficiency value; The method of claim 8 further comprising:

17. a plurality of high-side switching devices connected in parallel between the first voltage bus and the switching node; a plurality of high-side drivers each connected to a corresponding high-side switching element; a plurality of low-side switching devices connected in parallel between the switching node and a second voltage bus; a plurality of low-side drivers each connected to a corresponding low-side switching element; an inductor connected between the switching node and an output of the system; a capacitor connected between the output of the system and the second voltage bus; A system comprising:

18. the first voltage bus is coupled to an input power source; the second voltage bus is coupled to ground; each switching element of the plurality of high-side switching elements comprises at least one high-side transistor cell; each switching element of the plurality of low-side switching elements comprises at least one low-side transistor cell; 20. The system of claim 17.

19. a controller configured to provide gate drive signals for the plurality of high-side drivers and the plurality of high-side drivers, the controller comprising: Detecting a current flowing through the inductor; Based on the current flowing through the inductor, at least one switching element of the plurality of high-side switching elements and the plurality of low-side switching elements is configured to leave a PWM mode and enter a constant-off mode to reduce switching losses in the system. The controller is configured to 19. The system of claim 17 or 18, further comprising:

20. a controller configured to provide gate drive signals for the plurality of high-side drivers and the plurality of high-side drivers, the controller comprising: Detecting an input current, an input voltage, an output voltage, and a current through an inductor of said system; calculating an efficiency value for the system based on the input current, the input voltage, the output voltage, and the current through an inductor; In a trial and error process, dynamically configure at least one switching element of the plurality of high-side switching elements and the plurality of low-side switching elements to leave a PWM mode and enter a constant-off mode to achieve better efficiency values. The controller is configured to 19. The system of claim 17 or 18, further comprising:

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