Push-pull isolated inverter drive circuit
The push-pull isolated inverter drive circuit stabilizes output signals by using clamping backflow prevention modules and RC filters to control transistor operation, resolving nonlinearity and gain imbalance, and enabling fixed-frequency power adjustment in high frequency plasma power supply systems.
Patent Information
- Application Number
- JP2024553704
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-11-23
- Filing Date
- 2024-07-09
- Publication Date
- 2025-12-25
- Estimated Expiration
- 2044-07-09
AI Technical Summary
Conventional linear RF pulse power amplifiers in high frequency plasma power supply systems suffer from dynamic nonlinearity and gain imbalance, and are unable to adjust power effectively in a fixed frequency environment.
A push-pull isolated inverter drive circuit incorporating a transformer, switching transistors, and a first and a second switching transistor, a second transistor, and a second transistor, and a second transistor, connected to the transformer, and a second transistor, and a second clamping backflow prevention module, each comprising a diode and a third switching transistor, with RC filter modules connected in parallel to the secondary coils, and buffer gates for inputting square wave DC power supplies.
The circuit effectively controls output signal dynamics, prevents transistor burnout, and maintains stable frequency modulation, addressing nonlinearity and gain imbalance, ensuring power adjustment at a fixed frequency.
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Figure 2025542053000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to the field of high frequency technology, and in particular to a push-pull isolated inverter drive circuit. [Background technology]
[0002] High frequency plasma power supply systems are widely applied in the fields of PECVD chemical vapor deposition, reactive ion etching, etc. The overall configuration of a high frequency plasma power supply system includes a high frequency power supply, a matching box, and a chamber load. The high frequency power supply outputs a power signal to the matching box, which performs impedance matching and transfers the power signal to the chamber load. Here, the output end of the high frequency power supply measures V / I and feeds it back to the internal main board to adjust the output power (for example, by PID calculation, the power is adjusted to the recommended reference value P SET The matching circuit also calculates the input impedance (total impedance of the matching circuit and the chamber load) and performs impedance matching (modulation of the matching circuit itself) according to the input / output power signal, allowing the power signal to be input to the chamber load efficiently.
[0003] Currently, linear RF pulse power amplifiers used in steady-state low frequency bands (below 25 MHz) employ high-voltage switching transistors, and when combined with a bridge inverter, dynamic nonlinearity and gain imbalance are likely to occur.
[0004] In addition, to meet the requirement of adjusting the output signal power at a fixed frequency, a design that has a fixed frequency design but can also adjust the potential is required.Of course, the commonly adopted bridge inverter has the characteristics of stability and simplicity from the viewpoint of control, but it cannot meet the requirement of adjusting the power in a fixed frequency environment. Summary of the Invention
[0005] In view of the above analysis, an embodiment of the present invention aims to provide a push-pull isolated inverter driver circuit to solve the problem that the conventional linear RF pulse power amplifier is prone to dynamic nonlinearity and gain imbalance, and is unable to meet the requirement of power regulation in a fixed frequency environment.
[0006] The present invention includes a transformer, a first switching transistor, a second switching transistor, a first clumping backflow prevention module, and a second clumping backflow prevention module; The first square wave DC power supply and the second square wave DC power supply are respectively input to the opposite polarity end and the same polarity end of the primary coil of the transformer, and the first square wave DC power supply and the second square wave DC power supply alternately become high level, The opposite polarity end of the first secondary coil of the transformer is connected to the input end of the first clamping backflow prevention module, the output end of the first clamping backflow prevention module is connected to the grid of the first switching transistor, and the same polarity end of the first secondary coil and the clamping end of the first clamping backflow prevention module are grounded together with the source of the first switching transistor; The same polarity end of the second secondary coil of the transformer is connected to the input end of the second clamping backflow prevention module, the output end of the second clamping backflow prevention module is connected to the grid of the second switching transistor, the drain of the second switching transistor is connected to the power supply, the opposite polarity end of the second secondary coil, the clamping end of the second clamping backflow prevention module, and the source of the second switching transistor are connected to the drain of the first switching transistor, and the drain of the first switching transistor is used as the signal output end of the circuit.
[0007] Based on the above-mentioned solution, the present invention has been further improved as follows.
[0008] Furthermore, the first clamping backflow prevention module and the second clamping backflow prevention module have the same structure, and each includes a diode, a third switching transistor, and a first resistor; a grid of the third switching transistor connected to the anode of the diode, a source of the third switching transistor connected to the cathode of the diode, and a drain of the third switching transistor connected to one end of the first resistor; The other end of the first resistor is the clamping end of the first clamping backflow prevention module or the second clamping backflow prevention module, the grid of the third switching transistor is the input end of the first clamping backflow prevention module or the second clamping backflow prevention module, and the source of the third switching transistor is the output end of the first clamping backflow prevention module or the second clamping backflow prevention module.
[0009] Additionally, the circuit further includes a first RC filter module and a second RC filter module; a first RC filter module is connected in parallel between the same polarity end and the opposite polarity end of the first secondary coil; A second RC filter module is connected in parallel between the same polarity end and the opposite polarity end of the second secondary coil.
[0010] Furthermore, the first RC filter module includes a second resistor and a first capacitor; The opposite polarity end of the first secondary coil is connected to one end of the first capacitor, the other end of the first capacitor is connected to one end of the second resistor, and the other end of the second resistor is connected to the same polarity end of the first secondary coil.
[0011] Further, the second RC filter module includes a third resistor and a second capacitor; The same polarity end of the second secondary coil is connected to one end of the second capacitor, the other end of the second capacitor is connected to one end of the third resistor, and the other end of the third resistor is connected to the opposite polarity end of the second secondary coil.
[0012] Furthermore, the circuit further includes a first buffer gate and a second buffer gate; The first buffer gate is connected in series with the opposite polarity end of the primary coil of the transformer, and the first square wave DC power supply is input to the opposite polarity end of the primary coil of the transformer through the first buffer gate; The second buffer gate is connected in series with the same polarity end of the primary coil of the transformer, and the second square wave DC power supply is input to the same polarity end of the primary coil of the transformer through the second buffer gate.
[0013] Furthermore, the circuit further includes a third capacitor, which is connected in series between the same polarity end of the primary coil of the transformer and the second buffer gate, or between the opposite polarity end of the primary coil and the first buffer gate.
[0014] Furthermore, the first and second switching transistors are NMOS transistors, and the third switching transistor is a PMOS transistor.
[0015] Furthermore, when the first square-wave DC power supply is at a low level and the second square-wave DC power supply is at a high level, the potential at the signal output terminal of the circuit is equal to the potential of the power supply.
[0016] Furthermore, when the first square-wave DC power supply is at a high level and the second square-wave DC power supply is at a low level, the potential at the signal output end of the circuit corresponds to ground or is at zero potential.
[0017] Compared with the prior art, the present invention can achieve at least one of the following beneficial effects:
[0018] In the push-pull isolated inverter driving circuit provided by the present invention, the first and second square-wave DC power supplies are alternately limited to high levels, and a first clamping backflow prevention module and a second clamping backflow prevention module are provided at the output ends of the first and second secondary coils of the transformer to provide voltage and current limits for the subsequent push-pull transistor when it is turned on, effectively controlling the output signal of the push-pull isolated inverter driving circuit and resolving the dynamic nonlinearity and gain imbalance that are common in conventional linear RF pulse power amplifiers. The first and second clamping backflow prevention modules also prevent the push-pull transistor from burning out due to momentary high voltages caused by coil short circuits, and also prevent the coil from burning out due to high voltages caused by reverse current impact on the coil.
[0019] In addition, the modulation of the output potential and output power at the signal output terminal of the push-pull separated inverter driving circuit is determined by the change in the potential of the power supply Vs. Therefore, as long as the frequencies of the two input signals are stable, the frequency of the output AC signal will also be relatively stable, achieving the effect of modulating the power at a fixed frequency, thereby meeting the requirement of adjusting the power in a fixed frequency environment.
[0020] In the present invention, the above technical solutions can be further combined with each other to realize more preferred combined solutions. Additional features and advantages of the present invention will be set forth hereinafter in the specification, and in part will be apparent from the specification or may be learned by practice of the invention. The objectives and other advantages of the present invention may be realized and obtained by means of the particular points pointed out in the specification and drawings. [Brief explanation of the drawings]
[0021] The drawings are only for purposes of illustrating specific embodiments and are not to be construed as limiting the invention, and like reference numerals refer to like elements in all drawings. [Figure 1]1 is a circuit diagram of a push-pull isolated inverter driving circuit provided by an embodiment of the present invention; [Figure 2] 3 is a schematic diagram of control waveforms of a first switching transistor MOS1 and a second switching transistor MOS2 in a push-pull isolated inverter driving circuit provided by an embodiment of the present invention; FIG. DETAILED DESCRIPTION OF THE INVENTION
[0022] Preferred embodiments of the present invention will now be described in detail with reference to the drawings, which constitute a part of this application and are intended to explain the principles of the present invention together with the embodiments of the present invention, but are not intended to limit the scope of the present invention.
[0023] A specific embodiment of the present invention discloses a push-pull isolated inverter driving circuit, the circuit diagram of which is shown in Figure 1, which includes a transformer, a first switching transistor MOS1, a second switching transistor MOS2, a first clamping backflow prevention module, and a second clamping backflow prevention module, wherein a first square-wave DC power supply and a second square-wave DC power supply are respectively input to the opposite polarity end and the same polarity end of the primary coil of the transformer, the first square-wave DC power supply and the second square-wave DC power supply alternately go high level, the opposite polarity end of the first secondary coil of the transformer is connected to the input end of the first clamping backflow prevention module, and the output end of the first clamping backflow prevention module is connected to the grid of the first switching transistor MOS1, the same polarity end of the first secondary coil, the first clamping backflow prevention module, The clamping end of the backflow prevention module is grounded together with the source of the first switching transistor MOS1, the same polarity end of the second secondary coil of the transformer is connected to the input end of the second clamping backflow prevention module, the output end of the second clamping backflow prevention module is connected to the grid of the second switching transistor MOS2, the drain of the second switching transistor MOS2 is connected to the power supply Vs, the opposite polarity end of the second secondary coil, the clamping end of the second clamping backflow prevention module, and the source of the second switching transistor MOS2 are connected to the drain of the first switching transistor MOS1, and the drain of the first switching transistor MOS1 is the signal output end of the circuit.
[0024] In this embodiment, the first switching transistor MOS1 and the second switching transistor MOS2 are both push-pull transistors, and the first clamping backflow prevention module and the second clamping backflow prevention module are designed to provide voltage limiting and current limiting buffer protection for the turn-on of the push-pull transistors. The first and second clamping backflow prevention modules have the same structure and each includes a diode, a third switching transistor (clamping transistor), and a first resistor (clamping resistor), where the grid of the third switching transistor is connected to the anode of the diode, the source of the third switching transistor is connected to the cathode of the diode, the drain of the third switching transistor is connected to one end of the first resistor, the other end of the first resistor is the clamping end of the first or second clamping backflow prevention module, the grid of the third switching transistor is the input end of the first or second clamping backflow prevention module, and the source of the third switching transistor is the output end of the first or second clamping backflow prevention module. For ease of distinction, the diode, third switching transistor, and first resistor in the first clamping backflow prevention module are designated D1, MOS3, and R1, respectively, in FIG. 1. The diode, the third switching transistor, and the first resistor in the second clamping backflow prevention module are denoted by D2, MOS4, and R4, respectively.
[0025] Preferably, the circuit further includes a first RC filter module and a second RC filter module, where the first RC filter module is connected in parallel between the same-polarity and opposite-polarity ends of the first secondary coil, and the second RC filter module is connected in parallel between the same-polarity and opposite-polarity ends of the second secondary coil. Specifically, the first RC filter module includes a second resistor R2 and a first capacitor C1, where the opposite-polarity end of the first secondary coil is connected to one end of the first capacitor C1, the other end of the first capacitor C1 is connected to one end of the second resistor R2, and the other end of the second resistor R2 is connected to the same-polarity end of the first secondary coil. The second RC filter module includes a third resistor R3 and a second capacitor C2, where the same-polarity end of the second secondary coil is connected to one end of the second capacitor C2, the other end of the second capacitor C2 is connected to one end of the third resistor R3, and the other end of the third resistor R3 is connected to the opposite-polarity end of the second secondary coil.
[0026] Preferably, in order to prevent the signals of the first square-wave DC power source and the second square-wave DC power source from being too weak and unstable, the circuit in this embodiment further includes a first buffer gate and a second buffer gate, wherein the first buffer gate is connected in series with opposite polarity ends of the primary coil of the transformer, and the first square-wave DC power source is input to the opposite polarity ends of the primary coil of the transformer through the first buffer gate; the second buffer gate is connected in series with the same polarity ends of the primary coil of the transformer, and the second square-wave DC power source is input to the same polarity ends of the primary coil of the transformer through the second buffer gate, so as to perform initial in-phase stable amplification of the input signals.
[0027] Preferably, the circuit in this embodiment further includes a third capacitor C3, which is connected in series between the same polarity end of the primary coil of the transformer and the second buffer gate, or between the opposite polarity end of the primary coil and the first buffer gate, thereby absorbing part of the energy of voltage fluctuations and making the voltage input to the primary winding of the transformer more stable.
[0028] In particular, the first and second switching transistors MOS1 and MOS2 are NMOS transistors, and the third switching transistor is a PMOS transistor.
[0029] The operation process of the circuit provided by this embodiment will be described below.
[0030] In a specific implementation, the first and second square wave DC power sources alternately go high, and the high level ratio is determined according to the duty ratio. In some cases, the first and second square wave DC power sources are strictly in opposite phase to each other.
[0031] (1) The first square wave DC power supply is at a low level, and the second square wave DC power supply is at a high level. In this case, the current in the primary coil is 2->1. Due to the variation in the same polarity end of the secondary coil, the current direction in the secondary coil of the second circuit (the circuit formed by connecting the second secondary coil, the second switching transistor MOS2, the second clamping backflow prevention module, and the second RC filter module, designated by symbol 2) is the same as that of the primary coil. No effective potential is formed between the G and S electrodes of the clamping transistor of the second circuit, so the clamping transistor is turned off. An effective potential is formed between the G and S electrodes of the push-pull transistor, so the push-pull transistor is turned on. The second secondary coil of the second circuit is approximately a short-circuit path, and the RC filter module provides buffer protection by limiting the voltage and current when the push-pull transistor is turned on.
[0032] Due to the variation in the same polarity end of the secondary coil, the current direction of the secondary coil in the first circuit (the circuit formed by connecting the first secondary coil, the first switching transistor MOS1, the first clamping backflow prevention module and the first RC filter module, designated by symbol 1) is opposite to that of the primary coil, and no effective potential is formed across the G and S electrodes of the push-pull transistor in the first circuit, causing the push-pull transistor to turn off. An effective potential is formed across the G and S electrodes of the clamping transistor, causing the clamping transistor to turn on. At the same time, the clamping resistor forms current limiting protection, and the secondary coil, the RC filter module and the clamping backflow prevention module form an internal circulation circuit that does not interfere with the output.
[0033] In this case, the potential of the signal output terminal is equal to the potential of the power supply Vs.
[0034] (2) The first square wave DC power supply is at a high level, and the second square wave DC power supply is at a low level. In this case, the current in the primary coil is 1->2, and due to the variation of the same polarity end of the secondary coil, the current direction of the secondary coil in the first set of circuits is opposite to that of the primary coil, so that the G and S electrodes of the clamping transistor in the first set of circuits do not form an effective potential, the clamping transistor is turned off, and the G and S electrodes of the push-pull transistor form an effective potential, the push-pull transistor is turned on, the coil in the first set of circuits is almost equivalent to a short circuit path, and the RC filter module forms a buffer protection of voltage limiting and current limiting when the push-pull transistor is turned on.
[0035] Due to the variation of the same polarity end of the secondary coil, the current direction of the secondary coil of the second set of circuits is the same as that of the primary coil, and no effective potential is formed between the G electrode and S electrode of the push-pull transistor of the second set of circuits, so the push-pull transistor is turned off, and an effective potential is formed between the G electrode and S electrode of the clamping transistor, so the clamping transistor is turned on. At the same time, the clamping resistor forms current limiting protection, and the secondary coil, RC filter module and clamping backflow prevention module form an internal circulation circuit that does not interfere with the output.
[0036] In this case, the potential of the signal output terminal corresponds to ground or is zero potential.
[0037] FIG. 2 shows a schematic diagram of the control waveforms of the first switching transistor MOS1 and the second switching transistor MOS2 in the push-pull isolated inverter driving circuit provided by the embodiment of the present invention. As can be seen from FIG. 2, the control waveforms of the first switching transistor MOS1 and the second switching transistor MOS2 are generally in opposite phase. When the first switching transistor MOS1 is off and the second switching transistor MOS2 is on, the potential of the signal output terminal of the push-pull isolated inverter driving circuit is equal to the potential of the power supply Vs. When the first switching transistor MOS1 is on and the second switching transistor MOS2 is off, the potential of the signal output terminal of the push-pull isolated inverter driving circuit is equal to ground or zero potential. Therefore, two square-wave DC power sources with timing delay differences can generate a fixed-frequency AC signal with a relatively stable waveform. In the circuit provided by this embodiment, the modulation of the output potential and output power of the signal output terminal is determined by the change in the potential of the power supply Vs. As long as the frequencies of the two input signals (the first square wave DC power supply and the second square wave DC power supply) are stable, the frequency of the output AC signal will also be relatively stable, and will play the role of modulating the power at a fixed frequency.
[0038] It is understood by those skilled in the art that all or part of the processes for implementing the methods of the above embodiments can be completed by issuing instructions to relevant hardware through a computer program, and the program can be stored in a computer-readable storage medium, such as a magnetic disk, an optical disk, a read-only memory, or a random-access memory.
[0039] The above are merely preferred specific embodiments of the present invention, and the protection scope of the present invention is not limited thereto. Any changes or replacements that are easily thought of by those skilled in the art within the technical scope described in the present invention are all included in the protection scope of the present invention.
Claims
1. a transformer, a first switching transistor, a second switching transistor, a first clumping backflow prevention module, and a second clumping backflow prevention module; The first square wave DC power supply and the second square wave DC power supply are respectively input to the opposite polarity end and the same polarity end of the primary coil of the transformer, and the first square wave DC power supply and the second square wave DC power supply alternately become high level; The opposite polarity end of the first secondary coil of the transformer is connected to the input end of the first clamping backflow prevention module, the output end of the first clamping backflow prevention module is connected to the grid of the first switching transistor, and the same polarity end of the first secondary coil and the clamping end of the first clamping backflow prevention module are grounded together with the source of the first switching transistor; a first clamping end of the transformer connected to the input terminal of the second clamping backflow prevention module; an output terminal of the second clamping backflow prevention module connected to the grid of the second switching transistor; a drain of the second switching transistor connected to the power supply; a second secondary coil with a second polarity opposite to the first clamping backflow prevention module connected to the input terminal of the second clamping backflow prevention module; a source of the second switching transistor connected to the drain of the first switching transistor; and a drain of the first switching transistor serving as a signal output terminal of the circuit.
2. the first clamping backflow prevention module and the second clamping backflow prevention module have the same structure, and each includes a diode, a third switching transistor, and a first resistor; a grid of the third switching transistor connected to the anode of the diode, a source of the third switching transistor connected to the cathode of the diode, and a drain of the third switching transistor connected to one end of the first resistor; 2. The push-pull isolated inverter driving circuit of claim 1, wherein the other end of the first resistor is the clamping end of the first clamping backflow prevention module or the second clamping backflow prevention module, the grid of the third switching transistor is the input end of the first clamping backflow prevention module or the second clamping backflow prevention module, and the source of the third switching transistor is the output end of the first clamping backflow prevention module or the second clamping backflow prevention module.
3. the circuit further includes a first RC filter module and a second RC filter module; a first RC filter module is connected in parallel between the same polarity end and the opposite polarity end of the first secondary coil; 3. The push-pull isolated inverter driving circuit according to claim 2, wherein a second RC filter module is connected in parallel between the same polarity end and the opposite polarity end of the second secondary coil.
4. the first RC filter module includes a second resistor and a first capacitor; 4. The push-pull separated inverter drive circuit according to claim 3, wherein the opposite polarity end of the first secondary coil is connected to one end of the first capacitor, the other end of the first capacitor is connected to one end of the second resistor, and the other end of the second resistor is connected to the same polarity end of the first secondary coil.
5. the second RC filter module includes a third resistor and a second capacitor; 5. The push-pull separated inverter drive circuit according to claim 4, wherein the same polarity end of the second secondary coil is connected to one end of the second capacitor, the other end of the second capacitor is connected to one end of the third resistor, and the other end of the third resistor is connected to the opposite polarity end of the second secondary coil.
6. the circuit further includes a first buffer gate and a second buffer gate; The first buffer gate is connected in series with the opposite polarity end of the primary coil of the transformer, and the first square wave DC power supply is input to the opposite polarity end of the primary coil of the transformer through the first buffer gate; 2. The push-pull isolated inverter driving circuit according to claim 1, wherein the second buffer gate is connected in series with the same polarity end of the primary coil of the transformer, and the second square-wave DC power supply is input to the same polarity end of the primary coil of the transformer through the second buffer gate.
7. 7. The push-pull isolated inverter driving circuit according to claim 6, wherein the circuit further comprises a third capacitor, the third capacitor being connected in series between the same polarity end of the primary coil of the transformer and the second buffer gate, or the opposite polarity end of the primary coil and the first buffer gate.
8. 3. The push-pull isolated inverter driving circuit according to claim 2, wherein the first and second switching transistors are NMOS transistors, and the third switching transistor is a PMOS transistor.
9. 9. The push-pull isolated inverter driving circuit according to claim 1, wherein when the first square-wave DC power supply is at a low level and the second square-wave DC power supply is at a high level, the potential at the signal output terminal of the circuit is equal to the potential of the power supplies.
10. 10. The push-pull isolated inverter driving circuit of claim 9, wherein when the first square-wave DC power supply is at a high level and the second square-wave DC power supply is at a low level, the potential at the signal output terminal of the circuit is equal to ground or is at zero potential.
Citation Information
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