Analog Platform for Intravascular Imaging
The AFE system addresses the challenge of signal compatibility and quality in intravascular ultrasound by dynamically configuring stages within the AFE, ensuring compatibility with legacy devices and enhancing signal resolution.
Patent Information
- Application Number
- JP2025538347
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2022-12-30
- Filing Date
- 2023-12-28
- Publication Date
- 2025-12-25
AI Technical Summary
Existing intravascular ultrasound devices require preprocessing of ultrasound signals prior to digitization, but existing solutions lack compatibility with legacy and varying signal qualities, necessitating an adaptable analog topology for preprocessing.
An analog front-end (AFE) system with configurable stages for intravascular ultrasound signals, including high-pass and low-pass filters, gain stages, and voltage attenuators, allowing dynamic configuration based on the imaging catheter type without modifying the circuit or circuit board.
The AFE system provides backward compatibility with legacy devices and supports higher resolution and quality ultrasound signal acquisition, enabling flexible adaptation to different imaging catheters without redesigning the circuit.
Smart Images

Figure 2025542479000001_ABST
Abstract
Description
[Technical Field]
[0001] The present disclosure relates to medical devices and / or medical device systems, and more particularly to conditioning ultrasound signals for digital processing. [Background technology]
[0002] A wide variety of intravascular medical devices have been developed for medical applications, such as intravascular applications. Some of these devices include guidewires, catheters, and the like. A subset of these devices includes ultrasound transducers configured to generate ultrasound signals that can be used to reconstruct images of blood vessels. Preprocessing of these signals prior to digitization is currently required. However, due to the variety of devices configured for intravascular ultrasound and the varying signal qualities these devices support, there is a need to provide an analog topology for preprocessing intravascular ultrasound signals that supports legacy and improved devices. Summary of the Invention
[0003] For example, an analog platform may be implemented as an analog front end (AFE) in an ultrasound image acquisition system to acquire intravascular ultrasound signals and generate images from the signals. Notably, the present disclosure provides an AFE that can be used to acquire ultrasound signals from legacy ultrasound catheter devices, in addition to enabling acquisition of ultrasound signals with higher resolution and / or quality than legacy systems. In other words, the provided AFE has several substages, each of which has multiple paths through the substage. These paths can be dynamically configured during runtime based on the type of imaging catheter used with the AFE, or can be configured at the time of manufacture. However, it should be noted that configuring the paths at the time of manufacture does not require modification of the circuit or circuit board itself. Thus, an analog platform implemented in accordance with the present disclosure provides both backward compatibility and future adaptability.
[0004] In some embodiments, the present disclosure may be implemented as an analog front-end (AFE) for an in-vivo image acquisition device. The AFE may include a high-pass filter stage, a gain stage, and a low-pass filter stage. The high-pass filter stage may include a plurality of high-pass filters and at least one switch selectable to electrically couple one of the plurality of high-pass filters to an input. The gain stage may include a plurality of voltage attenuators, a plurality of amplifier circuits, and a plurality of jumper positions, one or more jumpers being placed in at least one but not all of the plurality of jumper positions to electrically couple one of the plurality of voltage attenuators to an output from the high-pass filter stage and to electrically couple an output from one of the plurality of voltage attenuators to one of the plurality of amplifier circuits. The low-pass filter stage may include a plurality of low-pass filters and at least one switch selectable to electrically couple one of the plurality of low-pass filters to an output from the gain stage.
[0005] In a further embodiment of the AFE, the plurality of high-pass filters may comprise a first high-pass filter and a second high-pass filter, the first high-pass filter being a high-pass filter between 0 and 12 megahertz, and the second high-pass filter being a high-pass filter between 15 and 30 megahertz.
[0006] In a further embodiment of the AFE, the at least one switch of the high-pass filter stage may comprise a first switch and a second switch, the first switch and the second switch configured to be dynamically controlled by a controller circuit and configured to electrically couple the input to the analog front end to a selected one of the first high-pass filter or the second high-pass filter, and configured to electrically couple the output from the selected one of the first high-pass filter or the second high-pass filter to the output of the high-pass filter stage.
[0007] In a further embodiment of the AFE, the first high-pass filter and the second high-pass filter are T-type high-pass filters including a pair of capacitors arranged in series and an inductor electrically coupled between the center of the pair of capacitors and ground.
[0008] In a further embodiment of the AFE, the plurality of voltage attenuators of the gain stage may comprise a first voltage attenuator and a second voltage attenuator, wherein the first voltage attenuator is a 12 dB voltage attenuator and the second voltage attenuator is a 28 dB voltage attenuator.
[0009] In a further embodiment of the AFE, the gain stage further comprises a digital-to-analog converter and at least one transimpedance amplifier, the transimpedance amplifier being electrically coupled to a control input of either the first voltage attenuator or the second voltage attenuator based on the one or more jumpers.
[0010] In a further embodiment of the AFE, the plurality of amplifier circuits comprises a first amplifier circuit and a second amplifier circuit, the first amplifier circuit comprising an inductor, an operational amplifier (op-amp), and a plurality of resistors configured to form the amplifier circuit, and the second amplifier circuit comprising an op-amp and a plurality of resistors configured to form the amplifier circuit.
[0011] In a further embodiment of the AFE, the plurality of voltage attenuators may comprise a first pair of voltage attenuators and a second pair of voltage attenuators, and one of the plurality of amplifier circuits is electrically coupled between the first of the first pair of voltage attenuators and the first of the second pair of voltage attenuators based on the one or more jumpers.
[0012] In a further embodiment of the AFE, the gain stage may comprise a first gain stage and a second gain stage, the second gain stage comprising a clipping operational amplifier (opamp). In a further embodiment of the AFE, the second gain stage further comprises a first amplifier circuit, a second amplifier circuit, and a plurality of pairs of jumper positions, a pair of jumpers being placed in one of the plurality of pairs of jumper positions to electrically couple an input to the second gain stage to a selected one of the first amplifier or the second amplifier, and to electrically couple the output of the selected one of the first amplifier or the second amplifier to the clipping operational amplifier.
[0013] In a further embodiment of the AFE, the plurality of low pass filters may comprise a first low pass filter and a second low pass filter, the first low pass filter being a low pass filter below 60 MHz and the second low pass filter being a low pass filter above 60 MHz.
[0014] In a further embodiment of the AFE, the AFE comprises at least one analog-to-digital converter (ADC) driver. In some embodiments, the present disclosure may be implemented as an in-vivo image acquisition device comprising an image acquisition circuit comprising the AFE described in the embodiments, and a digital processing circuit configured to receive digitized signals from the AFE and generate an image.
[0015] In a further embodiment, the in-vivo image acquisition device may comprise a motor drive unit (MDU) coupled to the image acquisition circuitry. In a further embodiment, the internal image acquisition device may comprise an intravascular ultrasound catheter coupled to the MDU.
[0016] In some embodiments, the present disclosure may be implemented as an in-vivo image acquisition device comprising an image acquisition circuit including an analog front end (AFE) and a digital processing circuit coupled to the AFE. The digital processing circuit is configured to receive a digitized signal from the AFE. The AFE may comprise a high-pass filter stage, a gain stage, and a low-pass filter stage. The high-pass filter stage may comprise a plurality of high-pass filters and at least one switch selectable to electrically couple one of the plurality of high-pass filters to an input. The gain stage may include a plurality of voltage attenuators, a plurality of amplifier circuits, and a plurality of jumper positions, one or more jumpers being placed in at least one but not all of the plurality of jumper positions to electrically couple one of the plurality of voltage attenuators to an output from the high-pass filter stage and an output from one of the plurality of voltage attenuators to one of the plurality of amplifier circuits. The low pass filter stage may comprise a plurality of low pass filters and at least one switch selectable to electrically couple one of the plurality of low pass filters to an output from the gain stage.
[0017] In a further embodiment of the in-vivo image acquisition device, the plurality of high-pass filters may comprise a first high-pass filter and a second high-pass filter, the first high-pass filter being a high-pass filter between 0 and 12 megahertz, and the second high-pass filter being a high-pass filter between 15 and 30 megahertz.
[0018] In a further embodiment of the in-vivo image acquisition device, the at least one switch of the high-pass filter stage comprises a first switch and a second switch, the first switch and the second switch being configured to be dynamically controlled by a control circuit and configured to electrically couple the input to the analog front end to a selected one of either the first high-pass filter or the second high-pass filter, and configured to electrically couple the output from the selected one of either the first high-pass filter or the second high-pass filter to the output of the high-pass filter stage.
[0019] In a further embodiment of the in vivo image acquisition device, the first high-pass filter and the second high-pass filter are T-type high-pass filters that may include a pair of capacitors arranged in series and an inductor electrically connected between the center of the pair of capacitors and ground.
[0020] In a further embodiment of the in vivo image acquisition device, the plurality of voltage attenuators of the gain stage may comprise a first voltage attenuator and a second voltage attenuator, wherein the first voltage attenuator is a 12 decibel voltage attenuator and the second voltage attenuator is a 28 decibel voltage attenuator.
[0021] In some embodiments, the present disclosure may be implemented as a system for intravascular image acquisition. The system may include an intravascular ultrasound (IVUS) catheter, a motor drive unit (MDU) coupleable to the IVUS catheter, the MDU configured to rotate the IVUS catheter during operation, and image acquisition circuitry coupleable to the MDU. The image acquisition circuitry is configured to receive a signal including an ultrasound indication from the IVUS catheter via the MDU during operation. The image acquisition circuitry may include an analog front end (AFE) configured to receive the signal including the ultrasound indication from the IVUS catheter, and a digital processing circuit coupled to the AFE, the digital processing circuit configured to receive a digitized signal from the AFE, the digitized signal being based in part on the signal including the ultrasound indication from the IVUS catheter. The AFE may include a high-pass filter stage, a gain stage, and a low-pass filter stage. The high-pass filter stage can include a plurality of high-pass filters and at least one switch selectable to electrically couple one of the plurality of high-pass filters to an input. The gain stage can include a plurality of voltage attenuators, a plurality of amplifier circuits, and a plurality of jumper positions, one or more jumpers being placed in at least one but not all of the plurality of jumper positions to electrically couple one of the plurality of voltage attenuators to an output from the high-pass filter stage and to electrically couple an output from one of the plurality of voltage attenuators to one of the plurality of amplifier circuits. The low-pass filter stage can include a plurality of low-pass filters and at least one switch selectable to electrically couple one of the plurality of low-pass filters to an output from the gain stage.
[0022] In a further embodiment of the system, the plurality of low pass filters may comprise a first low pass filter and a second low pass filter, the first low pass filter being a low pass filter below 60 megahertz and the second low pass filter being a low pass filter above 60 megahertz.
[0023] In a further embodiment of the system, the plurality of voltage attenuators may comprise a first pair of voltage attenuators and a second pair of voltage attenuators, and one of the amplifier circuits is electrically coupled between the first of the first pair of voltage attenuators and the first of the second pair of voltage attenuators based on the one or more jumpers. [Brief explanation of the drawings]
[0024] To easily identify the discussion of any particular element or act, the most significant digit or digits of a reference number refer to the figure number in which that element is first introduced. [Figure 1] 1 illustrates an embodiment of an intravascular imaging system. [Figure 2A] 2 illustrates one embodiment of a portion of the intravascular imaging system of FIG. 1 in more detail. [Figure 2B] 2 illustrates an embodiment of another portion of the intravascular imaging system of FIG. 1 in more detail. [Figure 3] 2 illustrates an embodiment of yet another portion of the intravascular imaging system of FIG. 1 in more detail. [Figure 4] 1 illustrates an embodiment of an analog front end (AFE). [Figure 5] 1 illustrates one embodiment of an input stage of an AFE. [Figure 6] 1 illustrates one embodiment of a high-pass filter stage of an AFE. [Figure 7A] 1 illustrates one embodiment of a portion of a gain stage of an AFE. [Figure 7B] 1 illustrates an embodiment of another portion of the gain stage of the AFE. [Figure 7C] 1 illustrates an embodiment of yet another portion of a gain stage of an AFE. [Figure 7D] 1 illustrates an embodiment of yet another portion of a gain stage of an AFE. [Figure 8A] 1 illustrates an embodiment of a portion of another gain stage of an AFE. [Figure 8B] 1 illustrates an embodiment of another portion of another gain stage of the AFE. [Figure 9] 1 illustrates one embodiment of a low-pass filter and analog-to-digital converter stage of an AFE. [Figure 10] 1 illustrates an embodiment of an AFE. DETAILED DESCRIPTION OF THE INVENTION
[0025] Numerous imaging modalities exist for assessing vascular lesions, such as magnetic resonance imaging (MRI), computed tomography (CT), intravascular ultrasound (IVUS), optical coherence tomography (OCT), optical coherence elastography (OCE), and spectroscopy, which can provide insight into how vascular lesions differ from healthy tissue. This disclosure relates to IVUS signal acquisition and image generation, and in particular to analog processing of acquired signals prior to digitization.
[0026] 1 illustrates an example of an IVUS imaging system 100. The IVUS imaging system 100 includes an image acquisition device 102, an IVUS catheter 104, a motor drive unit (MDU) 106, and an imaging subsystem 108. The image acquisition device 102 is coupled to the IVUS catheter 104 and 108 via the MDU 106. In particular, the image acquisition device 102 is coupled to the MDU 106 via an MDU bus 110, and the MDU 106 is coupled to the IVUS catheter 104 via a catheter bus 112. In some embodiments, the MDU bus 110 and the catheter bus 112 may be transmission lines (or other conductors) configured to transmit signals between various components. For example, the MDU bus 110 and the catheter bus 112 may be configured to transmit radio frequency signals (e.g., control signals, ultrasound pulse generating signals, ultrasound signals, etc.) between the illustrated components of the IVUS imaging system 100.
[0027] Generally, the image acquisition device 102 is configured to control the MDU 106 and to receive signals from the IVUS catheter 104 via the MDU 106. The image acquisition device 102 is further configured to process the received signals to generate an image and to communicate the image to the imaging subsystem 108. To that end, the image acquisition device 102 is coupled to the imaging subsystem 108 via an imaging subsystem bus 114, which may be a wired or wireless connection. As a particular example, the imaging subsystem bus 114 may be an Ethernet connection. In some examples, the imaging subsystem 108 may be a display, tablet computer, or other device configured to display images rendered by the image acquisition device 102. It should be noted that although the imaging subsystem 108 is depicted external to the image acquisition device 102, in some embodiments the imaging subsystem 108 may be incorporated within the same housing as the image acquisition device 102.
[0028] The image acquisition device 102 includes imaging processing circuitry 116, a computer subsystem 118, and other subsystems 120. As discussed above, the present disclosure provides an improved analog platform that may be implemented as part of the image acquisition device 102, and in particular as part of the imaging processing circuitry 116. However, before detailing the AFEs to which the present disclosure is directed, a general description of the components of the IVUS imaging system 100 and the image acquisition device 102 is provided. It should be further noted that the image acquisition device 102 may be configured to capture intrabody images. While IVUS images are frequently referenced herein, the circuitry of the present disclosure may be provided as part of the image acquisition device 102 that is coupled to other modalities of intrabody image capture.
[0029] 2A and 2B show side and perspective views of the IVUS catheter 104 of the IVUS imaging system 100 of Figure 1. The other subsystem 120 is configured to provide power to the MDU 106 and to transmit signals to the IVUS catheter 104, and in particular to one or more transducers 202 disposed within the IVUS catheter 104, thereby causing the IVUS catheter 104 to emit ultrasound signals.
[0030] Additionally, mechanical energy from the MDU 106 can be used to drive an imaging core 204 disposed within the IVUS catheter 104. The one or more transducers 202 are further configured to receive reflected signals (e.g., echo signals) in response to the emission of the ultrasound signals. These reflected signals are transmitted via the catheter bus 112, the MDU 106, and the MDU bus 110 to the image acquisition device 102 for processing by the imaging processing circuitry 116 and the computer subsystem 118.
[0031] In some embodiments, the other subsystems 120 may be configured to control at least one of the frequency or duration of electrical pulses transmitted from the image acquisition device 102 to the MDU 106, to control, for example, the speed of rotation of the imaging core 204 by the MDU 106 or the speed or length of pullback of the imaging core 204 by the MDU 106.
[0032] The IVUS catheter 104 includes an elongate member 206 and a hub 208. The elongate member 206 includes a proximal end 210 and a distal end 212. The proximal end 210 of the elongate member 206 may be coupled to the hub 208, and the distal end 212 of the elongate member 206 is configured and arranged for percutaneous insertion into a patient. Optionally, the IVUS catheter 104 may define at least one flush port, such as a flush port 214. The flush port 214 may be defined in the hub 208. The hub 208 may be configured and arranged to be coupled to the MDU 106 of the IVUS imaging system 100.
[0033] In some embodiments, the elongate member 206 and the hub 208 are formed as a unitary structure. In other embodiments, the elongate member 206 and the catheter hub 208 are formed separately and then assembled.
[0034] 2B is a perspective view of one embodiment of the distal end 212 of the elongate member 206 of the IVUS catheter 104. The elongate member 206 includes a sheath 216 having a longitudinal axis (e.g., a central longitudinal axis extending axially through the center of the sheath 216 and / or IVUS catheter 104) and a lumen 222. An imaging core 224 is disposed within the lumen 218. The imaging core 204 includes an imaging device 220 coupled to the distal end of a drive shaft 222 that is rotatable either manually or by using a computer-controlled drive mechanism (e.g., the MDU 106). One or more transducers 202 may be mounted to the imaging device 220 and employed to transmit and receive acoustic signals. The sheath 216 may be formed from any flexible, biocompatible material suitable for insertion into a patient. Examples of suitable materials include, for example, polyethylene, polyurethane, plastic, spiral-cut stainless steel, nitinol hypotubing, or the like, or combinations thereof.
[0035] In some embodiments, an array of transducers 202 is mounted on the imaging device 220, as shown in these figures, for example. Alternatively, a single transducer may be used. Any suitable number of transducers 202 may be used. For example, there may be 2, 3, 4, 5, 6, 7, 8, 9, 10, 12, 15, 16, 20, 25, 50, 100, 500, 1000, or more transducers. As will be appreciated, other numbers of transducers may also be used. When multiple transducers 202 are employed, the transducers 202 may be arranged in any suitable arrangement, including, for example, a circular arrangement, a rectangular arrangement, etc.
[0036] The one or more transducers 202 may be formed from a material capable of converting an applied electrical pulse into a pressure strain on the surface of the one or more transducers 230, and vice versa. Examples of suitable materials include piezoelectric ceramic materials, piezoelectric composites, piezoelectric plastics, barium titanate, lead zirconate titanate, lead metaniobate, polyvinylidene fluoride, etc. Other transducer technologies include composite materials, single crystal composites, and semiconductor devices (e.g., capacitive micromachined ultrasonic transducers (cMUTs), piezoelectric micromachined ultrasonic transducers (pMUTs), etc.).
[0037] The pressure distortion on the surface of the one or more transducers 202 forms acoustic pulses at a frequency based on the resonant frequency of the one or more transducers 202. The resonant frequency of the one or more transducers 202 can be affected by the size, shape, and material used to form the one or more transducers 202. The one or more transducers 202 can be formed in any shape suitable for positioning within the IVUS catheter 104 and for propagating acoustic pulses of a desired frequency in one or more selected directions. For example, the transducers may be disk-shaped, block-shaped, rectangular-shaped, elliptical-shaped, etc. The one or more transducers may be formed into the desired shape by any process including, for example, dicing, die-and-fill, machining, micromachining, etc.
[0038] As an example, each of the one or more transducers 202 may include a layer of piezoelectric material sandwiched between a matching layer and a conductive backing formed from an acoustically absorbing material (e.g., an epoxy matrix with tungsten particles). During operation, the piezoelectric layer may be electrically excited to cause the emission of an acoustic pulse.
[0039] The one or more transducers 202 can be used to form radial cross-sectional images of the surrounding space. Thus, for example, when the one or more transducers 202 are disposed within the IVUS catheter 104 and inserted into a patient's blood vessel, the one or more transducers 202 will be used to capture acoustic signals that are processed by the image acquisition device 102, and in particular, by the AFE described herein.
[0040] The imaging core 204 is rotated about the longitudinal axis of the IVUS catheter 104. As the imaging core 204 rotates, the one or more transducers 202 emit acoustic signals in different radial directions (e.g., along different radial scan lines). For example, the one or more transducers 202 may emit acoustic signals in regular (or irregular) increments, such as 256 radial scan lines per rotation. It should be understood that other numbers of radial scan lines may alternatively be emitted per rotation.
[0041] When an emitted acoustic pulse with sufficient energy reaches one or more medium boundaries, such as one or more tissue boundaries, a portion of the emitted acoustic pulse is reflected back to the emitting transducer as an echo pulse. Each echo pulse that reaches a transducer with sufficient energy to be detected is converted into an electrical signal at the receiving transducer. The one or more converted electrical signals are transmitted to the imaging processing circuitry 116 of the image acquisition device 102, where they are processed and digitized. The digitized signals can be communicated to the computer subsystem 118 and used to form an image of the blood vessel, which can be displayed on the imaging subsystem 108. In some cases, the rotation of the imaging core 204 is driven by the MDU 106, which itself is controlled by other subsystems 120.
[0042] As the one or more transducers 202 rotate about the longitudinal axis of the IVUS catheter 104 emitting the acoustic pulses, multiple images will be formed that collectively form a radial cross-sectional image (e.g., a tomographic image) of a portion of the area surrounding the one or more transducers 202, such as the wall of the vessel of interest and the tissue surrounding the vessel. The imaging core 204 may also move longitudinally along the vessel into which the IVUS catheter 104 is inserted so as to form multiple cross-sectional images along the longitudinal length of the vessel. During the imaging procedure, the one or more transducers 202 can be pulled back (e.g., retracted) along the longitudinal length of the IVUS catheter 104. The IVUS catheter 104 can include at least one telescoping section that can be retracted during retraction of the one or more transducers 202. In some embodiments, the MDU 106 drives the retraction of the imaging core 204 within the IVUS catheter 104. The retraction distance of the MDU 106 of the imaging core 204 may be any suitable distance, for example, at least 5 cm, 10 cm, 15 cm, 20 cm, 25 cm, or more. The entire IVUS catheter 104 may be retracted during the imaging procedure, regardless of whether the imaging core 204 moves longitudinally independently of the IVUS catheter 104.
[0043] The quality of images generated at different depths from one or more transducers 202 may be affected by one or more factors including, for example, bandwidth, transducer focus, beam pattern, and frequency of the acoustic pulses. The frequency of the acoustic pulses output from one or more transducers 202 may also affect the penetration depth of the acoustic pulses output from one or more transducers 202. Generally, as the frequency of the acoustic pulses decreases, the penetration depth of the acoustic pulses within patient tissue increases. In some examples, the intravascular treatment IVUS imaging system 100 operates within a frequency range of 5 MHz to 200 MHz.
[0044] One or more conductors 224 may electrically couple the transducer 202 to the catheter bus 112. In this manner, electrical signals captured by the transducer 202 may be received by the imaging processing circuitry 116 of the image acquisition device 102.
[0045] Figure 3 illustrates one embodiment of the imaging processing circuitry 116 of the IVUS imaging system 100 of Figure 1. As can be seen, the imaging processing circuitry 116 includes both an analog subsystem 302 and a digital subsystem 304. The analog subsystem 302 further includes at least an analog front end (AFE) 306. The analog front end (AFE) 306 is coupled to the MDU 106 and receives signals from the IVUS catheter 104.
[0046] FIG. 4 illustrates one embodiment of the AFE 306. As illustrated, the AFE 306 includes several stages or blocks. In particular, the AFE 306 includes an input stage 500, a high-pass filter 600, a first gain stage 700, a second gain stage 800, and a low-pass filter and ADC driver 900. It is important to note that an advantage of the present disclosure, described in more detail below, is that each stage or block of the AFE 306 includes multiple paths to accommodate imaging devices of various bandwidths (e.g., legacy IVUS devices, next-generation IVUS devices, etc.). These paths can either be dynamically controlled or can be configured at the time of manufacture. It is noteworthy, however, that the AFE 306 does not need to be redesigned and new circuit boards do not need to be manufactured to support changes in the imaging devices that the AFE 306 supports.
[0047] 5 shows a circuit diagram of one embodiment of an input stage 500 of the AFE 306. In some embodiments, the AFE 306 may include one or more signal paths for obtaining a return signal from the IVUS catheter 104 (e.g., a return signal captured by the transducer 202 and transmitted to the MDU 106). For example, the input stage 500 may include a first connector 502, a second connector 504, or both the first connector 502 and the second connector 504. In some embodiments, the first connector 502 may be a Lemo connector configured to couple to an RF signal line (e.g., the MDU bus 110). In some embodiments, the second connector 504 may be a Sub-Miniature Version A (SMA) connector configured to couple to an RF signal line (e.g., the MDU bus 110). If more than one connector (e.g., first connector 502 and second connector 504) is provided in input stage 500, input stage 500 may include a switch 506 for toggling between first connector 502 and second connector 504. Note that in some embodiments, input stage 500 may include multiple connectors, which provides test engineers with the flexibility to test AFE 306 without using custom cable assemblies or fixtures, but instead utilizing commercially available cables (e.g., SMA connectors).
[0048] Input stage 500 further includes a transient voltage suppression diode, such as a TVS diode 508. In some embodiments, TVS diode 508 may be a low capacitance TVS diode and may be included in input stage 500 to mitigate the risk of electrostatic discharge.
[0049] FIG. 6 shows a circuit diagram of one embodiment of a high-pass filter 600 of the AFE 306. The high-pass filter 600 includes a number of switches 602 that may be controlled, for example, by other subsystems 120 of the image acquisition device 102. The switches 602 may be used to select between high-pass filter 604 and high-pass filter 606 of the high-pass filter 600. The high-pass filter 600 includes two high-pass filters with different characteristics. As shown, the high-pass filter 604 is a 5 megahertz (MHz) filter and includes two 620 picofarad (pF) capacitors 608a and 608b and an 820 nanohenry (nH) inductor 610. Conversely, the high-pass filter 606 is a 20 MHz filter and includes two 160 pF capacitors 612a and 612b and an 820 nH inductor 614.
[0050] In some embodiments, high pass filter 604 may be a high pass filter between 0 MHz (a short circuit that passes the signal without filtering) and 12 MHz, and high pass filter 606 may be a high pass filter between 15 MHz and 30 MHz.
[0051] As described above, the high-pass filter 600 stage of the AFE 306 includes multiple “paths” (e.g., a first path through high-pass filter 604, a second path through high-pass filter 606, etc.) that are selected by multiple switches 602. As further noted, the multiple switches 602 may be coupled to and / or controlled by other subsystems 120 (e.g., FPGAs of the other subsystems 120), and the multiple switches 602 may be dynamically adjusted to change which path is selected based on the type of imaging device (e.g., IVUS catheter 104) coupled to the MDU 106. As an example, if the IVUS catheter 104 is a legacy (or lower bandwidth) IVUS catheter, the multiple switches 602 may be configured (e.g., by the other subsystems 120) to select high-pass filter 604, while if the IVUS catheter 104 is a next-generation (or higher bandwidth) IVUS catheter, the multiple switches 602 may be configured (e.g., by the other subsystems 120) to select high-pass filter 606.
[0052] 7A, 7B, 7C, and 7D illustrate an embodiment of a portion of a first gain stage 700 of the AFE 306. Before describing these figures in more detail, a high-level overview of the first gain stage 700 is provided. Generally, the signal from the high-pass filter 600 passes through one of two attenuators (e.g., FIG. 7A). The voltage-controlled attenuator is implemented by another subsystem 120, where the signal is fed to a transimpedance amplifier (e.g., FIG. 7B). From the attenuator stage, the signal passes through one of two high-speed operational amplifiers (e.g., FIG. 7C) and then through one of two radio frequency (RF) attenuators (e.g., FIG. 7D). Note that the RF attenuator shown in FIG. 7D is controlled similarly to the attenuator shown in FIGS. 7A and 7B.
[0053] Referring more specifically to FIG. 7A, circuit 702 is shown, illustrating a pair of voltage attenuators (e.g., voltage attenuator 704 and voltage attenuator control 706). The portion of first gain stage 700 shown here receives an RF signal from high-pass filter 600 at input 708. This signal is routed through either voltage attenuator 704 or voltage attenuator control 706. Which voltage attenuator the signal is routed through can be configured during manufacturing by soldering a jumper (e.g., a 0 ohm (Ω) resistor). Either a jumper is soldered across path resistors 710a, 710b, and 710c to select voltage attenuator 704, or a jumper is soldered across path resistors 712a and 712b to select voltage attenuator control 706. The signal is then communicated (e.g., at terminal 714) to the operational amplifier of first gain stage 700, shown in FIG. 7C. It should be noted that the term "path resistor" is used interchangeably herein with jumper and jumper position. That is, the term jumper position is intended to mean the location of a path resistor (e.g., path resistor 710a, etc.) as outlined herein, and jumper is intended to mean the location where an electrical conductor (e.g., a 0 Ω resistor, a conductive wire, etc.) is placed at the jumper position. It will be understood herein that not all of the path resistor positions described herein are placed, but are provided to facilitate flexibility in selecting which sub-circuits are "active," or which circuits are coupled to the inputs and outputs of each stage and which are not.
[0054] FIG. 7B shows a schematic diagram of one embodiment of a control circuit for voltage attenuators 704 and 706 of first gain stage 700. As shown, the control sides of voltage attenuators 704 and 706 are coupled to terminal 716, with either path resistor 710b or path resistor 712b placed in the circuit shown in FIG. 7A to complete the circuit to one of voltage attenuators 704 or 706. A control signal may be generated from another subsystem 120 (e.g., an FPGA in the other subsystem 120) and sent to terminal 716 via a circuit such as the circuit shown in FIG. 7B. FIG. 7B shows circuit 718 receiving as an input a digital control signal (e.g., a 12-bit dual data rate (DDR) control signal) from another subsystem 120 at DAC input 720. The digital signal received at DAC input 720 is then provided to conditioning circuit 724 and conditioning circuit 726 via a digital-to-analog converter. The output from conditioning circuit 724 and conditioning circuit 726 is sent to terminal 716. Conditioning circuit 724 and conditioning circuit 726 each include an operational amplifier and a resistor-capacitor (RC) circuit that act as a transimpedance amplifier.
[0055] FIG. 7C shows one embodiment of a pair of high-speed operational amplifiers, shown as circuit 728. Circuit 728 is configured to receive an input from the output of voltage attenuator 704 or 706 shown in circuit 702 of FIG. 7A. Circuit 728 has an input as terminal 714 and has multiple paths through one of several amplifier circuits (e.g., operational amplifier circuit 730 or operational amplifier circuit 732). The amplifier circuit through which the RF signal from terminal 714 is routed can be configured during manufacturing by placing a jumper (e.g., a 0 Ω resistor) across either path resistor 734 or path resistor 736. The output from the configured amplifier stage (e.g., operational amplifier circuit 730, operational amplifier circuit 732, etc.) is available at terminal 738 and is provided to circuit 740 of FIG. 7D.
[0056] Figure 7D shows circuit 740, another voltage attenuator circuit similar to circuit 702 of Figure 7A. Circuit 740 includes voltage attenuators 742 and 744, which may be selected based on the placement of jumpers (e.g., across path resistors 746a, 746b, and 746c, or across path resistors 748a and 748b) as described above in connection with circuit 702. Additionally, although not shown here, circuit 740 may be controlled in the same manner and using the same type of circuitry (e.g., circuit 718) as shown in Figure 7B.
[0057] Second gain stage 800 may be electrically coupled to the output of first gain stage 700. Second gain stage 800 typically includes a pair of amplifier circuits (e.g., FIG. 8A ) and a clipper amplifier stage (e.g., FIG. 8B ), which may be completed during manufacturing. For example, as shown in FIG. 8A , circuit 802 includes amplifier circuit 804 and amplifier circuit 806, which correspond to alternative electrical paths through circuit 802. The paths are configured during manufacturing by installing jumpers (e.g., 0Ω resistors) across path resistors 808 a and 808 b or across path resistors 810 a and 810 b. Amplifier circuits 804 and 806 each include operational amplifiers configured to amplify the RF signal by different amounts. Circuit 802 has an output at terminal 812, which is the input to circuit 814.
[0058] FIG. 8B shows one embodiment of a clipper circuit 814 that receives input from circuit 802 at terminal 812 and includes an operational amplifier arranged in a clipper configuration. 9 shows a circuit diagram of a circuit 902 of a low-pass filter and ADC driver 900 of the AFE 306 according to some embodiments. The low-pass filter and ADC driver 900 includes a switch 904 that can be controlled, for example, by other subsystems 120 of the image acquisition device 102. The switch circuit 902 can be used to select between a low-pass filter 906 and a low-pass filter 908 of the low-pass filter and ADC driver 900. The low-pass filter and ADC driver 900 includes two low-pass filters with different characteristics. As shown, the low-pass filter 906 is a 45 megahertz (MHz) filter, and the low-pass filter 908 is an 88 MHz filter.
[0059] Similar to the high-pass filter 600 stage of the AFE 306, the low-pass filter and ADC driver 900 includes multiple “paths” (e.g., a first path through low-pass filter 906, a second path through low-pass filter 908, etc.) that are selected by a switch 904. As noted, the switch 904 may also be coupled to and / or controlled by other subsystems 120 (e.g., an FPGA of the other subsystems 120), and the switch 904 may be dynamically adjusted to change which path is selected based on the type of imaging device (e.g., the IVUS catheter 104) coupled to the MDU 106. As an example, if the IVUS catheter 104 is a legacy (or lower bandwidth) IVUS catheter, the switch 904 may be configured (e.g., by the other subsystems 120) to select the low-pass filter 906, while if the IVUS catheter 104 is a next-generation (or higher bandwidth) IVUS catheter, the switch 904 may be configured (e.g., by the other subsystems 120) to select the low-pass filter 908.
[0060] From the output of either low pass filter 906 or low pass filter 908, circuit 902 includes multiple analog-to-digital converter (ADC) drivers that can be selected at manufacturing time by placing a jumper (e.g., a 0 Ω resistor) into path resistor 910 or path resistor 912, thereby completing the circuit path through either ADC driver 914 or ADC driver 916.
[0061] In some embodiments, the sampling frequency of ADC driver 914 and / or ADC driver 916 may be 400 megasamples per second (MSPS), which may be 4.5 times the maximum frequency of the sampled signal. Oversampling in such a manner would therefore eliminate the need for the use of an anti-aliasing filter. Some embodiments may provide a dynamically selectable anti-aliasing filter.
[0062] Note that the selection of which ADC driver to use may be based on the bandwidth of the sampled signal (e.g., legacy, next generation, etc.). For example, both ADC driver 914 and ADC driver 916 may be capable of processing RF signals, but each has unique advantages over the other. For example, ADC driver 914 may provide faster overdrive recovery (e.g., 1 nanosecond, etc.), thereby enabling the system to better handle saturated signals (e.g., when plaque is detected). As another example, ADC driver 916 should provide lower distortion and lower noise compared to ADC driver 914, and therefore present a clearer image.
[0063] 10 shows a circuit diagram of an AFE 1000 that can be implemented as AFE 306. As shown, AFE 1000 includes multiple substages or blocks. AFE 1000 includes an input stage 1002, a high-pass filter 1004, a gain stage 1006, a gain stage 1008, a gain stage control section 1010, a low-pass filter 1012, and an ADC 1014. In some embodiments, gain stage 1006 and gain stage 1008 may be combined into a single gain stage. In some embodiments, input stage 1002 may be similar to input stage 500 shown in FIG. 5, high-pass filter 1004 may be similar to high-pass filter 600 shown in FIG. 6, gain stage 1006 and gain stage control 1010 may be similar to first gain stage 700 shown in FIGS. 7A, 7B, 7C, and 7D, gain stage 1008 may be similar to second gain stage 800 shown in FIGS. 8A and 8B, and low-pass filter 1012 and ADC 1014 may be similar to low-pass filter and ADC driver 900 shown in FIG. 9.
[0064] Terms used in this specification should be given their ordinary meaning in the relevant art or as indicated by their use in context, except that if a clear definition is provided, that meaning will control.
[0065] References herein to "one embodiment" or "an embodiment" do not necessarily refer to the same embodiment, but may. Throughout this specification and claims, words such as "comprise," "comprising," and the like, should be construed in an inclusive sense, i.e., "including, but not limited to," as opposed to an exclusive or exhaustive sense, unless the context clearly dictates otherwise. Words using the singular or plural also include the plural or singular, respectively, unless expressly limited to one or more. Furthermore, the words "herein," "above," "below," and words of similar import, when used in this application, refer to this application as a whole, not to any part of it. When a claim uses the word "or" in connection with a list of two or more items, the word includes all of the following interpretations of that word, unless expressly limited to one or the other: That is, the word "or" includes any of the items in the list, all of the items in the list, and any combination of the items in the list. Any terms not expressly defined herein have their conventional meanings as commonly understood by those of ordinary skill in the art.
Claims
1. a high-pass filter stage comprising a plurality of high-pass filters and at least one switch selectable to electrically couple one of the plurality of high-pass filters to the input; a gain stage comprising: a plurality of voltage attenuators; a plurality of amplifier circuits; the gain stage including a plurality of jumper positions, one or more jumpers being placed in at least one but not all of the plurality of jumper positions to electrically couple one of the plurality of voltage attenuators to an output from the high pass filter stage and to electrically couple an output from one of the plurality of voltage attenuators to one of the plurality of amplifier circuits; An analog front end (AFE) for an in-vivo image acquisition device, comprising: a low-pass filter stage comprising a plurality of low-pass filters and at least one switch selectable to electrically couple one of the plurality of low-pass filters to an output from the gain stage.
2. 2. The AFE of claim 1, wherein the plurality of high-pass filters comprises a first high-pass filter and a second high-pass filter, the first high-pass filter being a high-pass filter between 0 and 12 megahertz, and the second high-pass filter being a high-pass filter between 15 and 30 megahertz.
3. 3. The AFE of claim 2, wherein the at least one switch of the high-pass filter stage comprises a first switch and a second switch, the first switch and the second switch configured to be dynamically controlled by a controller circuit and configured to electrically couple the input to the analog front end to a selected one of the first high-pass filter or the second high-pass filter, and configured to electrically couple the output from the selected one of the first high-pass filter or the second high-pass filter to the output of the high-pass filter stage.
4. 4. The AFE of claim 2 or 3, wherein the first high-pass filter and the second high-pass filter are T-type high-pass filters including a pair of capacitors arranged in series and an inductor electrically coupled between the centers of the pair of capacitors and ground.
5. 5. The AFE of claim 1, wherein the plurality of voltage attenuators of the gain stage comprises a first voltage attenuator and a second voltage attenuator, the first voltage attenuator being a 12 decibel voltage attenuator and the second voltage attenuator being a 28 decibel voltage attenuator.
6. 6. The AFE of claim 5, wherein the gain stage further comprises a digital-to-analog converter and at least one transimpedance amplifier, the transimpedance amplifier being electrically coupled to a control input of either the first voltage attenuator or the second voltage attenuator based on the one or more jumpers.
7. 6. The AFE of claim 5, wherein the plurality of amplifier circuits comprises a first amplifier circuit and a second amplifier circuit, the first amplifier circuit comprising an inductor, an operational amplifier (op-amp), and a plurality of resistors configured to form an amplifier circuit, and the second amplifier circuit comprising an op-amp and a plurality of resistors configured to form an amplifier circuit.
8. 8. The AFE of claim 1, wherein the plurality of voltage attenuators comprises a first pair of voltage attenuators and a second pair of voltage attenuators, and one of the plurality of amplifier circuits is electrically coupled between the first of the first pair of voltage attenuators and the first of the second pair of voltage attenuators based on the one or more jumpers.
9. The AFE of any one of claims 1 to 8, wherein the gain stage comprises a first gain stage and a second gain stage, the second gain stage comprising a clipping operational amplifier (op-amp).
10. 10. The AFE of claim 9, wherein the second gain stage further comprises a first amplifier circuit, a second amplifier circuit, and a plurality of pairs of jumper positions, a pair of jumpers being placed in one of the plurality of pairs of jumper positions to electrically couple an input to the second gain stage to a selected one of the first amplifier or the second amplifier, and to electrically couple the output of the selected one of the first amplifier or the second amplifier to the clipping operational amplifier.
11. The AFE according to any one of claims 1 to 10, wherein the plurality of low-pass filters include a first low-pass filter and a second low-pass filter, the first low-pass filter being a low-pass filter of 60 megahertz or less, and the second low-pass filter being a low-pass filter of more than 60 megahertz.
12. The AFE of any one of claims 1 to 10, comprising at least one analog-to-digital converter (ADC) driver.
13. 13. An in-vivo image acquisition device comprising: an image acquisition circuit comprising the AFE of any one of claims 1 to 12; and a digital processing circuit configured to receive digitized signals from the AFE and to generate an image.
14. The in-vivo image acquisition device of claim 13 , comprising a motor drive unit (MDU) coupled to the image acquisition circuitry.
15. The intrabody image acquisition device of claim 13 , comprising an intravascular ultrasound catheter coupled to the MDU.
Citation Information
Patent Citations
Digital input section for ultrasonic apparatus
JP1990143185A
Ultrasonic diagnostic apparatus
JP2001161682A
Preamplifier and protection circuit for ultrasound catheter
JP2002540881A
Digital time-variable gain circuit for non-destructive test equipment
JP2009511903A
Method and device of processing of sensor signals
US20180231413A1