Semiconductor device and method of manufacturing the same
By etching the Al electrode with a combination of solutions to remove oxide films and deposit a Zn film, the method addresses the adhesion issue between the Al electrode and plating film, improving the reliability of semiconductor devices by preventing peeling.
Patent Information
- Application Number
- JP2024098657
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-06-19
- Publication Date
- 2026-01-07
AI Technical Summary
The adhesion between the Al electrode and the plating film is reduced due to the presence of locally thick Al oxide films, leading to peeling of the plating film during wire bonding, which affects the reliability of semiconductor devices.
A method involving etching the Al electrode with a combination of an etching solution and a zincate solution to remove the oxide film, ensuring a clean surface for electroless plating, and depositing a Zn film to enhance adhesion, with a controlled etching amount of 0.3 μm to 0.6 μm to prevent spike formation.
Improves the adhesion between the Al electrode and the plating film, reducing peeling and enhancing the reliability of semiconductor devices by ensuring uniform deposition of the plating film.
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Figure 2026001384000001_ABST
Abstract
Description
[Technical Field]
[0001] The present disclosure relates to a semiconductor device and a method for manufacturing the same. [Background technology]
[0002] Patent Document 1 below describes the removal of an Al oxide film on the surface of an Al electrode by acid etching before an electroless Ni / Au plating process using a zincate method. Patent Documents 2 and 3 below describe etching conditions for roughening the surface of an Al-containing substrate to provide excellent bonding strength with resin. Patent Document 4 below describes etching conditions for forming multiple recesses on the surface of an electroless plated layer. Patent Documents 5 and 6 below describe a technique for protecting the surface of a semiconductor wafer that is not to be electroless plated with tape. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2008-85368 [Patent Document 2] International Publication No. 2019 / 107529 [Patent Document 3] Japanese Patent Application Publication No. 2019-099864 [Patent Document 4] International Publication No. 2018 / 150971 [Patent Document 5] Japanese Patent Application Laid-Open No. 2011-222898 [Patent Document 6] Japanese Patent Application Laid-Open No. 2016-152317 Summary of the Invention [Problem to be solved by the invention]
[0004] In the above Patent Document 1, the zincate treatment proceeds with an Al oxide film remaining locally on the surface of the Al electrode, which reduces the adhesion between the Al electrode and the plating film, and there is a risk that the plating film will peel off from the surface of the Al electrode when wire bonding is performed on the surface of the Al electrode via the plating film.
[0005] An object of the present disclosure is to provide a semiconductor device and a method for manufacturing the semiconductor device that can improve reliability. [Means for solving the problem]
[0006] Also, a method for manufacturing a semiconductor device according to one aspect of the present disclosure is as follows: a first step of forming a metal electrode on a first main surface of a semiconductor substrate is performed; a second step of forming an insulating film on the first main surface of the semiconductor substrate to cover the metal electrode is performed; a third step of forming an opening that penetrates the insulating film in the depth direction and exposes a first portion of the metal electrode is performed; a pretreatment step of removing an oxide film on the surface of the first portion is performed after the pretreatment step; a plating step of forming a plating film on the surface of the first portion by electroless plating is performed; in the pretreatment step, the first portion is etched by a predetermined etching amount to make the thickness of the first portion thinner than the thickness of a second portion of the metal electrode that is covered with the insulating film, and the oxide film together with the surface layer of the first portion is removed to the maximum thickness within the range of thickness variation of the oxide film.
[0007] A semiconductor device according to one aspect of the present disclosure is as follows: A metal electrode is provided on a first main surface of a semiconductor substrate. An insulating film is provided on the outermost surface of the first main surface of the semiconductor substrate. The insulating film covers the metal electrode. A first portion of the metal electrode is exposed at an opening that penetrates the insulating film in the depth direction. A plating film is provided on the surface of the first portion. The first portion of the metal electrode is recessed more toward the second main surface of the semiconductor substrate than a second portion covered by the insulating film. The difference obtained by subtracting the thickness of the first portion from the thickness of the second portion is 0.3 μm or more and 0.6 μm or less. [Effects of the Invention]
[0008] The semiconductor device and the method for manufacturing the semiconductor device according to the present disclosure have the effect of improving the reliability of the semiconductor device. [Brief explanation of the drawings]
[0009] [Figure 1A] 1 is a plan view (part 1) showing a layout example of a semiconductor device according to an embodiment when viewed from the front surface side of a semiconductor substrate. FIG. [Figure 1B] 1 is a plan view (part 2) showing a layout example of the semiconductor device according to the embodiment as viewed from the front surface side of the semiconductor substrate; FIG. [Figure 2] FIG. 2 is a cross-sectional view showing the cross-sectional structure taken along the line AA′ in FIGS. 1A and 1B. [Figure 3] 1 is a flowchart showing an outline of a method for manufacturing a semiconductor device according to an embodiment; [Figure 4] 4 is a flowchart showing an outline of the process of step S11 in FIG. 3. [Figure 5] 1 is a graph illustrating the amount of etching of an Al electrode by pretreatment in an electroless plating process according to an example. [Figure 6] 10 is a graph illustrating the amount of etching of an Al electrode by pretreatment in an electroless plating process according to a comparative example. [Figure 7] 1 is a graph showing the results of an experiment on the relationship between the pretreatment conditions of the electroless plating process and the total etching amount of the Al electrode. DETAILED DESCRIPTION OF THE INVENTION
[0010] <Summary of Embodiments of the Present Disclosure> (1) A method for manufacturing a semiconductor device according to one aspect of the present disclosure is as follows: a first step of forming a metal electrode on a first main surface of a semiconductor substrate is performed; a second step of forming an insulating film on the first main surface of the semiconductor substrate to cover the metal electrode is performed; a third step of forming an opening that penetrates the insulating film in the depth direction and exposes a first portion of the metal electrode is performed; a pretreatment step of removing an oxide film on the surface of the first portion is performed after the pretreatment step; a plating step of forming a plating film on the surface of the first portion by electroless plating is performed; in the pretreatment step, the first portion is etched by a predetermined etching amount to make the thickness of the first portion thinner than the thickness of a second portion of the metal electrode covered with the insulating film, and the oxide film together with the surface layer of the first portion is removed to the maximum thickness within the range of thickness variation of the oxide film.
[0011] According to the above disclosure, a clean surface can be exposed over the entire surface of the first portion of the metal electrode, and a highly adhesive plating film can be formed over the entire surface of the first portion of the metal electrode, which can suppress peeling of the plating film due to remaining Al oxide film on the surface of the metal electrode, thereby improving the reliability of the semiconductor device.
[0012] (2) In the method for manufacturing a semiconductor device according to the present disclosure, in the above-described (1), the pretreatment step includes a fourth step of etching the oxide film with an etching solution, and a fifth step of etching the oxide film with a zincate solution and precipitating a metal having a lower ionization tendency than the metal in the metal electrode on the surface of the first portion after the fourth step. The predetermined etching amount may be the sum of the etching amount of the first portion by the etching solution and the etching amount of the first portion by the zincate solution.
[0013] According to the above disclosure, etching a metal electrode with a zincate solution suppresses the occurrence of spikes on the surface of the metal electrode, thereby suppressing peeling of the plating film caused by spikes at the interface between the metal electrode and the plating film, thereby further improving the reliability of the semiconductor device.
[0014] (3) In the method for manufacturing a semiconductor device according to the present disclosure, in the above-mentioned (2), an etching amount of the first portion by the etching solution may be equal to or greater than an etching amount of the first portion by the zincate solution.
[0015] According to the above disclosure, it is possible to provide a margin for the conditions of the zincate solution in the fifth step, and it is possible to suppress the occurrence of spikes on the surface of the Al electrode due to excessively performing the fifth step.
[0016] (4) In the method for manufacturing a semiconductor device according to the present disclosure, in any one of (1) to (3) above, the predetermined etching amount may be 0.3 μm or more and 0.6 μm or less.
[0017] According to the above disclosure, desired adhesion between the metal electrode and the plating film can be obtained, and defects in the appearance of the surface of the plating film can be suppressed.
[0018] (5) In the method for manufacturing a semiconductor device according to the present disclosure, in the above-mentioned (4), the predetermined etching amount may be 0.4 μm or more.
[0019] According to the above disclosure, the adhesion between the metal electrode and the plating film can be further improved.
[0020] (6) In the method for manufacturing a semiconductor device according to the present disclosure, in the above-mentioned (5), the predetermined etching amount may be 0.45 μm or more.
[0021] According to the above disclosure, the adhesion between the metal electrode and the plating film can be further improved.
[0022] (7) Furthermore, in the method for manufacturing a semiconductor device according to the present disclosure, in any one of (1) to (6) above, in the first step, an aluminum film or an aluminum alloy film may be formed as the metal electrode, and in the plating step, a nickel plating film may be formed as the plating film, contacting at least the first portion.
[0023] According to the above disclosure, the heat dissipation properties of the semiconductor substrate (semiconductor chip) can be improved.
[0024] (8) A semiconductor device according to one aspect of the present disclosure is as follows: A metal electrode is provided on a first main surface of a semiconductor substrate. An insulating film is provided on the outermost surface of the first main surface of the semiconductor substrate. The insulating film covers the metal electrode. A first portion of the metal electrode is exposed at an opening that penetrates the insulating film in the depth direction. A plating film is provided on the surface of the first portion. The first portion of the metal electrode is recessed more toward the second main surface of the semiconductor substrate than a second portion covered by the insulating film. The difference obtained by subtracting the thickness of the first portion from the thickness of the second portion is 0.3 μm or more and 0.6 μm or less.
[0025] According to the above disclosure, desired adhesion between the metal electrode and the plating film can be obtained, and defects in the appearance of the surface of the plating film can be suppressed.
[0026] (9) In the semiconductor device according to the present disclosure, in the above-mentioned (8), the difference may be 0.4 μm or more.
[0027] According to the above disclosure, the adhesion between the metal electrode and the plating film can be further improved.
[0028] (10) In the semiconductor device according to the present disclosure, in the above-mentioned (9), the difference may be 0.45 μm or more.
[0029] According to the above disclosure, the adhesion between the metal electrode and the plating film can be further improved.
[0030] (11) Furthermore, in the semiconductor device according to this disclosure, in any one of (8) to (10) above, the metal electrode may be an aluminum film or an aluminum alloy film, and the plating film may have a nickel plating film in contact with at least the first portion.
[0031] According to the above disclosure, the heat dissipation properties of the semiconductor substrate (semiconductor chip) can be improved.
[0032] <Findings underlying this disclosure> Generally, when forming a nickel (Ni) plating film on the surface of an electrode containing aluminum (Al) (hereinafter referred to as Al electrode) by electroless plating, a zincate treatment is performed on the surface of the Al electrode as a pretreatment for the electroless plating. In the zincate treatment, the Al oxide film on the surface of the Al electrode is dissolved by a zincate solution, and a substitution reaction occurs between the Al in the Al electrode and the zinc (Zn) in the zincate solution, depositing a Zn film on the surface of the Al electrode that has a stronger adhesion to Ni than to Al. The formation of a Zn film on the surface of the Al electrode suppresses surface oxidation of the Al electrode and improves adhesion between the Al electrode and the Ni plating film.
[0033] However, with typical electroless plating processes and pretreatment processes, there is a risk that the plating film will peel off from the surface of the Al electrode when wire bonding is performed via the plating film on the surface of the Al electrode in the subsequent assembly process (semiconductor chip mounting process). Electroless plating processes and pretreatment processes are continuous processes using automated plating equipment, and are performed, for example, in a series (line) and under the same conditions (batch processing) on all semiconductor wafers passing through the line during a given period. This raises concerns about the reliability of all semiconductor chips (semiconductor chips from the same lot) manufactured during the same period as the semiconductor chip with the peeled plating film.
[0034] One of the reasons why the plating film peels off from the surface of the Al electrode is that the Al oxide film on the surface of the Al electrode is locally thick, and under the generally recommended conditions for zincate treatment, the Al oxide film on the surface of the Al electrode cannot be completely removed, and the zincate treatment is performed with the Al oxide film remaining locally on the surface of the Al electrode, which reduces the adhesion between the Al electrode and the Ni plating film.The Al oxide film on the surface of the Al electrode is a laminated film consisting of a thermal oxide film formed by thermal oxidation of the surface of the Al electrode due to the temperature distribution in the manufacturing process, and a natural oxide film that naturally forms on the surface of the Al electrode during transportation of the semiconductor wafer or during the manufacturing process at room temperature.
[0035] In areas where the Al oxide film on the surface of the Al electrode has been removed, a clean surface of the Al electrode is exposed, allowing the zincate treatment to proceed normally, resulting in the deposition of a Zn film on the surface of the Al electrode. Therefore, during the electroless plating process, the Zn in the Zn film is replaced by Ni in the plating solution, resulting in the deposition of a Ni plating film on the surface of the Al electrode. On the other hand, in areas where the Al oxide film remains locally on the surface of the Al electrode, the zincate solution does not come into contact with the surface of the Al electrode, so the substitution reaction between Al and Zn does not occur. In areas where the Al oxide film remains locally on the surface of the Al electrode, no Zn film is formed, so Ni in the plating solution does not precipitate, and instead the Al electrode is dissolved by the plating solution.
[0036] Where the Al electrode has dissolved, thin, deep grooves called spikes appear on the surface of the Al electrode. These spikes are either filled with a plating film that has poor adhesion to the Al electrode due to an autocatalytic reaction of Ni in the plating solution, or they form voids between the Al electrode and the plating film. When the sides of multiple closely spaced spikes connect with each other, the adhesion between the Al electrode and the plating film decreases at the connection points, and the plating film peels off from the surface of the Al electrode due to tensile stress from the bonding wire. Power devices that handle high voltages and large currents in particular often use semiconductor chips that have improved heat dissipation properties by forming a plating film on the surface of the Al electrode, which requires good adhesion of the plating film.
[0037] Among the pretreatments for electroless Ni plating (steps S21 to S24 in FIG. 4 described later), the present inventors focused on the treatments in steps S22 and S24 (etching the surface of the Al electrode and zincating the surface of the Al electrode), which have the effect of dissolving an oxide film. As a result of a preliminary experiment (see FIG. 7) described later, they found that by setting the total etching amount of the Al electrode by the etching solution in the etching treatment in step S22 and the etching amount by the zincate solution in the zincating treatment in step S24 to 0.3 μm or more, the entire plated surface of the Al electrode is covered with a Zn film, improving adhesion between the Al electrode and the plated film. The present disclosure is based on this finding.
[0038] A problem to be solved in this embodiment is to improve the reliability of a semiconductor device (semiconductor chip) by improving the adhesion between an Al electrode and a plating film.
[0039] Hereinafter, preferred embodiments of a semiconductor device and a method for manufacturing a semiconductor device according to the present disclosure will be described in detail with reference to the accompanying drawings. In the following description of the embodiments and the accompanying drawings, like components are designated by like reference numerals, and duplicated descriptions will be omitted.
[0040] (Details of the embodiment) A semiconductor device according to an embodiment that solves the above-mentioned problems will be described below. FIGS. 1A and 1B are plan views showing an example layout of a semiconductor device according to an embodiment, viewed from the front surface side of a semiconductor substrate. FIG. 2 is a cross-sectional view taken along line A-A' in FIGS. 1A and 1B. FIGS. 1A and 1B show an example layout of a front surface electrode 2 when the semiconductor device 10 is a MOSFET. In FIGS. 1A and 1B, the passivation film 3 is indicated by dotted hatching, the plating film 7 is indicated by oblique hatching, the front surface electrode 2 is indicated by a thick solid line, and the peripheries of openings 3a and 3b in the passivation film 3 (side surfaces of the passivation film 3) are indicated by dashed lines.
[0041] 1A and 2, a semiconductor device 10 according to an embodiment includes a front surface electrode (hereinafter referred to as a front surface electrode (metal electrode)) 2 on the front surface of a semiconductor substrate (semiconductor chip) 1 in an active region 11, and a surface of a portion (first portion) 2b of the front surface electrode 2 is covered with a plating film 7, thereby improving the heat dissipation of the semiconductor substrate 1. The semiconductor substrate 1 may be made of silicon (Si) or silicon carbide (SiC). The active region 11 is a region through which a main current flows when the semiconductor device 10 is turned on. The active region 11 has, for example, a substantially rectangular planar shape and is located approximately in the center of the semiconductor substrate 1 (chip center).
[0042] Between the active region 11 and the edge (chip edge) of the semiconductor substrate 1 is an edge termination region 12 that surrounds the periphery of the active region 11. The edge termination region 12 has the function of alleviating the electric field on the front surface side of the semiconductor substrate 1 to maintain a breakdown voltage. A typical breakdown voltage structure (not shown), such as a field limiting ring (FLR), a junction termination extension (JTE), or a guard ring, is disposed in the edge termination region 12. The breakdown voltage is the maximum voltage at which the semiconductor device 10 does not malfunction or break down.
[0043] A predetermined front surface element structure (not shown) is provided on the front surface side of the semiconductor substrate 1 in the active region 11. The front surface element structure is, for example, an insulated gate structure when the semiconductor device 10 is a MOSFET (Metal Oxide Semiconductor Field Effect Transistor: a MOS type field effect transistor with an insulated gate made of a three-layer structure of metal-oxide film-semiconductor) or an IGBT (Insulated Gate Bipolar Transistor), or an anode region when the semiconductor device 10 is a diode.
[0044] For example, an IGBT, which is a type of power semiconductor device, has the high-speed switching characteristics and voltage drive suppression of a MOSFET and the low on-voltage characteristics of a BJT (bipolar transistor). Known IGBT structures include punch-through (PT), non-punch-through (NPT), and field-stop (FS), and NPT and FS IGBTs can be fabricated (manufactured) using inexpensive semiconductor substrates (hereinafter referred to as FZ substrates) using the floating zone method, for example.
[0045] When the semiconductor substrate 1 is a semiconductor substrate itself, such as an FZ substrate, a front surface element structure and a back surface element structure (described later) are formed inside the semiconductor substrate 1. When the semiconductor substrate 1 is an epitaxial substrate formed by stacking multiple epitaxial layers on a starting substrate (semiconductor substrate), the starting substrate forms the back surface element structure, and the front surface element structure is formed inside the epitaxial layers. By using the semiconductor substrate itself as the semiconductor substrate 1, the thickness of the semiconductor substrate 1 (the product thickness used as the semiconductor device 10) can be made significantly thinner than when an epitaxial substrate is used, and the heat dissipation properties of the semiconductor substrate 1 can be improved.
[0046] The front surface electrode 2 is provided on the front surface of the semiconductor substrate 1 in the active region 11 and is electrically connected to the front surface element structure. The front surface electrode 2 is, for example, an aluminum (Al) film or an Al alloy film such as an aluminum silicon (Al-Si) film. The front surface electrode 2 has substantially the same planar shape as the active region 11 and covers substantially the entire surface of the active region 11 (FIG. 1A). Two front surface electrodes 2 having substantially rectangular planar shapes may be arranged apart from each other so as to cover substantially the entire surface of the active region 11 (FIG. 1B). In this case, a portion 13 between adjacent front surface electrodes 2 may be, for example, a region that does not function as part of the semiconductor device 10.
[0047] The front surface electrode 2 is, for example, a source electrode of a MOSFET, an emitter electrode of an IGBT, or an anode electrode of a diode. The front surface electrode 2 has unevenness (e.g., unevenness due to an interlayer insulating film and its contact holes) according to the front surface element structure. A portion 2b of the front surface electrode 2 exposed to an opening 3a of a passivation film 3 (described later, referred to as a pad portion) functions as an electrode pad. The surface of the front surface electrode 2 is recessed toward the back surface electrode 4 (the back surface side of the semiconductor substrate 1) at the pad portion 2b, as a result of etching during the processing of step S11 (described later, see FIG. 3 ) and the portion 2a (second portion) covered by the passivation film 3.
[0048] That is, the thickness t2 of the pad portion 2b of the front-surface electrode 2 is thinner than the thickness t1 of the portion 2a of the front-surface electrode 2 covered with the passivation film 3. Specifically, the difference Δt (=t1-t2) obtained by subtracting the thickness t2 of the pad portion 2b of the front-surface electrode 2 from the thickness t1 of the portion 2a of the front-surface electrode 2 covered with the passivation film 3 is, for example, about 0.3 μm or more, preferably about 0.4 μm or more, and more preferably about 0.45 μm or more and 0.6 μm or less. The difference Δt can be detected by observing a cross section of the semiconductor device 10 using, for example, a focused ion beam (FIB) device.
[0049] If the difference Δt obtained by subtracting the thickness t2 of the pad portion 2b of the front surface electrode 2 from the thickness t1 of the portion 2a of the front surface electrode 2 covered with the passivation film 3 is less than the above-mentioned lower limit, it is difficult to obtain the desired adhesion between the front surface electrode 2 and the plating film 7. The larger the difference Δt, the higher the desired adhesion between the front surface electrode 2 and the plating film 7. However, if the difference Δt exceeds the above-mentioned upper limit, poor appearance of the surface of the plating film 7 is likely to occur, as described below. By keeping the difference Δt within the above-mentioned range, the desired adhesion between the front surface electrode 2 and the plating film 7 can be obtained and surface roughness of the plating film 7 can be suppressed to an extent that allows automatic recognition of the semiconductor chip.
[0050] The thickness t2 of the pad portion 2b of the front surface electrode 2 remains at least to a degree that allows it to maintain its function as an electrode pad. It is also preferable that the thickness t2 of the pad portion 2b of the front surface electrode 2 remains at a degree that allows it to maintain the heat dissipation properties of the semiconductor substrate 1. The thickness t1 of the portion 2a of the front surface electrode 2 that is covered with the passivation film 3 remains the same as the thickness at the time of deposition of the front surface electrode 2 (a process included in the process of step S1 described below; see FIG. 3), and is, for example, about 5 μm. The portion 2a of the front surface electrode 2 that is covered with the passivation film 3 may extend to the edge termination region 12 or the portion 13 between adjacent front surface electrodes 2 (FIGS. 1A and 1B).
[0051] The passivation film 3 is a protective film (insulating film) made of an organic insulating material such as polyimide, and is provided as the uppermost layer on the front surface of the semiconductor substrate 1, covering almost the entire front surface of the semiconductor substrate 1. A pad portion 2b of the front surface electrode 2 is exposed through an opening 3a in the passivation film 3. If the semiconductor device 10 is a MOSFET or IGBT, a gate pad 8 and a gate runner (not shown) are provided on the front surface of the semiconductor substrate 1 via an insulating layer (an interlayer insulating film or a stacked film of a field oxide film and an interlayer insulating film: not shown). For example, the gate pad 8 is exposed through the opening 3b in the passivation film 3 (FIGS. 1A and 1B).
[0052] The sidewalls of the openings 3a and 3b in the passivation film 3 (the side surfaces of the passivation film 3) may be perpendicular to the front surface of the semiconductor substrate 1, or may be inclined at a predetermined angle relative to the front surface of the semiconductor substrate 1 so that the widths of the openings 3a and 3b increase with increasing distance from the semiconductor substrate 1. A plating film 7 is provided on the entire surface of the front electrode 2 (the surface of the pad portion 2b of the front electrode 2) in the opening 3a of the passivation film 3. The plating film 7 is formed by laminating a nickel (Ni) plating film 5 and a gold (Au) plating film 6 in this order. The surface of the plating film 7 may be uneven in accordance with the unevenness of the surface of the front electrode 2.
[0053] A predetermined back surface element structure is provided on the back surface side of the semiconductor substrate 1. The back surface element structure is, for example, a drain region of a MOSFET, a collector region of an IGBT, or a cathode region of a diode. A front surface electrode (hereinafter referred to as back surface electrode) 4 is provided on the entire back surface of the semiconductor substrate 1. The back surface electrode 4 is electrically connected to the back surface element structure. The outermost surface of the back surface electrode 4 (the surface bonded to the circuit pattern of the circuit board in the assembly process) is preferably formed of a gold (Au) film. The back surface electrode 4 is, for example, a drain electrode of a MOSFET, a collector electrode of an IGBT, or a cathode electrode of a diode.
[0054] A method for manufacturing a semiconductor device according to an embodiment will now be described. Fig. 3 is a flowchart showing an outline of a method for manufacturing a semiconductor device according to an embodiment. Fig. 4 is a flowchart showing an outline of the process of step S11 in Fig. 3. First, a structure on the front surface side of the semiconductor substrate 1 is formed in each chip region (region that will become the semiconductor substrate 1) on the front surface (first main surface) side of the semiconductor wafer (step S1: 1st to 3rd processes).
[0055] The structure on the front surface side of the semiconductor substrate 1 includes a front surface element structure (not shown), a front surface electrode 2, an insulating layer (not shown), and a passivation film 3 (if the semiconductor device 10 is a MOSFET or an IGBT, it also includes a gate pad 8; see FIGS. 1A, 1B, and 2). The chip region is the region that is cut from the semiconductor wafer and separated into individual chips. Openings 3a and 3b may be formed in the passivation film 3 in the process of step S1.
[0056] An opening exposing a scribe area (dicing line) may be formed in the passivation film 3. The scribe area is the area between adjacent chip areas and surrounds the periphery of the chip area. The area between the outermost chip area of the semiconductor wafer and the edge of the semiconductor wafer (wafer edge) is an ineffective area that is not used as a semiconductor chip, and for example, if the outer periphery of the semiconductor wafer is ribbed as described below, this rib area (outer periphery) is located there.
[0057] Next, the semiconductor wafer is ground (back grinding) from the back surface (second main surface) side to thin it down to the product thickness used as the semiconductor device 10 (step S2). In the processing of step S2, the semiconductor wafer may be thinned uniformly across the entire surface to the product thickness to form a flat plate, or the semiconductor wafer may be thinned down to the product thickness only at the center and have a rib shape at the outer periphery (wafer outer periphery) that is left thicker than the center by a predetermined width.
[0058] When the diameter of a semiconductor wafer exceeds 6 inches, the formation of the metal film (front surface electrode 2, plating film 7, back surface electrode 4) and the thermal history that the semiconductor wafer is subjected to become more pronounced. The strength of the semiconductor wafer can be increased by the thick rib portion (periphery) that remains along the periphery of the semiconductor wafer. The method of increasing the strength of the semiconductor wafer by forming a rib shape on the periphery of the semiconductor wafer is often used, especially when the diameter of the semiconductor wafer is 8 inches or more.
[0059] Next, the back surface of the semiconductor wafer is etched (back surface etching) to remove irregularities that have occurred on the back surface of the semiconductor wafer due to back surface grinding in step S2 (step S3). Next, impurities of a predetermined conductivity type are ion-implanted into the back surface of the semiconductor wafer to form a back surface element structure on the back surface side of the semiconductor wafer (step S4). Next, heat treatment is performed to electrically activate the impurities ion-implanted in step S4 (step S5).
[0060] Next, the hardened layer formed on the back surface of the semiconductor wafer in the processes of steps S4 and S5 is removed (step S6). If the semiconductor wafer is an epitaxial substrate, the starting substrate has a back surface device structure, and the processes of steps S2 to S6 described above are omitted. Next, a back surface electrode 4 is formed on the entire back surface of the semiconductor wafer by a general method such as vapor deposition or sputtering (step S7).
[0061] Next, plating film 7 is formed by processing from step S8 to step S13, which will be described later. Specifically, at any time before the processing of step S8, openings 3a exposing pad portions 2b of front-surface electrodes 2 are formed in passivation film 3. Organic residues on the surface of the portions (pad portions 2b) of front-surface electrodes 2 exposed in openings 3a of passivation film 3 are removed by ashing (ashing process) (step S8).
[0062] Next, protective tape is applied to the surface of the semiconductor wafer on which the plating film 7 is not to be formed. For example, after applying protective tape to the back surface of the semiconductor wafer to cover the back surface electrode 4 with the protective tape (step S9), protective tape is applied to the outer periphery of the semiconductor wafer to cover the side surface of the semiconductor wafer with the protective tape (step S10). Then, the semiconductor wafer is inserted into a heat treatment furnace and heated to improve adhesion between the back surface and side surface of the semiconductor wafer and the protective tape.
[0063] For example, in the case of a semiconductor wafer with a ribbed outer periphery, if the outer periphery of the semiconductor wafer is exposed during electroless plating, plating film 7 is likely to be deposited on the side surfaces of the semiconductor wafer. Since the plating film deposited on the side surfaces of the semiconductor wafer can become a source of foreign matter in subsequent processes, it is advisable to perform the process of step S10. Methods for attaching protective tape to the back and side surfaces of the semiconductor wafer include, for example, the methods described in Patent Documents 5 and 6.
[0064] Next, a plating film 7 is formed on the pad portion 2b of the front surface electrode 2 (step S11). As shown in Fig. 4, the process of step S11 involves performing four pretreatment processes (pretreatments for electroless plating) in this order: cleaning (step S21), etching (step S22: fourth process), pickling (step S23), and zincating (step S24: fifth process), followed by electroless plating (plating processes) in steps S25 and S26.
[0065] The processes from step S21 to step S26 are continuous processes using a general automatic plating device, and are performed in a series (line) under the same conditions on all semiconductor wafers in multiple wafer cassettes passing through the line. A water rinsing process (not shown) is included between each process from step S21 to step S26. The processes from step S21 to step S26 may be performed continuously with a water rinsing process in between, and an automatic plating device need not be used.
[0066] The processes of steps S21 to S24 are processes for making the surface of the pad portion 2b of the front-surface electrode 2 clean enough for electroless plating. Specifically, the cleaning process (degreasing process) of step S21 cleans the surface of the pad portion 2b of the front-surface electrode 2 with a surfactant, and makes the surface of the pad portion 2b wettable to the etching solution of the process of step S22. The cleaning process of step S21 is performed, for example, at a temperature of about 50°C for about 5 minutes.
[0067] The etching process in step S22 uses an etching solution to dissolve (etch) the Al oxide film on the surface of the pad portion 2b of the front-surface electrode 2, and also adheres the metal in the etching solution to the surface of the pad portion 2b to prevent excessive elution of the pad portion 2b. The acid pickling in step S23 dissolves the metal adhering to the surface of the pad portion 2b of the front-surface electrode 2, and also forms a thin, uniformly thick Al oxide film on the surface of the pad portion 2b.
[0068] The zincate treatment in step S24 dissolves (etches) the Al oxide film on the surface of the pad portion 2b of the front electrode 2 using a zincate solution, and deposits a Zn film on the surface of the pad portion 2b through a substitution reaction between the Al in the pad portion 2b and the zinc (Zn) in the zincate solution. Covering the surface of the pad portion 2b with a Zn film suppresses surface oxidation of the pad portion 2b and improves the adhesion of the Ni plating film 5 to be formed later on the surface of the pad portion 2b.
[0069] The Al oxide film on the surface of the pad portion 2b is a laminated film consisting of a thermal oxide film formed by thermal oxidation of the surface of the pad portion 2b due to the temperature distribution from the formation of the front surface electrode 2 until the processing of step S24, and a natural oxide film formed naturally on the surface of the pad portion 2b during transportation of the semiconductor wafer or during the manufacturing process at room temperature. The portion 2a of the front surface electrode 2 covered with the passivation film 3 is neither oxidized nor etched, and maintains the thickness t1 of the front surface electrode 2 at the time of deposition.
[0070] In the processes of steps S22 and S24, the pad portion 2b is also etched together with the Al oxide film. Therefore, the thickness t2 of the pad portion 2b becomes thinner than the thickness t1 of the portion 2a of the front-surface electrode 2 covered with the passivation film 3. The total etching amount Dt of the pad portion 2b is the sum of the amount of etching of the pad portion 2b by the etching solution in the process of step S22 and the amount of etching of the pad portion 2b by the zincate solution in the process of step S24.
[0071] The total etching amount Dt of the pad portion 2b by the processing of steps S22 and S24 is appropriately set so that the Al oxide film formed on the surface of the pad portion 2b with normal thickness variations is completely removed before or during the substitution reaction between Al and Zn in the zincate treatment of step S24. The total etching amount Dt of the pad portion 2b is obtained in advance.
[0072] Specifically, in the processes of steps S22 and S24, the Al oxide film on the surface of the pad portion 2b is etched and removed to the maximum thickness within the range of normal thickness variation of the Al oxide film, which has been previously obtained, for each surface layer of the pad portion 2b. That is, regardless of the actual thickness of the Al oxide film on the surface of the pad portion 2b, the total etching amount Dt of the pad portion 2b is set so that the Al oxide film on the surface of the pad portion 2b is removed to the maximum thickness that can be imagined for the Al oxide film.
[0073] The normal thickness variation of the Al oxide film on the surface of the pad portion 2b refers to the thickness variation that occurs in the Al oxide film formed on the surface of the pad portion 2b during normal manufacturing processes and semiconductor wafer transportation performed after the formation of the front electrode 2 and before the processing of step S24, and does not include abnormal values or outliers. The normal thickness variation of the Al oxide film can also occur, for example, when the Al oxide film is formed to fill in unevenness that occurs on the surface of the front electrode 2.
[0074] More specifically, the total etching amount Dt of the pad portion 2b by the processes in steps S22 and S24 is approximately 0.3 μm or more, preferably approximately 0.4 μm or more, and more preferably approximately 0.45 μm to 0.6 μm. That is, the total etching amount Dt of the pad portion 2b corresponds to the difference Δt obtained by subtracting the thickness t2 of the pad portion 2b of the front-surface electrode 2 from the thickness t1 of the portion 2a of the front-surface electrode 2 covered with the passivation film 3.
[0075] In the processes of steps S22 and S24, by setting the total etching amount Dt of the pad portion 2b within the above range, the Al oxide film formed on the surface of the pad portion 2b with normal thickness variations is completely removed along with the surface layer of the pad portion 2b. As a result, a clean surface is exposed on the entire surface of the pad portion 2b, and the entire exposed surface (clean surface) of the pad portion 2b is properly zincated, and a Zn film is deposited.
[0076] The total etching amount Dt of the pad portion 2b by the processes of steps S22 and S24 may be adjusted, for example, by the etching amount of the pad portion 2b by the etching solution of the etching process of step S22. The zincate treatment conditions of step S24 may be, for example, existing conditions (for example, generally recommended conditions for zincate treatment) that have been confirmed to perform the zincate treatment normally.
[0077] The reason is that even a slight change in the zincate treatment conditions in step S24 is likely to cause certain problems. For example, if the zincate treatment conditions in step S24 are made stricter, the amount of etching of the pad portion 2b can be increased, but this may result in a shortened life of the zincate solution, poor appearance of the surface of the plating film 7 due to surface roughness of the pad portion 2b, and excessive occurrence of spikes (long, thin grooves in the depth direction) on the surface of the pad portion 2b.
[0078] Defects in the appearance of the surface of the plating film include, for example, irregularities (surface roughness) that occur on the surface of the plating film 7 due to the irregularities on the surface of the pad portion 2b. If the irregularities on the surface of the plating film 7 cause excessive diffuse reflection of light, there is a risk that the semiconductor chip (semiconductor substrate 1) cannot be image-recognized in the semiconductor manufacturing equipment. If an excessive number of spikes occur on the surface of the pad portion 2b, the side surfaces of multiple spikes will be connected to each other, and the adhesion between the pad portion 2b and the plating film 7 will be reduced at the spike connection points.
[0079] Making the zincate treatment conditions in step S24 stricter means, for example, performing the zincate treatment excessively by increasing the alkaline concentration or temperature of the zincate solution, lengthening the zincate treatment time, etc. On the other hand, if the zincate treatment conditions are relaxed (by lowering the alkaline concentration or temperature of the zincate solution, or shortening the zincate treatment time), the etching amount of the pad portion 2b decreases, and the effect of the zincate treatment is suppressed.
[0080] Relaxing the zincate treatment conditions in step S24 can suppress the occurrence of spikes on the surface of the pad portion 2b, but the zincate treatment is performed with an Al oxide film remaining locally on the surface of the pad portion 2b. In the zincate treatment in step S24, it is not appropriate to make the alkaline concentration of the zincate solution extremely low or to shorten the zincate treatment time extremely short compared to the recommended conditions for general zincate treatment.
[0081] For example, the inventors of the present invention performed an experiment in which the zincate treatment in step S24 was performed under generally recommended conditions, and the etching amount of the pad portion 2b was about 0.2 μm. Therefore, the inventors of the present invention set the etching amount of the pad portion 2b by the zincate treatment in step S24 to about 0.2 μm, and performed electroless plating processes in steps S25 and S26 (described later) on two samples in which the etching amount of the pad portion 2b by the etching treatment in step S22 was different.
[0082] For these two samples (hereinafter referred to as the Example and Comparative Example), the etching amounts of the pad portion 2b by the etching solution (etching treatment in step S22) and the zincate solution (zincate treatment in step S24) used in the pretreatment of the electroless plating process are shown in Figures 5 and 6. Figures 5 and 6 are graphs illustrating the etching amounts of the Al electrode (pad portion 2b of the front electrode 2) by the pretreatment of the electroless plating process for the Example and Comparative Example, respectively.
[0083] The example corresponds to the sample under plating pretreatment condition 5 of the study example described below (see Figure 7), and the etching amount of the pad portion 2b by the etching process in step S22 is approximately 0.29 μm (Figure 5).The etching amount of the pad portion 2b by the etching process in step S22 is increased compared to the comparative example, and the total etching amount Dt of the pad portion 2b by the processes in steps S22 and S24 is approximately 0.49 μm, within the above-mentioned range.
[0084] The comparative example corresponds to the sample under plating pretreatment condition 2 of the study example described later (see FIG. 7), and the etching treatment in step S22 was performed under generally recommended conditions, resulting in an etching amount of about 0.08 μm in the pad portion 2b (FIG. 6). In the comparative example, the total etching amount Dt of the pad portion 2b by the treatments in steps S22 and S24 was about 0.28 μm, which is outside the above-mentioned range.
[0085] As will be described later, peeling of the plating film 7 occurred in the comparative example, but peeling of the plating film 7 did not occur in the example. In this way, the adhesion between the pad portion 2b and the plating film 7 can be improved by increasing only the etching amount of the pad portion 2b by the etching process in step S22 so that the total etching amount Dt of the pad portion 2b by the processes in steps S22 and S24 falls within the above range.
[0086] The etching amount of the pad portion 2b by the etching treatment in step S22 may be equal to or greater than the etching amount of the pad portion 2b by the zincate treatment in step S24. As the etching amount of the pad portion 2b by the etching treatment in step S22 increases, the etching amount of the pad portion 2b by the zincate treatment in step S24 can be reduced, and a margin can be provided for the conditions of the zincate solution for the zincate treatment.
[0087] The etching amount of the pad portion 2b by the etching process in step S22 can be adjusted by increasing the concentration or temperature of the etching solution, or by lengthening the etching process time. For example, by changing one of the existing etching process conditions in step S22 (for example, lengthening only the etching process time), it becomes easier to estimate the etching amount after the change in conditions from the tendency of the etching amount of the pad portion 2b under the existing conditions.
[0088] As described above, a Zn film can be deposited on the entire surface of the pad portion 2b by pre-treatment for electroless plating. The surface of this pad portion 2b is then subjected to electroless Ni plating (step S25). In the electroless Ni plating in step S25, the Zn film is brought into contact with a plating solution containing Ni, a metal more noble than Zn, and an autocatalytic reaction of the Ni substituted for Zn causes a Ni plating film 5 to be deposited on the surface of the pad portion 2b.
[0089] Next, under typical conditions, electroless Au plating is performed on the surface of the Ni plating film 5 (step S26). In the electroless Au plating in step S26, Ni in the Ni plating film 5 dissolves, and an Au plating film 6 is deposited on the surface of the Ni plating film 5 (the outermost surface of the pad portion 2b). The Au plating film 6 prevents surface oxidation of the Ni plating film 5 and imparts solder wettability to the surface of the Ni plating film 5.
[0090] By the electroless plating process of steps S25 and S26 described above, a plating film 7 is formed on the surface of the pad portion 2b, in which a Ni plating film 5 and an Au plating film 6 are deposited in this order. The thickness of the Au plating film 6 is so thin that it cannot be confirmed using, for example, an FIB device. For this reason, the plating film 7, which is the combination of the Ni plating film 5 and the Au plating film 6, is sometimes collectively referred to as a Ni / Au plating film.
[0091] Next, the protective tape is peeled off from the side surface of the semiconductor substrate 1 using an existing tape peeling method (step S12). Next, the protective tape is peeled off from the back surface of the semiconductor substrate 1 using an existing tape peeling method (step S13). Then, after an electrical test is performed in the semiconductor wafer state, the semiconductor wafer is diced (cut) along the scribe areas to separate the chip areas (step S14), thereby completing the semiconductor device 10 (semiconductor chip).
[0092] During the subsequent assembly process (semiconductor chip mounting process), bonding wires are bonded to pads 2b of semiconductor device 10 via plating film 7.
[0093] As described above, according to the embodiment, the etching amount of the Al electrode (electrode containing Al) in the pretreatment for electroless plating is preset, and the Al oxide film on the surface of the Al electrode is completely etched within the range of normal thickness variation on the surface of the Al electrode before or during the substitution reaction between Al in the Al electrode and Zn in the zincate solution. This exposes a clean surface on the entire surface of the Al electrode, and the entire exposed surface (clean surface) of the Al electrode is normally zincated, resulting in the deposition of a Zn film. This ensures adhesion between the Al electrode and the Ni plating film in the subsequent electroless Ni plating process and suppresses dissolution of the pad portion by the plating solution in the electroless Ni plating process, thereby improving the reliability of the semiconductor device.
[0094] Furthermore, according to the embodiment, the total etching amount of the Al electrode by the etching solution in the etching treatment and the zincate solution in the zincate treatment can be appropriately set, and thus the method can be easily applied to existing manufacturing processes. Even a zincate solution, which has a milder etching effect than an etching solution, can remove locally thick portions of the Al oxide film on the surface of the Al electrode, thereby preventing the plating film from peeling off from the Al electrode due to the remaining Al oxide film on the surface of the Al electrode. Furthermore, according to the embodiment, etching the Al electrode using a zincate solution prevents spikes from occurring on the surface of the Al electrode. This prevents the plating film from peeling off due to spikes at the interface between the Al electrode and the plating film, thereby further improving the reliability of the semiconductor device.
[0095] Furthermore, according to the embodiment, the total etching amount of the Al electrode can be appropriately set, thereby suppressing surface roughness of the Al electrode. Therefore, even when a plated chip is formed, poor appearance of the plating film surface due to the surface roughness of the Al electrode can be suppressed. Furthermore, according to the embodiment, when adjusting the total etching amount of the Al electrode in the pretreatment of the electroless plating treatment of the Al electrode, by increasing the etching amount of the Al electrode by the etching solution in the etching treatment as much as possible to the extent that poor appearance of the plating film surface due to the surface roughness of the Al electrode does not occur, a margin can be provided in the conditions of the zincate solution in the zincate treatment. This makes it possible to suppress the occurrence of spikes on the surface of the Al electrode due to excessive zincate treatment.
[0096] (Example of consideration) A semiconductor chip (semiconductor device 10) was fabricated according to the semiconductor device manufacturing method of the embodiment (see FIG. 4), and the relationship between the total etching amount Dt of the pad portion 2b due to the processing in steps S22 and S24 and the adhesion between the pad portion 2b and the plating film 7 was examined. The results are shown in FIG. 7. FIG. 7 is a graph showing the results of an experiment on the relationship between the pretreatment conditions for the electroless plating process (plating pretreatment conditions) and the total etching amount of the Al electrode (pad portion 2b of the front-surface electrode 2).
[0097] The plating pretreatment conditions 1 to 8 in Figure 7 differ only in the processing conditions of steps S22 and S24. For each of the plating pretreatment conditions 1 to 8, a tensile test was conducted on multiple semiconductor chips to confirm the adhesion between the pad portion 2b and the plating film 7. The "good" result indicated by a circle in Figure 7 means that no peeling of the plating film 7 from the pad portion 2b occurred on any of the semiconductor chips. The "poor" result indicated by an x in Figure 7 means that there was at least one semiconductor chip in which the plating film 7 peeled from the pad portion 2b.
[0098] As shown in Figure 7, in the sample under pre-plating condition 2, the amount of etching of the pad portion 2b by the etching solution was 0.08 µm, and the amount of etching of the pad portion 2b by the zincate solution was approximately 0.2 µm. In the sample under pre-plating condition 2, the total etching amount Dt of the pad portion 2b was approximately 0.28 µm, and the plating film 7 peeled off at the interface between the pad portion 2b and the plating film 7. Even under conditions 1 and 3, in which the total etching amount Dt of the pad portion 2b was smaller than that of the sample under pre-plating condition 2, the plating film 7 peeled off at the interface between the pad portion 2b and the plating film 7.
[0099] On the other hand, in the samples under pre-plating conditions 4 to 8, no peeling of the plating film 7 occurred, and no poor appearance such as surface roughness occurred on the surface of the plating film 7. It is presumed that by increasing the total etching amount Dt of the pad portion 2b by the processing in steps S22 and S24 compared to the sample under pre-plating condition 2, neither peeling of the plating film 7 nor poor appearance such as surface roughness occurred on the surface of the plating film 7. The inventors' empirical findings indicate that the total etching amount Dt of the pad portion 2b by the processing in steps S22 and S24 at which this effect can be obtained is approximately 0.3 μm or more.
[0100] In addition, for the sample under pre-plating condition 6, the zincate treatment conditions in step S24 were the same as those under pre-plating condition 2, but the total etching amount Dt of the pad portion 2b was increased to about 0.49 μm by making the etching time in step S22 three times longer than that under pre-plating condition 2. In this way, it was confirmed that the effects of the embodiment could be obtained even when the zincate treatment conditions in step S24 were fixed and the etching treatment conditions in step S22 were changed.
[0101] The present disclosure is not limited to the above-described embodiments, and various modifications are possible within the scope of the present disclosure. For example, the front electrode may be subjected to zincate treatment twice (double zincate treatment). Furthermore, the front electrode is not limited to an electrode containing Al, but may be primarily composed of another metal that is more noble (has a higher ionization tendency) than Zn in the zincate solution. The plating film on the surface of the front electrode is not limited to a Ni / Au plating film, but may be a plating film of another metal that is more noble (has a lower ionization tendency) than Zn in the zincate solution. [Industrial Applicability]
[0102] As described above, the semiconductor device and the method for manufacturing the semiconductor device according to the present disclosure are useful for semiconductor devices in which bonding wires are bonded to surface electrodes via plating films. [Explanation of symbols]
[0103] 1. Semiconductor substrate 2 Front electrode 2a The portion of the front electrode covered with the passivation film 2b: The portion of the front electrode exposed in the opening of the passivation film (pad portion) 3 Passivation film 3a, 3b Opening in passivation film 4 Back electrode 5. Ni plating film 6. Au plating film 7 Plating film 8 Gate Pad 10 Semiconductor devices 11 Active region 12 Edge Termination Area 13: The portion between adjacent front electrodes 2 Dt Total etching amount of the front electrode (pad part) t1 Thickness of the part of the front electrode covered with the passivation film t2 Thickness of the pad on the front surface
Claims
1. a first step of forming a metal electrode on a first main surface of a semiconductor substrate; a second step of forming an insulating film covering the metal electrode on the first main surface of the semiconductor substrate; a third step of forming an opening that penetrates the insulating film in a depth direction and exposes a first portion of the metal electrode; a pretreatment step of removing an oxide film on the surface of the first portion; a plating step of forming a plating film on the surface of the first portion by electroless plating after the pretreatment step; Including, a second portion of the metal electrode that is covered with the insulating film and that is formed on the first portion by etching the first portion by a predetermined etching amount, and a second portion of the metal electrode that is covered with the insulating film and that is formed on the second portion by etching the first portion by a predetermined etching amount, the ...
2. The pretreatment step includes: a fourth step of etching the oxide film with an etching solution; a fifth step of etching the oxide film with a zincate solution after the fourth step and precipitating a metal having a lower ionization tendency than the metal in the metal electrode on the surface of the first portion, 2. The method for manufacturing a semiconductor device according to claim 1, wherein the predetermined etching amount is a sum of an etching amount of the first portion by the etching solution and an etching amount of the first portion by the zincate solution.
3. 3. The method for manufacturing a semiconductor device according to claim 2, wherein an etching amount of the first portion by the etching solution is equal to or greater than an etching amount of the first portion by the zincate solution.
4. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the predetermined etching amount is 0.3 [mu]m or more and 0.6 [mu]m or less.
5. 5. The method for manufacturing a semiconductor device according to claim 4, wherein the predetermined etching amount is 0.4 [mu]m or more.
6. 6. The method for manufacturing a semiconductor device according to claim 5, wherein the predetermined etching amount is 0.45 [mu]m or more.
7. In the first step, an aluminum film or an aluminum alloy film is formed as the metal electrode; 2. The method for manufacturing a semiconductor device according to claim 1, wherein in the plating step, a nickel plating film is formed as the plating film in contact with at least the first portion.
8. a metal electrode provided on a first main surface of the semiconductor substrate; an insulating film provided on the outermost surface of the first main surface of the semiconductor substrate and covering the metal electrode; an opening that penetrates the insulating film in a depth direction and exposes a first portion of the metal electrode; a plating film provided on a surface of the first portion; Equipped with the metal electrode is recessed in the first portion toward the second main surface of the semiconductor substrate more than the second portion covered with the insulating film, The semiconductor device according to claim 1, wherein the difference obtained by subtracting the thickness of the first portion from the thickness of the second portion is 0.3 μm or more and 0.6 μm or less.
9. 9. The semiconductor device according to claim 8, wherein the difference is 0.4 [mu]m or more.
10. 10. The semiconductor device according to claim 9, wherein the difference is 0.45 [mu]m or more.
11. the metal electrode is an aluminum film or an aluminum alloy film, 9. The semiconductor device according to claim 8, wherein the plating film includes a nickel plating film in contact with at least the first portion.
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