Communication system
The communication system uses resistive elements and switch elements to detect connection failures in chiplet structures by comparing output voltages, addressing the issue of bump deterioration and thermal expansion, ensuring reliable communication without increasing circuit size.
Patent Information
- Application Number
- JP2024099755
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-06-20
- Publication Date
- 2026-01-08
AI Technical Summary
Bumps connecting silicon dies to a substrate in chiplet structures deteriorate over time due to thermal expansion coefficient differences, leading to potential peeling and communication disruptions between electronic circuits.
A communication system with resistive elements and switch elements on circuit boards to detect failures in main and sub-connection portions by comparing output voltages against reference values, using comparators and OR gates to determine connection integrity.
Enables efficient detection of connection failures without the need for larger circuitry, such as AD converters, allowing for smaller circuit size and reliable communication system operation.
Smart Images

Figure 2026002059000001_ABST
Abstract
Description
[Technical Field]
[0001] The present disclosure relates to communication systems. [Background technology]
[0002] In recent years, a chiplet structure has been proposed in which multiple silicon dies are mounted on a substrate in one integrated circuit package and connected to the substrate (see, for example, Patent Document 1). In this chiplet structure, the mounting portions of the multiple silicon dies are each connected to the substrate by solder balls called bumps. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] US Patent Application Publication No. 2020 / 0409859 Summary of the Invention [Problem to be solved by the invention]
[0004] In the chiplet structure, multiple silicon dies are mounted on a substrate, and the substrate and the multiple silicon dies are connected with bumps. However, the bumps may deteriorate over time due to changes in their characteristics. In addition, due to differences in the thermal expansion coefficients of the substrate and the silicon dies, warping may occur in either the substrate or the silicon dies, which may cause the bumps to peel off from one of the two.
[0005] That is, the bumps may fail due to aging or differences in the thermal expansion coefficients of the substrate and the silicon die. Therefore, a failure of the bumps may cause a disruption in communication between the electronic circuit mounted on the silicon die and the electronic circuit mounted on the substrate. Alternatively, a failure of the bumps may cause a disruption in communication between the electronic circuits mounted on two silicon dies. Therefore, it is necessary to detect failures in the bumps that connect the substrate and multiple silicon dies.
[0006] Such problems are not limited to bumps connecting a substrate and a silicon die within an integrated circuit, but can also occur in solder (i.e., a connection) connecting two circuit boards outside of an integrated circuit. In view of the above, an object of the present disclosure is to provide a communication system that detects a failure in a connection portion that connects two circuit boards. [Means for solving the problem]
[0007] According to one aspect of the present disclosure, a communication system includes: a main connection portion (170) made of a conductive material and connecting the first circuit board (20a) and the second circuit board (20b); a resistive element (Ra) mounted on the second circuit board and disposed between the positive terminal of the DC power supply (VRa) and the main connection; a receiving section (160a) mounted on a second circuit board and connected in common to a resistive element and a main connection section; a transmitting circuit (91) mounted on the first circuit board and outputting a transmitting signal; a transmitting switch element (92a) mounted on the first circuit board and disposed between the main connection portion and ground, and turning on and off based on a transmitting signal to cause a receiving portion to output a receiving signal based on the transmitting signal; a current source (93) mounted on the first circuit board and disposed between the main connection portion and ground, and configured to pass a constant current from the positive terminal of the DC power supply to ground through a resistor element, the main connection portion, and the transmitting switch element; and a transmission-side determination unit (94a) that is mounted on the first circuit board and determines whether the main connection unit and the transmission switch element are connected in common, by determining whether the output voltage of the transmission unit (98a) is smaller than a reference voltage (Vrf1).
[0008] Therefore, it is possible to provide a communication system that detects a fault in a main connection that connects two circuit boards. In addition, according to one aspect of the present disclosure, the transmitting-side determination unit determines whether the output voltage of the transmitting unit is smaller than a reference voltage to determine whether the main connection unit has failed. This allows the circuit size to be smaller than when an AD converter or the like is used to determine whether the main connection unit has failed.
[0009] According to another aspect of the present disclosure, a communication system includes a main connection portion (170) made of a conductive material and connecting a first circuit board (20a) and a second circuit board (20b); a resistive element (Ra) mounted on the second circuit board and disposed between the positive terminal of the DC power supply (VRa) and the main connection; a receiving section (160a) mounted on a second circuit board and connected in common to a resistive element and a main connection section; a transmitting circuit (91) mounted on the first circuit board and outputting a transmitting signal; a transmitting switch element (92a) mounted on the first circuit board and disposed between the main connection portion and ground, and turning on and off based on a transmitting signal to cause a receiving portion to output a receiving signal based on the transmitting signal; a current source (93) mounted on the first circuit board and disposed between the main connection portion and ground, and configured to pass a constant current from the positive terminal of the DC power supply to ground through a resistor element, the main connection portion, and the transmitting switch element; and a receiving side determining section (140a) that determines whether the main connection section is faulty by determining whether the output voltage of the receiving section is greater than a reference voltage (Vrf2).
[0010] Therefore, it is possible to provide a communication system that detects a fault in a main connection that connects two circuit boards. In addition, according to another aspect of the present disclosure, the receiving-side determination unit determines whether the output voltage of the receiving unit is greater than a reference voltage to determine whether the main connection unit has failed. This allows the circuit size to be smaller than when an AD converter or the like is used to determine whether the main connection unit has failed. The reference symbols in parentheses attached to each component indicate an example of the correspondence between the component and the specific components described in the embodiments described below. [Brief explanation of the drawings]
[0011] [Figure 1] FIG. 1 is a cross-sectional view showing a cross-sectional configuration of a semiconductor device according to an embodiment of the present disclosure, illustrating the positional relationship between a silicon substrate, two silicon dies, and bumps. [Figure 2] 2 is an electric circuit diagram showing a circuit configuration of a communication system that constitutes the semiconductor device in the embodiment of FIG. 1. [Figure 3] FIG. 10 is an electric circuit diagram showing details of a circuit configuration of a comparative self-diagnosis circuit in the embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0012] An embodiment of a semiconductor device to which the communication system of the present disclosure is applied will be described below with reference to FIGS. 1 and 2. The semiconductor device 1X constitutes, for example, a large-scale integrated circuit in a single package. Specifically, the semiconductor device 1X includes a silicon substrate 10, silicon dies 20a and 20b, and pillars 30a, 30b, 30c, 30d, 30e, 30f, 30g, and 30h. The silicon substrate 10 is formed in a thin plate shape from silicon, an electrically insulating material. On one side of the silicon substrate 10 in the thickness direction AH, a surface 10a extending in a planar direction is formed. The planar direction is a direction perpendicular to the thickness direction AH. An electronic circuit is mounted on the surface 10a. Hereinafter, the pillars 30a, 30b, 30c, 30d, 30e, 30f, 30g, and 30h will be collectively referred to as pillars 30a to 30h.
[0013] The silicon dies 20a and 20b are mounted on one surface 10a of a silicon substrate 10. A base layer 50, a molding layer 61, and a polymer layer 62 are disposed between the one surface 10a of the silicon substrate 10 and the silicon dies 20a and 20b. A molding layer 63 is disposed on one side of the polymer layer 62 in the thickness direction AH. The molding layer 63 is formed so as to surround the silicon dies 20a and 20b in a direction perpendicular to the thickness direction AH. The base layer 50, the molding layer 61, the polymer layer 62, and the molding layer 63 are each made of an electrically insulating material. The pillars 30a to 30h are each made of a conductive metal material such as copper.
[0014] The pillars 30a to 30h are formed to extend in the thickness direction AH within the molding layer 61 and the polymer layer 62. The pillars 30a, 30b, 30c, and 30d are each disposed between the first surface 10a of the silicon substrate 10 and the silicon die 20a. One side of the pillars 30a, 30b, 30c, and 30d in the thickness direction AH is connected to the first surface 10a of the silicon substrate 10 by a bump 40a. The other side of the pillars 30a, 30b, 30c, and 30d in the thickness direction AH is connected to the first surface 10a of the silicon substrate 10 by a bump 40b.
[0015] As a result, the electronic circuit mounted on the silicon die 20a and the electronic circuit mounted on the silicon substrate 10 are connected through the pillars 30a, 30b, 30c, and 30d and the bumps 40a and 40b. In this embodiment, the bumps 40a and 40b are made of a conductive metal material such as solder and are used to connect the silicon die 20a and the silicon substrate 10. One side of the pillars 30e, 30f, 30g, and 30h in the thickness direction AH is connected to the silicon die 20b by the bump 40c.
[0016] The pillars 30e, 30f, 30g, and 30h are each connected at the other side in the thickness direction AH to one surface 10a of the silicon substrate 10 by a bump 40d. As a result, the electronic circuit mounted on the silicon die 20b and the electronic circuit mounted on the silicon substrate 10 are connected through the pillars 30e, 30f, 30g, and 30h and the bumps 40c and 40d. In this embodiment, the bumps 40c and 40d are made of a conductive metal material such as solder and are used to connect the silicon die 20b and the silicon substrate 10.
[0017] Wiring layers 70, 71, 72, and 73 are provided between the silicon substrate 10 and the silicon dies 20a and 20b. The wiring layers 70, 71, 72, and 73 are disposed within the molding layer 61 and the polymer layer 62, respectively. The wiring layers 70, 71, 72, and 73 are each formed of a conductive metal material such as copper so as to extend linearly. The wiring layers 70, 71, 72, and 73 also form signal lines that transmit transmission signals between the silicon dies 20a and 20b, respectively.
[0018] For ease of explanation, the wiring layers 70, 71, 72, and 73 will be collectively referred to as wiring layers 70 to 73 below. One end of the wiring layer 70 is connected to the silicon die 20a by a bump 40e. One end of the wiring layer 71 is connected to the silicon die 20a by a bump 40f. One end of the wiring layer 72 is connected to the silicon die 20a by a bump 40g. One end of the wiring layer 73 is connected to the silicon die 20a by a bump 40h.
[0019] The other end of the wiring layer 70 is connected to the silicon die 20b by a bump 40i. The other end of the wiring layer 71 is connected to the silicon die 20b by a bump 40j. The other end of the wiring layer 72 is connected to the silicon die 20b by a bump 40k. The other end of the wiring layer 73 is connected to the silicon die 20b by a bump 40m. For ease of explanation, bumps 40e, 40f, 40g, 40h, 40i, 40j, 40k, and 40m are collectively referred to as bumps 40e to 40m.
[0020] As a result, the electronic circuit mounted on the silicon die 20a and the electronic circuit mounted on the silicon die 20b are connected through the wiring layers 70 to 73 and the bumps 40e to 40m. Furthermore, the bumps 40e to 40m in this embodiment are each made of a conductive metal material such as solder and are used to connect the silicon dies 20a and 20b. In this embodiment configured as described above, the electronic circuit mounted on the silicon die 20a and the electronic circuit mounted on the silicon substrate 10 form a communication system that transmits a transmission signal through the bump 40a, pillars 30a, 30b, 30c, 30d, and bump 40b.
[0021] The electronic circuit mounted on the silicon die 20b and the electronic circuit mounted on the silicon substrate 10 constitute a communication system that transmits a transmission signal through the bump 40c, the pillars 30e, 30f, 30g, 30h, and the bump 40d. The electronic circuit mounted on the silicon die 20a and the electronic circuit mounted on the silicon die 20b constitute a communication system that transmits a transmission signal through the wiring layers 70 to 73 and the bumps 40e to 40m.
[0022] As a specific example of these three communication systems, the electrical circuit configuration of communication system 80, which is configured by electronic circuits mounted on silicon dies 20a and 20b, will be described below with reference to Fig. 2. Communication system 80 includes wiring layers 70-73, bumps 40e-40m, and electronic circuits 90 and 100. Electronic circuit 90 is mounted on silicon die 20a. Electronic circuit 100 is mounted on silicon die 20b. Electronic circuits 90 and 100 are connected via wiring layers 70, 71, 72, and 73 and bumps 40e-40m, respectively, as described above.
[0023] 2, the electronic circuit 90 includes a transmitting circuit 91, transistors 92a and 92b, a current source 93, a detection circuit 94, a transmission control unit 95, and buffer circuits 96a and 96b. The transmitting circuit 91, as a first transmitting circuit and a second transmitting circuit, transmits a transmitting signal VP and a transmitting signal VN by differential transmission through the wiring layers 70 to 73 and the bumps 40e to 40m to the receiving circuit 120 of the electronic circuit 100. Specifically, the transmitting circuit 91 outputs a transmitting signal (i.e., a first transmitting signal) VP to the transistor 92a. In addition, the transmitting circuit 91 outputs a transmitting signal (i.e., a second transmitting signal) VN to the transistor 92b. The transmitting signals VP and VN are digital signals having opposite phases to each other.
[0024] The transistor 92a is a first transmitting switch element disposed between the bump 40e and ground. The transistor 92a is turned on and off based on a transmitting signal VP output from the transmitting circuit 91. As a result, the transistor 92a connects or disconnects the bump 40e and ground by being on or off. The transistor 92b is a second transmitting switch element disposed between the bump 40f and ground. The transistor 92b is turned on and off based on a transmitting signal VN output from the transmitting circuit 91. As a result, the transistor 92b connects or disconnects the bump 40f and ground by being on or off. In this embodiment, the transistors 92a and 92b are, for example, n-type MOS transistors.
[0025] The current source 93, acting as a first current source and a second current source, flows a constant current from the positive terminal of the DC power supply (i.e., first DC power supply) VRa of the electronic circuit 100 to ground through the resistor element Ra, the bump 40i, the wiring layer 70, the bump 40e, and the transistor 92a. The wiring layer 70 and the bumps 40e and 40i form a main connection section (i.e., first main connection section) 170. In addition, the current source 93 flows a constant current from the positive terminal of the DC power supply (i.e., first DC power supply) VRb of the electronic circuit 100 to ground through the resistor element Rb, the bump 40j, the wiring layer 71, the bump 40f, and the transistor 92b. The wiring layer 71 and the bumps 40f and 40j form a main connection section (i.e., second main connection section) 171. The current source 93 is disposed between the source terminals of the transistors 92a and 92b and ground.
[0026] Specifically, the current source 93 is disposed between a common connection terminal 97 for the source terminals of the transistors 92a and 92b and ground. This common connection terminal 97 is a terminal to which the source terminal of the transistor 92a and the source terminal of the transistor 92b are commonly connected. Hereinafter, for convenience of explanation, the common connection terminal to which the drain terminal of the transistor 92a and the bump 40e are commonly connected will be referred to as a transmitter 98a. Also, the common connection terminal to which the drain terminal of the transistor 92b and the bump 40f are commonly connected will be referred to as a transmitter 98b.
[0027] The detection circuit 94 detects failures in the bumps 40e and 40i of the main connection portion 170 and the bumps 40f and 40j of the main connection portion 171. Specifically, the detection circuit 94 includes comparators 94a and 94b, an OR gate 94c, and switches 94d and 94e, as shown in Fig. 2. The comparator 94a, as a transmitting-side determination unit, outputs a low-level signal or a high-level signal as an output signal based on the result of determining whether the output voltage of the transmitter 98a is smaller than the output voltage Vrf1 of the constant-voltage power supply 81.
[0028] Here, a low-level signal is a signal whose signal level is low, and a high-level signal is a signal whose signal level is high. The output voltage of the transmitter 98a is the voltage between the transmitter 98a and ground. The output voltage Vrf1 of the constant-voltage power supply 81 is a first reference voltage, which is a constant voltage. The output voltage Vrf1 is the voltage between the positive terminal of the constant-voltage power supply 81 and ground. The transmitter (i.e., first transmitter) 98a is connected to the inverting input terminal of the comparator 94a via a switch 94d. The positive terminal of the constant-voltage power supply 81 is connected to the non-inverting input terminal of the comparator 94a.
[0029] The comparator 94b, as a second transmitting-side determination unit, outputs a low-level signal or a high-level signal as an output signal based on the result of determining whether the output voltage of the transmitting unit 98b is smaller than the output voltage Vrf1 of the constant-voltage power supply 81. The output voltage of the transmitting unit 98b is the voltage between the transmitting unit 98b and ground. The transmitting unit (i.e., the second transmitting unit) 98b is connected to the inverting input terminal of the comparator 94b via a switch 94e. The positive terminal of the constant-voltage power supply 81 is connected to the non-inverting input terminal of the comparator 94b.
[0030] The OR gate 94c outputs a low-level signal or a high-level signal as an output signal based on the result of an OR operation performed on the output signals of the comparators 94a and 94b. The switch 94d serves as a first control switch and is controlled by the transmission control section (i.e., the determination control section) 95 to connect or disconnect the inverting input terminal of the comparator 94a and the transmitter 98a by turning it on or off. The switch 94e is controlled by the transmission control section 95 to connect or disconnect the inverting input terminal of the comparator 94b and the transmitter 98b by turning it on or off.
[0031] In this embodiment, for example, MOS transistors are used as the switches 94d and 94e. The transmission control unit 95 is configured as a first transmission control unit and a second reception control unit, and is composed of a microcomputer or the like. The transmission control unit 95 outputs a notification signal, which is a digital signal indicating the result of the fault determination by the detection circuit 94, to the buffer circuit 96a in response to communication with the transmission circuit 91. The buffer circuit 96a shapes the waveform of the notification signal output from the transmission control unit 95 and outputs it to the buffer circuit 131a of the electronic circuit 100 through the bump 40g, the wiring layer 72, and the bump 40k.
[0032] Here, the bump 40g, the wiring layer 72, and the bump 40k constitute a sub-connection section (i.e., a first sub-connection section) 172. The buffer circuit 96b shapes the waveform of an output signal provided from the buffer circuit 131b through the bump 40h, the wiring layer 73, and the bump 40m, and outputs the result to the transmission control section 95. The bump 40h, the wiring layer 73, and the bump 40m constitute the sub-connection section (i.e., a second sub-connection section) 172. In this embodiment, the main connection section 170, the main connection section 171, the sub-connection section 172, and the sub-connection section 172 are provided independently of each other.
[0033] As shown in FIG. 2, the electronic circuit 100 includes a receiving circuit 120, buffer circuits 130a, 130b, 131a, and 131b, a detection circuit 140, a reception control unit 150, and resistive elements Ra and Rb. The resistive element Ra is a first resistive element disposed between the positive terminal of the DC power supply VRa and the bump 40i. The resistive element Rb is a second resistive element disposed between the positive terminal of the DC power supply VRb and the bump 40j. Hereinafter, the common connection terminal to which the resistive element Ra and the bump 40i are connected will be referred to as the receiving unit 160a. The common connection terminal to which the resistive element Rb and the bump 40j are connected will be referred to as the receiving unit 160b.
[0034] The receiving unit 160a outputs a receiving signal (i.e., a first receiving signal) SP, which is a digital signal whose signal level changes as the transistor 92a turns on and off. The receiving signal SP is a signal based on the transmitting signal VP. Specifically, the receiving signal SP is a digital signal whose phase is opposite to that of the transmitting signal VP. The receiving unit 160b outputs a receiving signal SN, which is a digital signal whose signal level changes as the transistor 92b turns on and off. The receiving signal SN is a signal based on the transmitting signal VN. Specifically, the receiving signal SN is a digital signal whose phase is opposite to that of the transmitting signal VN.
[0035] The buffer circuit 130a shapes the waveform of the received signal SP output from the receiving unit 160a and outputs it to the receiving circuit 120. Furthermore, the buffer circuit 130b shapes the waveform of the received signal SN output from the receiving unit 160b and outputs it to the receiving circuit 120. As shown in FIG. 2, the detection circuit 140 includes comparators 140a and 140b, an OR gate 140c, and switches 140d and 140e. The comparator 140a, as a receiving-side determination unit, outputs a low-level signal or a high-level signal as an output signal based on the result of determining whether the output voltage of the receiving unit 160a is greater than the output voltage Vrf2 of the constant-voltage power supply 101.
[0036] The output voltage of the receiving unit 160a is the voltage between the receiving unit 160a and ground. The output voltage Vrf2 of the constant-voltage power supply 101 is a second reference voltage that is a constant voltage. The output voltage Vrf2 of the constant-voltage power supply 101 is the voltage between the positive terminal of the constant-voltage power supply 101 and ground. The receiving unit 160a is connected to the non-inverting input terminal of the comparator 140a via the switch 140d. The positive terminal of the constant-voltage power supply 101 is connected to the inverting input terminal of the comparator 140a.
[0037] The comparator 140b, as a transmitting-side determination unit, outputs a low-level signal or a high-level signal as an output signal based on the result of determining whether the output voltage of the receiving unit 160b is greater than the output voltage Vrf2 of the constant-voltage power supply 101. The output voltage of the receiving unit 160b is the voltage between the receiving unit 160b and ground. The output voltage Vrf2 of the constant-voltage power supply 101 is the voltage between the positive terminal of the constant-voltage power supply 101 and ground. The receiving unit 160b is connected to a non-inverting input terminal of the comparator 140b via a switch 140e. The positive terminal of the constant-voltage power supply 101 is connected to an inverting input terminal of the comparator 140b.
[0038] The OR gate 140c outputs a low-level signal or a high-level signal as an output signal based on the result of an OR operation performed on the output signals of the comparators 140a and 140b. The switch 140d, as a second control switch, is controlled by the reception control unit 150 to be turned on or off, thereby connecting or disconnecting the non-inverting input terminal of the comparator 140a and the reception unit 160a.
[0039] The switch 140e is controlled by the reception control unit 150 to be turned on or off, thereby connecting or disconnecting the non-inverting input terminal of the comparator 140b and the reception unit 160b. In this embodiment, MOS transistors are used as the switches 140d and 140e, for example. The reception control unit 150 is configured with a microcomputer or the like as a second transmission control unit and a first reception control unit. In response to communication with the reception circuit 120, the reception control unit 150 outputs a notification signal, which is a digital signal indicating the result of the fault determination made by the detection circuit 140, to the buffer circuit 131b.
[0040] Furthermore, buffer circuit 131a shapes the waveform of the output signal provided from buffer circuit 96a through bump 40g, wiring layer 72, and bump 40k, and outputs the result to reception control unit 150. Buffer circuit 131b shapes the waveform of the output signal provided from reception control unit 150, and outputs the result to buffer circuit 96b of electronic circuit 90 through bump 40m, pillar 30d, and bump 40h. Next, a specific example of the operation of communication system 80 of this embodiment will be described with reference to FIGS. 1 and 2.
[0041] The communication system 80 executes a communication process in which the transmission circuit 91 outputs transmission signals VP and VN to the reception circuit 120, and a start-up determination process in which, when the communication process is started, the communication system 80 executes a communication determination process in which, when the communication process is executed, the communication system 80 determines whether or not there is a failure in the main connection units 170 and 171. The communication process, the start-up determination process, and the communication determination process will be described independently below.
[0042] (Communication processing) The communication processing of the communication system 80 will be described. First, the switch 94d is controlled by the transmission control unit 95 to open the connection between the inverting input terminal of the comparator 94a and the transmitter 98a. The switch 94e is controlled by the transmission control unit 95 to open the connection between the inverting input terminal of the comparator 94b and the transmitter 98b. In this state, the transmitter circuit 91 outputs the transmission signals VP and VN to the transistors 92a and 92b.
[0043] When the signal level of the transmission signal VP is high, the transistor 92a is turned on based on the transmission signal VP. Therefore, the current source 93 flows a constant current from the positive terminal of the DC power supply VRa through the resistor element Ra, the bump 40i, the wiring layer 70, the bump 40e, and the transistor 92a to ground. Therefore, the receiving unit 160a, acting as the first receiving unit, outputs a receiving signal SP having a low signal level to the buffer circuit 130a. Accordingly, the buffer circuit 130a shapes the waveform of the receiving signal SP provided by the receiving unit 160a and outputs the result to the receiving circuit 120.
[0044] On the other hand, when the signal level of the transmission signal VP is high, the signal level of the transmission signal VN is low. Therefore, the transistor 92b is turned off based on the transmission signal VN. Therefore, the receiving unit 160b, as the second receiving unit, outputs a high-level receiving signal SN to the buffer circuit 130b. Accordingly, the buffer circuit 130b shapes the waveform of the receiving signal SN provided from the receiving unit 160b and outputs the waveform to the receiving circuit 120.
[0045] Next, when the signal level of the transmission signal VP is low, the transistor 92a is turned off based on the transmission signal VP. Therefore, the receiving unit 160a, as the first receiving unit, outputs a reception signal SP having a high signal level to the buffer circuit 130a. Accordingly, the buffer circuit 130a shapes the waveform of the reception signal SP provided from the receiving unit 160a and outputs it to the receiving circuit 120. On the other hand, when the signal level of the transmission signal VP is low, the signal level of the transmission signal VN is high.
[0046] Therefore, the transistor 92a is turned on based on the transmission signal VN. Therefore, the current source 93 passes a constant current from the positive terminal of the DC power supply (i.e., the second DC power supply) VRb through the resistor element Rb, the bump 40j, the wiring layer 71, the bump 40f, and the transistor 92b to ground. Therefore, the receiver 160b outputs a reception signal SN having a low signal level to the buffer circuit 130b. Accordingly, the buffer circuit 130b shapes the waveform of the reception signal SN provided from the receiver 160b and outputs the result to the receiver circuit 120.
[0047] (Activation determination process) The activation determination process of the communication system 80 will be described. First, when an activation signal is input from the electronic circuit mounted on the silicon substrate 10 through the bump 40b, the pillar 30a, and the bump 40b, the transmission control unit 95 turns on the switches 94d and 94e. Accordingly, the switch 94d connects the inverting input terminal of the comparator 94a to the transmitter 98a. In addition, the switch 94e connects the inverting input terminal of the comparator 94b to the transmitter 98b.
[0048] In this state, the transmission control unit 95 controls the transmission circuit 91. Therefore, the transmission circuit 91 outputs a first control signal to the transistor 92a and a second control signal to the transistor 92b. Therefore, the transistor 92a is turned on based on the first control signal, and the transistor 92b is turned off based on the second control signal. After that, the transistor 92a is turned off based on the first control signal, and the transistor 92b is turned on based on the second control signal, entering a second state.
[0049] At this time, the output voltage of the transmitter 98a is applied to the inverting input terminal of the comparator 94a via the switch 94d. The output voltage Vrf1 of the constant voltage power supply 81 is applied to the non-inverting input terminal of the comparator 94a. The output voltage of the transmitter 98b is applied to the inverting input terminal of the comparator 94b via the switch 94e. The output voltage Vrf1 of the constant voltage power supply 81 is applied to the non-inverting input terminal of the comparator 94a.
[0050] For example, the wiring layer 70 and the silicon die 20a are normally connected by the bump 40e, and the wiring layer 70 and the silicon die 20b are normally connected by the bump 40i. In this case, the output voltage of the transmitter 98a becomes larger than the output voltage Vrf1 of the constant-voltage power supply 81. As a result, the signal level of the output signal of the comparator 94a becomes low. Meanwhile, due to aging or the like, the bump 40e breaks down, causing the wiring layer 70 and the silicon die 20a to peel off.
[0051] Alternatively, the bump 40i may fail due to aging or the like, causing the wiring layer 70 and the silicon die 20b to peel off. In this case, the output voltage of the transmitter 98a becomes smaller than the output voltage Vrf1 of the constant-voltage power supply 81. As a result, the signal level of the output signal of the comparator 94a becomes high. In other words, when the main connection portion 170 fails, the signal level of the output signal of the comparator 94a becomes high. For example, the wiring layer 71 and the silicon die 20a are normally connected by the bump 40f, and the wiring layer 71 and the silicon die 20b are normally connected by the bump 40j.
[0052] In this case, the output voltage of the transmitter 98b becomes larger than the output voltage Vrf1 of the constant-voltage power supply 81. As a result, the signal level of the output signal of the comparator 94b becomes low. Meanwhile, due to aging or the like, the bump 40f fails, causing the wiring layer 71 and the silicon die 20a to separate. Alternatively, due to aging or the like, the bump 40j fails, causing the wiring layer 71 and the silicon die 20b to separate. In this case, the output voltage of the transmitter 98b becomes smaller than the output voltage Vrf1 of the constant-voltage power supply 81. As a result, the signal level of the output signal of the comparator 94b becomes high. In other words, when the main connection part 171 fails, the signal level of the output signal of the comparator 94b becomes high.
[0053] The output signals of the comparators 94a and 94b operating in this manner are supplied to the OR gate 94c. At this time, if at least one of the main connection unit 170 and the main connection unit 171 fails, the signal level of the output signal of at least one of the comparators 94a and 94b becomes high. As a result, the signal level supplied from the OR gate 94c to the transmission control unit 95 becomes high. On the other hand, when the main connection unit 170 and the main connection unit 171 are both normal, the signal levels of the output signals of the comparators 94a and 94b become low.
[0054] As a result, the signal level provided from the OR gate 94c to the transmission control unit 95 becomes low. Based on the output signal of the OR gate 94c, the transmission control unit 95 transmits a notification signal, which is a digital signal indicating the determination result by the comparators 94a and 94b, to the reception control unit 150 via the buffer circuits 96a and 131a. In this way, the transmission control unit 95 notifies the reception control unit 150 of the determination result by the comparators 94a and 94b. The determination result by the comparators 94a and 94b is the determination result as to whether or not the main connection units 170 and 171 are faulty.
[0055] Furthermore, when an activation signal is input to the reception control unit 150 from the electronic circuit mounted on the silicon substrate 10 through the bumps 40c, 40d, and pillar 30e, the reception control unit 150 turns on the switches 140d and 140e, respectively. Accordingly, the switch 140d connects the non-inverting input terminal of the comparator 140a to the receiving unit 160a. Furthermore, the switch 140e connects the non-inverting input terminal of the comparator 140b to the receiving unit 160b. At this time, the output voltage of the receiving unit 160a is applied to the non-inverting input terminal of the comparator 140a through the switch 140d. The output voltage Vrf2 of the constant-voltage power supply 101 is applied to the inverting input terminal of the comparator 140a. The output voltage of the receiving unit 160b is applied to the non-inverting input terminal of the comparator 140b through the switch 140e. The output voltage Vrf2 of the constant-voltage power supply 101 is applied to the inverting input terminal of the comparator 140b.
[0056] For example, the wiring layer 70 and the silicon die 20a are normally connected by the bump 40e, and the wiring layer 70 and the silicon die 20b are normally connected by the bump 40i. In this case, the output voltage of the receiving unit 160a is smaller than the output voltage Vrf2 of the constant-voltage power supply 101. As a result, the signal level of the output signal of the comparator 140a becomes low. Meanwhile, due to aging or the like, the bump 40e breaks down, causing the wiring layer 70 and the silicon die 20a to separate. Alternatively, due to aging or the like, the bump 40i breaks down, causing the wiring layer 70 and the silicon die 20b to separate. In this case, the output voltage of the receiving unit 160a becomes higher than the output voltage Vrf2 of the constant-voltage power supply 101. As a result, the signal level of the output signal of the comparator 140a becomes high. In other words, if the main connection unit 170 fails, the signal level of the output signal of the comparator 140a becomes high.
[0057] For example, the wiring layer 71 and the silicon die 20a are normally connected by the bump 40f, and the wiring layer 71 and the silicon die 20b are normally connected by the bump 40j. In this case, the output voltage of the receiving unit 160b becomes smaller than the output voltage Vrf2 of the constant-voltage power supply 101. As a result, the signal level of the output signal of the comparator 140b becomes low. Meanwhile, due to aging or the like, the bump 40f fails, causing the wiring layer 71 and the silicon die 20a to separate. Alternatively, due to aging or the like, the bump 40j fails, causing the wiring layer 71 and the silicon die 20b to separate. In this case, the output voltage of the receiving unit 160b becomes larger than the output voltage Vrf2 of the constant-voltage power supply 101. As a result, the signal level of the output signal of the comparator 140b becomes high. In other words, if the main connection unit 171 fails, the signal level of the output signal of the comparator 140b becomes high.
[0058] The output signals of comparators 140a and 140b operating in this manner are provided to OR gate 140c. At this time, if at least one of main connection unit 170 and main connection unit 171 fails, the signal level of the output signal of at least one of comparators 140a and 140b becomes high. As a result, the signal level provided from OR gate 140c to reception control unit 150 becomes high. On the other hand, when main connection unit 170 and main connection unit 171 are both normal, the signal levels of the output signals of comparators 140a and 140b become low. As a result, the signal level provided from OR gate 140c to reception control unit 150 becomes low.
[0059] Based on the output signal of the OR gate 140c, the reception control unit 150 transmits a notification signal, which is a digital signal indicating the determination result of the comparators 140a and 140b, to the transmission control unit 95 via the buffer circuits 131b and 96b. In this way, the reception control unit 150 notifies the transmission control unit 95 of the determination result of the comparators 140a and 140b. The determination results of the comparators 140a and 140b indicate whether or not the main connection units 170 and 171 are faulty.
[0060] When an open circuit fault occurs between the source terminal of one of the transistors 92a and 92b and the common connection terminal 97, the signal levels of the output signals of the comparators 140a and 140b become high. When an open circuit fault occurs between the drain terminal of the transistor 92a and the transmitter 98a and the open circuit fault occurs, the signal level of the output signal of the comparator 140a becomes high. When an open circuit fault occurs between the drain terminal of the transistor 92b and the transmitter 98b and the open circuit fault occurs, the signal level of the output signal of the comparator 140b becomes high. These output signals of the comparators 140a and 140b are provided to the OR gate 140c. Therefore, the reception control unit 150 can detect the open circuit fault of the transistors 92a and 92b based on the output signal of the OR gate 140c.
[0061] (Communication determination process) The communication determination process of the communication system 80 will be described. First, the transmission control unit 95 turns on the switches 94d and 94e during the execution of the communication process. Accordingly, the switch 94d connects the inverting input terminal of the comparator 94a to the transmitter 98a. The switch 94e connects the inverting input terminal of the comparator 94b to the transmitter 98b. At this time, the output voltage of the transmitter 98a is applied to the inverting input terminal of the comparator 94a via the switch 94d, and the output voltage Vrf1 of the constant voltage power supply 81 is applied to the non-inverting input terminal of the comparator 94a.
[0062] The output voltage of the transmitter 98b is applied to the inverting input terminal of the comparator 94b via the switch 94e. The output voltage Vrf1 of the constant-voltage power supply 81 is applied to the non-inverting input terminal of the comparator 94b. Therefore, similar to the above-described start-up determination process, the comparator 94a determines whether the main connection unit 170 has failed by determining whether the output voltage of the transmitter 98a is smaller than the output voltage Vrf1 of the constant-voltage power supply 81. In addition, the comparator 94b determines whether the main connection unit 171 has failed by determining whether the output voltage of the transmitter 98b is smaller than the output voltage Vrf1 of the constant-voltage power supply 81.
[0063] In this case, if at least one of the main connection units 170 and 171 fails, the signal level of the output signal of at least one of the comparators 94a and 94b becomes high. As a result, the signal level provided from the OR gate 94c to the transmission control unit 95 becomes high. Based on the output signal of the OR gate 94c, the transmission control unit 95 transmits a notification signal, which is a digital signal indicating the determination result of the comparators 94a and 94b, to the reception control unit 150 via the buffer circuits 96a and 131a.
[0064] Meanwhile, during execution of communication processing, the reception control unit 150 turns on the switches 140d and 140e. Accordingly, the switch 140d connects the non-inverting input terminal of the comparator 140a to the receiving unit 160a. Furthermore, the switch 140e connects the non-inverting input terminal of the comparator 140b to the receiving unit 160b. At this time, the output voltage of the receiving unit 160a is applied to the non-inverting input terminal of the comparator 140a via the switch 140d. The output voltage Vrf2 of the constant-voltage power supply 101 is applied to the inverting input terminal of the comparator 94a. The output voltage of the receiving unit 160b is applied to the non-inverting input terminal of the comparator 140a via the switch 140e. The output voltage Vrf2 of the constant-voltage power supply 101 is applied to the inverting input terminal of the comparator 94a.
[0065] Therefore, similarly to the above-described start-up determination process, the comparator 140a determines whether or not the main connection unit 170 has failed by determining whether or not the output voltage of the receiving unit 160a is greater than the output voltage Vrf2 of the constant-voltage power supply 101. In addition to this, the comparator 94b determines whether or not the main connection unit 171 has failed by determining whether or not the output voltage of the receiving unit 160b is greater than the output voltage Vrf2 of the constant-voltage power supply 101.
[0066] If at least one of the main connection units 170 and 171 fails, the output signal of at least one of the comparators 140a and 140b goes high. As a result, the signal provided from the OR gate 140c to the reception control unit 150 goes high. Based on the output signal of the OR gate 140c, the reception control unit 150 transmits a notification signal, which is a digital signal indicating the determination result of the comparators 140a and 140b, to the transmission control unit 95 via the buffer circuits 131b and 96b.
[0067] Next, a self-diagnostic circuit 1A0, which is a comparative example of this embodiment, will be described with reference to Fig. 3. Fig. 3 is an electric circuit diagram showing the circuit configuration of the self-diagnostic circuit 1A0. The self-diagnostic circuit 1A0 includes a switch SW1 connected between the inverting input terminal and output terminal of the differential input stage 15A1 to be diagnosed, and a switch SW2 connected between the inverting input terminal and input terminal of the differential input stage 15A1. The self-diagnostic circuit 1A0 includes an AD converter 1A1 that converts a node voltage Vb generated at the output terminal of the differential input stage 15A1 when the switch SW2 is off and the switch SW1 is on into actual measurement data D1. The self-diagnostic circuit 1A0 includes a storage unit 1A2 that stores predetermined reference value data D0 in a nonvolatile manner. The self-diagnostic circuit 1A0 also includes a fault detection unit 1A3 that compares the actual measurement data D1 with the reference value data D0 to determine whether the differential input stage 15A1 is normal. The reference value data D0 is the initial value of the actual measurement data D1 acquired before diagnosing the differential input stage 15A1. When diagnosing the differential input stage 15A1, a predetermined reference voltage Va is applied to the non-inverting input terminal of the differential input stage 15A1 from a voltage divider circuit 14A made up of resistor elements R21 and R22. The differential input stage 15A1 includes transistors P1, P2, N1, and N2.
[0068] In FIG. 3, symbols CS1 and CS2 indicate current sources, symbol N3 indicates a transistor, and symbol INV indicates an inverter circuit. In this self-diagnostic circuit 1A0, the fault detection unit 1A3 compares the actual measurement data D1 with the reference value data D0 to determine whether the differential input stage 15A1 is normal or not, so an AD converter 1A1 is used to convert the node voltage Vb into the actual measurement data D1, which leads to an increase in the circuit scale of the self-diagnostic circuit 1A0.
[0069] According to the present embodiment described above, the communication system 80 includes main connectors 170 and 171 that connect the silicon dies 20a and 20b together. The communication system 80 also includes resistive elements Ra and Rb that are mounted on the silicon die 20b and disposed between the positive terminal of the DC power supply Vra and the main connectors 170 and 171. The communication system 80 further includes a receiving unit 160a that is mounted on the silicon die 20b and to which the resistive element Ra and the main connector 170 are commonly connected, and a transmitting circuit 91 that is mounted on the silicon die 20a and that outputs a transmission signal that is a digital signal.
[0070] The communication system 80 includes transistors 92a and 92b mounted on the silicon die 20a. The transistor 92a is disposed between the main connection 170 and ground, and is turned on and off based on a transmission signal VP, thereby causing a reception signal SP of opposite phase to the transmission signal VP to be output from the reception unit 160a. The transistor 92b is disposed between the main connection 171 and ground, and is turned on and off based on a transmission signal VN, thereby causing a reception signal SN of opposite phase to the transmission signal VN to be output from the reception unit 160b.
[0071] The communication system 80 includes a current source 93 mounted on the silicon die 20a. The current source 93 is disposed between the main connection 170 and ground, and causes a constant current to flow from the positive terminal of the DC power supply VRa to ground through the resistor element Ra, the main connection 170, and the transistor 92a. The current source 93 is disposed between the main connection 171 and ground, and causes a constant current to flow from the positive terminal of the DC power supply VRb to ground through the resistor element Rb, the main connection 171, and the transistor 92b.
[0072] The communication system 80 includes comparators 94a and 94b mounted on the silicon die 20a, and a transmitter 98a to which a main connection 170 and a transistor 92a are commonly connected. The communication system 80 also includes the transmitter 98a to which a main connection 170 and a transistor 92b are commonly connected. The comparator 94a determines whether the main connection 170 has failed by determining whether the output voltage of the transmitter 98a is smaller than the output voltage Vrf1 of the constant-voltage power supply 81. The comparator 94b determines whether the main connection 171 has failed by determining whether the output voltage of the transmitter 98b is smaller than the output voltage Vrf1 of the constant-voltage power supply 81.
[0073] As described above, the comparators 94a, 94b can determine whether the main connection units 170, 171 connecting the silicon dies 20a, 20b have failed by determining whether the output voltages of the transmitters 98a, 98b are smaller than the output voltage Vrf1. Therefore, in this embodiment, the circuit size can be made smaller than in the above-described comparative example in which an AD converter is used for failure determination. As described above, it is possible to provide a communication system 80 that can detect failures in the main connection units 170, 171 while reducing the circuit size.
[0074] In this embodiment configured as above, the following advantageous effects (a), (b), (c), (d), (e), (f), (g), (h), (i), and (j) can be obtained. (b) The communication system 80 includes a sub-connection unit 172 that is provided independently of the main connection units 170 and 171, is made of a conductive material, and connects the silicon dies 20a and 20b. The communication system 80 includes a transmission control unit 95 that is mounted on the silicon die 20a and outputs the determination results made by the comparators 94a and 94b to the silicon die 20b side through the sub-connection unit 172. The communication system 80 includes a reception control unit 150 that is mounted on the silicon die 20b and receives the determination results output from the comparators 94a and 94b through the sub-connection unit 172. Therefore, the determination results of the main connection units 170 and 171 can also be shared with the reception control unit 150.
[0075] (c) The communication system 80 includes switches 94d and 94e mounted on the silicon die 20a. The switch 94d connects or disconnects the inverting input terminal of the comparator 94a and the transmitter 98a. The switch 94e connects or disconnects the inverting input terminal of the comparator 94b and the transmitter 98b. Therefore, by turning the switches 94d and 94e on or off, it is possible to control the start and stop of operation of the detection circuit 94.
[0076] (d) At startup, the transmission control unit 95 controls the switches 94d and 94e to connect the inverting input terminals of the comparators 94a and 94b to the transmitters 98a and 98b so that the comparators 94a and 94b can determine whether there is a failure in the main connection units 170 and 171. This makes it possible to detect a failure in the main connection units 170 and 171 before the communication process of the communication system 80 is executed. This reduces the inspection time after mounting the semiconductor device 1X.
[0077] (e) During the execution of the communication process, the transmission control unit 95 controls the switches 94d and 94e to connect the inverting input terminal of the comparator 94a to the transmitter 98a and to connect the inverting input terminal of the comparator 94b to the transmitter 98b. The communication process is a process in which the transistors 92a and 92b are turned on and off based on the transmission signals VP and VN, causing the reception signals SP and SN to be output from the reception units 160a and 160b. Therefore, failures in the main connection units 170 and 171 can be detected in real time during the execution of the communication process.
[0078] (f) The comparator 140a is mounted on the silicon die 20b and determines whether the main connection unit 170 has failed by determining whether the output voltage of the receiving unit 160a is greater than the output voltage Vrf2 of the constant-voltage power supply 101. The comparator 140b is mounted on the silicon die 20b and determines whether the main connection unit 171 has failed by determining whether the output voltage of the receiving unit 160b is greater than the output voltage Vrf2 of the constant-voltage power supply 101. This makes it possible to detect failures in the main connection units 170 and 171 on the silicon die 20b side as well.
[0079] (g) The communication system 80 includes a sub-connection unit 173 made of a conductive material and connecting the silicon dies 20a and 20b. The reception control unit 150 is mounted on the silicon die 20b and outputs the determination results made by the comparators 140a and 140b to the silicon die 20a side through the sub-connection unit 173. Furthermore, the transmission control unit 95 is mounted on the silicon die 20a and receives the determination results output from the comparator 140b through the sub-connection unit 173. This allows the determination results made by the comparators 140a and 140b to be shared on the silicon die 20a side as well.
[0080] (h) The communication system 80 includes a switch 140d mounted on the silicon die 20b, which connects or disconnects the non-inverting input terminal of the comparator 140a and the receiving unit 160a. The communication system 80 also includes a switch 140e mounted on the silicon die 20b, which connects or disconnects the non-inverting input terminal of the comparator 140b and the receiving unit 160b. Therefore, by turning the switches 140d and 140e on or off, it is possible to control the start and stop of operation of the detection circuit 140.
[0081] (i) The reception control unit 150 is mounted on the silicon die 20b, and at startup, controls the switches 140d and 140e to connect the non-inverting input terminals of the comparators 140a and 140b to the reception units 160a and 160b. This allows the comparators 140a and 140b to determine whether or not the main connection units 170 and 171 are faulty at startup. This makes it possible to detect a fault in the main connection units 170 and 171 before the communication process of the communication system 80 is executed. This reduces the inspection time after mounting the semiconductor device 1X.
[0082] (j) During execution of communication processing, the reception control unit 150 controls the switches 140d and 140e to connect the non-inverting input terminal of the comparator 140a to the receiving unit 160a, and to connect the inverting input terminal of the comparator 140b to the receiving unit 160b. This makes it possible to detect failures in the main connection units 170 and 171 in real time during execution of communication processing. (Other embodiments)
[0083] (1) In the above embodiment, an example has been described in which the communication system 80 of the present disclosure is applied to the semiconductor device 1X. However, instead of this, the communication system 80 of the present disclosure may be applied to various devices other than the semiconductor device 1X. In this case, the first circuit board of the present disclosure is applied to a circuit board other than the silicon die 20a, and the second circuit board of the present disclosure is applied to a circuit board other than the silicon die 20b. Furthermore, the main connection parts 170 and 171 connecting the silicon dies 20a and 20b need only include solder and do not need to include the wiring layers 70 and 71.
[0084] (2) In the above embodiment, an example has been described in which the communication system of the present disclosure is a communication system between the electronic circuit 90 mounted on the silicon die 20a and the electronic circuit 100 mounted on the silicon die 20b. However, the communication system of the present disclosure may also be a communication system between an electronic circuit mounted on the silicon substrate 10 and the electronic circuit 100 mounted on the silicon die 20b. Alternatively, the communication system of the present disclosure may be a communication system between the electronic circuit 90 mounted on the silicon die 20a and the electronic circuit mounted on the silicon substrate 10.
[0085] (3) In the above embodiment, an example has been described in which the current source 93 is disposed between the common connection terminal 97 of the source terminals of the transistors 92a and 92b and ground in the communication system 80 of the present disclosure. However, instead of this, the current source 93 may be disposed between the main connection unit 170 and the drain terminal of the transistor 92a. The current source 93 may also be disposed between the main connection unit 171 and the drain terminal of the transistor 92b.
[0086] (4) Note that the present disclosure is not limited to the above-described embodiments and can be modified as appropriate within the scope of the claims. Furthermore, the above-described embodiments are not unrelated to each other and can be combined as appropriate, except in cases where the combination is clearly impossible. Furthermore, it goes without saying that the elements constituting the embodiments in the above-described embodiments are not necessarily essential, except in cases where they are specifically stated as essential or where they are clearly considered essential in principle. [Explanation of symbols]
[0087] 1X Semiconductor device 10 Silicon substrate 20a silicon die 20b silicon die 170 Main Connection 171 Main connection 91 Transmitting circuit 92a transistor 92b transistor 93 Current source 94 Detection circuit 95 Transmission control section
Claims
1. a main connection portion (170) made of a conductive material and connecting the first circuit board (20a) and the second circuit board (20b); a resistive element (Ra) mounted on the second circuit board and disposed between a positive terminal of a DC power supply (VRa) and the main connection portion; a receiving section (160a) mounted on the second circuit board and connected in common to the resistive element and the main connection section; a transmitting circuit (91) mounted on the first circuit board and outputting a transmitting signal; a transmitting switch element (92a) mounted on the first circuit board and disposed between the main connection portion and ground, and turned on and off based on the transmitting signal to cause the receiving portion to output a receiving signal based on the transmitting signal; a current source (93) mounted on the first circuit board and disposed between the main connection portion and ground, and configured to pass a constant current from the positive terminal of the DC power supply to ground through the resistor element, the main connection portion, and the transmitting switch element; a transmitting-side determining unit (94a) mounted on the first circuit board, which determines whether the output voltage of a transmitting unit (98a) to which the main connecting unit and the transmitting switch element are commonly connected is smaller than a reference voltage (Vrf1), thereby determining whether the main connecting unit has failed; A communication system comprising:
2. a sub-connection portion (172) that is provided independently of the main connection portion, is made of a conductive material, and connects between the first circuit board and the second circuit board; a transmission control unit (95) mounted on the first circuit board and outputting the determination result determined by the transmission side determination unit to the second circuit board side through the sub-connection unit; a reception control unit (150) mounted on the second circuit board and receiving the determination result output from the transmission side determination unit through the sub-connection unit; The communication system of claim 1 , comprising:
3. 2. The communication system according to claim 1, further comprising a first control switch (94d) mounted on the first circuit board for connecting or disconnecting the transmission side determination unit and the transmission unit.
4. 4. The communication system according to claim 3, further comprising a determination control unit (95) mounted on the first circuit board and controlling the first control switch to connect the transmitting side determination unit and the transmitting unit at startup so that the transmitting side determination unit can determine whether the main connection unit is faulty.
5. 4. The communication system according to claim 3, further comprising a determination control unit (95) mounted on the first circuit board and controlling the first control switch to connect the transmitting side determination unit and the transmitting unit when the transmitting switch element turns on and off based on the transmitting signal to output the receiving signal from the receiving unit, so that the transmitting side determination unit can determine whether or not the main connection unit has failed.
6. 3. The communication system according to claim 2, further comprising a receiving side determination unit (140a) that determines whether the main connection unit is faulty by determining whether the reference voltage is a first reference voltage, the receiving side determination unit (140a) is mounted on the second circuit board, and whether the output voltage of the receiving unit is greater than a second reference voltage (Vrf2).
7. When the sub-connection portion is defined as a first sub-connection portion, a second sub-connection portion (173) is provided independently of the first sub-connection portion and the main connection portion, is made of a conductive material, and connects between the first circuit board and the second circuit board; When the transmission control unit is a first transmission control unit, a second transmission control unit (150) is mounted on the second circuit board and outputs the determination result determined by the receiving side determination unit to the first circuit board side through the second sub-connection unit; When the reception control unit is a first reception control unit, a second reception control unit (95) is mounted on the first circuit board and receives the determination result output from the second transmission control unit through the second sub-connection unit; The communication system of claim 6 , comprising:
8. 7. The communication system according to claim 6, further comprising a second control switch (140d) mounted on the second circuit board for connecting or disconnecting the receiving side determination unit and the receiving unit.
9. 9. The communication system according to claim 8, further comprising a determination control unit (150) mounted on the second circuit board and controlling the second control switch to connect the receiving side determination unit and the receiving unit at startup so that the receiving side determination unit can determine whether the main connection unit is faulty.
10. 9. The communication system according to claim 8, further comprising a determination control unit (150) mounted on the second circuit board and controlling the second control switch to connect the receiving side determination unit and the receiving unit when the transmitting switch element turns on and off based on the transmitting signal to output the receiving signal from the receiving unit, so that the receiving side determination unit can determine whether or not the main connection unit has failed.
11. When the main connection portion is defined as a first main connection portion, a second main connection portion (171) is made of a conductive material, is provided independently of the main connection portion, and connects between the first circuit board and the second circuit board; a second resistor element (Rb) mounted on the second circuit board and disposed between a positive terminal of a second DC power supply (VRb) and the main connection portion, when the DC power supply is a first DC power supply and the resistor element is a first resistor element; When the receiving unit is defined as a first receiving unit, a second receiving unit (160b) is mounted on the second circuit board and is commonly connected to the second resistor element and the main connection unit; a second transmission circuit (91) mounted on the first circuit board and outputting a second transmission signal having an opposite phase to the transmission signal, when the transmission signal is a first transmission signal and the transmission circuit is a first transmission circuit; a second transmitting switch element (92b) that is mounted on the first circuit board, is disposed between the second main connection portion and ground, and, when the receiving signal is a first receiving signal and the transmitting switch element is a first transmitting switch element, turns on and off based on the second transmitting signal to output a receiving signal based on the second transmitting signal from the second receiving portion; When the current source is defined as a first current source, a second current source (93) is mounted on the first circuit board and disposed between the second transmitting switch element and ground, and causes a constant current to flow from the positive terminal of the second DC power supply to ground through the second resistor element and the main connection part; a second transmitting-side determining unit (94b) that determines whether or not the main connection unit has failed by determining whether or not an output voltage of a second transmitting unit (98b) that is mounted on the first circuit board and to which the main connection unit and the second transmitting switch element are commonly connected is smaller than a second reference voltage (Vrf1), when the transmitting unit is a first transmitting unit and the reference voltage is a first reference voltage; The communication system of claim 1 , comprising:
12. a main connection portion (170) made of a conductive material and connecting the first circuit board (20a) and the second circuit board (20b); a resistive element (Ra) mounted on the second circuit board and disposed between a positive terminal of a DC power supply (VRa) and the main connection portion; a receiving section (160a) mounted on the second circuit board and connected in common to the resistive element and the main connection section; a transmitting circuit (91) mounted on the first circuit board and outputting a transmitting signal; a transmitting switch element (92a) mounted on the first circuit board and disposed between the main connection portion and ground, and turned on and off based on the transmitting signal to cause the receiving portion to output a receiving signal based on the transmitting signal; a current source (93) mounted on the first circuit board and disposed between the main connection portion and ground, and configured to pass a constant current from the positive terminal of the DC power supply to ground through the resistor element, the main connection portion, and the transmitting switch element; a receiving side determination unit (140a) for determining whether the main connection unit is faulty by determining whether the output voltage of the receiving unit is greater than a reference voltage (Vrf2); A communication system comprising:
Citation Information
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GPU chiplets using high bandwidth crosslinks
US20200409859A1