Method and system for efficient photoelectrochemical etching of silicon carbide and silicon carbide on insulator using LED lamps

Abstract

To provide a method for etching a substrate using a light emitting diode (LED) lamp.SOLUTION: A method for etching a substrate using a light emitting diode (LED) lamp includes placing a substrate in an etch chamber equipped with an LED lamp that emits ultraviolet (UV) light having a select wavelength. The method includes immersing a substrate in an electrolyte solution in an etch chamber and applying a bias voltage between the substrate and the electrolyte solution. The method includes illuminating the substrate with UV light to irradiate a surface of the substrate. The method includes removing the substrate from the electrolyte solution once a desired etch depth is achieved.SELECTED DRAWING: Figure 5

Description

[Technical Field]

[0001] The present disclosure relates generally to semiconductors, and more particularly to methods and systems for efficient photoelectrochemical etching of silicon carbide and silicon carbide-on-insulator using LED lamps. [Background technology]

[0002] Photonic circuits, also known as integrated optical circuits, manipulate photons to perform various functions, similar to the way electronic circuits manipulate electrons. Photonic circuits are used in applications such as telecommunications, sensing, signal processing, and quantum computing. Photonic circuits include components such as waveguides, modulators, detectors, and light sources integrated on a chip.

[0003] Silicon carbide-on-insulator (SiCOI) technology is widely used in the fabrication of photonic circuits. SiCOI is a semiconductor technology that integrates a thin layer of silicon carbide (SiC) on an insulating substrate, typically silicon dioxide (SiO2). SiC has wide bandgap properties that enable operation at higher frequencies and powers, reducing signal loss and increasing efficiency. SiC also effectively dissipates heat, which is crucial for high-power photonic applications. Furthermore, SiC is resistant to harsh environmental conditions, making it suitable for durable photonic devices. These properties make SiC ideal for photonic circuits.

[0004] The SiCOI structure includes multiple layers: A substrate layer (e.g., Si) provides a mechanical support base; an insulator layer (e.g., silicon dioxide (SiO2)) is formed on top of the substrate layer; the insulator layer electrically insulates the top layer (e.g., a thin layer of SiC) from the substrate layer, minimizing parasitic capacitance and leakage current; and a photonic device is fabricated on the top layer.

[0005] A process known as photoelectrochemical (PEC) etching is used to etch SiC materials to a desired etch depth (e.g., 1 micrometer, 5 micrometers, or 7 micrometers). A SiC substrate is placed in an etching chamber equipped with an ultraviolet (UV) light source (e.g., a mercury lamp). The SiC substrate is immersed in an electrolyte solution in the etching chamber, and a bias voltage is applied between the substrate and the electrolyte solution. The substrate is then illuminated with UV light emitted by the light source. When the UV light irradiates the surface of the substrate, an oxide (e.g., SiO2) forms on the surface through an oxidation reaction. The oxide is then dissolved by the electrolyte solution. The substrate is etched until the desired etch depth is achieved. The etch rate and etched surface roughness of the substrate are controlled by varying the intensity of the UV light and adjusting the bias voltage. Summary of the Invention [Problem to be solved by the invention]

[0006] In photonic circuits, maintaining uniform cross-sectional dimensions of the wafer is crucial for consistent light propagation. Thickness variations in SiC can alter the optical path length, causing phase errors and signal degradation. Non-uniform SiC layers can result in refractive index variations, affecting the performance of devices such as modulators, resonators, and filters. Thickness variations are measured as total thickness variation (TTV), which is the difference between the maximum and minimum thicknesses observed in a material layer across the wafer. A low TTV indicates that the SiC layer is flat and uniform in thickness. A high TTV indicates significant thickness variation, which can lead to reduced device performance and problems in subsequent processing steps.

[0007] Conventional mercury lamps have drawbacks because they produce non-uniform light intensity across the wafer surface. The emitted light can create hot spots (areas of higher intensity) and dark spots (areas of lower intensity), resulting in uneven generation of electron-hole pairs on the SiC surface. This uneven light intensity causes uneven etching rates; areas exposed to higher-intensity light etch faster and remove more material, while areas exposed to lower-intensity light etch more slowly. This mismatch directly contributes to increased total thickness variation (TTV). Mercury lamps also emit light with a wide range of wavelengths, not all of which are effective in the etching process. While UV light is essential for generating electron-hole pairs in SiC, mercury lamps also emit visible and infrared light, which do not support the etching process and can cause undesirable heating.

[0008] Additionally, conventional methods typically utilize hydrofluoric acid (HF) as the electrolyte solution, which, however, poses a safety hazard due to its corrosive nature.

[0009] An exemplary embodiment provides a method for etching a substrate using a light-emitting diode (LED) lamp. The method includes placing a substrate in an etching chamber equipped with an LED lamp that emits ultraviolet (UV) light having a selected wavelength. The method includes immersing the substrate in an electrolyte solution in the etching chamber and applying a bias voltage between the substrate and the electrolyte solution. The method includes illuminating the substrate with the UV light to irradiate a surface of the substrate. The method includes removing the substrate from the electrolyte solution once a desired etch depth is achieved. [Means for solving the problem]

[0010] In an exemplary embodiment, the selected wavelength is less than 300 nm, and in another embodiment, the selected wavelength is 275 nm.

[0011] In an exemplary embodiment, the substrate comprises silicon carbide (SiC), and in another embodiment, the substrate comprises silicon carbide-on-insulator (SiCOI).

[0012] In an exemplary embodiment, the method includes adjusting the intensity of the UV light to control the etch rate and etched surface roughness. The method includes adjusting a bias voltage to control the etch rate. The method includes rinsing the etched substrate with deionized water to remove any residual electrolyte solution and drying the substrate.

[0013] In an exemplary embodiment, a method for etching a substrate using a light-emitting diode (LED) lamp includes placing a substrate in an etching chamber equipped with an LED lamp emitting ultraviolet (UV) light having a wavelength of less than 300 nm, the substrate comprising silicon carbide (SiC) or silicon carbide-on-insulator (SiCOI). The method includes immersing the substrate in an electrolyte solution in the etching chamber, the electrolyte solution being an aqueous solution of potassium hydroxide (KOH), sodium hydroxide (NaOH), or lithium hydroxide (LiOH). The method includes applying a bias voltage between the substrate and the electrolyte solution and illuminating the surface of the substrate with UV light to irradiate the surface. The method includes removing the substrate from the electrolyte solution once a desired etch depth is achieved.

[0014] In an exemplary embodiment, a system for etching a substrate includes an etching chamber that holds the substrate. The system includes an LED lamp positioned within the etching chamber that emits UV light at a wavelength less than 300 nm. The system includes an electrolyte solution that includes an aqueous solution of potassium hydroxide (KOH) at a selected concentration. The system includes a voltage source that applies a bias voltage between the substrate and the electrolyte solution, and the surface of the substrate is illuminated with the UV light to irradiate the surface.

[0015] The novel features believed characteristic of the exemplary embodiments are set forth in the appended claims. However, the exemplary embodiments, as well as their preferred modes of use, further objects and features, will best be understood by reference to the following detailed description of exemplary embodiments of the present disclosure when read in conjunction with the accompanying drawings. [Brief explanation of the drawings]

[0016] [Figure 1A] 1 illustrates a system in accordance with an exemplary embodiment. [Figure 1B] 1 shows a graph of current versus voltage for etching n-type and p-type layers. [Figure 2A] An example of PEC etching of an n-type substrate is shown. [Figure 2B] 1 shows a graph of current versus voltage using an LED lamp and a mercury lamp. [Figure 2C] The etch rate at a constant bias voltage is shown. [Figure 3A] 1 illustrates etching of an exemplary SiC substrate. [Figure 3B] 1 shows a graph of current versus voltage for etching a SiC substrate. [Figure 3C] 1 shows a graph of voltage versus time with a constant bias voltage. [Figure 4A] 1 shows the etching of a trenched substrate immersed in a KOH solution. [Figure 4B] 1 shows a graph of current versus voltage for etching a trenched substrate. [Figure 4C] 1 shows a graph of current versus time for etching a trenched substrate. [Figure 5] FIG. 1 is a flow diagram of a process for photoelectrochemical (PEC) etching in accordance with an example embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0017] Exemplary embodiments address the limitations of current photoelectrochemical (PEC) etching. Exemplary embodiments provide methods and systems for efficient PEC etching of silicon carbide (SiC) and silicon carbide-on-insulator (SiCOI) using LED lamps. Additionally, exemplary embodiments enable PEC etching without the need for hydrofluoric acid (HF) as an electrolyte, thus providing environmentally safer PEC etching.

[0018] 1A illustrates a system 100 according to an exemplary embodiment. The system 100 includes a light-emitting diode (LED) lamp 104 configured to emit ultraviolet (UV) light 106. In an exemplary embodiment, the LED lamp 104 is configured to emit UV light 106 having a wavelength of 300 nm or less. In another exemplary embodiment, the LED lamp 104 is configured to emit UV light 106 having a wavelength of approximately 275 nm. The LED lamp 104 is configured to emit light having a wavelength effective for PEC etching (e.g., 300 nm or less).

[0019] The system 100 includes a container 108 that holds an electrolyte solution 110. In an exemplary embodiment, the electrolyte solution 110 is an aqueous solution of potassium hydroxide (KOH). In another exemplary embodiment, the electrolyte solution 110 is an aqueous solution of sodium hydroxide (NaOH), lithium hydroxide (LiOH), or a combination thereof. The electrolyte solution 110 is prepared at a desired concentration (e.g., 2M). The container 110 may include channels and pumps to facilitate circulation of the electrolyte solution 110.

[0020] The electrolyte solution 110 acts as an etchant, inducing a chemical reaction within the material being etched. The electrolyte solution 110 is substantially transparent to UV light 106, allowing the UV light to pass through. The electrolyte solution 110 does not change the wavelength of the UV light passing through it, which is crucial for generating electron-hole pairs within the semiconductor material during PEC etching. The transparency of the electrolyte solution 110 also ensures that the intensity of the UV light remains largely unaffected as it passes through. This transparency is important because consistent light intensity is necessary to maintain a uniform etch rate across the semiconductor surface.

[0021] A focusing lens 112 is positioned in the light path between the LED lamp 104 and the vessel 108 to focus the UV light 106. For example, a UV fused silica focusing lens can be used to focus the light.

[0022] System 100 includes a substrate 114, which may be, for example, SiC or SiCOI. In an exemplary embodiment, substrate 114 includes an n-type layer 116 on top of a p-type layer 118. N-type layer 116 is doped with donor impurities to give it n-type properties, while p-type layer 118 is doped with acceptor impurities to give it p-type properties.

[0023] The system 100 includes a voltage supply 120 configured to apply a bias voltage between the substrate 114 and the KOH solution 110. The voltage supply 120 may be a variable voltage supply configured to adjust the bias voltage between the substrate 114 and the KOH solution 110. By varying the bias voltage, the etch rate of the substrate 114 may be controlled. In another exemplary embodiment, the bias voltage is constant. The etch rate and etched surface roughness may also be controlled by varying the intensity of the UV light.

[0024] The LED lamp 104 is a solid-state lighting device that emits light when an electric current is passed through it. A driver circuit applies the appropriate voltage required by the LED 104. The LED lamp 104 comprises semiconductor materials that emit light when energized. The core of the LED lamp 104 is typically made of materials such as gallium arsenide (GaAs) or gallium nitride (GaN), which determine the wavelength of the emitted light. The core is encapsulated within a clear plastic lens, which helps to focus and direct the light.

[0025] Key advantages of the LED lamp 104 include high energy efficiency, long life, and low heat generation. The LED lamp 104 is configured to emit light having wavelengths effective for etching processes (e.g., 300 nm or less). In contrast, conventional methods typically utilize mercury lamps, which emit light having a wide range of wavelengths, not all of which are effective for etching processes.

[0026] Another advantage is that LED arrays can be constructed with multiple individual LEDs, which provide greater light output than a single LED. LED arrays can be configured in series, parallel, or a combination of both, depending on the desired application and electrical requirements.

[0027] In operation, the substrate 114 is immersed in the electrolyte solution 110, and a bias voltage is applied between the substrate 114 and the KOH solution 110. In the absence of UV light, the substrate surface remains inert to the electrolyte solution 110. However, when UV light 106 illuminates the substrate surface, an electric field is created that drives the movement of ions between the substrate 114 and the electrolyte solution 110, promoting the electrochemical reactions required for etching. The electric field helps oxidize the material on the substrate surface, making it more soluble in the solution 110.

[0028] The system 100 can be used to selectively etch either the n-type layer 116 or the p-type layer 118. Generally, a higher bias voltage is applied to etch the n-type layer, and a lower bias voltage is applied to etch the p-type layer.

[0029] 1B shows graphs 130 and 132 of current versus voltage for the respective n-type layer 116 and p-type layer 118. Graphs 130 and 132 show the etch rates of the layers.

[0030] In the first stage, a bias voltage of approximately 0.85 V is applied between the substrate 114 and the KOH solution 110 to selectively etch the n-type layer 116. The etch rate (oxidation rate) is proportional to the current flow. In this exemplary embodiment, the resulting current is approximately 11 mA, which etches the n-type layer 116. When the etch reaches the p-type layer 118, the current drops substantially, indicating minimal etching of the p-type layer 118.

[0031] In the second step, a bias voltage of about −0.5 V is applied to etch the p-type layer 118. The resulting current is about 8 mA, which etches the p-type layer 118. When the p-type layer 118 is removed, the current drops substantially, indicating a slower etch rate.

[0032] FIG. 2A shows an example of PEC etching of an n-type substrate 204 immersed in a KOH solution 206 and illuminated with 275 nm LED light 208. The substrate 204 may be formed using, for example, SiC. FIG. 2B shows a current versus voltage graph 210 (275 nm LED lamp) and a current versus voltage graph 212 (mercury lamp). Graphs 210 and 212 show the etch rate of the substrate. As shown in FIG. 2B, the 275 nm LED lamp has an etch rate very similar to that of the mercury lamp. FIG. 2C shows an etch rate graph 220 (275 nm LED) and an etch rate graph 222 (mercury lamp) at a constant bias voltage. When the voltage is held constant (e.g., 8 V), the 275 nm LED 220 and the mercury lamp 222 produce similar etch rates.

[0033] 3A shows PEC etching of a SiC substrate 304 immersed in a KOH solution 306 and illuminated with a 275 nm LED 308. The substrate 304 includes an n-type layer 310 (top layer), an i-type layer 312 (middle layer), and an n-type layer 314 (bottom layer).

[0034] 3B shows a current versus voltage graph 320. In the first stage, the bias voltage is held at about 0.8 V to selectively etch the n-type layer 310. In this stage (graph 320), the n-type layer 310 is etched, while the i-type layer 312 is minimally etched.

[0035] In the second stage, when the etching reaches the i-type layer 312, the bias voltage is held at −8 V to selectively etch the i-type layer 312. In this stage (graph 322), the i-type layer 312 has been etched, while the etching of the n-type layer 310 is minimal.

[0036] 3C shows a graph 330 of voltage versus time during etching with a constant bias voltage. In this example, the bias voltage is held at a constant level (e.g., 8 V) to selectively etch the n-type layer 310. As shown, the n-type layer 310 is selectively etched until time T=2500 seconds, when the i-type layer 312 is reached. At this point, the current drops significantly, indicating a significant reduction in the etch rate. As a result, etching of the i-type layer 312 is minimal.

[0037] 4A shows the etching of a substrate 404 immersed in a KOH solution 406 and illuminated with a 275 nm LED 408. In this example, the substrate 404 includes an n-type layer 410 (top layer), a p-type layer 412 (middle layer), and an n-type layer 414 (bottom layer). The top n-type layer 410 has a trench formed in it.

[0038] In the first stage, the bias voltage is held at about 0.55 to etch the n-type layer 410 (top layer). During the etch, the bottom of the trench in the n-type layer 410 and the top surface of the n-type layer 410 are etched. As the trench depth increases, the bottom of the trench reaches the p-type layer 412. Because the bias voltage is set to selectively etch the n-type layer 410, when the trench bottom reaches the p-type layer 412, the top surface of the n-type layer 410 continues to be etched, while etching of the p-type layer 412 is minimal. By comparing the etch rate of the top surface of the n-type layer 410 to the etch rate of the p-type layer 412, the selectivity can be determined.

[0039] 4B shows current versus voltage graphs 420, 422, and 424 associated with the etching of n-type layer 410, p-type layer 412, and n-type layer 414, respectively. In this example, the selectivity of the etching of n-type layer 410 to p-type layer 412 is approximately 20:1.

[0040] In the second stage, the bias voltage is held at about 0.06 V to selectively etch the p-type layer 412. When the etch finally reaches the n-type layer 404, the etch rate slows down. At this stage, the selectivity is 2.5:1.

[0041] 4C shows graphs 430 and 432 of current versus time associated with etching n-type layer 410 and p-type layer 412. In a first stage, the bias voltage is set to 0.55V to selectively etch n-type layer 410, and in a second stage, the bias voltage is set to 0.065V to selectively etch p-type layer 412.

[0042] 5 is a flow diagram of a process 500 for photoelectrochemical (PEC) etching according to an exemplary embodiment. Process 500 begins at block 504, and at block 506, a substrate is placed in an etching chamber equipped with a UV light source. In an exemplary embodiment, the substrate is silicon carbide (SiC) or silicon oxide-on-insulator (SiCOI). At block 508, a UV light source having a particular wavelength suitable for the photoelectrochemical process is selected. In an exemplary embodiment, the UV light source is an LED lamp configured to emit light having a wavelength of approximately 275 nm.

[0043] At block 510, an electrolyte solution is prepared. In an exemplary embodiment, the electrolyte solution is an aqueous solution of potassium hydroxide (KOH) prepared at a desired concentration. Typical concentrations range from 1 M to 5 M, depending on the required etch rate and the particular application. At block 512, a substrate is immersed in the electrolyte solution in an etching chamber, and a bias voltage is applied between the substrate and the electrolyte solution.

[0044] In block 514, the substrate is illuminated with UV light. The light uniformly irradiates the surface to ensure consistent etching across the entire substrate. As the UV light irradiates the surface of the substrate, electron-hole pairs are generated. The holes (positive charges) promote oxidation of the substrate, while the electrons (negative charges) participate in a reduction reaction. The oxidation reaction forms an oxide (e.g., SiO) on the surface, which is then dissolved by the KOH etchant. The intensity of the UV light and the concentration of the electrolyte solution are adjusted as needed to control the etch rate and achieve the desired etch depth and surface quality.

[0045] Once the desired etch depth is achieved, the UV light is turned off and the substrate is removed from the etchant solution in block 516. The etched substrate is rinsed with deionized water to remove any residual electrolyte solution in block 518. The substrate is then dried using nitrogen gas or a suitable drying method.

[0046] As used herein, "several," when used with respect to an item, means one or more of the item. For example, "several different types of networks" means one or more different types of networks.

[0047] Furthermore, the phrase "at least one of," when used in conjunction with a list of items, means that various combinations of one or more of the listed items can be used, and only one of each item in the list may be required. In other words, "at least one of" means that any combination and number of items may be used from the list, but not all of the items in the list are required. An item can be a specific object, thing, or category.

[0048] For example, "at least one of item A, item B, or item C" may include, but is not limited to, item A, item A and item B, or item B. Examples of this may include item A, item B, and item C, or item B and item C. Of course, any combination of these items may be present. In some illustrative examples, "at least one of" may be, for example, but is not limited to, two items A, one item B, and ten items C, four items B and seven items C, or other suitable combinations.

[0049] The flowcharts and block diagrams in the various illustrated embodiments illustrate the architecture, functionality, and operation of some possible implementations of apparatuses and methods in example embodiments. In this regard, each block in the flowcharts or block diagrams may represent at least one of a module, a segment, a function, or a portion of an operation or step. For example, one or more of the blocks can be implemented as program code, hardware, or a combination of program code and hardware. If implemented in hardware, the hardware may take the form of, for example, an integrated circuit that is manufactured or configured to perform one or more operations in the flowcharts or block diagrams. If implemented as a combination of program code and hardware, the implementation may take the form of firmware. Each block in the flowcharts or block diagrams may be implemented using a dedicated hardware system that performs different operations, or a combination of dedicated hardware and program code executed by the dedicated hardware.

[0050] In some alternative implementations of the illustrative embodiments, one or more functions noted in a block may occur out of the order noted in the figures. For example, in some cases, two blocks shown in succession may be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending on the functionality involved. Also, other blocks may be added in addition to the blocks noted in a flowchart or block diagram.

[0051] Various illustrative examples describe components that perform actions or operations. In illustrative embodiments, the components may be configured to perform the described actions or operations. For example, the components may have a structural configuration or design that, when executed by the components, provides the components with the ability to perform the actions or operations described in the illustrative examples.

[0052] Many modifications and variations will be apparent to those skilled in the art. Furthermore, different exemplary embodiments may provide different configurations as compared to other exemplary embodiments. The selected embodiment or embodiments have been chosen and described in order to best explain the principles, practical applications of the embodiments, and to enable others skilled in the art to understand the disclosure of the various embodiments with various modifications suited to the particular use contemplated. [Explanation of symbols]

[0053] 100 system, 104 light-emitting diode (LED) lamp, LED, 106 ultraviolet (UV) light, 108 electrolyte solution, container, 110 electrolyte solution, KOH solution, container, 112 condenser lens, 114 substrate, 116 n-type layer, 118 p-type layer, 120 voltage supply, 130 graph, 132 graph, 204 n-type substrate, 206 KOH solution, 208 275 nm LED light, 210 graph, 212 graph, 220 graph, 275 nm LED, 222 graph, mercury lamp, 304 SiC substrate, 306 KOH solution, 308 275 nm LED, 310 n-type layer, 312 i-type layer, 314 n-type layer, 320 graph, 322 graph, 330 graph, 404 substrate, n-type layer, 406 KOH solution, 408 275nm LED, 410 n-type layer, 412 p-type layer, 414 n-type layer, 420 graph, 422 graph, 424 graph, 430 graph, 432 graph, 500 process

Claims

1. 1. A method (500) for etching a substrate using a light emitting diode (LED) lamp, comprising: placing the substrate (506) in an etching chamber equipped with the LED lamp (508) that emits ultraviolet (UV) light having a selected wavelength; Immersing the substrate (512) in an electrolyte solution (510) in the etching chamber; applying a bias voltage between the substrate and the electrolyte solution (512); illuminating the substrate with the UV light to irradiate the surface of the substrate (514); removing (516) the substrate from the electrolyte solution once the desired etch depth has been achieved; A method (500) comprising:

2. The method of claim 1 , wherein the selected wavelength is less than 300 nm.

3. The method of claim 1 , wherein the selected wavelength is 275 nm.

4. The method of claim 1 , wherein the substrate comprises silicon carbide (SiC) (114).

5. The method of claim 1 , wherein the substrate comprises silicon oxide-on-insulator (SiCOI).

6. The method of claim 1, wherein the electrolyte solution (110) is an aqueous solution of potassium hydroxide (KOH).

7. The method of claim 1, wherein the electrolyte solution (110) is an aqueous solution of sodium hydroxide (NaOH) and lithium hydroxide (LiOH).

8. The method of claim 1 , further comprising adjusting the intensity of the UV light (106) to control an etch rate.

9. The method of claim 1, further comprising adjusting the bias voltage (120) to control an etch rate.

10. The method of claim 1 , wherein the bias voltage is constant.

11. rinsing the etched substrate with deionized water (518) to remove any residual electrolyte solution; drying the substrate; The method of claim 1 further comprising:

12. 1. A method (500) for etching a substrate using a light emitting diode (LED) lamp, comprising: placing (506) the substrate in an etching chamber equipped (508) with the LED lamp emitting ultraviolet (UV) light having a wavelength less than 300 nm, the substrate comprising silicon carbide (SiC) or silicon oxide-on-insulator (SiCOI); Immersing the substrate in an electrolyte solution in the etching chamber (512), the electrolyte solution being an aqueous solution of potassium hydroxide (KOH), sodium hydroxide (NaOH), or lithium hydroxide (LiOH); applying a bias voltage between the substrate and the electrolyte solution (512); illuminating (514) the surface of the substrate with the UV light to irradiate the surface; removing (518) the substrate from the electrolyte solution once the desired etch depth has been achieved; A method (500) comprising:

13. The method of claim 12, wherein the wavelength of the UV light (106) is 275 nm.

14. The method of claim 12, further comprising adjusting the intensity of the UV light (106) to control the etch rate.

15. The method of claim 12, further comprising adjusting the bias voltage (120) to control the etch rate.

16. The method of claim 12 , wherein the bias voltage is constant.

17. rinsing the etched substrate with deionized water (518) to remove any residual electrolyte solution; drying the substrate; The method of claim 12 further comprising:

18. A system (100) for etching a substrate (114), comprising: an etching chamber for holding the substrate (114); an LED lamp (104) positioned within the etching chamber, the LED lamp emitting UV light at a wavelength less than 300 nm; an electrolyte solution (110) in which the substrate is immersed, the electrolyte solution (110) comprising an aqueous solution of potassium hydroxide (KOH) with a concentration ranging from 1 M to 5 M; a voltage source (120) that applies a bias voltage between the substrate (114) and the electrolyte solution (110), wherein a surface of the substrate is illuminated with the UV light (106) to irradiate the surface; A system (100) comprising:

19. 20. The system of claim 18, wherein the wavelength is about 275 nm.

20. 20. The system of claim 18, wherein the etching chamber, the LED lamp (104), the electrolyte solution (110), and the voltage source (120) are operably connected to perform photoelectrochemical etching across the surface.

21. The system of claim 18, wherein the substrate (114) comprises silicon carbide (SiC).

22. The system of claim 18, wherein the substrate (114) comprises silicon oxide-on-insulator (SiCOI).

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