Semiconductor integrated circuit

Abstract

To provide a semiconductor integrated circuit capable of performing accurate conversion by an A / D converter.SOLUTION: The voltage adjustment amplifier 200 amplifies the first reference voltage Vref1 with an adjustable gain to generate a second reference voltage Vref2 to be supplied to the A / D converter. The operational amplifier 210 receives the first reference voltage Vref1. The voltage divider circuit 220 divides the voltage Vref2 outputted from the operational amplifier 210, and supplies the divided voltage Vfb to the second input of the operational amplifier 210. The first resistor R1, the second resistor R2, and the third resistor R3 are connected in series between the operational amplifier 210 and the ground. At least one of the first resistance R1 and the third resistance R3 is a variable resistance. The digital potentiometer 230 is connected in parallel with the second resistor R2.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present disclosure relates to semiconductor integrated circuits. [Background technology]

[0002] A / D converters require a highly accurate reference voltage. As the resolution of A / D converters increases, the accuracy required for the reference voltage also increases.

[0003] The voltage level of the reference voltage generated by a reference voltage source such as a bandgap reference circuit does not necessarily match the reference voltage required by an A / D converter, so a voltage adjustment amplifier is required to adjust the voltage level of the reference voltage.

[0004] Suppose the output voltage of a bandgap reference circuit is expected to have a variation of 3%. To use it as the reference voltage for a 12-bit A / D converter, the error must be reduced to about 0.1% using a voltage adjustment amplifier. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Publication No. 2017-188783

[0006] [overview] The present disclosure has been made in view of the above-mentioned problems, and one purpose of an embodiment thereof is to provide a semiconductor integrated circuit that enables accurate conversion by an A / D converter.

[0007] A semiconductor integrated circuit according to one embodiment of the present disclosure includes a reference voltage source that generates a first reference voltage, a voltage adjustment amplifier that amplifies the first reference voltage with an adjustable gain to generate a second reference voltage, and an A / D converter to which a voltage corresponding to the second reference voltage is supplied. The voltage adjustment amplifier includes an operational amplifier that receives the first reference voltage at a first input terminal, and a voltage divider circuit that divides the output voltage of the operational amplifier and supplies the divided voltage to a second input terminal of the operational amplifier. The voltage divider circuit includes a resistor string including a first resistor, a second resistor, and a third resistor connected in series between an output terminal of the operational amplifier and ground, at least one of the first resistor and the third resistor being a variable resistor, and a digital potentiometer connected in parallel with the second resistor and having an output terminal connected to the second input terminal of the operational amplifier.

[0008] Any combination of the above elements, or mutual substitution of elements or expressions between methods, devices, systems, etc., are also valid aspects of the present invention or the present disclosure. Furthermore, the description in this section (Means for Solving the Problems) does not explain all essential features of the present invention, and therefore, subcombinations of the described features may also constitute the present invention. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a block diagram of a semiconductor integrated circuit according to an embodiment. [Figure 2] FIG. 2 is a circuit diagram of a voltage adjusting amplifier according to the embodiment. [Figure 3] FIG. 3 is a circuit diagram showing a specific example of the configuration of the voltage adjustment amplifier. [Figure 4] FIG. 4 is a circuit diagram showing a specific example of the configuration of the voltage divider circuit. [Figure 5] FIG. 5 is a circuit diagram of a semiconductor integrated circuit according to the first modification. [Figure 6] FIG. 6 is a circuit diagram of a semiconductor integrated circuit according to the second modification. [Figure 7] FIG. 7 is a circuit diagram of a voltage adjustment amplifier according to the third modification.

[0010] [Detailed explanation] (Outline of the embodiment) A summary of some exemplary embodiments of the present disclosure is provided. This summary is intended to provide a simplified overview of some concepts of one or more embodiments in order to provide a basic understanding of the embodiments as a prelude to the more detailed description that follows. It is not intended to limit the scope of the invention or disclosure. Furthermore, this summary is not an exhaustive overview of all possible embodiments, nor does it limit essential elements of the embodiments. For convenience, the term "one embodiment" may refer to one embodiment (example or variant) or multiple embodiments (examples or variants) disclosed herein.

[0011] A semiconductor integrated circuit according to one embodiment includes a reference voltage source that generates a first reference voltage, a voltage adjustment amplifier that amplifies the first reference voltage with an adjustable gain to generate a second reference voltage, and an A / D converter that receives a voltage corresponding to the second reference voltage. The voltage adjustment amplifier includes an operational amplifier that receives the first reference voltage at a first input terminal, and a voltage divider circuit that divides the output voltage of the operational amplifier and supplies the divided voltage to a second input terminal of the operational amplifier. The voltage divider circuit includes a resistor string including a first resistor, a second resistor, and a third resistor connected in series between an output terminal of the operational amplifier and ground, at least one of the first resistor and the third resistor being a variable resistor, and a digital potentiometer connected in parallel with the second resistor and having an output terminal connected to the second input terminal of the operational amplifier.

[0012] With this configuration, the variable resistor allows for coarse adjustment of the gain of the voltage adjustment amplifier, while the digital potentiometer allows for highly accurate adjustment of the gain of the voltage adjustment amplifier. Because the analog switch included in the digital potentiometer is located in a path through which almost no current flows (a high-impedance path), the on-resistance of the analog switch has almost no effect on the output voltage of the voltage adjustment amplifier. This makes it possible to increase the number of gradations (resolution) of the digital potentiometer, thereby enabling the second reference voltage to be adjusted with high precision.

[0013] In one embodiment, the variable resistor may include a plurality of first resistance elements connected in series and having binary-weighted resistance values, and a plurality of switches connected in parallel with the plurality of first resistance elements and capable of being independently controlled to be turned on and off.

[0014] In one embodiment, the second resistor may include a plurality of second resistive elements connected in parallel and having equal resistance values.

[0015] In one embodiment, the semiconductor integrated circuit may further include a buffer that receives the output voltage of the voltage adjustment amplifier. The reference voltage may fluctuate as the A / D converter performs its conversion operation. In this case, the A / D converter cannot proceed to the next operation until the reference voltage settles. By adding a buffer, the reference voltage can be settled in a short time, enabling the A / D converter to operate at high speed.

[0016] In one embodiment, the gain of the buffer may be 0 dB, which allows for high-speed response while keeping the operating current low.

[0017] In one embodiment, the semiconductor integrated circuit may further include a filter disposed between the voltage adjustment amplifier and the buffer. Voltage fluctuations caused by the conversion operation of the A / D converter propagate through the buffer to the output node of the voltage adjustment amplifier. Inserting the filter can prevent voltage fluctuations from being transmitted to the voltage adjustment amplifier, enabling the supply of a more stable reference voltage.

[0018] In one embodiment, the filter may be a T-type RC filter.

[0019] (Embodiment) Preferred embodiments will be described below with reference to the drawings. The same or equivalent components, parts, and processes shown in each drawing will be designated by the same reference numerals, and redundant descriptions will be omitted where appropriate. Furthermore, the embodiments are merely examples and do not limit the invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

[0020] In this specification, "a state in which component A is connected to component B" includes not only a case in which component A and component B are directly physically connected to each other, but also a case in which component A and component B are indirectly connected to each other via other components that do not substantially affect the electrical connection between them or that do not impair the function or effect achieved by their connection.

[0021] Similarly, "a state in which component C is provided between component A and component B" includes not only cases in which components A and C, or components B and C, are directly connected, but also cases in which they are indirectly connected via other components that do not substantially affect the electrical connection state between them or impair the functions or effects achieved by their combination.

[0022] 1 is a block diagram of a semiconductor integrated circuit 100 according to an embodiment. The semiconductor integrated circuit 100 includes a reference voltage source 110, an A / D converter 120, and a voltage adjustment amplifier 200. The reference voltage source 110 is a bandgap reference circuit or the like, and generates a first reference voltage Vref1 that is independent of the power supply voltage and temperature.

[0023] The A / D converter 120 converts an analog input voltage Vin into a digital output signal Dout.

[0024] The voltage adjusting amplifier 200 amplifies the first reference voltage Vref1 with an adjustable gain to generate the second reference voltage Vref2. The A / D converter 120 is supplied with a voltage corresponding to the second reference voltage Vref2 (here, the second reference voltage Vref2).

[0025] 2 is a circuit diagram of a voltage adjusting amplifier 200 according to an embodiment. The voltage adjusting amplifier 200 includes an operational amplifier 210 and a voltage dividing circuit 220. In this embodiment, the voltage adjusting amplifier 200 is a non-inverting amplifier.

[0026] The operational amplifier 210 receives a first reference voltage Vref1 at a first input terminal (non-inverting input terminal)+.

[0027] The voltage divider circuit 220 divides the second reference voltage Vref2, which is the output of the operational amplifier 210, and supplies the divided voltage (called a feedback voltage) Vfb to the second input terminal (inverting input terminal) of the operational amplifier 210.

[0028] The voltage divider circuit 220 includes a resistor string 222 and a digital potentiometer 230 .

[0029] The resistor string 222 includes a first resistor R1, a second resistor R2, and a third resistor R3 connected in series between the output terminal of the operational amplifier 210 and ground. At least one of the first resistor R1 and the third resistor R3 is a variable resistor. In this example, the first resistor R1 is a variable resistor, and its resistance value can be digitally controlled in response to a first control signal ADJ1.

[0030] The three-terminal digital potentiometer 230 is connected in parallel with the second resistor R2. The output terminal of the digital potentiometer 230 is connected to the second input terminal (−) of the operational amplifier 210.

[0031] The voltage adjustment amplifier 200 has the above configuration.

[0032] 3 is a circuit diagram showing a specific configuration example of the voltage adjustment amplifier 200. The first resistor R1 includes resistors R1a and R1b connected in series, n resistors R11, R12, ... R1n (n≧2), and n switches SW11, SW12, ... SW1n. One of the resistors R1a and R1b may be omitted.

[0033] The resistance values ​​of n resistors R11 to R1n are weighted in binary. The resistance value of the i-th resistor R1i is expressed as follows, with R1u as the unit resistance: R1i=R1u / 2 i-1 It can be expressed as:

[0034] Among the plurality of resistors R11 to R1n, the n-th resistor R1n has the smallest resistance value, and its resistance value Rmin is expressed by the following formula. Rmin=R1u / 2 n-1

[0035] The n switches SW11 to SW1n correspond to the n resistors R11 to R1n. The j-th (j=1, 2, . . . n) switch SW1j is connected in parallel with the corresponding resistor R1j.

[0036] The n switches SW11 to SW1n are controlled to be on or off in response to a digital control signal ADJ1.

[0037] The on-resistance of the switches SW11 to SW1n is defined as Ron. This on-resistance Ron is the maximum value when process variations are taken into consideration. In this case, Rmin>Ron This makes it possible to reduce the influence of the on-resistance Ron of the switches SW11 to SW1n on the gain of the voltage adjustment amplifier 200, and to adjust the second reference voltage Vref2 with high precision.

[0038] More preferably, Rmin>Ron×(n-2) It is preferable that the following relationship holds.

[0039] The digital potentiometer 230 includes a plurality of m resistors R41 to R4m connected in parallel with the second resistor R2, and a selector 232. The plurality of resistors R41 to R4m have the same resistance value. A tap is provided at one end of each of the plurality of resistors R41 to R4m. The selector 232 selects a voltage generated at one tap from the plurality of taps in response to the control signal ADJ2, and outputs the selected voltage as the feedback voltage Vfb.

[0040] When the adjustment accuracy (resolution) of the digital potentiometer 230 is V2d, the adjustment range is V2d × m. By setting Vd2 to about twice the adjustment accuracy Vd1 of R1, the on-resistance of the switches SW11 to SW1n on the first resistor R1 side can be tolerated to a certain extent. If the deviation of the trimming resistance of the first resistor R1 reaches Rmin, an error of 1 LSB will occur, but the digital potentiometer 230 can absorb this error of 1 LSB.

[0041] 4 is a circuit diagram showing a specific example of the configuration of the voltage-dividing circuit 220. In this example, n=4, and the first resistor R1 includes four resistors R11 to R14 and four switches SW11 to SW14. The switches SW11 to SW14 are CMOS switches (also called analog switches or transfer gates). The control signal ADJ1 includes n bits b1 to bn corresponding to the multiple switches SW11 to SW1n, and the state of the corresponding switch SW1j is controlled according to each bit bj (j=1, 2...n).

[0042] The second resistor R2 may include k (k≧2) resistor elements R21 to R2k connected in parallel. The resistor elements R21 to R2k may have the same resistance value R2u. During the circuit design stage, the resolution of gain adjustment in the digital potentiometer 230 can be adjusted according to the number k.

[0043] The selector 232 includes m+1 switches SW41 to SW4m+1. The switches SW41 to SW4m+1 are analog switches. The control signal ADJ2 includes m+1 bits b1 to bm+1 corresponding to the switches SW41 to SW4m+1, and the state of the corresponding switch SW4j is controlled according to each bit bj (j=1, 2..., m+1).

[0044] The voltage adjustment amplifier 200 has the above configuration.

[0045] According to this voltage adjustment amplifier 200, the gain of the voltage adjustment amplifier 200 can be adjusted with rough accuracy according to the resistance value of the first resistor R1, which is a variable resistor. Also, the gain of the voltage adjustment amplifier can be adjusted with high accuracy according to the setting of the digital potentiometer 230.

[0046] The analog switches SW41 to SW4m+1 included in the digital potentiometer 230 are located in a path (high-impedance path) through which almost no current flows, so the on-resistance of the analog switches SW41 to SW4m+1 has almost no effect on the output voltage of the voltage adjustment amplifier. This makes it possible to increase the number of gradations (resolution) of the digital potentiometer 230, thereby enabling the second reference voltage Vref2 to be adjusted with high precision.

[0047] Next, a modification of the semiconductor integrated circuit 100 will be described.

[0048] (Variation 1) 1, the second reference voltage Vref2 may fluctuate as the A / D converter 120 performs a conversion operation. This fluctuation becomes noise. While the second reference voltage Vref2 is fluctuating, the A / D converter 120 cannot proceed to the next process, making it difficult to operate the A / D converter 120 at high speed.

[0049] 5 is a circuit diagram of a semiconductor integrated circuit 100A according to Modification 1. The semiconductor integrated circuit 100A includes a reference voltage source 110, an A / D converter 120, a voltage adjustment amplifier 200, and a buffer 130. The buffer 130 receives a second reference voltage Vref2 and outputs a third reference voltage Vref3.

[0050] The third reference voltage Vref3 fluctuates in accordance with the conversion operation of the A / D converter 120. The buffer 130 can quickly settle the third reference voltage Vref3 supplied to the A / D converter 120. This allows the A / D converter 120 to operate at high speed.

[0051] The buffer 130 may be a voltage follower with a gain of 0 dB (1x). Setting the gain to 0 dB enables a high-speed response while suppressing the operating current.

[0052] (Variation 2) 6 is a circuit diagram of a semiconductor integrated circuit 100B according to Modification 2. The semiconductor integrated circuit 100B includes a filter 140. The filter 140 is inserted between the voltage adjustment amplifier 200 and the buffer 130. The filter 140 is a T-type RC filter.

[0053] Fluctuations (noise N) in the third reference voltage Vref3 due to the conversion operation of the A / D converter 120 can propagate toward the voltage adjustment amplifier 200 via the input capacitance C of the buffer 130. The filter 140 blocks this noise N propagating in the reverse direction, thereby suppressing fluctuations in the second reference voltage Vref2.

[0054] (Variation 3) 7 is a circuit diagram of a voltage adjustment amplifier 200C according to Modification 3. In this modification, the third resistor R3 is configured as a variable resistor instead of or in addition to the first resistor R1. This configuration also provides the same effect.

[0055] The embodiments described using specific terms merely illustrate the principles and applications of the present invention, and many modifications and changes in arrangement are permitted to the embodiments as long as they do not deviate from the spirit of the present invention as defined in the claims.

[0056] (Addendum) One aspect of the technology disclosed in this specification can be understood as follows.

[0057] (Item 1) a reference voltage source that generates a first reference voltage; a voltage adjustment amplifier that amplifies the first reference voltage with an adjustable gain to generate a second reference voltage; an A / D converter to which a voltage corresponding to the second reference voltage is supplied; Equipped with The voltage adjustment amplifier an operational amplifier that receives the first reference voltage at a first input terminal; a voltage divider circuit that divides the output voltage of the operational amplifier and supplies the divided voltage to a second input terminal of the operational amplifier; Including, The voltage divider circuit a resistor string including a first resistor, a second resistor, and a third resistor connected in series between the output terminal of the operational amplifier and ground, wherein at least one of the first resistor and the third resistor is a variable resistor; a digital potentiometer connected in parallel with the second resistor and having an output terminal connected to the second input terminal of the operational amplifier; A semiconductor integrated circuit comprising:

[0058] (Item 2) The variable resistor is a plurality of first resistance elements connected in series and having binary-weighted resistance values; a plurality of switches connected in parallel with the plurality of first resistance elements and capable of being independently controlled to be turned on and off; Item 1. The semiconductor integrated circuit according to item 1,

[0059] (Item 3) When the smallest resistance value among the resistance values ​​of the plurality of first resistance elements is Rmin and the on-resistance of the plurality of switches is Ron, Rmin>Ron×(n-2) 3. The semiconductor integrated circuit according to item 2, wherein the following relationship holds:

[0060] (Item 4) 4. The semiconductor integrated circuit according to any one of items 1 to 3, wherein the second resistor includes a plurality of second resistance elements connected in parallel and having the same resistance value.

[0061] (Item 5) 5. The semiconductor integrated circuit according to any one of items 1 to 4, further comprising a buffer that receives the output voltage of the voltage adjustment amplifier.

[0062] (Item 6) 6. The semiconductor integrated circuit according to item 5, wherein the gain of the buffer is 0 dB.

[0063] (Item 7) 7. The semiconductor integrated circuit according to item 5 or 6, further comprising a filter provided between the voltage adjustment amplifier and the buffer.

[0064] (Item 8) 8. The semiconductor integrated circuit according to item 7, wherein the filter is a T-type RC filter. [Explanation of symbols]

[0065] 100...semiconductor integrated circuit, 110...reference voltage source, 120...A / D converter, 130...buffer, 140...filter, 200...voltage adjustment amplifier, 210...operational amplifier, 220...voltage divider circuit, 222...resistor string, R1...first resistor, R2...second resistor, R3...third resistor, 230...digital potentiometer, 232...selector.

Claims

1. a reference voltage source that generates a first reference voltage; a voltage adjustment amplifier that amplifies the first reference voltage with an adjustable gain to generate a second reference voltage; an A / D converter to which a voltage corresponding to the second reference voltage is supplied; Equipped with The voltage adjustment amplifier an operational amplifier having a first input terminal receiving the first reference voltage; a voltage divider circuit that divides the output voltage of the operational amplifier and supplies the divided voltage to a second input terminal of the operational amplifier; Including, The voltage divider circuit a resistor string including a first resistor, a second resistor, and a third resistor connected in series between the output terminal of the operational amplifier and ground, at least one of the first resistor and the third resistor being a variable resistor; a digital potentiometer connected in parallel with the second resistor and having an output terminal connected to the second input terminal of the operational amplifier; A semiconductor integrated circuit comprising:

2. The variable resistor is a plurality of first resistance elements connected in series and having binary-weighted resistance values; a plurality of switches connected in parallel with the plurality of first resistance elements and capable of being independently controlled to be turned on and off; The semiconductor integrated circuit according to claim 1 , comprising:

3. When the smallest resistance value among the resistance values ​​of the plurality of first resistance elements is Rmin and the on-resistance of the plurality of switches is Ron, Rmin>Ron×(n-2) 3. The semiconductor integrated circuit according to claim 2, wherein the following relationship holds:

4. 4. The semiconductor integrated circuit according to claim 1, wherein the second resistor includes a plurality of second resistance elements connected in parallel and having the same resistance value.

5. 4. The semiconductor integrated circuit according to claim 1, further comprising a buffer for receiving an output voltage of said voltage adjusting amplifier.

6. 6. The semiconductor integrated circuit according to claim 5, wherein the gain of said buffer is 0 dB.

7. 6. The semiconductor integrated circuit according to claim 5, further comprising a filter provided between said voltage adjusting amplifier and said buffer.

8. 8. The semiconductor integrated circuit according to claim 7, wherein the filter is a T-type RC filter.

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