Semiconductor device and method of manufacturing the same

Abstract

To provide a semiconductor device capable of forming a suitable electrode layer, and to provide a method of manufacturing the same.SOLUTION: According to one embodiment, a semiconductor device includes a stacked film alternately including a plurality of electrode layers and a plurality of first insulating films in a first direction, and a plate-shaped portion provided in the stacked film, having a plate shape extending in the first direction and a second direction intersecting the first direction, and provided between a first portion and a second portion of the stacked film. The device further includes a first columnar portion including a first charge storage layer and a first semiconductor layer in the first portion, and a second columnar portion including a second charge storage layer and a second semiconductor layer in the second portion. A first electrode layer of the plurality of electrode layers includes a first region in which a concentration of boron, carbon, or nitrogen is a first value, and a second region in which a concentration of boron, carbon, or nitrogen is a second value higher than the first value, and the second region is provided near a side surface of the first electrode layer facing the plate-shaped portion.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] FIELD Embodiments of the present invention relate to a semiconductor device and a manufacturing method thereof. [Background technology]

[0002] When forming an electrode layer (e.g., word line) of a three-dimensional semiconductor memory by a replacement process, a slit is formed in a laminated film including a sacrificial layer, the sacrificial layer is removed from the slit to form a recess in the laminated film, and the electrode layer is formed in the recess. In this case, after the electrode layer is formed, there is a risk that undesirable impurity atoms will diffuse into the electrode layer from the slit. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-150524 Summary of the Invention [Problem to be solved by the invention]

[0004] A semiconductor device capable of forming a suitable electrode layer and a method for manufacturing the same are provided. [Means for solving the problem]

[0005] According to one embodiment, a semiconductor device includes a stacked film including a plurality of electrode layers and a plurality of first insulating films alternately arranged in a first direction, and a plate-like portion provided within the stacked film and having a plate-like shape extending in the first direction and a second direction intersecting the first direction, the plate-like portion being provided between a first portion and a second portion of the stacked film. The device further includes a first columnar portion provided within the first portion, extending in the first direction, and including a first charge storage layer and a first semiconductor layer, and a second columnar portion provided within the second portion, extending in the first direction, and including a second charge storage layer and a second semiconductor layer. A first electrode layer of the plurality of electrode layers includes a first region having a first concentration of boron, carbon, or nitrogen and a second region having a second concentration of boron, carbon, or nitrogen higher than the first value, the second region being provided near a side surface of the first electrode layer facing the plate-like portion. [Brief explanation of the drawings]

[0006] [Figure 1] 1 is a perspective view showing a structure of a semiconductor device according to a first embodiment; [Figure 2] 1 is a cross-sectional view showing the structure of a semiconductor device according to a first embodiment. [Figure 3] 1 is a cross-sectional view (1 / 8) showing a method for manufacturing the semiconductor device according to the first embodiment. [Figure 4] 1 is a cross-sectional view (2 / 8) illustrating the method for manufacturing the semiconductor device according to the first embodiment. [Figure 5] 3 is a cross-sectional view (3 / 8) illustrating the method for manufacturing the semiconductor device according to the first embodiment. [Figure 6] 4 is a cross-sectional view (4 / 8) illustrating the method for manufacturing the semiconductor device according to the first embodiment. [Figure 7] 5 is a cross-sectional view (5 / 8) illustrating the method for manufacturing the semiconductor device according to the first embodiment. [Figure 8] 6 is a cross-sectional view (6 / 8) illustrating the method for manufacturing the semiconductor device according to the first embodiment. [Figure 9] 7 is a cross-sectional view (7 / 8) illustrating the method for manufacturing the semiconductor device according to the first embodiment. [Figure 10]8 is a cross-sectional view (8 / 8) illustrating the method for manufacturing the semiconductor device according to the first embodiment. [Figure 11] 5A to 5C are cross-sectional views showing a method for manufacturing a semiconductor device according to a comparative example of the first embodiment. [Figure 12] 4 is a cross-sectional view (1 / 2) showing a first example of the method for manufacturing the semiconductor device according to the first embodiment. [Figure 13] 4 is a cross-sectional view (2 / 2) showing a first example of the method for manufacturing the semiconductor device according to the first embodiment. [Figure 14] 10 is a cross-sectional view (1 / 2) showing a second example of the method for manufacturing the semiconductor device according to the first embodiment. [Figure 15] 10 is a cross-sectional view (2 / 2) showing a second example of the method for manufacturing the semiconductor device according to the first embodiment. [Figure 16] 10 is a cross-sectional view (1 / 2) showing a third example of the method for manufacturing the semiconductor device according to the first embodiment. [Figure 17] 10 is a cross-sectional view (2 / 2) showing a third example of the method for manufacturing the semiconductor device according to the first embodiment. FIG. [Figure 18] 10 is a cross-sectional view (1 / 2) showing a fourth example of the method for manufacturing the semiconductor device according to the first embodiment. [Figure 19] 10 is a cross-sectional view (2 / 2) showing a fourth example of the method for manufacturing the semiconductor device according to the first embodiment. FIG. [Figure 20] 1 is an enlarged cross-sectional view showing the structure of a semiconductor device according to a first embodiment. [Figure 21] FIG. 10 is a cross-sectional view showing the structure of a semiconductor device according to a second embodiment. [Figure 22] FIG. 10 is an enlarged cross-sectional view showing the structure of a semiconductor device according to a second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described with reference to the drawings. In Figures 1 to 22, the same components are denoted by the same reference numerals, and duplicated descriptions will be omitted.

[0008] (First embodiment) 1 is a perspective view showing the structure of a semiconductor device according to a first embodiment, which is, for example, a three-dimensional semiconductor memory.

[0009] 1, the semiconductor device of this embodiment includes a core insulating film 1, a channel semiconductor layer 2, a tunnel insulating film 3, a charge storage layer 4, a block insulating film 5, and an electrode layer 6. The block insulating film 5 includes an insulating film 5a and an insulating film 5b. The electrode layer 6 includes a barrier metal layer 6a and an electrode material layer 6b.

[0010] In FIG. 1, multiple electrode layers and multiple insulating films are alternately stacked on a substrate, and memory holes MH are provided in these electrode layers and insulating films. FIG. 1 shows one of these electrode layers, electrode layer 6. These electrode layers function, for example, as word lines or select lines of a three-dimensional semiconductor memory. FIG. 1 also shows the X and Y directions, which are parallel to the surface of the substrate and perpendicular to each other, and the Z direction, which is perpendicular to the surface of the substrate. The X, Y, and Z directions intersect with each other. In this specification, the +Z direction is treated as the upward direction, and the −Z direction is treated as the downward direction. The −Z direction may or may not coincide with the direction of gravity. The Z direction is an example of a first direction, and the Y direction is an example of a second direction.

[0011] A core insulating film 1, a channel semiconductor layer 2, a tunnel insulating film 3, a charge storage layer 4, and an insulating film 5a are formed in this order in the memory hole MH, constituting multiple memory cells of the three-dimensional semiconductor memory. The insulating film 5a is formed on the side surfaces of the electrode layer and insulating film in the memory hole MH, and the charge storage layer 4 is formed on the side surface of the insulating film 5a. The charge storage layer 4 is capable of storing signal charges of the three-dimensional semiconductor memory. The tunnel insulating film 3 is formed on the side surface of the charge storage layer 4, and the channel semiconductor layer 2 is formed on the side surface of the tunnel insulating film 3. The channel semiconductor layer 2 functions as a channel of the three-dimensional semiconductor memory. The core insulating film 1 is formed on the side surface of the channel semiconductor layer 2.

[0012] The insulating film 5a is, for example, an SiO2 film (silicon oxide film). The charge storage layer 4 is, for example, an SiN film (silicon nitride film). The tunnel insulating film 3 is, for example, an SiO2 film. The channel semiconductor layer 2 is, for example, a polysilicon layer. The core insulating film 1 is, for example, an SiO2 film.

[0013] The memory hole MH has a columnar shape extending in the Z direction and a circular shape in a plan view. Therefore, the core insulating film 1, the channel semiconductor layer 2, the tunnel insulating film 3, the charge storage layer 4, and the insulating film 5a in the memory hole MH form a columnar portion having a columnar shape extending in the Z direction.

[0014] The insulating film 5b, the barrier metal layer 6a, and the electrode material layer 6b are formed between two of the insulating films, and are formed in this order on the lower surface of the upper insulating film, the upper surface of the lower insulating film, and the side surface of the insulating film 5a. The insulating film 5b is, for example, an Al2O3 film (aluminum oxide film). The barrier metal layer 6a is, for example, a TiN film (titanium nitride film). The electrode material layer 6b is, for example, a W (tungsten) layer.

[0015] FIG. 2 is a cross-sectional view showing the structure of the semiconductor device of the first embodiment.

[0016] In FIG. 2, the semiconductor device of this embodiment includes a substrate 11, a laminated film 12, a plurality of columnar portions 13, and a plate-shaped portion .

[0017] The substrate 11 corresponds to the "substrate" mentioned in the description of FIG. 1. The substrate 11 is, for example, a semiconductor substrate such as a Si (silicon) substrate. When the semiconductor device of this embodiment is manufactured by bonding the substrate 11 to another substrate, the substrate 11 may be removed before the semiconductor device of this embodiment is completed. In this case, the semiconductor device of this embodiment does not need to include the substrate 11.

[0018] The laminated film 12 is formed above the substrate 11 and includes multiple electrode layers 6 and multiple insulating films 7 arranged alternately in the Z direction. These electrode layers 6 and insulating films 7 correspond to the "multiple electrode layers and multiple insulating films" mentioned in the description of FIG. 1. Thus, each electrode layer 6 shown in FIG. 2 includes a barrier metal layer 6a and an electrode material layer 6b, similar to the electrode layer 6 shown in FIG. 1. Each electrode layer 6 shown in FIG. 2 is an example of a first electrode layer. Meanwhile, each insulating film 7 is, for example, a SiO2 film. Each insulating film 7 is an example of a first insulating film. The laminated film 12 further includes multiple insulating films 5b. The top, bottom, and side surfaces of each electrode material layer 6b are covered, in order, with a barrier metal layer 6a and an insulating film 5b.

[0019] 2 includes portions P1 and P2 adjacent to each other in the X direction. The portion P1 is an example of a first portion, and the portion P2 is an example of a second portion. Further details of the portions P1 and P2 will be described later.

[0020] Each columnar portion 13 includes an insulating film 5a, a charge storage layer 4, a tunnel insulating film 3, a channel semiconductor layer 2, and a core insulating film 1, which are formed in this order in the stacked film 12. In FIG. 2, the insulating film 5a, the charge storage layer 4, the tunnel insulating film 3, the channel semiconductor layer 2, and the core insulating film 1 are formed in this order on the side surface of the stacked film 12. Each columnar portion 13 is formed in a memory hole MH formed in the stacked film 12. Each columnar portion 13 has a columnar shape extending in the Z direction and has a circular shape in a plan view. In this embodiment, each columnar portion 13 is formed so as to penetrate the stacked film 12 in the Z direction.

[0021] The semiconductor device of this embodiment includes a plurality of columnar portions 13 provided in portion P1 and a plurality of columnar portions 13 provided in portion P2. The former columnar portions 13 are an example of first columnar portions, and the latter columnar portions 13 are an example of second columnar portions. The charge storage layer 4 and channel semiconductor layer 2 in each of the former columnar portions 13 are an example of a first charge storage layer and a first semiconductor layer, and the charge storage layer 4 and channel semiconductor layer 2 in each of the latter columnar portions 13 are an example of a second charge storage layer and a second semiconductor layer. In FIG. 2, these columnar portions 13 are arranged in the stacked film 12 so as not to contact each other. One of these columnar portions 13 corresponds to the "columnar portion" mentioned in the description of FIG. 1.

[0022] The plate-shaped portion 14 includes an insulating film 14a and a wiring layer 14b formed in this order in the laminated film 12. In FIG. 2, the insulating film 14a is formed on the side surface of the laminated film 12, and the wiring layer 14b is formed on the side surface of the insulating film 14a. The insulating film 14a is, for example, a SiO2 film. The insulating film 14a is an example of a second insulating film. The wiring layer 14b is, for example, a polysilicon layer or a metal layer. In this embodiment, the wiring layer 14b is electrically insulated from each electrode layer 6. The plate-shaped portion 14 is formed in a slit ST formed in the laminated film 12. The plate-shaped portion 14 has a plate-like shape extending in the Z direction and the Y direction and has a linear shape in a planar view. The same applies to the slit ST. Note that the slit ST may be entirely filled with the insulating film 14a instead of the wiring layer 14b. Alternatively, an insulating film other than the insulating film 14a may be used instead of the wiring layer 14b. In this case, the insulating film other than the insulating film 14a may be an insulating film having a composition different from that of the insulating film 14a, and may be, for example, an oxide insulating film or a nitride insulating film.

[0023] The plate-shaped portion 14 is provided between the portion P1 and the portion P2. In this embodiment, the portion P1 and the portion P2 are separated from each other by the plate-shaped portion 14. In this embodiment, a slit ST is formed to separate the laminated film 12 into the portion P1 and the portion P2, and the plate-shaped portion 14 is formed in the slit ST. The semiconductor device of this embodiment has a plurality of plate-shaped portions in the laminated film 12, and FIG. 2 shows one of these plate-shaped portions, the plate-shaped portion 14. The plate-shaped portion 14 may include an insulating film 14a and a wiring layer 14b, or may include only the insulating film 14a.

[0024] Next, each electrode layer 6 will be described in further detail.

[0025] As described above, each electrode layer 6 includes a barrier metal layer 6a and an electrode material layer 6b. The electrode material layer 6b is, for example, a metal layer containing a predetermined metal element. The metal element is, for example, a transition metal element such as a Group 4 element, a Group 5 element, or a Group 6 element. Examples of the metal element include Ti (titanium), Zr (zirconium), Hf (hafnium), V (vanadium), Nb (niobium), Ta (tantalum), Cr (chromium), Mo (molybdenum), and W (tungsten). The electrode material layer 6b in this embodiment is, for example, a W layer containing W as the predetermined metal element. On the other hand, the barrier metal layer 6a in this embodiment is, for example, a TiN film. Note that each electrode layer 6 may include only the electrode material layer 6b instead of including the barrier metal layer 6a and the electrode material layer 6b.

[0026] The electrode material layer 6b of this embodiment further contains B (boron), C (carbon), or N (nitrogen). In the following description, the electrode material layer 6b contains W and B elements. In this embodiment, the atomic concentration of B element (B concentration) in the electrode material layer 6b varies depending on the region within the electrode material layer 6b, as will be described later. The "B element" that appears in the following description can be replaced with C element or N element.

[0027] In this embodiment, the electrode material layer 6b in each electrode layer 6 includes a region Ra and a region Rb. In FIG. 2, the side surface of the electrode material layer 6b in the +X direction in the portion P1 and the side surface of the electrode material layer 6b in the -X direction in the portion P2 face the plate-shaped portion 14 (slit ST). The region Ra is provided near these side surfaces in the electrode material layer 6b, and the region Rb is provided away from these side surfaces in the electrode material layer 6b. In other words, the region Ra is located near the plate-shaped portion 14, and the region Rb is located far from the plate-shaped portion 14. The region Rb is an example of a first region, and the region Ra is an example of a second region.

[0028] As described above, the semiconductor device of this embodiment includes a plurality of plate-shaped portions in the laminated film 12. The portion P1 is provided between the plate-shaped portion 14 shown in FIG. 2 (hereinafter referred to as the "first plate-shaped portion") and another plate-shaped portion (hereinafter referred to as the "second plate-shaped portion"). The region Ra in the portion P1 is located near the first plate-shaped portion or the second plate-shaped portion, and the region Rb in the portion P1 is located far from the first plate-shaped portion and the second plate-shaped portion. This also applies to the regions Ra and Rb in the portion P2. Details of these regions Ra and Rb will be described below using the regions Ra and Rb shown in FIG. 2 as an example.

[0029] In this embodiment, both regions Ra and Rb contain W and B elements. However, in this embodiment, the B concentration in region Ra is higher than the B concentration in region Rb. In this embodiment, as will be described later, B element is introduced into the electrode material layer 6b through the slit ST, which increases the B concentration in region Ra close to the slit ST and decreases the B concentration in region Rb far from the slit ST. The value of the B concentration in region Rb is an example of a first value, and the value of the B concentration in region Ra is an example of a second value.

[0030] The region Ra in this embodiment is, for example, a WB film (tungsten boride film). On the other hand, the region Rb in this embodiment may be a WB film or a W layer containing B as an impurity element. The region Rb in this embodiment may also be a W layer not containing B as an impurity element. In this case, the B concentration in the region Rb is zero. When the electrode material layer 6b contains C, the region Ra is, for example, a WC film (tungsten carbide film). When the electrode material layer 6b contains N, the region Ra is, for example, a WN film (tungsten nitride film).

[0031] The electrode material layer 6b in each electrode layer 6 may include a nucleus layer (seed layer) for forming the electrode material layer 6b near the barrier metal layer 6a. In this case, the seed layer may contain B element before the B element is introduced into the electrode material layer 6b through the slit ST. In this case, the relationship in this embodiment that "the B concentration in the region Ra is higher than the B concentration in the region Rb" holds true in parts other than the seed layer in the electrode material layer 6b. Examples of seed layers will be described later with reference to FIG. 20.

[0032] In this embodiment, when the B element is introduced into the electrode material layer 6b through the slit ST, the B element may also be introduced into the insulating film 7, the barrier metal layer 6a, the insulating film 5b, etc. Such B element will be described later with reference to FIG.

[0033] In this embodiment, before the plate-shaped portions 14 are formed in the slits ST, there is a risk that undesirable impurity atoms may diffuse from the slits ST into the electrode material layer 6b. An example of such impurity atoms is H (hydrogen) atoms. In this case, the diffusion of impurity atoms may deteriorate the reliability of the cell.

[0034] Therefore, in this embodiment, the B concentration in the region Ra is set high. Experiments have shown that the region Ra with a high B concentration acts as a barrier that suppresses the diffusion of impurity atoms, and when the region Ra is a WB film, the barrier effect is enhanced. According to this embodiment, by forming such a region Ra, it becomes possible for the region Ra to suppress the diffusion of impurity atoms from the slit ST into the electrode material layer 6b. Note that the region Ra may be a W layer containing B as an impurity element instead of a WB film, as long as it can sufficiently suppress the diffusion of impurity atoms.

[0035] 3 to 10 are cross-sectional views showing the method for manufacturing the semiconductor device of the first embodiment.

[0036] First, a laminated film 12 is formed above a substrate 11 (FIG. 3). The laminated film 12 shown in FIG. 3 includes a plurality of sacrificial layers 8 and a plurality of insulating films 7 alternately arranged in the Z direction. The laminated film 12 is formed by alternately stacking a plurality of sacrificial layers 8 and a plurality of insulating films 7 above the substrate 11. Each sacrificial layer 8 is, for example, a SiN film. Each sacrificial layer 8 is an example of a first layer. FIG. 3 shows portions P1 and P2 of the laminated film 12.

[0037] Next, a plurality of memory holes MH are formed in the stacked film 12 by lithography and RIE (Reactive Ion Etching) (FIG. 4). FIG. 4 shows a plurality of memory holes MH formed in the portion P1 and a plurality of memory holes MH formed in the portion P2.

[0038] Next, in each memory hole MH, a core insulating film 1, a channel semiconductor layer 2, a tunnel insulating film 3, a charge storage layer 4, and an insulating film 5a are formed in this order (FIG. 5), resulting in the formation of a columnar portion 13 in each memory hole MH.

[0039] Next, a slit ST is formed in the laminated film 12 by lithography and RIE (FIG. 6). The slit ST is formed between the portion P1 and the portion P2 of the laminated film 12. As a result, the portion P1 and the portion P2 are separated from each other by the slit ST. The slit ST is an example of a first recess.

[0040] Next, each sacrificial layer 8 is removed from the laminated film 12 by etching through the slits ST (FIG. 7). As a result, multiple cavities C are formed in the laminated film 12. Each cavity C is formed between two insulating films 7 adjacent to each other in the Z direction. Each cavity C is an example of a second recess. The etching in FIG. 7 is, for example, wet etching. However, the etching in FIG. 7 may also be dry etching.

[0041] Next, an insulating film 5b, a barrier metal layer 6a, and an electrode material layer 6b are formed in this order in each cavity C from the slit ST (FIG. 8). The insulating film 5b, the barrier metal layer 6a, and the electrode material layer 6b are also formed in this order on the side surfaces of the stacked film 12 in the slit ST. In this way, a plurality of electrode layers 6 are formed in the plurality of cavities C. The barrier metal layer 6a and the electrode material layer 6b are examples of materials for these electrode layers 6. In FIG. 8, the barrier metal layer 6a and the electrode material layer 6b are, for example, a TiN film and a W layer, respectively.

[0042] Next, the electrode material layer 6b, the barrier metal layer 6a, and the insulating film 5b are removed from the slits ST by lithography and RIE (FIG. 9). As a result, the plurality of electrode layers 6 are separated from one another. In this manner, the plurality of sacrificial layers 8 are replaced with the plurality of electrode layers 6. In FIG. 9, a portion of the electrode material layer 6b, the barrier metal layer 6a, and the insulating film 5b in each recess C have also been removed.

[0043] In the process shown in FIG. 9, a region Ra having a high B concentration and a region Rb having a low B concentration are formed in the electrode material layer 6b of each electrode layer 6. The regions Ra and Rb are formed, for example, by introducing B elements into the electrode material layer 6b of each electrode layer 6 through the slits ST. As a result, the B concentration in the region Ra close to the slits ST becomes high, and the B concentration in the region Rb far from the slits ST becomes low. Each of the regions Ra and Rb becomes, for example, a WB film or a W layer containing B elements as an impurity element. In FIG. 9, the regions Ra and Rb are formed in the portions P1 and P2.

[0044] The regions Ra and Rb may be formed after the plurality of electrode layers 6 are separated from each other, or may be formed before the plurality of electrode layers 6 are separated from each other. This will be described in detail later.

[0045] Next, an insulating film 14a and a wiring layer 14b are formed in this order in the slit ST (FIG. 10), thereby forming a plate-like portion 14 in the slit ST.

[0046] In this manner, the semiconductor device shown in FIG. 2 is manufactured.

[0047] 11A to 11C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to a comparative example of the first embodiment.

[0048] The cross-sectional view of Fig. 11 corresponds to the cross-sectional view of Fig. 9. However, each electrode layer 6 shown in Fig. 9 does not include regions Ra and Rb in the electrode material layer 6b.

[0049] In this comparative example, before the plate-shaped portions 14 are formed in the slits ST, there is a risk that undesirable impurity atoms may diffuse from the slits ST into the electrode material layer 6b. An example of such impurity atoms is H atoms. In this case, the diffusion of impurity atoms may deteriorate the reliability of the cell.

[0050] 11 is a schematic diagram showing how H atoms enter the laminated film 12 through the slit ST. The H atoms enter the laminated film 12 in the form of, for example, H radicals. The H atoms are generated, for example, from process gases or impurities when forming the insulating film 14a (SiO2 film) in the slit ST. Impurity atoms other than H atoms are, for example, O atoms (O radicals).

[0051] Therefore, in this embodiment, regions Ra and Rb are formed in the electrode material layer 6b of each electrode layer 6, and the B concentration in region Ra is set high. This makes it possible to suppress the diffusion of impurity atoms from the slit ST into the electrode material layer 6b by region Ra.

[0052] Next, four examples of the process for forming the regions Ra and Rb will be described with reference to FIGS.

[0053] 12 and 13 are cross-sectional views showing a first example of the method for manufacturing the semiconductor device according to the first embodiment.

[0054] The cross-sectional view of Fig. 12 corresponds to the cross-sectional view of Fig. 9. However, Fig. 12 shows the state after the plurality of electrode layers 6 are separated from each other and before the regions Ra and Rb are formed in the electrode material layer 6b of each electrode layer 6.

[0055] In the first example, a process gas containing B element is supplied into the slit ST (FIG. 12). The process gas is, for example, B2H6 gas. As a result, B element derived from the B2H6 gas penetrates into the electrode material layer 6b mainly near the slit ST. This forms regions Ra and Rb in the electrode material layer 6b (FIG. 13). Then, the process shown in FIG. 10 is performed.

[0056] 14 and 15 are cross-sectional views showing a second example of the method for manufacturing the semiconductor device according to the first embodiment.

[0057] The cross-sectional view of Fig. 14 corresponds to the cross-sectional view of Fig. 9. However, Fig. 14 shows the state after the plurality of electrode layers 6 are separated from each other and before the regions Ra and Rb are formed in the electrode material layer 6b of each electrode layer 6.

[0058] In the second example, a sacrificial layer 21 containing B element is formed on the side surface of the laminated film 12 in the slit ST (FIG. 14). As a result, the side surface of the electrode material layer 6b is covered with the sacrificial layer 21. The sacrificial layer 21 is, for example, a BSG (borosilicate glass) layer. The sacrificial layer 21 is an example of the second layer. Next, the B element contained in the sacrificial layer 21 is diffused from the sacrificial layer 21 into the laminated film 12. As a result, regions Ra and Rb are formed in the electrode material layer 6b (FIG. 15). The diffusion of the B element is induced by, for example, annealing the sacrificial layer 21. Thereafter, the sacrificial layer 21 is removed, and then the process shown in FIG. 10 is performed.

[0059] According to the first example, regions Ra and Rb can be formed by a simple process of supplying B2H6 gas, for example, whereas according to the second example, regions Ra and Rb can be formed even when such a gas supply is not possible.

[0060] 16 and 17 are cross-sectional views showing a third example of the method for manufacturing the semiconductor device according to the first embodiment.

[0061] The cross-sectional view of Fig. 16 corresponds to the cross-sectional view of Fig. 8. Therefore, Fig. 16 shows the state before the plurality of electrode layers 6 are separated from each other and before the regions Ra and Rb are formed in the electrode material layer 6b of each electrode layer 6.

[0062] In the third example, a process gas containing B element is supplied into the slit ST (FIG. 16). The process gas is, for example, B2H6 gas. As a result, B element derived from the B2H6 gas penetrates mainly into the inside of the slit ST and the electrode material layer 6b near the slit ST. This forms regions Ra and Rb in the electrode material layer 6b (FIG. 17). Thereafter, the plurality of electrode layers 6 are separated from each other (FIG. 9), and then the process shown in FIG. 10 is performed.

[0063] 18 and 19 are cross-sectional views showing a fourth example of the method for manufacturing the semiconductor device according to the first embodiment.

[0064] The cross-sectional view of Fig. 18 corresponds to the cross-sectional view of Fig. 8. Therefore, Fig. 18 shows the state before the plurality of electrode layers 6 are separated from each other and before the regions Ra and Rb are formed in the electrode material layer 6b of each electrode layer 6.

[0065] In the fourth example, a sacrificial layer 21 containing B element is formed on the side surface of the electrode material layer 6b in the slit ST (FIG. 18). As a result, the side surface of the electrode material layer 6b is covered with the sacrificial layer 21. The sacrificial layer 21 in the fourth example is, for example, a BSG layer, similar to the sacrificial layer 21 in the second example. Next, the B element contained in the sacrificial layer 21 is diffused from the sacrificial layer 21 into the electrode material layer 6b. As a result, regions Ra and Rb are formed in the electrode material layer 6b (FIG. 19). The diffusion of the B element is induced by, for example, annealing the sacrificial layer 21. Thereafter, the sacrificial layer 21 is removed and the plurality of electrode layers 6 are separated from each other (FIG. 9), and then the process shown in FIG. 10 is performed.

[0066] According to the third example, regions Ra and Rb can be formed by a simple process of supplying B2H6 gas, for example, while according to the fourth example, regions Ra and Rb can be formed even when such a gas supply is not possible.

[0067] 17 or 19, the regions Ra and Rb are formed so that the region Ra remains even after dividing the electrode layer 6. Therefore, in Fig. 17 or 19, the region Ra is formed not only in the electrode material layer 6b located in the slit ST but also in the electrode material layer 6b located in each cavity C.

[0068] FIG. 20 is an enlarged cross-sectional view showing the structure of the semiconductor device of the first embodiment.

[0069] In FIG. 20, the electrode material layer 6b, the barrier metal layer 6a, the insulating film 5a, and the insulating film 7 include a region Ra' and a region Rb'. The region Ra' is located near the plate-shaped portion 14, and the region Rb' is located far from the plate-shaped portion 14. The region Ra' in the electrode material layer 6b corresponds to the above-mentioned region Ra, and the region Rb' in the electrode material layer 6b corresponds to the above-mentioned region Rb. The region Ra' is an example of a third region, and the region Rb' is an example of a fourth region.

[0070] In this embodiment, B element is introduced into the electrode material layer 6b through the slit ST, which increases the B concentration in the region Ra close to the slit ST and decreases the B concentration in the region Rb far from the slit ST. This phenomenon also occurs in the regions Ra' and Rb'. Therefore, the B concentration in the region Ra' close to the slit ST increases and the B concentration in the region Rb' far from the slit ST decreases. For example, in each insulating film 7, the B concentration in the region Ra' is higher than the B concentration in the region Rb'. The B concentration in the region Rb' is an example of a third value, and the B concentration in the region Ra' is an example of a fourth value.

[0071] 20, the electrode material layer 6b includes an electrode material layer 31 formed on the surface of the barrier metal layer 6a and an electrode material layer 32 formed on the surface of the electrode material layer 31. The electrode material layer 32 is formed on the surface of the barrier metal layer 6a via the electrode material layer 31 and is located within the electrode material layer 31. The electrode material layer 31 is, for example, a seed layer that serves as a nucleus for forming the electrode material layer 6b. The electrode material layer 32 is, for example, a bulk layer formed using the seed layer. The electrode material layer 31 is an example of a first film, and the electrode material layer 32 is an example of a second film.

[0072] The electrode material layer 31 may contain the B element before the B element is introduced into the electrode material layer 6b through the slits ST. For example, when the electrode material layer 31 is a seed layer, the electrode material layer 31 is often formed to contain the B element. In this case, the relationship in this embodiment that "the B concentration in the region Ra is higher than the B concentration in the region Rb" holds true for the electrode material layer 32. That is, the B concentration in the region Ra provided in the electrode material layer 32 is higher than the B concentration in the region Rb provided in the electrode material layer 32.

[0073] Before the B element is introduced into the electrode material layer 6b through the slits ST, the electrode material layer 32 is, for example, a W layer. On the other hand, after the B element is introduced into the electrode material layer 6b through the slits ST, the electrode material layer 32 in the region Ra becomes, for example, a WB film, and the electrode material layer 32 in the region Rb becomes, for example, a W layer containing the B element as an impurity element.

[0074] As described above, the electrode material layer 6b in each electrode layer 6 of this embodiment includes regions Ra and Rb, and the B concentration in region Ra is higher than the B concentration in region Rb. Therefore, this embodiment makes it possible to realize a suitable electrode layer 6. For example, region Ra can suppress the diffusion of impurity atoms from the slit ST into the electrode material layer 6b, thereby suppressing deterioration of cell reliability.

[0075] (Second embodiment) FIG. 21 is a cross-sectional view showing the structure of the semiconductor device of the second embodiment.

[0076] The semiconductor device of this embodiment shown in Fig. 21 has the same structure as the semiconductor device of the first embodiment shown in Fig. 2. However, the insulating film 5b of this embodiment is formed not only between the electrode layer 6 and the insulating film 5a adjacent to each other, or between the electrode layer 6 and the insulating film 7 adjacent to each other, but also between the insulating film 14a and each insulating film 7.

[0077] The semiconductor device of this embodiment can be manufactured by, for example, performing the step shown in Fig. 9 by "isotropic etching" instead of "lithography and RIE" when manufacturing a semiconductor device through the steps shown in Fig. 3 to Fig. 10. This makes it possible to remove the barrier metal layer 6a and the electrode material layer 6b from the slit ST while leaving the insulating film 5b in the slit ST. Examples of the above isotropic etching include wet etching and CDE (Chemical Dry Etching).

[0078] FIG. 22 is an enlarged cross-sectional view showing the structure of the semiconductor device of the second embodiment.

[0079] Fig. 22 of this embodiment is a cross-sectional view corresponding to Fig. 20 of the first embodiment. In Fig. 22, the insulating film 5b is also formed between the insulating film 14a and each insulating film 7. The insulating film 5b formed between the insulating film 14a and each insulating film 7 forms part of the region Ra'.

[0080] According to this embodiment, similarly to the first embodiment, it is possible to realize a suitable electrode layer 6. Furthermore, according to this embodiment, it is possible to suppress the diffusion of impurity atoms from the slits ST into the electrode material layer 6b by the insulating film 5b as well.

[0081] Although several embodiments have been described above, these embodiments are presented only as examples and are not intended to limit the scope of the invention. The novel apparatus and method described herein may be embodied in various other forms. Furthermore, various omissions, substitutions, and modifications may be made to the forms of the apparatus and method described herein without departing from the spirit of the invention. The appended claims and their equivalents are intended to cover such forms and modifications that fall within the scope and spirit of the invention. [Explanation of symbols]

[0082] 1: core insulating film, 2: channel semiconductor layer, 3: tunnel insulating film, 4: charge storage layer, 5: block insulating film, 5a: insulating film, 5b: insulating film, 6: electrode layer, 6a: barrier metal layer, 6b: electrode material layer, 7: insulating film, 8: sacrificial layer, 11: substrate, 12: laminated film, 13: columnar portion, 14: Plate-shaped portion, 14a: Insulating film, 14b: Wiring layer, 21: Sacrificial layer, 31: Electrode material layer, 32: Electrode material layer

Claims

1. a stacked film including a plurality of electrode layers and a plurality of first insulating films alternately arranged in a first direction; a plate-like portion provided in the laminated film, having a plate-like shape extending in the first direction and a second direction intersecting the first direction, and provided between a first portion and a second portion of the laminated film; a first columnar section provided in the first portion, extending in the first direction, and including a first charge storage layer and a first semiconductor layer; a second columnar section provided in the second portion, extending in the first direction, and including a second charge storage layer and a second semiconductor layer; a first electrode layer of the plurality of electrode layers includes a first region having a first concentration of boron, carbon, or nitrogen, and a second region having a second concentration of boron, carbon, or nitrogen that is higher than the first value; The second region is provided near a side surface of the first electrode layer that faces the plate-shaped portion.

2. The semiconductor device according to claim 1 , wherein the second region contains a metal element and boron, carbon, or nitrogen.

3. 3. The semiconductor device according to claim 2, wherein said second region is formed of a metal boride film, a metal carbide film, or a metal nitride film.

4. The semiconductor device according to claim 2 , wherein the metal element is a transition metal element.

5. 3. The semiconductor device according to claim 2, wherein the metal element is a Group 4 element, a Group 5 element, or a Group 6 element.

6. 3. The semiconductor device according to claim 2, wherein the metal element is Ti (titanium), Zr (zirconium), Hf (hafnium), V (vanadium), Nb (niobium), Ta (tantalum), Cr (chromium), Mo (molybdenum), or W (tungsten).

7. 2. The semiconductor device according to claim 1, wherein the second region is provided in the first electrode layer located in the first portion and in the first electrode layer located in the second portion.

8. 2. The semiconductor device according to claim 1, wherein said plate-like portion includes a second insulating film provided on a side surface of said laminated film, and a wiring layer provided on a side surface of said second insulating film.

9. the first electrode layer includes a first film and a second film provided within the first film; the first electrode layer includes the first region and the second region within the second film; The semiconductor device according to claim 1 .

10. at least one first insulating film among the plurality of first insulating films includes a third region in which the concentration of boron, carbon, or nitrogen is a third value, and a fourth region in which the concentration of boron, carbon, or nitrogen is a fourth value higher than the third value; 2. The semiconductor device according to claim 1, wherein said fourth region is provided in the vicinity of a side surface of said at least one first insulating film that faces said plate-like portion.

11. forming a laminated film including a plurality of first layers and a plurality of first insulating films alternately in a first direction; forming a first columnar section extending in the first direction and including a first charge storage layer and a first semiconductor layer in a first portion of the stacked film; forming a second columnar section extending in the first direction and including a second charge storage layer and a second semiconductor layer in a second portion of the stacked film; forming a first recessed portion in the stacked film, the first recessed portion having a plate-like shape extending in the first direction and a second direction intersecting the first direction, and positioned between the first portion and the second portion; replacing the plurality of first layers with a plurality of electrode layers from the first recess; forming a plate-like portion having a plate shape extending in the first direction and the second direction in the first recess; This includes: a first electrode layer of the plurality of electrode layers is formed to include a first region having a first concentration of boron, carbon, or nitrogen, and a second region having a second concentration of boron, carbon, or nitrogen that is higher than the first value; The second region is formed near a side surface of the first electrode layer facing the first recess.

12. 12. The method for manufacturing a semiconductor device according to claim 11, wherein the second region is formed in the first electrode layer by supplying a gas containing boron, carbon, or nitrogen into the first recess.

13. 12. The method for manufacturing a semiconductor device according to claim 11, wherein the second region is formed by forming a second layer containing boron, carbon, or nitrogen on the side surface of the first electrode layer, and diffusing boron, carbon, or nitrogen from the second layer into the first electrode layer.

14. The substitution is removing the plurality of first layers from the film stack to form a plurality of second recesses in the film stack; forming a material for the plurality of electrode layers in the plurality of second recesses and the first recesses; removing the material from the first recess to separate the plurality of electrode layers from one another; The method for manufacturing a semiconductor device according to claim 11,

15. The method for manufacturing a semiconductor device according to claim 14 , wherein the second region is formed after dividing the plurality of electrode layers from each other.

16. The method for manufacturing a semiconductor device according to claim 14 , wherein the second region is formed before the plurality of electrode layers are separated from each other.

17. 12. The method for manufacturing a semiconductor device according to claim 11, wherein the second region is formed to contain a metal element and boron, carbon, or nitrogen.

18. 12. The method for manufacturing a semiconductor device according to claim 11, wherein the second region is formed in the first electrode layer located in the first portion and in the first electrode layer located in the second portion.

19. The method for manufacturing a semiconductor device according to claim 11 , wherein the plate-like portion is formed after the second region is formed in the first electrode layer.

20. The method for manufacturing a semiconductor device according to claim 11 , wherein the plate-like portion is formed by sequentially forming a second insulating film and a wiring layer in the first recess.

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