Generation of ion energy distribution function (IEDF)

Abstract

To provide a system and a method for generating an arbitrarily shaped ion energy distribution function using a shaped pulse bias.SOLUTION: In one embodiment, a method includes applying a positive jump voltage to an electrode of a processing chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and modulating an amplitude of the wafer voltage to generate a predetermined number of pulses to determine an ion energy distribution function. In another embodiment, a method includes applying a positive jump voltage to an electrode of a processing chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and applying a ramp voltage to the electrode that overcompensates for an ion current on the wafer or applying a ramp voltage to the electrode that undercompensates for the ion current on the wafer.SELECTED DRAWING: Figure 8

Description

[Technical Field]

[0001] BACKGROUND OF THE INVENTION 1. Field of the Invention Embodiments of the present disclosure relate generally to systems and methods for processing substrates, and more particularly to systems and methods for plasma processing of substrates.

[0002] A typical reactive ion etching (RIE) plasma processing chamber contains an RF bias generator that supplies a radio frequency (RF) voltage to a "power electrode" and a metal base plate embedded in an "electrostatic chuck" (ESC), more commonly referred to as the "cathode." Figure 1(a) shows a plot of a typical RF voltage supplied to the power electrode in a typical processing chamber. The power electrode is capacitively coupled to the processing system's plasma through a ceramic layer that is part of the ESC assembly. The nonlinear, diode-like nature of the plasma sheath rectifies the applied RF electric field, resulting in a direct current (DC) voltage drop, or "self-bias," between the cathode and the plasma. This voltage drop determines the average energy of the plasma ions accelerated toward the cathode and, therefore, the etch anisotropy.

[0003] More specifically, ion directionality, feature profile, and mask and stop layer selectivity are controlled by the ion energy distribution function (IEDF). In RF-biased plasmas, the IEDF typically has two peaks at low and high energies, with a population of ions in between. The presence of an ion population in between the two peaks in the IEDF reflects the fact that the voltage drop between the cathode and plasma oscillates with the bias frequency. When using a lower-frequency RF bias generator, e.g., 2 MHz, to achieve a higher self-bias voltage, the energy difference between these two peaks can be significant, and etching by ions in the low-energy peak is more isotropic, potentially leading to bowing of the feature walls. Compared to high-energy ions, low-energy ions are less effective at reaching the bottom corners of features (e.g., due to charging effects), but they also sputter less mask material. This is important for high-aspect-ratio etching applications (e.g., hard mask openings).

[0004] As feature sizes continue to shrink and aspect ratios increase, feature profile control requirements become more stringent, while having a well-controlled IEDF at the substrate surface during processing becomes more desirable. A single-peak IEDF can be used to construct any IEDF, including a two-peak IEDF with independently controlled peak height and peak energy, which is extremely beneficial for precision plasma processing. Generating a single-peak IEDF requires a nearly constant voltage at the substrate surface relative to the plasma, i.e., a sheath voltage that determines the ion energy. Assuming the plasma potential (typically zero or near ground potential in processing plasmas) is constant over time, it is necessary to maintain a nearly constant voltage at the substrate relative to ground, i.e., the substrate voltage. Because ion currents constantly charge the substrate surface, this cannot be achieved by simply applying a DC voltage to the power electrode. As a result, the total applied DC voltage is dropped across the substrate and the ceramic portion of the ESC (i.e., the chuck capacitance), rather than across the plasma sheath (i.e., the sheath capacitance). To overcome this, a specially shaped pulsed bias scheme was developed in which the applied voltage is shared between the chuck volume and the sheath volume (we ignore the voltage drop at the substrate, since the substrate volume is typically much larger than the sheath volume). This scheme compensates for the ion current, allowing the sheath and substrate voltages to remain constant for up to 90% of each bias voltage cycle. More precisely, this bias scheme allows the maintenance of a specific substrate voltage waveform, which can be described as a series of periodic short positive pulses on top of a negative DC offset (Figure 1(b)). During each pulse, the substrate potential reaches the plasma potential and the sheath briefly collapses, but for ~90% of each cycle, the sheath voltage remains constant and equal to the negative voltage jump at the end of each pulse, thus determining the average ion energy. Figure 1(a) shows a plot of the specially shaped pulsed bias voltage waveform developed to generate this specific substrate voltage waveform, thereby allowing the sheath voltage to remain nearly constant.As shown in Figure 2, the shaped pulse bias waveform has two functions: (1) a positive jump to remove the excess charge accumulated in the chuck capacitance during the compensation phase, (2) a positive jump to reduce the sheath voltage (V). SH ) value to set the negative jump (V OUT ) - i.e., V OUT is shared between the chuck capacitance and sheath capacitance connected in series, determining the negative jump in the substrate voltage waveform (where V OUT (where the negative voltage ramp is generally greater than the negative jump in the substrate voltage waveform), and (3) a negative voltage ramp to compensate for the ion current and keep the sheath voltage constant during this long "ion current compensation phase." The inventors emphasize that there may be other shaped pulse bias waveforms that can also maintain the particular substrate voltage waveform shown in FIG. 1(b) (characterized by a nearly constant sheath voltage) and thus generate a monoenergetic IEDF. For example, if the electrostatic chuck capacitance is much larger than the sheath capacitance, the negative voltage ramp phase described in (3) above can be replaced with a constant voltage phase. These other shaped pulse bias waveforms can also be used to implement some of the systems and methods proposed below, and the inventors will make special mention of them, where applicable.

[0005] Although a single-peak IEDF is widely considered to be a highly desirable IEDF shape, resulting in improved selectivity and feature profile, some etch applications require an IEDF with a different shape (such as a wider IEDF).

[0006] Provided herein are systems and methods for generating arbitrarily shaped ion energy distribution functions using shaped pulsed bias.

[0007] In some embodiments, the method includes applying a shaped pulse bias to an electrode of a processing chamber in a predetermined manner and adjusting the amplitude of a negative voltage jump (V OUT ), and therefore the sheath voltage (V SH), where the relative number of pulses at a particular amplitude determines the relative ion fraction at the ion energy corresponding to that amplitude. We emphasize that the present scheme can be implemented with any shaped pulse bias waveform (not necessarily that shown in FIG. 1(a)) that can maintain the particular substrate voltage waveform shown in FIG. 1(b) (characterized by a nearly constant sheath voltage) and thus generate a monoenergetic IEDF.

[0008] In some other embodiments, the method includes applying a shaped pulse bias with a voltage waveform shown in Figure 1(a) and generating a voltage ramp during an ion compensation phase that has a more negative slope (dV / dt) than required to maintain the substrate voltage constant, i.e., overcompensating the ion current. In some other embodiments, the method includes applying a shaped pulse bias with a voltage waveform shown in Figure 1(a) and generating a voltage ramp during an ion compensation phase that has a less negative slope (dV / dt) than required to maintain the substrate voltage constant, i.e., undercompensating the ion current.

[0009] Other and further embodiments of the present disclosure are described below. [Brief explanation of the drawings]

[0010] Embodiments of the present disclosure, briefly summarized above and described in more detail below, can be understood by reference to exemplary embodiments of the present disclosure that are illustrated in the accompanying drawings. However, the accompanying drawings depict only typical embodiments of the present disclosure and are therefore not to be construed as limiting the scope, which may include other equally effective embodiments.

[0011] [Figure 1(a)] 1 shows a plot of a specially shaped pulse developed to allow the sheath voltage to remain constant. [Figure 1(b)]1(b) shows a plot of a particular substrate voltage waveform resulting from the biasing scheme of FIG. 1(a), which allows the sheath and substrate voltages to remain constant for up to 90% of each bias voltage cycle. [Figure 1(c)] 1(a) shows a plot of the single-peak IEDF resulting from the biasing scheme of FIG. 1(a). [Figure 2] 1 illustrates a substrate processing system to which embodiments according to the present principles can be applied. [Figure 3] 10 shows a plot of a voltage pulse for setting the value of the substrate voltage, in accordance with an embodiment of the present principles; [Figure 4] 4 shows the resulting IEDF plots for selected voltage pulses of FIG. 3, in accordance with an embodiment of the present principles. [Figure 5] 2 shows a plot of the specially shaped pulse of FIG. 1 modified to overcompensate and undercompensate the ion current, in accordance with an embodiment of the present principles. [Figure 6] 6 shows a plot of the induced voltage pulse on the wafer resulting from the specially shaped pulse of FIG. 5. [Figure 7] 7 shows the resulting IEDF plot for the voltage pulse of FIG. 6, in accordance with an embodiment of the present principles. [Figure 8] 1 shows a flow diagram of a method for generating an arbitrarily shaped ion energy distribution function, in accordance with an embodiment of the present principles; [Figure 9] 10 shows a flow diagram of a method for generating an arbitrarily shaped ion energy distribution function, in accordance with another embodiment of the present principles; [Figure 10] 10 shows a flow diagram of a method for generating an arbitrarily shaped ion energy distribution function, in accordance with another embodiment of the present principles;

[0012] To facilitate understanding, the same reference numbers have been used, whenever possible, to indicate identical elements common to the figures. The figures may not be drawn to scale and may be simplified for clarity. Elements and features of one embodiment may be beneficially incorporated in other embodiments without further description. DETAILED DESCRIPTION

[0013] Systems and methods are provided herein for generating arbitrarily shaped ion energy distribution functions using a shaped pulse bias. The systems and methods of the present invention advantageously facilitate generating arbitrarily shaped ion energy distribution functions (IEDFs) by amplitude modulation of a shaped pulse bias waveform. Embodiments of the methods of the present invention advantageously shape the voltage waveform to provide arbitrary IEDF shapes, for example, IEDFs with wider profiles. In the description herein, the terms wafer and substrate are used interchangeably.

[0014] Figure 2 shows a high-level schematic diagram of a substrate processing system 200 to which embodiments according to the present principles can be applied. The substrate processing system 200 of Figure 2 illustratively includes a substrate support assembly 205 and a bias power supply 230. In the embodiment of Figure 2, the substrate support assembly 205 includes a substrate support pedestal 210, a power electrode 213, and a ceramic layer 214 that separates the power electrode 213 from a surface 207 of the substrate support assembly 205. In various embodiments, the system 200 of Figure 2 can include components of a plasma processing chamber (e.g., a SYM3®, DPS®, ENABLER®, ADVANTEDGE™, and AVATAR™ processing chambers available from Applied Materials, Inc. of Santa Clara, California, or other processing chambers).

[0015] In some embodiments, the bias power supply 230 includes a memory for storing a control program and a processor for executing the control program, which control the voltage supplied by the bias power supply 230 to the power electrode 213 to at least modulate the amplitude of the wafer voltage to generate a predetermined number of pulses, and alternatively or additionally apply a negative jump voltage to the electrode to set the wafer voltage for the wafer, or apply a ramp voltage to the electrode that overcompensates or undercompensates the ion current on the wafer in accordance with embodiments of the present principles described herein. In an alternative embodiment, the substrate processing system 200 of Figure 2 includes an optional controller 220 including a memory for storing a control program and a processor for executing the control program in communication with the bias power supply 230, which control program at least control the voltage supplied by the bias power supply 230 to the power electrode 213 to at least modulate the amplitude of the wafer voltage to generate a predetermined number of pulses, and alternatively or additionally apply a negative jump voltage to the electrode to set the wafer voltage for the wafer, or apply a ramp voltage to the electrode that overcompensates or undercompensates the ion current on the wafer in accordance with embodiments of the present principles described herein.

[0016] During operation, a substrate to be processed is placed on the surface of the substrate support pedestal 210. In the system 200 of FIG. 2, a voltage (shaped pulse bias) from a bias power supply 230 is supplied to the power electrode 213. The nonlinear, diode-like nature of the plasma sheath rectifies the applied RF electric field, resulting in a direct current (DC) voltage drop, or "self-bias," between the cathode and the plasma. This voltage drop determines the average energy of the plasma ions accelerated toward the cathode. The ion directionality and feature profile are controlled by the ion energy distribution function (IEDF). According to embodiments of the present principles described herein, the bias power supply 230 can supply a specially shaped pulse bias to the power electrode 213. This bias scheme can maintain a specific substrate voltage waveform, which can be described as a periodic series of short positive pulses on top of a negative DC offset (FIG. 1(b)). During each pulse, the substrate potential reaches the plasma potential and the sheath collapses briefly, but for ~90% of each cycle the sheath voltage remains constant and equal to the negative voltage jump at the end of each pulse, thus determining the average ion energy.

[0017] Referring back to FIG. 1(a), the amplitude of the shaped pulse bias signal, and therefore the wafer voltage, is designated Vout. The inventors have determined that in at least some embodiments according to the present principles, the shape of the IEDF can be controlled by modulating the amplitude and frequency of the shaped pulse bias signal. This method involves applying a shaped pulse bias to an electrode in a process chamber and modulating the amplitude of the negative voltage jump (V OUT ), and therefore the sheath voltage (V SH), where the relative number of pulses at a particular amplitude determines the relative ion fraction at the ion energy corresponding to this amplitude. The number of pulses at each amplitude must be sufficient to constitute a transition from one sheath voltage to the next, during which the respective ESC charge is established. Then, a burst (Figure 3) containing a train of pulses with a given amplitude is repeated many times over the duration of the processing step. Active bursts (on phases) can be alternated with silent periods (off phases). The duration of each on phase relative to the total duration of the burst (combined on and off phases) is determined by the duty cycle, and the total duration (period) of the burst is equal to the reciprocal of the burst frequency. Alternatively, each burst can be composed of a series of pulses with a given (and identical) amplitude, and then the IEDF is defined using a train of bursts with different amplitudes. The relative number of bursts (within a train) with a given amplitude determines the relative amount of ions at a particular energy, and the negative jump amplitude (V) of the pulses within these bursts determines the relative amount of ions at a particular energy. OUT) determines the ion energy. Then, during the recipe step, a predefined burst train is repeated multiple times. For example, to generate a two-peak IEDF with 25% of ions in the low-energy peak and 75% in the high-energy peak, the burst train must consist of three pulses with a negative jump amplitude corresponding to the high ion energy and one pulse with an amplitude corresponding to the low ion energy. Such a train can be represented as "HHHL." Next, to generate an IEDF with three energy peaks of the same height (high (H), medium (M), and low (L)), a train of three bursts with different amplitudes corresponding to the H, M, and L ion energies is required, which can be represented as "HML." A single-peak IEDF is generated by a train consisting of a single burst (including both an on-phase and an off-phase) of pulses with a predefined negative jump amplitude. We emphasize that the present scheme can be implemented with any shaped pulsed bias waveform (not necessarily the one shown in FIG. 1(a)) that can maintain the particular substrate voltage waveform shown in FIG. 1(b) (characterized by a nearly constant sheath voltage) and thus generate a monoenergetic IEDF.

[0018] For example, Figure 3 shows a plot of voltage pulses that a power supply should supply to an electrode in a processing chamber to set the value of the substrate voltage, in accordance with one embodiment of the present principles. In the embodiment of Figure 3, the full jump in wafer voltage determines the ion energy, and the number of pulses (e.g., total duration) corresponding to the voltage jump determines the relative ion fraction at this energy (i.e., IEDF).

[0019] Figure 4 shows the resulting IEDF traces for selected voltage pulses of Figure 3, in accordance with one embodiment of the present principles. As shown in Figure 4, the multiple voltage pulses of Figure 3 result in a wider IEDF, which can be useful in applications such as high aspect ratio etching of hard mask openings that require a wider ion energy distribution.

[0020] In accordance with the present principles, by controlling the amplitude and frequency of the voltage pulses that the power supply delivers to the electrodes in the processing chamber, a well-controlled and well-defined IEDF shape can be obtained as required for a particular etching process and application.

[0021] In another embodiment according to the present principles, a method includes applying a shaped pulse bias of the voltage waveform shown in FIG. 1(a) and generating a voltage ramp during the ion compensation phase that has a larger negative slope (dV / dt) than required to maintain a constant substrate voltage, i.e., overcompensating the ion current. This results in the substrate voltage waveform shown in FIG. 6, where the magnitude of the substrate voltage (and therefore the sheath voltage and instantaneous ion energy) increases during the ion current compensation phase. This generates the ion energy spread and non-monoenergetic IEDF shown in FIG. 7, with the IEDF width controlled by the negative slope of the applied shaped pulse bias waveform. For example, FIG. 5 shows a plot of the special shaped pulse of FIG. 1(a) modified to overcompensate the ion current that charges the wafer, according to one embodiment of the present principles. As shown in FIG. 5, the voltage ramp of FIG. 1(a), intended to compensate for the ion current that charges the wafer, is modified to overcompensate the ion current that charges the wafer in the special shaped pulse of FIG. 5 of the present principles. As shown in FIG. 5, the positive jump in FIG. 1 intended to neutralize the wafer surface no longer neutralizes the wafer surface in the specially shaped pulse of FIG. 5 of the present principle.

[0022] Figure 6 shows a plot of the induced voltage pulse on the wafer resulting from the specially shaped pulse of Figure 5. As shown in Figure 6, the voltage jump determines the ion energy, and the energy spread is determined by the minimum and maximum wafer voltage jump during the cycle.

[0023] Figure 7 shows the resulting IEDF plot for the voltage pulse of Figure 6 in accordance with one embodiment of the present principles. As shown in Figure 7, the IEDF resulting from application of the overcompensated specially shaped pulse of Figure 5 contains a broader double-peaked profile, although Vmin and Vmax, which determine the IEDF width, do not necessarily coincide with the energy peaks in the profile. Overcompensation according to the present principles allows for more precise control than can be achieved by mixing two RF frequencies (e.g., 2 MHz and 13.56 MHz).

[0024] In another embodiment according to the present principles, a method includes applying a shaped pulse bias of the voltage waveform shown in FIG. 1( a) and generating a voltage ramp during an ion compensation phase that has a smaller negative slope (dV / dt) than required to maintain a constant substrate voltage, i.e., undercompensating the ion current. This results in the substrate voltage waveform shown in FIG. 6, where the magnitude of the substrate voltage (and therefore the sheath voltage and instantaneous ion energy) decreases during the ion current compensation phase. This produces the ion energy spread and non-monoenergetic IEDF shown in FIG. 7, with the IEDF width controlled by the negative slope of the applied shaped pulse bias waveform. For example, referring back to FIG. 5, FIG. 5 shows a plot of the special shaped pulse of FIG. 1 modified to undercompensate the ion current that charges the wafer, according to one embodiment of the present principles. As shown in FIG. 5, the voltage ramp of FIG. 1, intended to compensate for the ion current that charges the wafer, is modified to undercompensate the ion current that charges the wafer in the special shaped pulse of FIG. 5 of the present principles. As shown in FIG. 5, the positive jump in FIG. 1 intended to neutralize the wafer surface no longer neutralizes the wafer surface in the specially shaped pulse of FIG. 5 of the present principle.

[0025] Referring back to Figure 7, a resulting IEDF plot is shown for under-compensation in accordance with one embodiment of the present principles. As shown in Figure 7, the IEDF resulting from application of the under-compensation specially shaped pulse of Figure 5 contains a broader, single-peak profile.

[0026] 8 shows a flow diagram of a method for generating an arbitrarily shaped ion energy distribution function, in accordance with an embodiment of the present principles. Method 800 may begin at 802, during which a negative jump voltage is applied to an electrode to set the wafer voltage. Method 800 may then proceed to 804.

[0027] At 804, the amplitude of the wafer voltage is modulated to produce a predetermined number of pulses and an ion energy distribution function is determined.

[0028] The method 800 may then end.

[0029] 9 shows a flow diagram of a method for generating an arbitrarily shaped ion energy distribution function in accordance with another embodiment of the present principles. Method 900 may begin at 902, during which a positive jump voltage is applied to an electrode in a processing chamber to neutralize the wafer surface. Method 900 may then proceed to 904.

[0030] A negative jump voltage is applied to the electrode to set the wafer voltage at 904. The method 900 can then proceed to 906.

[0031] A ramp voltage is applied to the electrodes to overcompensate the ion current on the wafer at 906. The method 900 may then end.

[0032] 10 shows a flow diagram of a method for generating an arbitrarily shaped ion energy distribution function in accordance with another embodiment of the present principles. Method 1000 may begin at 1002, during which a positive jump voltage is applied to an electrode in a processing chamber to neutralize the wafer surface. Method 1000 may then proceed to 1004.

[0033] At 1004, a negative jump voltage is applied to the electrode to set the wafer voltage. The method 1000 can then proceed to 1006 .

[0034] At 1006, a ramp voltage is applied to the electrodes to undercompensate the ion current on the wafer. The method 1000 may then end.

[0035] While the forgoing is directed to embodiments of the present disclosure, other and further embodiments of the present disclosure may be devised without departing from the basic scope thereof.

Claims

[Claim 1] applying a negative jump voltage to an electrode of the processing chamber to set a wafer voltage for the wafer; and modulating the amplitude of the wafer voltage to produce a predetermined number of pulses, the relative number of pulses at a particular amplitude determining the relative ion fraction at an ion energy corresponding to the particular amplitude.

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