Heterogeneous integration

Abstract

Heterogeneous integration (e.g., heterogeneous integrated devices, etc.).SOLUTION: Forming first vias between an upper surface and a lower surface of a first glass carrier, disposing a first antenna on the lower surface of at least one of the first vias, disposing a first metal layer on the upper surface, disposing a first dielectric layer on the first metal layer, disposing a second metal layer on the first dielectric layer, disposing a second dielectric layer on the second metal layer, and disposing a third metal layer on the second dielectric layer, wherein the third metal layer is coupled to the first antenna through at least one of the first vias; Disposing a third metal layer on the second dielectric layer, where the first metal layer, the second metal layer, and the third metal layer are coupled through a second via, and disposing the integrated circuit on the third metal layer.SELECTED DRAWING: Figure 1A

Description

[Technical Field]

[0001] The present disclosure relates to integration, and in particular to heterogeneous integration. [Background technology]

[0002] Wireless communication networks are used to transmit and receive data, and devices are used to facilitate the transmission and reception of data. Summary of the Invention

[0003] The following is a simplified summary of the disclosure in order to provide a basic understanding of some aspects of the disclosure. This summary is not an extensive overview of the disclosure. It is not intended to identify key or essential elements of the disclosure, nor to limit the scope of particular embodiments of the disclosure or the claims. Its sole purpose is to present some concepts of the disclosure in a simplified form as a prelude to the more detailed description that is presented later.

[0004] In one aspect of the disclosure, a method includes forming a first plurality of vias from a top surface of a first glass carrier to a bottom surface of the first glass carrier; disposing a first antenna on the bottom surface of the first glass carrier over at least one via of the first plurality of vias; disposing a first metal layer on the top surface of the first glass carrier; disposing a first dielectric layer on the first metal layer; and disposing a second metal layer on the first dielectric layer, the second metal layer carrying at least one of a control signal or a ground. and disposing an integrated circuit on the third metal layer, wherein the third metal layer is coupled to the first antenna through one or more of the first plurality of vias, and the first metal layer, the second metal layer, and the third metal layer are coupled through a second plurality of vias.

[0005] In another aspect of the present disclosure, a heterogeneous integrated device includes: a first glass carrier having a top surface and a bottom surface, the first glass carrier having a first plurality of vias formed from the top surface to the bottom surface; a first antenna disposed on the bottom surface of the first glass carrier over at least one via of the first plurality of vias; a first metal layer disposed on the top surface of the first glass carrier; a first dielectric layer disposed on the first metal layer; a second metal layer disposed on the first dielectric layer, the second metal layer associated with at least one of a control signal or a ground; a second dielectric layer disposed on the second metal layer; a third metal layer disposed on the second dielectric layer, the third metal layer coupled to the first antenna through one or more of the first plurality of vias, the first metal layer, the second metal layer, and the third metal layer coupled through at least one of the second plurality of vias; and an integrated circuit disposed on the third metal layer.

[0006] In another aspect of the present disclosure, a heterogeneous integrated device comprises: a first glass carrier having an upper surface and a lower surface; a first plurality of vias formed from the upper surface to the lower surface, the first plurality of vias comprising a central via and peripheral vias that substantially circumnavigate the central via; a first antenna disposed on the lower surface of the first glass carrier over the central via; a first metal layer disposed on the upper surface of the first glass carrier, the first metal layer coupled to at least one of the peripheral vias; a dielectric layer disposed on the first metal layer; a second metal layer disposed on the dielectric layer, the second metal layer coupled to the first antenna through the central via, and the first metal layer and the second metal layer coupled through at least one of the second plurality of vias; and an integrated circuit disposed on the second metal layer.

[0007] The present disclosure is illustrated by way of example and not limitation in the figures of the accompanying drawings. [Brief explanation of the drawings]

[0008] [Figure 1A] 1 illustrates a heterogeneous integrated device according to certain embodiments. [Figure 1B] 1 illustrates a heterogeneous integrated device according to certain embodiments. [Figure 1C] 1 illustrates a heterogeneous integrated device according to certain embodiments. [Figure 1D] 1 illustrates a heterogeneous integrated device according to certain embodiments. [Figure 1E] 1 illustrates a heterogeneous integrated device according to certain embodiments. [Figure 2A] 1 illustrates components of a heterogeneous integrated device, according to certain embodiments. [Figure 2B] 1 illustrates components of a heterogeneous integrated device, according to certain embodiments. [Figure 2C] 1 illustrates components of a heterogeneous integrated device, according to certain embodiments. [Figure 2D] 1 illustrates components of a heterogeneous integrated device, according to certain embodiments. [Figure 3A] 1 illustrates a system including a heterogeneous integrated device, according to certain embodiments. [Figure 3B] 1 illustrates a system including a heterogeneous integrated device, according to certain embodiments. [Figure 3C] 1 illustrates a system including a heterogeneous integrated device, according to certain embodiments. [Figure 3D] 1 illustrates a system including a heterogeneous integrated device, according to certain embodiments. [Figure 4] 1 is a flow diagram of a method relating to heterogeneous integration, according to certain embodiments. [Figure 5] FIG. 1 is a block diagram illustrating a computer system, in accordance with certain embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0009] The embodiments described herein relate to heterogeneous integration (eg, heterogeneous integrated devices, etc.).

[0010] Wireless communication networks are used to transmit and receive data. Devices are used to assist in transmitting and receiving data. Wireless communication networks are moving to higher frequency bands to improve data speeds, but the resulting shorter wavelengths can lead to issues with providing uniform coverage in areas without line of sight to the transmitter, such as urban areas, forested areas, and inside structures.

[0011] As wireless communication networks begin to move to frequencies above 5 gigahertz (GHz) (sometimes referred to as "fifth generation" or "5G"), the effects of attenuation from atmospheric gases such as oxygen (O2), carbon dioxide (CO2), and water vapor (H2O) can become significant in some frequency bands. Atmospheric weather effects can exacerbate these problems; for example, attenuation can reach the region of approximately 60 dB / m. Providing wireless network coverage inside structures such as buildings and sports stadiums is already problematic at frequencies below 5 GHz. Moving to higher frequencies further reduces the strength of signals traveling inside structures. For example, architectural glass improvements related to thermal regulation, such as the use of thin metallized layers to keep buildings cool, can further attenuate wireless signals from outside.

[0012] Traditional devices use printed circuit boards (PCBs). PCBs are not transparent, which limits where PCBs can be installed (e.g., they cannot be installed in windows). PCBs can be complex to manufacture and replicate. PCBs have limited resolution and poor tolerances, which leads to variations in the dimensional characteristics of components (e.g., antennas). This reduces the performance of traditional devices.

[0013] The systems, devices, and methods of the present disclosure provide solutions to these and other problems of conventional systems.

[0014] The heterogeneous integrated device includes a glass carrier having a top surface and a bottom surface. A first via is formed from the top surface to the bottom surface. In some embodiments, an antenna is disposed on a first surface (e.g., bottom surface, top surface) of the first glass carrier over at least one via of the first plurality of vias, and a first metal layer (e.g., ground layer) is disposed on a second surface (e.g., top surface, bottom surface) of the first glass carrier opposite the first surface of the glass carrier. The antenna can be fabricated on the top surface of the glass, and the integrated circuit can be fabricated on the bottom surface (e.g., the front and back surfaces can be swapped).

[0015] In some embodiments, alternating layers of metal and dielectric layers are disposed on the top surface of the glass carrier. In some embodiments, a first dielectric layer is disposed on the first metal layer, a second metal layer (e.g., associated with control signals and / or ground) is disposed on the first dielectric layer, a second dielectric layer is disposed on the second metal layer, and a third metal layer is disposed on the second dielectric layer. The third metal layer may be coupled to the antenna through one or more of the first plurality of vias. The first metal layer, the second metal layer, and the third metal layer are coupled through at least one of the second plurality of vias. An integrated circuit is disposed on the third metal layer.

[0016] In some embodiments, the first vias include a central via and peripheral vias that substantially orbit the central via. A first antenna is disposed on the lower surface of the first glass carrier over the central via. A first metal layer (e.g., a ground layer) is disposed on the upper surface of the first glass carrier. The first metal layer is coupled to at least one of the peripheral vias. The first vias may be in a coaxial or triaxial configuration (e.g., two outer rings of ground vias, an inner ring of ground vias and an outer ring of ground vias, or concentric rings of ground vias).

[0017] In some embodiments, a method includes forming first vias from an upper surface of a first glass carrier to a lower surface of the first glass carrier, disposing a first antenna on a lower surface of at least one of the first vias, and disposing a first metal layer (e.g., a ground layer) on the upper surface. The method may further include disposing a first dielectric layer on the first metal layer, disposing a second metal layer (e.g., associated with at least one of a control signal or ground) on the first dielectric layer, disposing a second dielectric layer on the second metal layer, and disposing a third metal layer on the second dielectric layer. The third metal layer may be coupled to the first antenna through one or more of the first vias. The first metal layer, the second metal layer, and the third metal layer may be coupled through second vias. The method may further include disposing an integrated circuit on the third metal layer.

[0018] The systems, devices, and methods of the present disclosure have advantages over conventional solutions. The present disclosure can be used to provide better wireless network coverage (e.g., including coverage at higher frequencies) than conventional systems. The present disclosure may provide devices that are more transparent than conventional systems, allowing them to be used in locations where conventional systems are not used (e.g., on windows). The present disclosure may provide devices that are easier to manufacture and replicate than conventional systems. The present disclosure may provide devices with better degradability and tolerances than conventional systems. This allows the present disclosure to have less variability in the dimensional characteristics of components (e.g., antennas) and better performance than conventional systems.

[0019] Although some embodiments of the present disclosure are described with respect to heterogeneous integrated devices that include antennas, in some embodiments, the present disclosure may include heterogeneous integrated devices that include other or additional components, such as light emitting diodes (LEDs).

[0020] Although some embodiments of the present disclosure are described with respect to devices operating at higher frequencies (e.g., frequencies equal to or greater than 5 GHz), in some embodiments the present disclosure may be used to provide devices operating at lower frequencies (e.g., frequencies less than 5 GHz).

[0021] 1A-1E illustrate heterogeneous integrated devices 100A-100E according to certain embodiments.

[0022] Heterogeneous integration (e.g., heterogeneous integration of heterogeneous integrated device 100) refers to the integration of individually fabricated components into a higher level (e.g., a system-in-package (SiP)) that as a whole provides improved functionality and improved operating characteristics.

[0023] The heterogeneous integrated device 100 may include a glass carrier 110 (e.g., electronic-grade glass, display glass, computer monitor glass, building window glass, laptop display glass, solar cell glass, television screen glass, etc.). The glass carrier 110 may be a rectangular prism (e.g., having a rectangular cross-section, orthogonally adjacent sides, and parallel opposing sides). The glass carrier 110 may have upper and lower surfaces that oppose each other. The upper and lower surfaces may be substantially planar or may lie in planes that are parallel to each other. The glass carrier 110 may be borosilicate glass (e.g., a type of glass having silica and boron trioxide as the primary glass-forming components). The glass carrier 110 may be at least 400 microns thick. In some embodiments, the glass carrier 110 is 400 to 600 microns thick.

[0024] Vias 120A (e.g., glass vias, vias between the top and fourth layers, and vias between metal layer 140C and component 130) may be formed from the top to the bottom surface of glass carrier 110. Vias 120A may be formed by laser forming holes through glass carrier 110 from the top to the bottom surface, wet etching the holes to smooth the corresponding edges of each hole through glass carrier 110, and electroplating to fill with metal (e.g., copper, copper solid fill) to form vias 120A.

[0025] One or more components 130 (e.g., a bottom layer, a bottom layer for an antenna, a fourth layer) may be disposed on the bottom surface of the glass carrier 110. In some embodiments, one or more of the components 130 are antennas. In some embodiments, one or more of the components 130 are light-emitting diodes (LEDs). The LEDs may operate at approximately 300-900 kilohertz. The LEDs may be micro-LEDs. Each component 130 is disposed on the via 120A. In some embodiments, the components 130 (e.g., antennas) are disposed on the bottom surface over the vias 120A by sputtering a metal on the bottom surface (e.g., over the vias 120) to form the components 130.

[0026] One or more metal layers 140A (e.g., a third layer for an antenna ground) are disposed on the top surface of the glass carrier 110. In some embodiments, each metal layer 140A may be a ground layer (e.g., an antenna ground if it faces an antenna across the glass substrate). Each metal layer 140A may extend to the edge of the glass carrier 110. In some embodiments, each metal layer 140A has one or more functions (e.g., it is not a ground layer if it does not face an antenna across the glass carrier 110).

[0027] A dielectric layer 150A is disposed on one or more metal layers 140A. The dielectric layer 150A may electrically insulate the metal layer 140A from other metal layers, except for connections through vias.

[0028] One or more metal layers 140B (e.g., a second metal layer) are disposed on the dielectric layer 150A, each of which is associated with at least one of a control signal and / or a ground.

[0029] Dielectric layer 150B is disposed on one or more metal layers 140B. Dielectric layer 150B may electrically insulate metal layer 140A and / or metal layer 140B from other metal layers (e.g., from each other) except for connections through vias.

[0030] One or more metal layers 140C (e.g., top metal layers) are disposed on the dielectric layer 150B. The integrated circuit 160 is disposed on the one or more metal layers 140C. The metal layers 140C may be coupled to one or more components 130 through vias 120A. The vias 120A may extend through the glass carrier 110 and the dielectric layers 150A-150B. The vias 120A between the component 130 and the metal layer 140C may be formed by, for each via 120A, forming a hole through the glass carrier 110, smoothing the edges of the hole, filling the hole with metal, disposing a dielectric layer 150A on the glass carrier 110, forming a hole through the dielectric layer 150A (e.g., aligned with the holes through the glass carrier 110), filling the hole with metal, disposing a dielectric layer 150B on the dielectric layer 150A, forming a hole through the dielectric layer 150B (e.g., aligned with the holes through the glass carrier 110 and the holes through the dielectric layer 150A), and filling the hole with metal to form a via 120A.

[0031] One or more of the metal layers 140 may be laminated (e.g., the top metal layer and the second metal layer, metal layer 140C and metal layer 140B) and / or electroplated (e.g., the third metal layer and / or the bottom layer, metal layer 140A and component 130).

[0032] Metal layers 140A, 140B, and 140C may be coupled (e.g., electrically coupled, communicatively coupled, etc.) to one another through vias 120B (e.g., vias between the top metal layer and the second and third metal layers, vias between metal layers 140A-140C, dielectric vias). Vias 120B can extend through dielectric layers 150A-150B and / or metal layers 140B.

[0033] Vias 120B between metal layers 140A-140C may be formed by, for each via 120B, disposing a dielectric layer 150A on metal layer 140A, forming a hole through dielectric layer 150A (e.g., aligned with metal layer 140A), filling the hole with metal (e.g., copper), disposing metal layer 140B on dielectric layer 150A (e.g., forming a hole through metal layer 140B and filling the hole with metal), disposing dielectric layer 150B on metal layer 140B, forming a hole through dielectric layer 150B (e.g., aligned with metal layer 140B), filling the hole with metal (e.g., copper), and disposing metal layer 140C on dielectric layer 150B.

[0034] In some embodiments, two or more glass carriers 110 are bonded to one another. In some examples, vias 120A are formed through glass carrier 110B, and glass carrier 110B is attached to glass carrier 110A (e.g., via one or more bonding layers 170). A component 130 (e.g., an antenna) may be disposed between glass carrier 110B and glass carrier 110A (e.g., between the bottom surface of glass carrier 110A and the top surface of glass carrier 110B). A component (e.g., an antenna) may be disposed on the bottom surface of glass carrier 110B.

[0035] The heterogeneous integrated device 100 may be a wireless transceiver, and the glass carrier 110A may be a planar substrate having first and second opposing surfaces (e.g., top and bottom surfaces) and a thickness between the first and second opposing surfaces. The integrated circuit 160 may be connected to the components 130 (e.g., antennas). Signals may be transmitted between the integrated circuit 160 and the components 130 (e.g., antennas) through the vias 120A. The integrated circuit 160 may control a first set of components 130 (e.g., a first antenna) as a first phased array for receiving wireless signals. The first phased array may be directional and controllably orientable within a first acute angle range with respect to a normal to a surface of the heterogeneous integrated device 100A (e.g., the bottom surface of the glass carrier 110A). The integrated circuit 160 may be further configured to control a second set of components 130 (e.g., a second antenna) as a second phased array to retransmit the wireless signals received using the first phased array. The second phased array may be directional and controllably orientable within a second acute angle range relative to the normal to the surface of the heterogeneous integrated device 100A (eg, the lower surface of the glass carrier 110B).

[0036] The vias 120 are for interconnection of components of different functionality and can be layered and patterned into devices or heterogeneously integrated as individual components.

[0037] The direction in which the first phased array is oriented may correspond to an axis of a main radiation lobe of a first radiation pattern of the first phased array, and the direction in which the second phased array is oriented may correspond to an axis of a main radiation lobe of a second radiation pattern of the second phased array.

[0038] The first phased array and the second phased array may be controllably orientable in the sense that the orientation of the first phased array and the second phased array is not fixed and may be independently changed in use by the heterogeneous integrated device 100.

[0039] The heterogeneous integrated device 100 may be connected to a component 130 (e.g., an antenna) using a physical wiring link, such as a conductive trace, a microstrip line, or a conductive via 120. Here, acute angle refers to an angle between 0 degrees and 90 degrees, inclusive. The first range of the acute angle may include all, or less than all, of a first hemisphere oriented away from the first surface. In other words, the first range of the acute angle need not include the entire first hemisphere. The second range of the acute angle may include all, or less than all, of a second hemisphere oriented away from the second surface. The first and second hemispheres may combine to form a complete sphere.

[0040] In some embodiments, the heterogeneous integrated device 100 provides a base station of a wireless communication network. In some embodiments, the heterogeneous integrated device 100 provides a relay station of a wireless communication network. In some embodiments, the heterogeneous integrated device 100 provides a transceiver of a wireless communication network.

[0041] In some embodiments, the glass carrier 110 is a planar substrate comprising a flexible film or sheet.

[0042] One or more components (e.g., component 130, antenna, metal layer 140) may be disposed directly on the surface of glass carrier 110. One or more dielectric layers 150 may be disposed between one or more components (e.g., component 130, antenna, metal layer 140) and the surface of glass carrier 110.

[0043] The first phased array may be controllably oriented in use to any angle within a first range. In some embodiments, the first range can extend to encompass an entire hemisphere having a base parallel to the plane of the glass carrier 110. In some embodiments, the first range may encompass an angular range smaller than a hemisphere. The first range may be 2π steradians or less, 3π / 4 steradians or less, π steradians or less, or π / 2 steradians or less. The first range may be substantially conical. The first range may be substantially horn-shaped. The first range may be substantially sector-shaped.

[0044] The first phased array may be controllably orientable in use about a first and / or second axis. The first and second axes may be orthogonal. The first and second axes may correspond to horizontal and vertical directions relative to gravity when the wireless transceiver is installed. The first phased array may be controllably orientable in use about an azimuth angle and / or a polar angle of a spherical polar coordinate system having a zenith oriented at an acute angle relative to the normal to the first surface. The zenith need not be perpendicular to the first surface. The zenith need not be parallel to the first surface. The second phased array may be controllably orientable in use to any angle within a second range. The second range may extend to encompass an entire hemisphere having a base parallel to the second surface. However, the second range may encompass an angular range smaller than a hemisphere. The second range may be 2π steradians or less, 3π / 4 steradians or less, π steradians or less, or π / 2 steradians or less. The second range may be substantially conical. The second range may be substantially horn-shaped. The second range may be substantially sector-shaped. The second phased array may be controllably orientable in use about a second and / or a third axis. The second and second axes may be orthogonal. The second and second axes may correspond to horizontal and vertical directions relative to gravity when the wireless transceiver is installed. The second phased array may be controllably orientable in use with respect to the azimuth and / or polar angles of a spherical polar coordinate system having a zenith oriented at an acute angle relative to the normal to the second surface. The zenith need not be perpendicular to the second surface. The zenith need not be parallel to the second surface.

[0045] The heterogeneous integrated device 100 may include one or more components supported on a surface of a glass carrier 110 .

[0046] The glass carrier 110 may be a planar substrate that can include or take the form of a stack of two or more layers. The heterogeneous integrated device 100 may include one or more components supported within a stacked planar substrate (e.g., the glass carrier 110).

[0047] The glass carrier 110 (e.g., a planar substrate) may be transparent (e.g., substantially transparent). Transparent may correspond to the glass carrier 110 (e.g., a planar substrate) having a minimum of 50% transmittance for visible wavelengths. The portion of the wireless transceiver supporting the first antenna and / or the second antenna may be transparent or opaque.

[0048] The transparent glass carrier 110 (e.g., a planar substrate) may include or be formed from glass. The transparent glass carrier 110 (e.g., a planar substrate) may include or take the form of one or more plastics, including, but not limited to, polycarbonate (PC), polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), cycloolefin polymer (COP), or any other polymer having sufficient mechanical strength to support one or more components of the heterogeneous integrated device 100 and sufficient transparency to see through. The glass carrier 110 (e.g., a planar substrate) may include or take the form of a laminate including one or more layers of glass and / or plastic and / or adhesive. The laminate may include one or more conductor layers. The conductor layers of the laminate may be internal (e.g., between the first and second surfaces) and / or external (e.g., supported on the first and / or second surfaces). One or more layers of the laminate may support one or more components of the heterogeneous integrated device 100.

[0049] The heterogeneous integrated device 100 may include a first metal layer (e.g., a microstrip line) supported on a first surface of the glass carrier 110 and a second metal layer (e.g., a microstrip line) supported on a second surface of the glass carrier 110. The first metal layer and the second metal layer may be connected by corresponding vias. The vias connecting the metal layers (e.g., microstrip lines) supported on the first and second surfaces may be impedance-matched to the metal layers (e.g., microstrip lines). The heterogeneous integrated device 100 may include several first metal layers (e.g., microstrip lines) supported on the first surface. The heterogeneous integrated device 100 may include several second metal layers (e.g., microstrip lines) supported on the second surface. Any metal layer (e.g., microstrip line) may be connected to one or more metal layers (e.g., microstrip line) and / or other components of the heterogeneous integrated device 100 supported on the opposite side of the heterogeneous integrated device 100 by vias extending through the glass carrier 110 (e.g., a planar substrate).

[0050] For example, compared to radiative transfer or capacitive coupling between the first and second surfaces, such a physical connection does not require that the glass carrier 110 (e.g., a planar substrate) be formed from one or more materials with lossy dielectric loss characteristics. Although not required, materials with lossy dielectric loss characteristics may still be used.

[0051] The heterogeneous integrated device 100 may include one or more components flip-chip bonded to a glass carrier 110. One or more components of the heterogeneous integrated device 100 may be flip-chip bonded to a first side of the glass carrier 110. One or more components of the heterogeneous integrated device 100 may be flip-chip bonded to a second side of the glass carrier 110. One or more components of the heterogeneous integrated device 100 may be flip-chip bonded to the first side, and one or more additional components may be flip-chip bonded to the second side. One or more components may be flip-chip bonded to the glass carrier 110 in accordance with the Heterogeneous Integration Roadmap (HIR). The HIR is a set of guidelines developed for silicon system-in-package (SiP) technology. The HIR may refer to the guidelines set forth in, for example, the HIR 2019 publication. The HIR guidelines may be established for the manufacture of semiconductor / flat panel devices using packaging substrates for the semiconductor / flat panel devices (e.g., for heterogeneous integration on printed circuit boards). The HIR guidelines may not apply to glass and / or transparent plastic substrates (e.g., total system integration of the presently disclosed embodiments on glass). The heterogeneous integrated device 100 (e.g., a wireless transceiver) may not include a printed circuit board. Although the heterogeneous integrated device 100 may not include a printed circuit board, the heterogeneous integrated device 100 may be connected to a separately packaged device, e.g., a power supply, that may include a printed circuit board. The heterogeneous integrated device 100 may include analog circuitry configured for analog beamforming of the first phased array and / or analog beamsteering of the second phased array. The analog circuitry may receive and retransmit wireless signals without converting them to the digital domain. The analog circuitry may include a first varactor diode corresponding to each first antenna of the first phased array. Each first varactor diode may be configured to add a phase shift to a signal received from its respective first antenna.The heterogeneous integrated device 100 may be configured to control the first antenna as a first phased array by controlling the capacitance of the first varactor diodes. The heterogeneous integrated device 100 may be configured to control the capacitance of the first varactor diodes by controlling the reverse bias applied to each first varactor diode.

[0052] The analog circuit may include a second varactor diode corresponding to each second antenna of the second phased array. Each second varactor diode may be configured to add a phase shift to a signal transmitted to the respective second antenna. The heterogeneous integrated device 100 may be configured to control the second antennas as a second phased array by controlling the capacitance of the second varactor diode. The heterogeneous integrated device 100 may be configured to control the capacitance of the second varactor diode by controlling a reverse bias applied to each second varactor diode.

[0053] The heterogeneous integrated device 100 may include one or more digital circuits configured for digital beamforming of a first phased array and / or digital beamsteering of a second phased array. The heterogeneous integrated device 100 may include a digital channel corresponding to each first antenna. The heterogeneous integrated device 100 may include a digital channel corresponding to each second antenna. The heterogeneous integrated device 100 may also include a downconversion unit configured to convert signals received from the first antennas from a transmit band to baseband. The heterogeneous integrated device 100 may also include one or more digital circuits configured to perform digital beamforming on the downconverted signals to obtain a summed signal and perform beamsteering on the summed signal to generate and output multiple transmit signals. The heterogeneous integrated device 100 may also include an upconversion unit configured to convert the transmit signals from baseband to a transmit band and output the upconverted transmit signals to corresponding second antennas.

[0054] Downconversion and upconversion refer to signal carrier frequencies. Downconversion and upconversion may utilize standard heterodyne techniques and devices. Baseband may refer to a carrier frequency at or near zero frequency, or in other words, the absence of a carrier frequency. Conversion to baseband may allow the use of a lower performance analog-to-digital converter (ADC).

[0055] The first antennas may be arranged in several first subarrays. Each first subarray may include two or more first antennas. The second antennas may be arranged in multiple second subarrays. Each second subarray may include two or more second antennas. The heterogeneous integrated device 100 may be configured for hybrid beamforming and / or beamsteering. The heterogeneous integrated device 100 may include a digital channel corresponding to each first subarray. The circuit may include a digital channel corresponding to each second subarray.

[0056] The heterogeneous integrated device 100 may also include several first analog circuits. Each first analog circuit may be configured to perform analog beamforming on signals received from a respective first subarray. The heterogeneous integrated device 100 may also include several second analog circuits. Each second analog circuit may be configured to perform analog beamsteering on a respective second subarray. The heterogeneous integrated device 100 may also include one or more digital circuits configured to perform digital beamforming on signals received from the first analog circuits to obtain a summed signal and to perform beamsteering on the summed signal to generate and output multiple transmit signals to respective second analog circuits.

[0057] Each first analog circuit may include a first varactor diode corresponding to each first antenna of the respective first subarray. Each first varactor diode may be configured to add a phase shift to signals received from the respective first antenna. Each first analog circuit may be configured to perform analog beamforming on signals received from the respective first subarray by controlling the capacitance of the corresponding first varactor diode. Each first analog circuit may be configured to control the capacitance of the corresponding first varactor diode by controlling a reverse bias applied to the corresponding first varactor diode.

[0058] Each second analog circuit may include a second varactor diode corresponding to each second antenna of the respective second subarray. Each second varactor diode may be configured to add a phase shift to a signal transmitted to the respective second antenna. Each second analog circuit may be configured to perform analog beam steering for the respective second subarray by controlling the capacitance of the corresponding second varactor diode. Each second analog circuit may be configured to control the capacitance of the corresponding second varactor diode by controlling a reverse bias applied to the corresponding second varactor diode.

[0059] The heterogeneous integrated device 100 may also include a downconversion unit configured to convert signals received from the first analog circuit from a transmit band to a baseband for reception by the one or more digital circuits. The heterogeneous integrated device 100 may also include an upconversion unit configured to convert transmit signals output from the one or more digital circuits from a baseband to a transmit band for reception by the respective second analog circuits.

[0060] The heterogeneous integrated device 100 may include one or more filters. The filters may include or take the form of a film bulk acoustic resonator (FBAR). The filters may include or take the form of a thin film bulk acoustic resonator (TFBAR). The filters may include or be formed from a metamaterial. Metamaterial filters suitable for use in wireless transceivers include, but are not limited to, metamaterials.

[0061] The heterogeneous integrated device 100 (e.g., a wireless transceiver) may be configured for wireless signals in accordance with 5G. The heterogeneous integrated device 100 may be configured for wireless signals having a carrier frequency between 5 GHz and 300 GHz, inclusive. The heterogeneous integrated device 100 may be configured for wireless signals having a carrier frequency between 30 GHz and 300 GHz, inclusive. The heterogeneous integrated device 100 may be configured for wireless signals having a carrier frequency within one or more of the K (20 GHz to 40 GHz), L (40 GHz to 60 GHz), and M (60 GHz to 100 GHz) bands defined by NATO. The heterogeneous integrated device 100 may be configured for wireless signals having a carrier frequency within one or more of the Ka (27 GHz to 40 GHz), V (40 GHz to 75 GHz), and W (75 GHz to 100 GHz) bands defined by the Institute of Electrical and Electronics Engineers (IEEE). The heterogeneous integrated device 100 may be configured for wireless signals having a carrier frequency greater than 300 GHz. The heterogeneous integrated device 100 may be configured for wireless signals having a carrier frequency equal to or greater than 1 THz. The heterogeneous integrated device 100 may be configured for wireless signals that are 5G signals. The heterogeneous integrated device 100 may be configured for wireless signals that are 6G signals. The heterogeneous integrated device 100 may be configured for wireless signals that are 7G signals.

[0062] In some embodiments, the antenna of the heterogeneous integrated device 100 may be multiplexed to function as a transceiver. During a first period, the wireless signal may be relayed in one direction, and during a second period, the direction of relaying the wireless signal may be reversed. While the heterogeneous integrated device 100 is operating, alternating cycles of the first and second periods may be repeated. The first and second periods may have the same length. The first and second periods may have different lengths. The wireless signal transmitted from the second side of the glass carrier 110 may be lower power than the wireless signal transmitted from the first side of the glass carrier 110. For example, the first side may be oriented toward the exterior of the building, and the second side may be oriented toward the interior of the building. Using a lower power level for the wireless signal retransmitted within the building compared to the power level required for transmission to a wider external network may reduce power consumption of the heterogeneous integrated device 100. Using a lower power level for the signal retransmitted within the building may reduce interference with other electronic devices and / or equipment within the building. The use of reduced power levels for retransmitted signals within a building may provide peace of mind to building occupants / users concerned about wireless signal strength. One or more of the antennas may include a dielectric material having a loss tangent that is less than the loss tangent of the glass carrier 110.

[0063] The dielectric material may have a loss tangent that is less than the loss tangent of the glass carrier 110 at a frequency of 28 GHz. The loss tangent of the glass carrier 110 may be two, three, five, or ten times greater than the loss tangent of the dielectric material included in the antenna. The loss tangent of the glass carrier 110 may be two, three, five, or ten times greater than the loss tangent of the dielectric material included in the antenna at a frequency of 28 GHz. The dielectric material may be disposed between the ground plane and the radiating surface of the antenna.

[0064] In this way, heterogeneous integrated device 100 can optionally utilize a low-loss dielectric material for the antenna, while the direct wired connection between the antenna and the circuitry means that glass carrier 110 need not be formed of a low-loss material but may instead be formed of a material with a relatively high dielectric loss, such as silica glass and / or a polymer. This may enable the use of, for example, high-loss but flexible polymer films that are suitable for roll-to-roll manufacturing methods, potentially reducing cost and manufacturing complexity.

[0065] The dielectric material (e.g., the material of the dielectric layer 150) may include one or more of inorganic oxides, silica, alumina, organic materials, fluoropolymers, polytetrafluoroethylene, and nanocomposites. The dielectric material (e.g., the material of the dielectric layer 150) may be in the form of a film, and may have a thickness of 1 pm or more and 1 mm or less. The dielectric material (e.g., the material of the dielectric layer 150) may include amorphous and / or crystalline regions of the same material. If the dielectric material (e.g., the material of the dielectric layer 150) exhibits polymorphism, the dielectric material may include two or more different polymorphs, and possibly amorphous material. The dielectric material (e.g., the material of the dielectric layer 150) may exhibit a tensile strength of 10 s at a frequency of 28 GHz. -3 The dielectric material may have a loss tangent of 10 at a frequency of 28 GHz or less. -4 , 10 -5 , or 10 -6 The dielectric material may have a loss tangent of 10 at a frequency of 28 GHz or less. -2 , 10 -1 The glass carrier 110 may have a loss tangent of 1 or greater at a frequency of 28 GHz. -3 The loss tangent may be equal to or greater than 1.

[0066] The antenna can be formed using photolithography (eg, directly on the glass carrier 110).

[0067] The heterogeneous integrated device 100 may define two or more passbands for receiving and retransmitting wireless signals. The heterogeneous integrated device 100 may be configurable so that one or more of the passbands can be disabled. The different passbands may correspond to different service providers of a wireless communication network. The service providers may be a mobile phone provider, a cell service provider, and / or a data service provider.

[0068] Each of the two or more passbands may include one or more analog filters. The analog filters may include or take the form of film bulk acoustic resonators (FBARs). The analog filters may include or take the form of thin film bulk acoustic resonators, TFBARs. The output of each passband provided by the analog filters may be grounded to disable that passband. The passband outputs may be selectively grounded by respective switches controlled by the circuit.

[0069] Each of the two or more passbands may include one or more digital filters. The digital filters may be provided by digital circuitry configured to perform beamforming and / or beamsteering. The digital filters may be provided by dedicated digital filtering circuitry.

[0070] The heterogeneous integrated device 100 may be configurable such that each of the two or more passbands can be independently enabled or disabled in a one-time configuration process. The one-time configuration process may include or take the form of programming a programmable read-only memory (ROM). In the initial configuration of the heterogeneous integrated device 100, the output of each passband may be connected to ground by a fuse connection, and the one-time configuration process may include or take the form of blowing a fuse connection corresponding to the passband to be enabled. The heterogeneous integrated device 100 may be configurable such that each of the two or more passbands can be independently enabled or disabled during use.

[0071] The heterogeneous integrated device 100 may be configured to identify (e.g., receive, generate, etc.) a passband change message that includes instructions to enable one or more passbands and / or disable one or more other passbands. The passband change message may be received via a wireless network of which the heterogeneous integrated device 100 forms a part or a portion. The passband change message may be received as a wireless signal. The passband change message may be received within one of two or more passbands defined by the circuit. The passband change message may be received within additional passbands that may be (always) enabled.

[0072] The heterogeneous integrated device 100 may be configured to receive and retransmit wireless signals within a time-multiplexed wireless communication system. The circuitry may be configurable to retransmit only wireless signals corresponding to one or more selected service providers. The heterogeneous integrated device 100 may be configured to identify a source of the received wireless signal, for example, using packet header data. In response to the source of the received wireless signal matching one of the selected service providers, the circuitry may be configured to control a plurality of second antennas as a second phased array to retransmit the received wireless signal. In response to the source of the received wireless signal not matching one of the selected service providers, the heterogeneous integrated device 100 may not retransmit the received wireless signal.

[0073] The selected service provider may be updatable at the time of use. The heterogeneous integrated device 100 may be configured to receive a selected service provider change message that includes instructions for enabling retransmission of wireless signals originating from one or more service providers and / or disabling retransmission of wireless signals originating from one or more other service providers. The selected service provider change message may be received over a wireless network of which the heterogeneous integrated device 100 is a part. The selected service provider change message may be received as a wireless signal.

[0074] The entire length of the connection between the integrated circuit 160 and the antenna may be supported by the glass carrier 110. In this way, signals received and relayed between the antenna may not be routed outside the glass carrier 110 (but may be routed through the glass carrier 110 using vias 120 as described herein).

[0075] A structure may include one or more heterogeneous integrated devices 100. The structure may include or take the form of a building. The building may be a commercial, residential, or government building. The structure may include or take the form of street furniture, such as streetlights, benches, bus shelters, signposts and road signs, parking meters, safety barriers, billboards and billboards, etc. The structure may include a window having an interior and exterior surface, and the heterogeneous integrated device 100 may be attached to the interior surface of the window.

[0076] In some embodiments, it may be possible to make significant portions of the heterogeneous integrated device 100 (e.g., a heterogeneous integrated device 100 that includes an array of antennas) transparent or semi-transparent, for example, by using very fine and / or thin conductive traces, metal nanowires, metal meshes, etc. to form the antennas.

[0077] The largely transparent heterogeneous integrated device 100 can be attached to the inside surface of a window pane of a building or other structure, for example, using an adhesive layer, so as not to significantly obstruct the view of people inside or reduce natural lighting through the window. In this way, wireless signals incident on the window can be retransmitted deep into the building or structure.

[0078] In some embodiments, the glass carrier 110 is a single, monolithic block of material. In some embodiments, the glass carrier 110 is not a single, monolithic block of material, but rather may take the form of a laminate, in some instances including one or more layers of glass and / or plastic and / or adhesive. The laminate may include one or more conductor layers, which may be interior layers (e.g., between the first and second sides of the glass carrier 110) and / or exterior layers (e.g., supported on the first and / or second sides of the glass carrier 110).

[0079] In some embodiments, the glass carrier 110 is flexible and sufficiently thin, for example, a thin film or sheet of polymeric material.

[0080] The heterogeneous integrated device 100 may be or include a film-based bulk acoustic wave resonator, which may offer characteristics including, but not limited to, low insertion loss, high selectivity in frequency bands up to and beyond 25 GHz, low power consumption, and high isolation compared to a surface acoustic wave (SAW) resonator with the same center frequency. Film-based bulk acoustic wave resonators can be configured for high frequencies (e.g., 60 GHz) and exhibit steep filter skirts due to their high Q factor, high acoustic velocity, and high power handling capabilities. Materials with high thermal conductivity are used. Possible materials include aluminum nitride (AlN) as the dielectric, which is piezoelectric and is typically magnetron sputtered most commonly at 200°C to 300°C, with electrode materials ranging from platinum (Pt) to copper (Cu). For example, the conductive element may be formed using copper (Cu), and the barrier layer may comprise an alloy of copper (Cu) with one or more refractory metal elements selected from tantalum (Ta), niobium (Nb), molybdenum (Mo), tungsten (W), zirconium (Zr), hafnium (Hf), rhenium (Re), osmium (Os), ruthenium (Ru), rhodium (Rh), titanium (Ti), vanadium (V), chromium (Cr), and nickel (Ni). Copper is preferred due to its high electrical and thermal conductivity, but other metals may be used provided they have adequate electrical conductivity and skin depth at the intended operating frequency. Molybdenum may be a good choice because it is widely available in any Gen-X flat panel line as a source / drain metallization standard, and also offers a relatively moderate combination of acoustic impedance, density, and resistivity. The term Gen-X is a standard term used in the flat panel industry and refers to the size of the substrate. For example, Genio+ refers to substrate sizes up to 2840mm x 3370mm.

[0081] The glass carrier 110 may incorporate a heat spreader layer. The heat spreader layer may be incorporated during a heterogeneous integration manufacturing process. The heat spreader layer may enable operation at higher power and / or with higher density antennas and / or microstrip interconnects without the need for fans or other cooling methods. In some examples, a ground plane layer (e.g., metal layer 140) may be formed of copper and may further function as a heat spreader layer. In some embodiments, the antenna dielectric layer may be formed of a dielectric with a relatively high thermal conductivity, such as AlN, or AlO. x (e.g., Al2O3 in a sapphire structure) can also serve as a good heat spreader layer.

[0082] In some embodiments, the antenna is a planar antenna. The antenna may be formed using photolithography.

[0083] In some embodiments, the heterogeneous integrated device 100 is attached to or integrated as part of a structure in the form of a commercial, residential, or government building. In some embodiments, the heterogeneous integrated device 100 may be attached to or integrated with street furniture, such as, for example, streetlights, benches, bus shelters, road signs, parking meters, safety barriers, billboards, and the like. In some embodiments, the heterogeneous integrated device 100 is transparent and includes a glass carrier 110 that is attached to a window of the structure.

[0084] As mentioned above, because radio frequency (RF) signals are transmitted using vias rather than radiatively through the thickness of the glass carrier 110, the glass carrier 110 may be formed of a material that exhibits significant dielectric loss. If a lossy material such as glass or a transparent polymer is used, the antenna dielectric layer may be formed of a dielectric material that has a loss tangent that is less than the loss tangent of the glass carrier 110 (e.g., the effective total loss tangent when the glass carrier 110 is a laminate). Unlike the glass carrier 110, the dielectric loss characteristics of the material used for the antenna dielectric layer can be considered and minimized.

[0085] 1A , in some embodiments, heterogeneous integrated device 100A includes a single glass carrier 110A. In some embodiments, heterogeneous integrated device 100A includes a metal layer 140A that is a first ground layer on a first side of glass carrier 110A and a metal layer 140D that is a second ground layer on a second side (opposite the first side) of glass carrier 110A. Via 120A can pass through glass carrier 110A to electrically couple metal layer 140A and metal layer 140D.

[0086] 1B , in some embodiments, a heterogeneous integrated device 100B includes two or more glass carriers 110 (e.g., glass carriers 110A-110B). The glass carriers 110A-110B may be bonded to one another via a bonding layer 170 (e.g., an adhesive). In some embodiments, a component 130 (e.g., an antenna) is disposed on the underside of the glass carrier 110A between the glass carriers 110A and 110B, and the component 130 (e.g., an antenna) is disposed on the underside of the glass carrier 110B. Vias 120A may couple the component to an integrated circuit 160 disposed on a metal layer 140C.

[0087] In some embodiments, the heterogeneous integrated device 100 includes three or more glass carriers 110 .

[0088] In some embodiments, the heterogeneous integrated device 100 (e.g., the glass carrier 110) has a short-range smoothness and / or roughness in the range of about 1 nanometer (nm) to about 10 nm. The short-range smoothness and / or roughness of the heterogeneous integrated device 100 (e.g., the glass carrier 110) can be less than the roughness of a conventional device (e.g., a conventional PCB device). This may result in the heterogeneous integrated device 100 having lower losses than a conventional device (e.g., a conventional PCB device). The roughness of the heterogeneous integrated device 100 (e.g., the glass carrier 110) can be less than the skin depth (e.g., about 0.3 micrometers at 30 GHz).

[0089] In some embodiments, the heterogeneous integrated device 100 (e.g., glass carrier 110) has greater dimensional stability (e.g., greater material homogeneity) in large panel formats than conventional devices (e.g., conventional PCB devices), which can allow the heterogeneous integrated device 100 (e.g., glass carrier 110) to have a higher stiffness modulus than conventional devices (e.g., conventional PCB devices).

[0090] In some embodiments, the heterogeneous integrated device 100 (e.g., glass carrier 110) has better process tolerances and / or design windows than conventional devices (e.g., conventional PCB devices). Conventional devices (e.g., conventional PCB devices) may have poor process tolerances due to dimensional instability. The heterogeneous integrated device 100 (e.g., glass carrier 110) may have tighter process tolerances (e.g., less than about 8% over a size of about 1 millimeter) than conventional devices (e.g., conventional PCB devices). The tighter process tolerances of the heterogeneous integrated device 100 (e.g., glass carrier 110) may enable a wider design window than conventional devices (e.g., conventional PCB devices).

[0091] In some embodiments, the heterogeneous integrated device 100 (e.g., glass carrier 110) has better feature sizes (e.g., lateral thickness and / or layer thickness) than conventional devices (e.g., conventional PCB devices). The heterogeneous integrated device 100 (e.g., glass carrier 110) may have feature sizes of about 1-2 microns for conductors (e.g., copper) (and may have sub-micron thicknesses). Via diameters may be less than 200 microns, less than 100 microns, less than 50 microns, and / or less than 40 microns (e.g., 30 microns). The smaller feature sizes and thinner conductor layers may allow the heterogeneous integrated device 100 (e.g., glass carrier 110) to achieve higher integration density and lower loss than conventional devices (e.g., conventional PCB devices).

[0092] In some embodiments, the heterogeneous integrated device 100 (e.g., glass carrier 110) has higher patterning precision than conventional devices (e.g., conventional PCB devices). In some embodiments, the patterning precision of the heterogeneous integrated device 100 (e.g., glass carrier 110) has a precision of about 1 to 2. The heterogeneous integrated device 100 (e.g., glass carrier 110) can have fine features with better uniformity and / or precision across large formats (e.g., particularly for the vias 120 through the dielectric layer 150 and glass carrier 110) compared to conventional devices (e.g., conventional PCB devices).

[0093] In some embodiments, the heterogeneous integrated device 100 (e.g., glass carrier 110) has better substrate handling properties than conventional devices (e.g., conventional PCB devices). Conventional devices may require a support substrate for precision patterning, which results in large spatial variations. The heterogeneous integrated device 100 (e.g., glass carrier 110) may not require a support wafer for handling. By not using a support wafer, the heterogeneous integrated device 100 (e.g., glass carrier 110) may not require the lamination and / or delamination processes of conventional devices.

[0094] In some embodiments, the heterogeneous integrated device 100 (e.g., the glass carrier 110) has a better coefficient of thermal expansion (CTE) than conventional devices (e.g., conventional PCB devices). The heterogeneous integrated device 100 (e.g., the glass carrier 110) can have a tunable CTE (e.g., less than about 17 ppm per degree Celsius (ppm / °C), less than about 15 ppm / °C, less than about 10 ppm / °C, less than about 9 ppm / °C, between about 3 and 9 ppm / °C, etc.). The CTE can be tuned depending on the drawing conditions of the glass carrier 110. The heterogeneous integrated device 100 (e.g., the glass carrier 110) can have higher mechanical and thermal cycling reliability than conventional devices.

[0095] In some embodiments, the heterogeneous integrated device 100 (e.g., the glass carrier 110) has better thermal conductivity (k) and / or heat dissipation than conventional devices (e.g., conventional PCB devices). The heterogeneous integrated device 100 (e.g., the glass carrier 110) may have higher thermal conductivity (e.g., k of about 0.8 watts per meter per degree Celsius (W / m / °C), whereas air has a k of about 0.8 W / m / °C) than conventional devices (e.g., devices with PCB material). The heterogeneous integrated device 100 (e.g., the glass carrier 110) may use thermal vias, ground planes, and / or copper thickness for heat dissipation. The thinner glass carrier 110 of the heterogeneous integrated device 100 may have lower thermal resistance than conventional devices.

[0096] In some embodiments, the heterogeneous integrated device 100 (e.g., glass carrier 110) is less expensive than conventional devices (e.g., conventional PCB devices). The heterogeneous integrated device 100 is available in panel format (e.g., about 1 meter), which can reduce the cost per unit processed area.

[0097] In some embodiments, the heterogeneous integrated device 100 (e.g., glass carrier 110) has double-sided processability. Front and / or backside lithography may be suitable for double-sided integration, which may use vias for vertical routing of interconnects.

[0098] In some embodiments, the heterogeneous integrated device 100 (e.g., the glass carrier 110) has a better dielectric constant (Dk and / or Df) than conventional devices (e.g., conventional PCB devices). Dk may be the permittivity or relative permittivity, which may be a measure of a material's ability to store electrical energy in an electric field. Df may be the loss tangent, which is a measure of a material's ability to dissipate electrical energy as heat when the material is exposed to an alternating electric field. The glass carrier 110 and / or the dielectric layer 150 of the heterogeneous integrated device 100 may have a lower dielectric constant and / or a lower loss tangent than conventional devices.

[0099] In some embodiments, the heterogeneous integrated device 100 has one or more side conductive coatings (eg, in addition to or instead of one or more of the vias 120).

[0100] In some embodiments, heterogeneous integrated device 100 includes a glass carrier 110 and a PCB coupled to glass carrier 110. In some embodiments, heterogeneous integrated device 100 includes glass carrier 110 and does not include a PCB. In some embodiments, heterogeneous integrated device 100 is a millimeter wave radio.

[0101] 1C-1E, the heterogeneous integrated device may have a crossover splitter configuration (e.g., between one or more transmission lines), which may have a substantially planar shape (e.g., may be substantially horizontal) without vias (e.g., not extending through the glass carrier 110 and disposed on the glass carrier 110).

[0102] 1C , in some embodiments, the heterogeneous integrated device 100C includes a cross splitter design. "V" may refer to a transmission line for vertical polarization, and "H" may refer to a transmission line for horizontal polarization. "In" may refer to an input. "Out" may refer to an output. In some examples, one or more of In_V may be a substantially vertically polarized input, In_H may be a substantially horizontally polarized input, Out_V1 and Out_V2 may be substantially vertically polarized outputs, and Out_H1 and / or Out_H2 may be substantially horizontally polarized outputs.

[0103] Traditionally, the wiring between the RF input and the BFIC (Beamforming Integrated Circuit) input (e.g., the V and H crosspoint) can be a bottleneck because the V and H wiring must be parallel and branched, requiring a crossover. In this disclosure, one or more of the RF components used have an improved cross section (e.g., by changing the cross section), use a cross branch, and / or have an asymmetric feed (e.g., by designing other wiring).

[0104] The cross splitter may include one or more transmission lines 180 and a metal layer 140E (e.g., L1). The metal layer 140E may have Out_V1 and Out_H2 (e.g., ports). Each port (e.g., Out_V1, Out_H2) may be connected via a transmission line 180 on the metal layer 140E. The transmission line 180 may be branched (e.g., a ladder-shaped transmission line and / or a Y-shaped transmission line). The transmission line 180 may have a height (e.g., about 0.5 lambda, about 2-3 mm). Each transmission line 180 may have a cross splitter design, in which the transmission is a single vertical via that branches into two diagonal transmission lines, each connected to a port Out_H1 and Out_V2. The two ends between the two Y-shaped transmission lines may have a resistance value (e.g., about 100 ohms). The branched transmission line may have a characteristic impedance of approximately 71 ohms.

[0105] In some embodiments, the heterogeneous integrated device 100C can provide transmission (e.g., good transmission, threshold transmission) of signals from In_H to Out_H1 and from In_H to Out_H2, and can prevent transmission (e.g., reject paths) of signals from In_H to In_V, from In_H to Out_V2, and from In_H to Out_V1.

[0106] Conventionally, there are losses (e.g., a trade-off between gain and FBR) caused by additional layers (e.g., metal layer 140). The present disclosure may provide one or more of the following: simplified cross sections (e.g., on glass models, on PCB models), improved designs (e.g., methods of coupling transmission lines to antenna structures), and / or the use of functional reflectors (e.g., metasurfaces) as backside grounds.

[0107] Referring to FIG. 1D, in some embodiments, a heterogeneous integrated device 100D includes a crossover splitter design with transmission lines 180 for tapping off the branches (eg, away from each other).

[0108] Referring to FIG. 1E, in some embodiments, a heterogeneous integrated device 100E includes a crossover splitter design.

[0109] The heterogeneous integrated device 100E may include transmission lines 180A-180D. The transmission lines 180A-180B may connect port n to a cross splitter port. If the transmission line impedance is matched to the port, the length of the transmission line may not affect the circuit parameters beyond small differences in loss. Changes in S-parameters observed in the past when changing the length of transmission line 180B may be due to impedance mismatch in the transmission line.

[0110] If the characteristic impedance of the transmission line substantially matches (eg, matches) the impedance of the lumped port, the impedance match ratio may be substantially one.

[0111] In response to the transmission line impedance being substantially matched (e.g., matched), when the length of transmission line 180B is varied, the S-parameters will show only a small loss difference (e.g., loss difference less than a threshold amount).

[0112] In some embodiments, the transmission lines 180A-180B are impedance matched to reduce (eg, eliminate) the effect that the length of the transmission lines 180A-180B has on the circuitry.

[0113] Parameters such as the width and / or length of one or more of the transmission lines 180A-180D may be substantially optimized (eg, optimized) to achieve improved circuit performance.

[0114] During substantial optimization (e.g., optimization), the transmission lines 180A-180B may experience impedance mismatches and the lengths of the transmission lines 180A-180B may begin to affect the circuit parameters, at which point the overall circuit dimensions may be fixed before further optimization of width and length is performed.

[0115] One or more of Figures 1A-1E may be used in a wireless antenna implementation (e.g., 5G+).

[0116] 2A-2D illustrate components of heterogeneous integrated devices 200A-200D according to certain embodiments. One or more features of one or more heterogeneous integrated devices 200A-200D of FIGS. 2A-2D that have similar names and / or reference numbers as one or more of the heterogeneous integrated devices 100A-100E of FIGS. 1A-1E may have the same or similar structure, materials, and / or functionality as one or more of the devices of FIGS. 1A-1E.

[0117] FIG. 2A shows a cross-sectional side view of heterogeneous integrated device 200A. Heterogeneous integrated device 200A may include a central via 220A (e.g., via 120A, a signal-carrying conductor) that penetrates glass carrier 110A and dielectric layers 150A-150B to couple component 130 (e.g., an antenna) to integrated circuit 160 via metal layer 140C. Heterogeneous integrated device 200A may further include peripheral vias 220B that penetrate glass carrier 110A to couple metal layer 140A to metal layer 140D. In some embodiments, metal layer 140A is a first ground layer and metal layer 140D is a second ground layer. In some embodiments, vias 120A-120B are in a coaxial configuration. In some embodiments, vias 120A-120B are in a triaxial configuration.

[0118] FIG. 2B illustrates a cross-sectional view of the top or bottom (e.g., in a coaxial configuration) of heterogeneous integrated device 200B. In some embodiments, heterogeneous integrated device 200B has the same or similar structure, materials, and / or functionality as one or more of the heterogeneous integrated devices of FIGS. 1A-2A. Heterogeneous integrated device 200B includes glass carrier 110 and vias 220 that penetrate glass carrier 110 (e.g., from the top surface to the bottom surface of glass carrier 110). Vias 220 may include central via 220A and peripheral vias 220B. Central via 220A may couple a component (e.g., an antenna, one or more components 130 of FIGS. 1A-2A) to an integrated circuit (e.g., one or more integrated circuits 160 of FIGS. 1A-2A) via a metal layer (e.g., one or more metal layers 140C of FIGS. 1A-2A). Peripheral vias 220B may couple metal layers (e.g., ground layers, metal layers 140A and 140D) disposed on opposite sides of glass carrier 110. Peripheral vias 220B may surround central via 220A (e.g., peripheral vias 220B may be substantially equidistant from central via 220A, and peripheral vias 220B may form a substantially circular perimeter around central via 220A).

[0119] In some embodiments, a double ring (eg, double concentric rings) of ground peripheral vias 220B surrounds the central via 220A).

[0120] FIG. 2C illustrates a cross-sectional view of the top or bottom (e.g., in a triaxial configuration) of heterogeneous integrated device 200C. In some embodiments, heterogeneous integrated device 200C has the same or similar structure, materials, and / or functionality as one or more of the heterogeneous integrated devices of FIGS. 1A-2A. Heterogeneous integrated device 200C includes glass carrier 110 and vias 220 that penetrate glass carrier 110 (e.g., from the top surface to the bottom surface of glass carrier 110). Vias 220 may include central via 220A and peripheral vias 220B. Central via 220A may couple a component (e.g., an antenna, one or more components 130 of FIGS. 1A-2A) to an integrated circuit (e.g., one or more integrated circuits 160 of FIGS. 1A-2A) via a metal layer (e.g., one or more metal layers 140C of FIGS. 1A-2A). The peripheral vias 220B may couple metal layers (e.g., ground layers, metal layers 140A and 140D) located on opposite sides of the glass carrier 110. The peripheral vias 220B may be on opposite sides of the central via 220A (e.g., the peripheral vias 220B are substantially equidistant from the central via 220A). A first peripheral via 220B may be coupled to a first ground layer (e.g., a metal layer), and a second peripheral via 220B may be coupled to a second ground layer (e.g., a different metal than the ground layer to which the first peripheral via 220B is coupled).

[0121] In some embodiments, the central via 220A and the peripheral vias 220B may be disposed between the component 130 and the metal layer 140. In some embodiments, the central via 220A and the peripheral vias 220B may be disposed between the metal layer 140 and another metal layer 140.

[0122] 2D shows a top or bottom cross-sectional view (e.g., in a concentric configuration) of heterogeneous integrated device 200D. Heterogeneous integrated device 200D may include one or more concentric rings 230. In some embodiments, heterogeneous integrated device 200D may include concentric ring 230A and concentric ring 230B. Each concentric ring 230 may include a peripheral via 220B coupled to a corresponding metal layer (e.g., a ground layer). Each concentric ring 230 of the peripheral via 220B may be coupled to a different metal layer (e.g., a different ground layer). In some embodiments, heterogeneous integrated device 200D is in a coaxial configuration including concentric rings 230. In some embodiments, the heterogeneous integrated device 200D is a triaxial configuration having concentric rings 230 (e.g., concentric ring 230A of peripheral via 220B is coupled to a first ground plane, and concentric ring 230B of peripheral via 220B is coupled to a second ground plane different from the first ground plane).

[0123] 3A-3C illustrate systems 301A-301C including heterogeneous integrated devices 300A-300C, according to certain embodiments. In some embodiments, one or more of the heterogeneous integrated devices 300A-300C have the same or similar structure, materials, and / or functionality as one or more of the heterogeneous integrated devices of FIGS. 1A-2D.

[0124] FIG. 3A shows a perspective view of a system 301A including a heterogeneous integrated device 300A. The system 301A may include one or more covers 302 (e.g., an upper cover 302A and a lower cover 302B) that form a housing structure for accommodating the heterogeneous integrated device 300A. The system 301A may include one or more thermal interface materials 304 (e.g., a phase change material) disposed between the heterogeneous integrated device 300A and one or more of the covers 302. The system 301A may include a control unit 306 coupled (e.g., electrically coupled, communicatively coupled) to the heterogeneous integrated device 300A. The heterogeneous integrated device 300A may include one or more integrated circuits 160 and one or more components 130 (e.g., antennas). The heterogeneous integrated device 300A may include a glass substrate. The integrated circuits 160 and the components 130 (e.g., antennas) may be coupled by vias through a glass carrier.

[0125] 3B shows a cross-sectional side view of a system 301B including a heterogeneous integrated device 300B. In some embodiments, the heterogeneous integrated device 300B has the same or similar structure, materials, and / or functionality as one or more of the heterogeneous integrated devices of FIGS.

[0126] A thermal interface material 304 may be disposed between the cover 302 and the integrated circuit 160. The heterogeneous integrated device 300B may include a first set of components 130 (e.g., an antenna) on a first side of a first portion of the glass carrier 110, a first integrated circuit 160 on a second side of the first portion of the glass carrier 110 (i.e., opposite the first side), a second set of components 130 (e.g., an antenna) on a second side of the second portion of the glass carrier 110, and a second integrated circuit 160 on the first side of the second portion of the glass carrier 110.

[0127] 3C illustrates a system 301C that includes a heterogeneous integrated device 300C. In some embodiments, the heterogeneous integrated device 300C has the same or similar structure, materials, and / or functionality as one or more of the heterogeneous integrated devices of FIGS. 1A-3B.

[0128] The heterogeneous integrated device 300C may include one or more components including one or more of a receiver (Rx) 330, an impedance matching network (IMN) 340, a low noise amplifier (LNA) 350, a band pass filter (BPF) 360, a power amplifier (PA), and a transmitter (Tx) 380. The one or more components may be disposed on or in a glass carrier. The heterogeneous integrated device 300C may receive a signal via Rx, Rx 330 providing a signal to IMN 340, IMN 340 providing a signal to LNA 350, LNA 350 providing a signal to IMN 340, IMN 340 providing a signal to BPF 360, BPF 360 providing a signal to IMN 340, IMN 340 providing a signal to PA 370, PA 370 providing a signal to IMN 340, IMN 340 providing a signal to Tx 380, and the heterogeneous integrated device 300C may provide a signal via Tx 380.

[0129] 3D illustrates a system 301D that includes a base station 310 (base station (BS)), a heterogeneous integrated device 300D, and a client device 320 (user equipment (UE)). In some embodiments, the heterogeneous integrated device 300D has the same or similar structure, materials, and / or functionality as one or more of the heterogeneous integrated devices of FIGS. 1A-3C.

[0130] The base station 310 may transmit a first signal to the first heterogeneous integrated device 300D, the first heterogeneous integrated device 300D may transmit the first signal to the second heterogeneous integrated device 300D, and the second heterogeneous integrated device 300D may transmit the first signal to the client device 320. The client device 320 may transmit a second signal to the second heterogeneous integrated device 300D, the second heterogeneous integrated device 300D may transmit the second signal to the first heterogeneous integrated device 300D, and the first heterogeneous integrated device 300D may transmit the signal to the base station 310. The heterogeneous integrated device 300D may be configured to adjust the direction of an antenna of the heterogeneous integrated device 300D to transmit and receive signals to other devices (e.g., the base station 310, another heterogeneous integrated device 300D, the client device 320, etc.). Although FIG. 3D illustrates a system 301D using two heterogeneous integrated devices 300D to transmit and receive signals, the system may include more or fewer heterogeneous integrated devices 300D to transmit and receive signals.

[0131] 4 is a flow diagram of a method 400 related to heterogeneous integration, according to certain embodiments. In some embodiments, method 400 is performed by processing logic including hardware (e.g., circuitry, dedicated logic, programmable logic, microcode, processing device, etc.), software (e.g., instructions running on a processing device, a general-purpose computer system, or a dedicated machine), firmware, microcode, or a combination thereof. In some embodiments, method 400 is performed, at least in part, by a processing device. In some embodiments, a non-transitory storage medium stores instructions that, when executed by the processing device, cause the processing device to perform one or more operations of method 400.

[0132] For ease of explanation, method 400 is shown and described as a series of operations. However, operations in accordance with the present disclosure may occur in various orders and / or simultaneously, and concurrently with other operations not shown and described herein. Moreover, in some embodiments, not all illustrated operations are performed to implement method 400 in accordance with the disclosed subject matter. Furthermore, those skilled in the art will understand and appreciate that method 400 may alternatively be represented as a series of interrelated states via a state diagram or events.

[0133] 4, at block 402, processing logic causes a first via to be formed from a top surface of a first glass carrier to a bottom surface of the first glass carrier. In some embodiments, the first glass carrier is substantially transparent.

[0134] In some embodiments, the processing logic forms the first vias by laser forming holes through the first glass carrier from the top surface to the bottom surface, wet etching the holes to smooth corresponding edges of each hole through the first glass carrier, and electroplating to fill the holes with metal to form the first vias.

[0135] In some embodiments, the first vias include a central via and peripheral vias that substantially circumnavigate the central via. The central via may be coupled to a first antenna. A first of the peripheral vias may be coupled to a first metal layer (e.g., a first ground layer). The first vias may form a coaxial configuration.

[0136] In some embodiments, a second one of the peripheral vias is coupled to a second ground plane different from the first ground plane. The first vias may form a triaxial configuration.

[0137] At block 404, processing logic causes a first antenna to be disposed on the underside of the first glass carrier over at least one of the first vias. In some embodiments, processing logic causes the first antenna to be disposed on the underside of the first glass carrier by sputtering metal directly onto the underside of the first glass carrier.

[0138] At block 406, processing logic causes a first metal layer to be disposed on the top surface of the first glass carrier. The first metal layer may be a first ground layer.

[0139] At block 408, processing logic causes a first dielectric layer to be disposed on the first metal layer. In some embodiments, in response to disposing the first dielectric layer on the first metal layer, processing logic causes a first subset of second vias to be formed through the first dielectric layer and on the first metal layer.

[0140] At block 410, processing logic causes a second metal layer to be disposed on the first dielectric layer. The second metal layer may be associated with at least one of a control signal or a ground.

[0141] At block 412, processing logic causes a second dielectric layer to be disposed on the second metal layer. In some embodiments, in response to disposing the second dielectric layer on the second metal layer, processing logic causes a second subset of second vias to be formed through the second dielectric layer on the second metal layer. A third metal layer will be disposed on the second subset of second vias.

[0142] At block 414, processing logic causes a third metal layer to be disposed on the second dielectric layer. The third metal layer may be coupled to the first antenna through one or more of the first vias. The first metal layer, the second metal layer, and the third metal layer may be coupled through the second vias.

[0143] At block 416, processing logic causes the integrated circuit to be disposed on the third metal layer. In some embodiments, one or more metal layers and / or one or more dielectric layers are disposed between the third metal layer and the integrated circuit. For example, in multiple layers (e.g., more than four metal layers including the first metal layer as an antenna layer), the integrated circuit can be disposed on the nth layer, where n is the last metal layer. In some embodiments, there is no limit to the number of metal layers formed in the stack, the number of integrated circuits on the top metal layer, and / or the number of surrounding rings of ground vias surrounding vias carrying core signals. In some embodiments, the vias have a dual function of grounding and conducting heat to a heat sink, which can be disposed on the first glass carrier on the same side as the integrated circuit.

[0144] In some embodiments, the processing logic forms a third via through the second glass carrier and attaches the second glass carrier to the first glass carrier. The first antenna may be disposed between the first glass carrier and the second glass carrier.

[0145] 5 is a block diagram illustrating a computer system 500, according to certain embodiments. In some embodiments, the computer system 500 is an integrated circuit 160. In some embodiments, the computer system 500 causes the formation of the heterogeneous integrated device 100.

[0146] In some embodiments, computer system 500 is connected to other computer systems (e.g., via a network such as a local area network (LAN), an intranet, an extranet, or the Internet). In some embodiments, computer system 500 operates in the capacity of a server or a client computer in a client-server environment, or as a peer computer in a peer-to-peer or distributed network environment. In some embodiments, computer system 500 is provided by a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a mobile phone, a web appliance, a server, a network router, switch, or bridge, or any device capable of executing (sequentially or otherwise) a set of instructions that specify actions to be taken by that device. Furthermore, the term "computer" may include any collection of computers that, individually or collectively, execute a set (or sets) of instructions to perform any one or more of the methodologies described herein.

[0147] In a further aspect, computer system 500 includes a processing device 502, a volatile memory 504 (e.g., random access memory (RAM)), a non-volatile memory 506 (e.g., read-only memory (ROM) or electrically erasable programmable ROM (EEPROM)), and a data storage device 516, which communicate with each other via a bus 508.

[0148] In some embodiments, processing device 502 is provided by one or more general-purpose processors (e.g., complex instruction set computing (CISC) microprocessors, reduced instruction set computing (RISC) microprocessors, very long instruction word (VLIW) microprocessors, microprocessors implementing other types of instruction sets, or microprocessors implementing a combination of instruction set types) or special-purpose processors (e.g., application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), digital signal processors (DSPs), or network processors).

[0149] In some embodiments, computer system 500 further includes a network interface device 522 (e.g., coupled to a network 574). In some embodiments, computer system 500 also includes a video display unit 510 (e.g., a liquid crystal display (LCD)), an alphanumeric input device 512 (e.g., a keyboard), a cursor control device 514 (e.g., a mouse), and a signal generating device 520.

[0150] In some implementations, the data storage device 516 includes a non-transitory computer-readable storage medium 524 on which are stored instructions 526 encoding any one or more of the methods or functions described herein, including instructions encoding components for implementing the methods described herein.

[0151] In some embodiments, the instructions 526 also reside, completely or partially, within the volatile memory 504 and / or within the processing device 502 during execution by the computer system 500; and thus, in some embodiments, the volatile memory 504 and the processing device 502 also constitute machine-readable storage media.

[0152] Although the computer-readable storage medium 524 is shown as a single medium in the illustrative example, the term "computer-readable storage medium" is intended to include a single medium or multiple media (e.g., centralized or distributed databases and / or associated caches and servers) that store one or more sets of executable instructions. The term "computer-readable storage medium" is also intended to include any tangible medium that can store or encode a set of instructions that are executed by a computer to cause the computer to perform any one or more of the methodologies described herein. The term "computer-readable storage medium" is intended to include, but is not limited to, solid-state memory, optical media, and magnetic media.

[0153] In some embodiments, the methods, components, and features described herein are implemented by discrete hardware components or integrated into the functionality of other hardware components, such as application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), digital signal processors (DSPs), or similar devices. In some embodiments, the methods, components, and features are implemented by firmware modules or functional circuitry within a hardware device. In some embodiments, the methods, components, and features are implemented in any combination of hardware devices and computer program components, or in a computer program.

[0154] Unless otherwise specified, terms such as "causing," "forming," "disposing," "depositing," "sputtering," "etching," "filling," "providing," "transmitting," "receiving," "identifying," "generating," "determining," and the like refer to operations and processes performed or implemented by a computer system that manipulate and convert data represented as physical (electronic) quantities in the computer system's registers and memory into other data similarly represented as physical quantities in the computer system's memory or registers or other such information storage, transmission, or display devices. In some embodiments, the terms "first," "second," "third," "fourth," and the like, as used herein, are meant as labels to distinguish between different elements and do not imply any ordering by their numerical designation.

[0155] Examples described herein also relate to apparatus for performing the methods described herein. In some embodiments, the apparatus comprises a general-purpose computer system that is specially configured to perform the methods described herein or that is selectively programmed by a computer program stored on the computer system. Such a computer program is stored on a computer-readable tangible storage medium.

[0156] The methods and illustrative examples described herein are not inherently related to any particular computer or other apparatus. In some embodiments, various general-purpose systems are used in accordance with the teachings described herein. In some embodiments, more specialized apparatuses are constructed to perform the methods described herein and / or each of their individual functions, routines, subroutines, or operations. Examples of structures for various of these systems are set forth in the description above.

[0157] The above description is illustrative, and not limiting. While the present disclosure has been described with reference to particular illustrative examples and embodiments, it will be recognized that the present disclosure is not limited to the described examples and embodiments. The scope of the present disclosure should be determined with reference to the following claims, along with the full scope of equivalents to which such claims are entitled.

Claims

1. 1. A method comprising: forming a first plurality of vias from an upper surface of a first glass carrier to a lower surface of the first glass carrier; disposing a first antenna on the lower surface of the first glass carrier over at least one via of the first plurality of vias; disposing a first metal layer on the top surface of the first glass carrier; disposing a first dielectric layer over the first metal layer; disposing a second metal layer on the first dielectric layer, the second metal layer being associated with at least one of a control signal or a ground; disposing a second dielectric layer on the second metal layer; disposing a third metal layer on the second dielectric layer, the third metal layer coupled to the first antenna through one or more of the first plurality of vias, and the first metal layer, the second metal layer, and the third metal layer coupled through a second plurality of vias; and placing an integrated circuit on the third metal layer.

2. 10. The method of claim 1, wherein disposing the first antenna on the lower surface of the first glass carrier is by sputtering metal directly onto the lower surface of the first glass carrier.

3. forming the first plurality of vias; forming a plurality of holes through the first glass carrier from the upper surface to the lower surface with a laser; smoothing corresponding edges of each of the plurality of holes through the first glass carrier by wet etching the plurality of holes; 2. The method of claim 1, further comprising filling the holes with metal by electroplating to form the first plurality of vias.

4. forming a first subset of the second plurality of vias through the first dielectric layer and onto the first metal layer in response to disposing the first dielectric layer on the first metal layer; forming a second subset of the second plurality of vias through the second dielectric layer and onto the second metal layer in response to disposing the second dielectric layer on the second metal layer.

2. The method of claim 1, further comprising: wherein the third metal layer is disposed on the second subset of the second plurality of vias.

5. the first plurality of vias includes a central via and peripheral vias that substantially circumnavigate the central via; the central via is coupled to the first antenna; a first one of the peripheral vias is coupled to the first metal layer; The method of claim 1.

6. The method of claim 5 , wherein the first plurality of vias form a coaxial configuration.

7. the first metal layer is a first ground layer, a second one of the peripheral vias is coupled to a second ground plane different from the first ground plane; the first plurality of vias forming a triaxial configuration; The method of claim 5.

8. forming a third plurality of vias through the second glass carrier; attaching the second glass carrier to the first glass carrier, the first antenna being located between the first glass carrier and the second glass carrier; The method of claim 1 further comprising:

9. the first glass carrier being substantially transparent; or The heterogeneous integrated device has a crossover branch configuration between one or more corresponding transmission lines. The method of claim 1 , wherein at least one of the following is satisfied:

10. A heterogeneous integrated device, comprising: a first glass carrier having an upper surface and a lower surface, a first plurality of vias formed from the upper surface to the lower surface; a first antenna disposed on the lower surface of the first glass carrier over at least one via of the first plurality of vias; a first metal layer disposed on the top surface of the first glass carrier; a first dielectric layer disposed on the first metal layer; a second metal layer disposed on the first dielectric layer, the second metal layer being associated with at least one of a control signal or a ground; a second dielectric layer disposed on the second metal layer; a third metal layer disposed on the second dielectric layer, the third metal layer coupled to the first antenna through one or more of the first plurality of vias, and the first metal layer, the second metal layer, and the third metal layer coupled through at least one of the second plurality of vias; an integrated circuit disposed on the third metal layer; Heterogeneous integrated devices.

11. The heterogeneous integrated device of claim 10 , wherein the first antenna is disposed on the bottom surface of the first glass carrier by sputtering metal directly onto the bottom surface of the first glass carrier.

12. the second plurality of vias: a first subset of the second plurality of vias formed through the first dielectric layer and on the first metal layer; a second subset of the second plurality of vias formed through the second dielectric layer and on the second metal layer, the third metal layer being disposed on the second subset of the second plurality of vias; The heterogeneous integrated device of claim 10 comprising:

13. the first plurality of vias comprises a central via and peripheral vias that substantially circumnavigate the central via; the central via is coupled to the first antenna; a first one of the peripheral vias is coupled to the first metal layer; The heterogeneous integrated device of claim 10.

14. The heterogeneous integrated device of claim 13 , wherein the first plurality of vias form a coaxial configuration.

15. the first metal layer is a first ground layer, a second one of the peripheral vias is coupled to a second ground plane different from the first ground plane; the first plurality of vias forming a triaxial configuration; The heterogeneous integrated device of claim 13.

16. 11. The heterogeneous integrated device of claim 10, further comprising a second glass carrier, a third plurality of vias formed through the second glass carrier, the second glass carrier attached to the first glass carrier, and the first antenna located between the first glass carrier and the second glass carrier.

17. the first glass carrier being substantially transparent; or The heterogeneous integrated device has a crossover splitter design between one or more corresponding vias and one or more transmission lines. The heterogeneous integrated device according to claim 10 , wherein at least one of the above is satisfied.

18. A heterogeneous integrated device, comprising: a first glass carrier having an upper surface and a lower surface; a first plurality of vias formed from the upper surface to the lower surface, a first plurality of vias comprising a central via and peripheral vias that substantially circumnavigate the central via; a first antenna disposed on the bottom surface of the first glass carrier over the central via; a first metal layer disposed on the top surface of the first glass carrier, a first metal layer coupled to at least one of the peripheral vias; a dielectric layer disposed on the first metal layer; a second metal layer disposed on the dielectric layer, the second metal layer coupled to the first antenna through the central via, the first metal layer and the second metal layer coupled through at least one of a second plurality of vias; an integrated circuit disposed on the second metal layer; A heterogeneous integrated device comprising:

19. The heterogeneous integrated device of claim 18 , wherein the first plurality of vias form a coaxial configuration.

20. a first one of the peripheral vias coupled to the first metal layer; the first metal layer is a first ground layer; a second one of the peripheral vias is coupled to a second ground plane different from the first ground plane; the first plurality of vias forming a triaxial configuration. The heterogeneous integrated device of claim 18.

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