Nitride semiconductor light emitting device
The nitride semiconductor light-emitting device addresses the lifespan issue by incorporating an electron block stack with a high Al composition ratio top layer and undoped structure, achieving improved light output and extended device life.
Patent Information
- Application Number
- JP2024118339
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-07-24
- Publication Date
- 2026-02-05
- Estimated Expiration
- 2044-07-24
AI Technical Summary
The configuration of existing nitride semiconductor light-emitting devices, as described in Patent Document 1, does not adequately extend the lifespan of the device.
A nitride semiconductor light-emitting device is designed with an electron block stack comprising multiple layers, where the top layer closest to the p-type semiconductor layer has a higher Al composition ratio than the adjacent layer, and the uppermost layer is undoped to suppress the diffusion of p-type impurities, thereby enhancing the device's longevity.
This configuration results in a nitride semiconductor light-emitting device with increased light output maintenance and extended lifespan, particularly when the uppermost layer's thickness is optimized between 1.4 nm and 2.0 nm.
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Figure 2026017583000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a nitride semiconductor light emitting device. [Background technology]
[0002] Patent Document 1 discloses a nitride semiconductor light-emitting device comprising an active layer, an electronic block structure formed on the active layer, and a p-type contact layer formed on the electronic block structure. The electronic block structure comprises a first electron block layer located on the active layer side, and a second electron block layer formed on the first electron block layer and having a smaller Al composition ratio than the first electron block layer. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Patent Publication No. 2021-027194 Summary of the Invention [Problem to be solved by the invention]
[0004] However, the configuration of the nitride semiconductor light-emitting device described in Patent Document 1 leaves room for improvement in terms of extending the lifespan.
[0005] The present invention has been made in view of the above circumstances, and has an object to provide a nitride semiconductor light-emitting device that can achieve a long life. [Means for solving the problem]
[0006] In order to achieve the above-mentioned object, the present invention provides a nitride semiconductor light-emitting device comprising: an n-type semiconductor layer; an active layer formed on the n-type semiconductor layer; an electron block stack formed on the active layer and having a plurality of electron block layers each having an Al composition ratio of 70% or more; and a p-type semiconductor layer formed on the electron block stack, wherein the plurality of electron block layers comprise a top layer located closest to the p-type semiconductor layer and an adjacent layer adjacent to the top layer, and the Al composition ratio of the top layer is higher than the Al composition ratio of the adjacent layer. [Effects of the Invention]
[0007] According to the present invention, it is possible to provide a nitride semiconductor light emitting device that can achieve a longer life. [Brief explanation of the drawings]
[0008] [Figure 1] 1 is a schematic diagram illustrating a configuration of a nitride semiconductor light emitting device according to an embodiment. [Figure 2] 10 is a graph showing the relationship between power-on time and light emission output maintenance rate in an experimental example. [Figure 3] 10 is a graph showing the relationship between power-on time and light emission output in an experimental example. DETAILED DESCRIPTION OF THE INVENTION
[0009] [Embodiment Mode] An embodiment of the present invention will be described with reference to Fig. 1. The embodiment described below is shown as a preferred specific example for carrying out the present invention, and although various technically preferable technical matters are specifically exemplified, the technical scope of the present invention is not limited to this specific embodiment.
[0010] (Nitride semiconductor light emitting device 1) FIG. 1 is a schematic diagram illustrating the configuration of a nitride semiconductor light-emitting element 1. Note that in FIG. 1, the dimensional ratios in the stacking direction of the semiconductor layers of the nitride semiconductor light-emitting element 1 (hereinafter also simply referred to as "light-emitting element 1") do not necessarily match the actual ones. Hereinafter, the stacking direction of the semiconductor layers of the light-emitting element 1 will be referred to as the vertical direction. Also, one side in the vertical direction, on which the semiconductor layers of the substrate 2 are grown (e.g., the upper side in FIG. 1), will be referred to as the upper side, and the opposite side (e.g., the lower side in FIG. 1) will be referred to as the lower side. Note that the expressions "upper" and "lower" are used for convenience and do not limit the orientation of the light-emitting element 1 relative to the vertical direction, for example, when the light-emitting element 1 is in use.
[0011] The light-emitting element 1 is, for example, a light-emitting diode (LED) or a semiconductor laser (LD: Laser Diode). In this embodiment, the light-emitting element 1 is a light-emitting diode that emits light with a wavelength in the ultraviolet region. In particular, the light-emitting element 1 in this embodiment emits ultraviolet light with a central wavelength of 240 nm or more and 365 nm or less. The light-emitting element 1 can be used in fields such as sterilization (e.g., air purification, water purification, etc.), medical care (e.g., phototherapy, measurement and analysis, etc.), UV curing, etc.
[0012] The light-emitting element 1 includes a buffer layer 3, an n-type semiconductor layer 4, a compositionally graded layer 5, an active layer 6, an electron-blocking stack 7, and a p-type semiconductor layer 8, which are arranged in this order on a substrate 2. The light-emitting element 1 also includes an n-side electrode 11 provided on the n-type semiconductor layer 4, and a p-side electrode 12 provided on the p-type semiconductor layer 8.
[0013] The semiconductor constituting the light emitting element 1 is, for example, Al a Ga b In 1-a-b In this embodiment, a group III nitride semiconductor having two to four elements represented by the formula N (0≦a≦1, 0≦b≦1, 0≦a+b≦1) can be used. c Ga 1-cThe semiconductor material uses a binary or ternary group III nitride semiconductor represented by N (0≦c≦1). Some of these group III elements may be replaced with boron (B), thallium (Tl), etc. Also, some of the nitrogen may be replaced with phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), etc.
[0014] The substrate 2 is made of a material that transmits the light emitted by the active layer 6. The substrate 2 is, for example, a sapphire (Al2O3) substrate. The upper surface of the substrate 2 is a c-plane. This c-plane may have an off-axis angle. Alternatively, the substrate 2 may be, for example, an aluminum nitride (AlN) substrate or an aluminum gallium nitride (AlGaN) substrate.
[0015] The buffer layer 3 is formed on the substrate 2. In this embodiment, the buffer layer 3 is made of aluminum nitride. When the substrate 2 is an aluminum nitride substrate or an aluminum gallium nitride substrate, the buffer layer 3 is not necessarily provided. The buffer layer 3 may also be made of undoped Al gallium nitride formed on a layer made of aluminum nitride. p Ga 1-p The layer may include N layers (0≦p≦1).
[0016] The n-type semiconductor layer 4 is formed on the buffer layer 3. The n-type semiconductor layer 4 is, for example, Al doped with n-type impurities. q Ga 1-q N (0≦q≦1). In this embodiment, silicon (Si) is used as the n-type impurity. The same applies to semiconductor layers containing n-type impurities other than the n-type semiconductor layer 4. Note that germanium (Ge), selenium (Se), tellurium (Te), or the like may also be used as the n-type impurity. The n-type semiconductor layer 4 may have a single-layer structure or a multi-layer structure.
[0017] The compositionally graded layer 5 is formed on the n-type semiconductor layer 4. The compositionally graded layer 5 is made of Al r Ga 1-rIt consists of N (0≦r≦1). The Al composition ratio at each position in the vertical direction of the composition gradient layer 5 increases as the position is higher. Note that the composition gradient layer 5 may include a region where the Al composition ratio does not increase as it goes upward in a very small part of the vertical direction (for example, a region within 5% of the entire vertical direction of the composition gradient layer 5).
[0018] It is preferable that the Al composition ratio at the lower end of the composition gradient layer 5 is substantially the same as (for example, the difference is within 5%) the Al composition ratio at the upper end of the n-type semiconductor layer 4 adjacent to the lower side of the composition gradient layer 5. Also, it is preferable that the Al composition ratio at the upper end of the composition gradient layer 5 is substantially the same as (for example, the difference is within 5%) the Al composition ratio at the lower end of the barrier layer 61 adjacent to the upper side of the composition gradient layer 5.
[0019] The active layer 6 is formed on the composition gradient layer 5. The active layer 6 in this embodiment has a multiple quantum well structure having a plurality of well layers 621, 622. The bandgap of the active layer 6 is adjusted so that it can emit ultraviolet light with a central wavelength of 240 nm or more and 365 nm or less. When the active layer 6 is a multiple quantum well structure as in this embodiment, from the viewpoint of improving the emission output, the central wavelength of the ultraviolet light emitted by the active layer 6 is preferably 250 nm or more and 300 nm or less, and more preferably 260 nm or more and 290 nm or less. In this embodiment, the active layer 6 has three barrier layers 61 and three well layers 621, 622, and the barrier layers 61 and the well layers 621, 622 are alternately laminated. In the active layer 6, the barrier layer 61 is located at the lower end, and the well layer 622 is located at the upper end.
[0020] Each barrier layer 61 is formed by Al s Ga 1-s N (0<s≦1). The Al composition ratio of each barrier layer 61 is, for example, 75% or more and 95% or less. Also, the film thickness of each barrier layer 61 is, for example, 2 nm or more and 50 nm or less.
[0021] The well layers 621, 622 are Al t Ga 1-tIt is formed by N(0 < t < 1). The Al composition ratio t of each well layer 621, 622 is smaller than the Al composition ratio s of the barrier layer 61 (that is, t < s).
[0022] The three well layers 621, 622 are composed of the bottom well layer 621 which is the bottommost well layer arranged at the bottom, and the upper well layers 622 which are the two well layers other than the bottom well layer 621, and they have different configurations. For example, the film thickness of the bottom well layer 621 is 1 nm or more larger than the film thickness of each of the two upper well layers 622, and the Al composition ratio of the bottom well layer 621 is 2% or more larger than the Al composition ratio of each of the two upper well layers 622. In this embodiment, the upper well layer 622 has a film thickness of 2 nm or more and 4 nm or less and an Al composition ratio of 25% or more and 45% or less, and the bottom well layer 621 has a film thickness of 4 nm or more and 6 nm or less and an Al composition ratio of 35% or more and 55% or less. The difference in film thickness between the bottom well layer 621 and each upper well layer 622 can be 2 nm or more and 4 nm or less.
[0023] By making the Al composition ratio of the bottom well layer 621 larger than the Al composition ratio of the upper well layer 622, the crystallinity of the bottom well layer 621 is improved. This is because the difference in Al composition ratio between the bottom well layer 621 and the n-type semiconductor layer 4 becomes smaller. By improving the crystallinity of the bottom well layer 621, the crystallinity of each semiconductor layer of the active layer 6 formed upward from the bottom well layer 621 is also improved. As a result, the mobility of carriers in the active layer 6 is improved and the emission output is improved. Such an effect is more remarkable as the film thickness of the bottom well layer 621 increases, but from the viewpoint of suppressing an increase in the electrical resistance value of the entire light-emitting element 1, the film thickness of the bottom well layer 621 is designed to be below a predetermined value.
[0024] In addition, in this embodiment, although an example in which the active layer 6 has a multiple quantum well structure with three well layers 621, 622 is shown, it is not limited to this, and a multiple quantum well structure with two or four or more well layers may also be used. Further, the active layer 6 may have a single quantum well structure having only one well layer.
[0025] The electron blocking laminate 7 is formed on the active layer 6. The electron blocking laminate 7 has a role of improving the electron injection efficiency into the active layer 6 by suppressing the occurrence of an overflow phenomenon in which electrons leak from the active layer 6 to the p-type semiconductor layer 8 side (hereinafter also referred to as the electron blocking effect). The electron blocking laminate 7 includes a plurality of electron blocking layers each having an Al composition ratio of 70% or more. The electron blocking layer includes at least an uppermost layer 73 located on the p-type semiconductor layer 8 side and an adjacent layer 72 adjacent to the uppermost layer 73. In the present embodiment, the electron blocking laminate 7 has three electron blocking layers, and these three electron blocking layers are referred to as the lowermost layer 71, the adjacent layer 72, and the uppermost layer 73 in order from the lower side.
[0026] The lowermost layer 71 is provided on the active layer 6. The lowermost layer 71 is made of, for example, Al u1 Ga 1-u1 N (0.7 ≦ u1 ≦ 1). The Al composition ratio u1 of the lowermost layer 71 is, for example, 90% or more, and in the present embodiment, it is made of aluminum nitride. The film thickness of the lowermost layer 71 is, for example, not less than 0.5 nm and not more than 5.0 nm.
[0027] The adjacent layer 72 is made of, for example, Al u2 Ga 1-u2 N (0.7 ≦ u2 < 1). The Al composition ratio u2 of the adjacent layer 72 is smaller than the Al composition ratio u1 of the lowermost layer 71 (that is, u2 < u1), and is, for example, not less than 70% and not more than 90%. The film thickness of the adjacent layer 72 is larger than the film thickness of the lowermost layer 71, and is, for example, not less than 15 nm and not more than 100 nm.
[0028] Since a semiconductor layer with a larger Al composition ratio has a larger electrical resistance value, if the film thickness of the lowermost layer 71 with a relatively high Al composition ratio is made too large, an excessive increase in the overall electrical resistance value of the light-emitting device 1 will occur. Therefore, it is preferable to make the film thickness of the lowermost layer 71 somewhat small. On the other hand, if the film thickness of the lowermost layer 71 is made small, the probability that electrons tunnel through the lowermost layer 71 from the lower side to the upper side can increase. Therefore, in the light-emitting device 1 of the present embodiment, by forming the adjacent layer 72 on the lowermost layer 71, the electrons from passing through the entire electron blocking laminate 7 are suppressed.
[0029] The uppermost layer 73 is made of, for example, Al u3 Ga 1-u3 N (0.7 ≤ u3 ≤ 1). The Al composition ratio u3 of the uppermost layer 73 is larger than the Al composition ratio u2 of the adjacent layer 72 (i.e., u3 > u2). The Al composition ratio u3 of the uppermost layer 73 is, for example, 90% or more. Also, for example, the Al composition ratio u3 of the uppermost layer 73 is smaller than the Al composition ratio u1 of the lowermost layer 71. That is, for example, the Al composition ratios u1, u2, and u3 satisfy the relationship u1 < u3 < u2. Note that the Al composition ratio u3 of the uppermost layer 73 may be equal to or greater than the Al composition ratio u1 of the lowermost layer 71. The film thickness of the uppermost layer 73 is preferably less than 2.3 nm from the viewpoint of, for example, extending the lifetime of the light-emitting device, and more preferably 1.4 nm or more and 2.0 nm or less from the viewpoints of improving the light-emitting output and extending the lifetime. These numerical values are supported by the experimental examples described later.
[0030] The uppermost layer 73 suppresses the diffusion of magnesium as a p-type impurity from the p-type semiconductor layer 8 to the active layer 6. Here, when magnesium diffuses into the active layer 6, dislocations are likely to occur in the active layer 6 due to the difference in atomic radius between the matrix atoms constituting the active layer 6 and magnesium. Then, the recombination of electrons and holes in the active layer 6 is likely to become non-radiative recombination (for example, recombination that generates vibrations), and there is a risk that the light-emitting efficiency will decrease. Furthermore, hydrogen is likely to bind to magnesium. When magnesium diffuses from the p-type semiconductor layer 8 to the active layer 6 side, hydrogen is also likely to diffuse into the active layer 6 at the same time. When hydrogen diffuses into the active layer 6, the active layer 6 deteriorates, the light-emitting output decreases with the passage of the energization time, and there is a risk that the lifetime of the light-emitting device 1 will be shortened. Therefore, by making the uppermost layer 73 of the electron blocking laminate 7 a layer with a high Al composition ratio, the diffusion of magnesium as a p-type impurity from the p-type semiconductor layer 8 to the lower side of the electron blocking laminate 7 is suppressed.
[0031] Each semiconductor layer constituting the electronic block stack 7 is an undoped semiconductor layer. An undoped semiconductor layer refers to a semiconductor layer to which no impurities were intentionally added during the formation of the semiconductor layer, and also includes a semiconductor layer that inevitably contains a trace amount of impurities. Here, the top layer 73 is a semiconductor layer adjacent to the p-type semiconductor layer 8. When the magnesium concentration distribution is measured by secondary ion mass spectrometry (SIMS), it may appear that the top layer 73 also contains magnesium due to the specifications of the SIMS measurement. However, even in such a case, if no impurities were intentionally added during the formation of the top layer 73, the top layer 73 is considered to be an undoped semiconductor layer. When the impurity concentrations of the top layer 73 are measured by SIMS, the n-type impurity concentration and the p-type impurity concentration of the top layer 73 are each 1.0 × 10 19 atoms / cm 3 The following is preferable. Furthermore, silicon is not contained between the electronic block stack 7 and the p-type semiconductor layer 8. Note that each semiconductor layer constituting the electronic block stack 7 is not limited to an undoped semiconductor layer. For example, the adjacent layer 72 may be doped with silicon. Magnesium is easily attracted to silicon, and hydrogen easily bonds with magnesium. Therefore, it is presumed that the presence of silicon in the adjacent layer 72 suppresses the diffusion of magnesium and hydrogen from the p-type semiconductor layer 8 to the active layer 6, thereby extending the life of the light-emitting element 1.
[0032] The p-type semiconductor layer 8 is formed on the electron block stack 7. The p-type semiconductor layer 8 has an Al composition ratio of less than 70% and is Al doped with p-type impurities. v Ga 1-v N (0≦v<0.7). In this embodiment, magnesium (Mg) is used as the p-type impurity, but other than magnesium, zinc (Zn), beryllium (Be), calcium (Ca), strontium (Sr), barium (Ba), carbon (C), etc. may also be used. In this embodiment, the p-type semiconductor layer 8 has, from the bottom up, a p-type cladding layer 81 and a p-type contact layer 82.
[0033] The p-type cladding layer 81 is provided so as to be in contact with the upper surface of the electron block stack 7. The Al composition ratio of the p-type cladding layer 81 is higher than the Al composition ratio of the p-type contact layer 82. The thickness of the p-type cladding layer 81 is, for example, not less than 9 nm and not more than 105 nm.
[0034] The p-type contact layer 82 is a layer to which the p-side electrode 12, which will be described later, is connected, and is doped with a high concentration of p-type impurities. The p-type contact layer 82 is configured to have a low Al composition ratio (for example, 10% or less) to achieve ohmic contact with the p-side electrode 12, and from this perspective, it is preferable that it be made of p-type gallium nitride (GaN). Because the p-type contact layer 82 with a low Al composition ratio can absorb ultraviolet light emitted from the active layer 6, the thickness of the p-type contact layer 82 is preferably 50 nm or less.
[0035] The p-type semiconductor layer 8 is not limited to two layers, the p-type cladding layer 81 and the p-type contact layer 82, but may be, for example, one layer or may be configured of three or more layers.
[0036] The n-side electrode 11 is formed on an exposed surface 41 of the n-type semiconductor layer 4 that is exposed above the active layer 6. The n-side electrode 11 may be, for example, a multilayer film in which titanium (Ti), aluminum, titanium, and gold (Au) are laminated in this order on the n-type semiconductor layer 4.
[0037] The p-side electrode 12 is formed on the upper surface of the p-type semiconductor layer 8. The p-side electrode 12 may be, for example, a multilayer film in which nickel (Ni) and gold are laminated in this order on the p-type semiconductor layer 8. Furthermore, when the light-emitting element 1 is flip-chip mounted as described below, the p-side electrode 12 may be made of a material capable of reflecting ultraviolet light emitted from the active layer 6.
[0038] The light-emitting element 1 can be flip-chip mounted on a package substrate (not shown) for use. That is, the side of the light-emitting element 1 on which the n-side electrode 11 and the p-side electrode 12 are provided in the vertical direction faces the package substrate, and the n-side electrode 11 and the p-side electrode 12 are mounted on the package substrate via gold bumps or the like. In the flip-chip mounted light-emitting element 1, light is extracted from the substrate 2 side (i.e., the lower side). However, this is not limited thereto, and the light-emitting element 1 may also be mounted on the package substrate by wire bonding or the like. In addition, in this embodiment, the light-emitting element 1 is a so-called horizontal light-emitting element in which both the n-side electrode 11 and the p-side electrode 12 are provided on the upper side of the light-emitting element 1, but this is not limited thereto, and the light-emitting element may also be a vertical light-emitting element. A vertical light-emitting element is a light-emitting element in which an active layer is sandwiched between an n-side electrode and a p-side electrode. When the light-emitting element is vertical, it is preferable to remove the substrate and buffer layer by laser lift-off or the like.
[0039] (Method of manufacturing nitride semiconductor light emitting element 1) Next, an example of a method for manufacturing the light emitting device 1 of this embodiment will be described. In this embodiment, a buffer layer 3, an n-type semiconductor layer 4, a compositionally graded layer 5, an active layer 6, an electron block stack 7, and a p-type semiconductor layer 8 are epitaxially grown in this order on a disk-shaped substrate 2 by metal organic chemical vapor deposition (MOCVD). That is, in this embodiment, the disk-shaped substrate 2 is placed in a chamber, and source gases for each semiconductor layer to be formed on the substrate 2 are introduced into the chamber, thereby forming each semiconductor layer on the substrate 2. As source gases for epitaxially growing each semiconductor layer, trimethylaluminum (TMA) as an aluminum source, trimethylgallium (TMG) as a gallium source, ammonia (NH) as a nitrogen source, tetramethylsilane (TMSi) as a silicon source, and biscyclopentadienylmagnesium (CpMg) as a magnesium source can be used.
[0040] In the method for manufacturing a light-emitting device of this embodiment, when the electron block stack 7 is formed, an n-type impurity source (i.e., tetramethylsilane as a silicon source) and a p-type impurity source (i.e., biscyclopentadienyl magnesium as a magnesium source) are not supplied into the chamber.
[0041] The MOCVD method is also called metal organic vapor phase epitaxy (MOVPE). When epitaxially growing each semiconductor layer on the substrate 2, other epitaxial growth methods such as molecular beam epitaxy (MBE) and hydride vapor phase epitaxy (HVPE) can also be used.
[0042] After each semiconductor layer is formed on the disk-shaped substrate 2, a mask is formed on a portion of the p-type semiconductor layer 8, i.e., on a portion other than the portion that will become the exposed surface 41 of the n-type semiconductor layer 4. Then, the region where the mask is not formed is removed by etching from the top surface of the p-type semiconductor layer 8 to partway up and down the n-type semiconductor layer 4. As a result, an exposed surface 41 that is exposed upward is formed on the n-type semiconductor layer 4. After the exposed surface 41 is formed, the mask is removed.
[0043] Next, an n-side electrode 11 is formed on the exposed surface 41 of the n-type semiconductor layer 4, and a p-side electrode 12 is formed on the p-type semiconductor layer 8. The n-side electrode 11 and the p-side electrode 12 may be formed by a well-known method such as an electron beam evaporation method or a sputtering method. The completed product is cut into pieces of desired dimensions, and a plurality of light-emitting elements 1 as shown in FIG. 1 are manufactured from one wafer.
[0044] (Actions and Effects of the Embodiments) In this embodiment, the multiple electron blocking layers constituting the electron blocking stack 7 include a top layer 73 located closest to the p-type semiconductor layer and an adjacent layer 72 adjacent to the top layer 73, and the Al composition ratio of the top layer 73 is higher than the Al composition ratio of the adjacent layer 72. By providing the top layer 73 of the electron blocking stack 7 with a semiconductor layer having a relatively high Al composition ratio in this way, it is possible to suppress the diffusion of p-type impurities from the p-type semiconductor layer 8 to the active layer 6, and it is possible to extend the life of the light-emitting element 1.
[0045] Furthermore, the thickness of the uppermost layer 73 is preferably less than 2.3 nm, and more preferably 1.4 nm to 2.0 nm. In this case, the light emitting output of the light emitting element 1 can be increased while the life of the light emitting element 1 can be extended. These numerical values are supported by experimental examples described later.
[0046] As described above, according to this embodiment, it is possible to provide a nitride semiconductor light emitting device that can achieve a longer life.
[0047] [Experimental Example] This example shows the change in the light-emitting output maintenance rate and the light-emitting output over time when the thickness of the top layer is changed in various ways. The light-emitting output maintenance rate of a light-emitting element is the ratio of the current light-emitting output to the initial light-emitting output.
[0048] In this experimental example, first, wafers according to a comparative example and examples 1 to 4 were manufactured. The wafer according to the comparative example is a wafer having the same configuration as the light-emitting device shown in the embodiment, except that it does not have a top layer. The wafers according to examples 1 to 4 are wafers having the same layered structure as the light-emitting device shown in the embodiment, but with different top layer thicknesses. The top layer thicknesses were 0.95 nm for example 1, 1.45 nm for example 2, 1.89 nm for example 3, and 2.30 nm for example 4. The configuration of the comparative example is shown in Table 1, and the configurations of examples 1 to 4 are shown in Table 2.
[0049] [Table 1]
[0050] [Table 2]
[0051] The film thickness of each semiconductor layer listed in Tables 1 and 2 was measured using a transmission electron microscope. The Al composition ratio of each semiconductor layer listed in Tables 1 and 2 is a value estimated from the secondary ion intensity of Al measured by secondary ion mass spectrometry. The "composition gradient layer" column in Tables 1 and 2 indicates that the Al composition ratio at each position in the vertical direction of the composition gradient layer 5 varies from 55% to 85% from the bottom to the top.
[0052] Furthermore, the "Si concentration" and "Mg concentration" in Tables 1 and 2 are silicon concentrations and magnesium concentrations obtained using secondary ion mass spectrometry. In Tables 1 and 2, the silicon concentration in the bottom well layer 621 indicates the peak concentration among the silicon concentrations at each position in the vertical direction of the bottom well layer 621. In Tables 1 and 2, the "Si concentration" and "Mg concentration" columns marked with * indicate that accurate measurement of the silicon concentration and magnesium concentration was difficult due to the thin film thickness of the semiconductor layer. Furthermore, in the "Si concentration" and "Mg concentration" columns in Tables 1 and 2, the notation "BG" means the background level. The background level is the concentration of silicon or magnesium detected when silicon or magnesium is not doped.
[0053] For each of the Comparative Example and Examples 1 to 4, a current of 500 mA was continuously applied for over 1000 hours, and the changes in the light output maintenance rate and the light output were evaluated. Table 3 and Fig. 2 show the relationship between the power-on time and the light output maintenance rate for the Comparative Example and Examples 1 to 4, and Table 4 and Fig. 3 show the relationship between the power-on time and the light output for the Comparative Example and Examples 1 to 4. The center wavelength of the light emission wavelength for the Comparative Example and Examples 1 to 4 was 275 nm or more and 285 nm or less.
[0054] [Table 3]
[0055] [Table 4]
[0056] As can be seen from Table 3 and Figure 2, Examples 1 to 4, which have a top layer, have a higher luminous output maintenance rate after 1000 hours of power application than the Comparative Example, which does not have a top layer. It is also clear that the luminous output maintenance rate increases as the thickness of the top layer increases. From this perspective, the thickness of the top layer is preferably 1.45 nm or more, and more preferably 1.89 nm or more.
[0057] As can be seen from Table 4 and FIG. 3, from the viewpoint of increasing the light emission output after 1000 hours of power application, it is preferable that the film thickness of the top layer be less than 2.3 nm. Furthermore, it can be seen that in Examples 2 and 3, where the film thickness of the top layer is 1.4 nm or more and 2.0 nm or less, the light emission output after 1000 hours of power application is higher. The film thickness of the top layer is more preferably 1.45 nm or more and 1.89 nm or less. Furthermore, as can be seen from Table 3, Table 4, FIGS. 2 and 3, Example 3 is the most preferable example from the viewpoint of both the light emission output maintenance rate and the light emission output. Therefore, the film thickness of the top layer is preferably close to that of Example 3 (for example, 1.69 nm or more and 2.09 nm or less).
[0058] (Summary of the embodiment) Next, the technical ideas grasped from the above-described embodiments will be described by using the reference numerals and the like in the embodiments. However, the reference numerals and the like in the following description do not limit the components in the claims to the members and the like specifically shown in the embodiments.
[0059] [1] A first embodiment of the present invention is a nitride semiconductor light-emitting device 1 comprising an n-type semiconductor layer 4, an active layer 6 formed on the n-type semiconductor layer 4, an electron block stack 7 formed on the active layer 6 and having a plurality of electron block layers each having an Al composition ratio of 70% or more, and a p-type semiconductor layer 8 formed on the electron block stack 7, wherein the plurality of electron block layers comprise a top layer 73 located closest to the p-type semiconductor layer 8 and an adjacent layer 72 adjacent to the top layer 73, and the Al composition ratio of the top layer 73 is greater than the Al composition ratio of the adjacent layer 72. This allows the nitride semiconductor light emitting element 1 to have a longer life.
[0060] [2] A second embodiment of the present invention is the first embodiment, wherein the film thickness of the uppermost layer 73 is less than 2.3 nm. This makes it possible to increase the light output of the nitride semiconductor light emitting element 1 while also lengthening the life of the nitride semiconductor light emitting element 1.
[0061] [3] A third embodiment of the present invention is the second embodiment, wherein the film thickness of the uppermost layer 73 further satisfies the range of 1.4 nm to 2.0 nm. This makes it possible to increase the light output of the nitride semiconductor light emitting element 1 while also lengthening the life of the nitride semiconductor light emitting element 1.
[0062] [4] A fourth embodiment of the present invention is any one of the first to third embodiments, wherein the electronic block stack 7 is composed of three layers, namely, the top layer 73, the adjacent layer 72, and the bottom layer 71, in that order from the p-type semiconductor layer 8 side, and the adjacent layer 72 has a smaller Al composition ratio and a larger film thickness than the bottom layer 71. This makes it possible to increase the light output of the nitride semiconductor light emitting element 1 while also lengthening the life of the nitride semiconductor light emitting element 1.
[0063] [5] A fifth embodiment of the present invention is any one of the first to fourth embodiments, wherein the uppermost layer 73 is an undoped layer. This makes it possible to increase the light output of the nitride semiconductor light emitting element 1 while also lengthening the life of the nitride semiconductor light emitting element 1.
[0064] (Addendum) Although the embodiments of the present invention have been described above, the invention according to the claims is not limited to the above-described embodiments. It should be noted that not all of the combinations of features described in the embodiments are necessarily essential to the means for solving the problems of the invention. Furthermore, the present invention can be appropriately modified and implemented within the scope of its spirit. [Explanation of symbols]
[0065] 1...Nitride semiconductor light emitting device 4...n-type semiconductor layer 6…Active layer 7...Electronic block stack 71...Lowest floor 72...adjacent layer 73...Top floor 8...p-type semiconductor layer
Claims
1. an n-type semiconductor layer; an active layer formed on the n-type semiconductor layer; an electron block stack formed on the active layer and including a plurality of electron block layers each having an Al composition ratio of 70% or more; a p-type semiconductor layer formed on the electron block stack, the plurality of electron blocking layers include an uppermost layer located closest to the p-type semiconductor layer and an adjacent layer adjacent to the uppermost layer, the Al composition ratio of the uppermost layer is greater than the Al composition ratio of the adjacent layer; Nitride semiconductor light emitting device.
2. The thickness of the top layer is less than 2.3 nm. The nitride semiconductor light emitting device according to claim 1 .
3. The thickness of the uppermost layer further satisfies the range of 1.4 nm to 2.0 nm. The nitride semiconductor light emitting device according to claim 2 .
4. the electron block stack is composed of three layers, in order from the p-type semiconductor layer side, the top layer, the adjacent layer, and the bottom layer, the adjacent layer has a lower Al composition ratio and a larger film thickness than the lowermost layer; The nitride semiconductor light-emitting device according to claim 1 .
5. The top layer is an undoped layer. The nitride semiconductor light-emitting device according to claim 1 .
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