Apparatus and method for generating physically unclonable function code

Abstract

To provide a physically unclonable function (PUF) code generation device and a PUF code generation method capable of randomly generating a PUF code.SOLUTION: The PUF code generating device 100 includes a PUF code generating component 110 and a PUF code storing component 120. The PUF code generating element generates a PUF code. The PUF code storage element receives and stores the PUF code. The PUF code generating element includes a plurality of first memory cells 112. Each first memory cell includes a gate layer, a semiconductor layer, and a tunnel oxide layer. The tunnel oxide layer is located between the gate layer and the semiconductor layer. The tunnel oxide layer includes a central region and a peripheral region. A ratio of a minimum thickness of the peripheral region to a maximum thickness of the central region of the tunnel oxide layer is defined as a corner ratio, and the corner ratio is less than 0.99.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a code generation device and a code generation method, and more particularly to a physically unclonable function code generation device and a physically unclonable function code generation method. [Background technology]

[0002] The physical changes that occur during the process are called Physical Unclonable Functions (PUFs). Because the physical changes during the process are random and unpredictable, the random code generated based on PUFs has random and unique properties. Therefore, PUFs can be applied to a wide range of applications, such as element ID, security, and authentication. Summary of the Invention [Problem to be solved by the invention]

[0003] It is known that conventional techniques have been used to change the programming of existing flash memories or erase the parameters and methods used to operate the existing flash memories, thereby amplifying random electronic noise generated by the thickness of the tunnel oxide film, which is determined by various manufacturing processes for the flash memories. However, existing flash memories have stable characteristics, and in order to amplify the random electronic noise of existing flash memories, conventional techniques have required complex circuits and processes to change the programming or erase the parameters and methods used to operate, making it difficult to miniaturize or randomize.

[0004] In recent years, as the demand for generating random codes has increased, so too has the demand among those in related application fields for innovative designs to effectively generate PUF codes. [Means for solving the problem]

[0005] The PUF code generating device of the present invention includes a PUF code generating element and a PUF code storage element. The PUF code generating element is configured to generate a PUF code. The PUF code storage element is coupled to the PUF code generating element. The PUF code storage element is configured to receive and store the PUF code. The PUF code generating element includes a plurality of first memory cells. Each first memory cell includes a gate layer, a semiconductor layer, and a tunnel oxide layer. The tunnel oxide layer is located between the gate layer and the semiconductor layer. The tunnel oxide layer includes a central region and a peripheral region. A ratio of a minimum thickness of the peripheral region to a maximum thickness of the central region of the tunnel oxide layer is defined as a corner ratio, and the corner ratio is less than 0.99.

[0006] The PUF code generation method of the present invention is configured for use in a PUF code generator. The PUF code generation device includes a PUF code generation element and a PUF code storage element. The PUF code generation method includes: fabricating tunnel oxide layers of a plurality of first memory cells in the PUF code generation element through a first process, a second process, or a third process so that the corner ratio of the first memory cells in the PUF code generation element is less than 0.99; programming the PUF code generation element as a first logical value; randomly changing some bits of the PUF code generation element to a second logical value through a data retention loss process to generate a PUF code; and storing the PUF code in the PUF code storage element. Each first memory cell includes a gate layer, a semiconductor layer, and a tunnel oxide layer, and the tunnel oxide layer is located between the gate layer and the semiconductor layer. The tunnel oxide layer includes a central region and a peripheral region. The ratio of the minimum thickness of the tunnel oxide layer in the peripheral region to the maximum thickness of the tunnel oxide layer in the central region is defined as the corner ratio. [Effects of the Invention]

[0007] The present invention provides a PUF code generating device and a PUF code generating method capable of randomly generating a PUF code. After a first memory cell having a tunnel oxide layer with a corner ratio of less than 0.99 is programmed, a PUF code is generated by randomly changing some bits through a data retention loss process. Based on the random and unique properties of the random code generated by the PUF, the random code can function as an encryption key, thereby improving the security of the system device. Furthermore, the present invention reduces the power consumption of PUF code generation and simplifies the manufacturing process of the PUF code generating device. The present invention provides a sustainable PUF code generating device.

[0008] In order to make the above-mentioned features and advantages of the present invention easier to understand, the following detailed description of the embodiments is given with reference to the drawings. [Brief explanation of the drawings]

[0009] [Figure 1] 1 shows a schematic diagram of a PUF code generating device according to an embodiment of the present invention; [Figure 2A] 3 illustrates a PUF code according to one embodiment of the present invention. [Figure 2B] 3 illustrates a PUF code according to one embodiment of the present invention. [Figure 2C] 3 illustrates a PUF code according to one embodiment of the present invention. [Figure 3] 2 shows a schematic diagram of a structure of a first memory cell according to an embodiment of the present invention; [Figure 4A] 3 shows a flowchart of steps for fabricating a tunnel oxide layer of a first memory cell through a first process according to an embodiment of the present invention. [Figure 4B] 3 shows a flowchart of steps for fabricating a tunnel oxide layer of a first memory cell through a first process according to an embodiment of the present invention. [Figure 5A] 10 shows a flowchart of the steps of fabricating a tunnel oxide layer of a first memory cell through a second process according to an embodiment of the present invention. [Figure 5B]10 shows a flowchart of the steps of fabricating a tunnel oxide layer of a first memory cell through a second process according to an embodiment of the present invention. [Figure 6] 10 shows a flowchart of the steps of fabricating a tunnel oxide layer of a first memory cell through a third process according to an embodiment of the present invention. [Figure 7] 2 shows a flowchart of a PUF code generation method according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0010] Referring to FIG. 1 , a Physical Unclonable Function (PUF) code generation device 100 according to an embodiment of the present invention includes a PUF code generation element 110 and a PUF code storage element 120. The PUF code storage element 120 may be coupled to the PUF code generation element 110 via a selector circuit 130 and a sense amplifier circuit 140. The selector circuit 130 may be implemented by a column multiplexer connected to a bit line BL. The sense amplifier circuit 140 may further include a decoder for addressing a corresponding PUF code storage element 120 that stores a selected PUF code. The PUF code generation element 110 is configured to generate PUF codes 210, 220, and 230, as shown in FIGS. 2A, 2B, and 2C. The PUF code storage element 120 is configured to receive and store the PUF codes 210, 220, and 230. It should be noted that the PUF codes 210, 220, and 230 shown in Figures 2A, 2B, and 2C are for illustrative purposes only and are not intended to limit the present invention.

[0011] The PUF code generation element 110 includes a plurality of first memory cells 112 arranged in an array. The first memory cells 112 are coupled to respective bit lines BL and word lines WL. The first memory cells 112 are, for example, NOR flash memory cells. The PUF code storage element 120 includes a plurality of second memory cells 122 arranged in an array. The second memory cells 122 are coupled to respective bit lines BL and word lines WL. The second memory cells 122 are, for example, resistive random access memory (RRAM) cells, but the present invention is not limited thereto. The second memory cells 122 may be non-volatile memory cells different from the first memory cells 112.

[0012] In this embodiment, the PUF code generating device 110 may be programmed with a first logical value of "0," and a data-retention-loss process is performed to randomly change some bits of the PUF code generating device 110 to a second logical value of "1" to generate the PUF code 210, 220, or 230. The data-retention-loss process refers to a process in which the PUF code generating device 110 is placed in an ambient temperature environment and the bit data of the PUF code generating device 110 is randomly changed to generate a PUF code. In one embodiment, to increase the randomness of the PUF code and improve the efficiency of PUF code generation, there is no selection process to select unstable bits after the data-retention-loss process. In FIGS. 2A, 2B, and 2C, a PUF code is generated by randomly changing some bits of a memory array that are initially programmed with a logical value of "0" to a logical value of "1." By using a NOR flash memory having the property of randomly changing bit data provided in embodiments of the present invention, embodiments of the present invention can generate a PUF code that functions as an encryption key to enhance the security of a system device.

[0013] 3, the first memory cell 112 includes a floating gate layer FG, a semiconductor layer AA, and a tunnel oxide layer Tox. The tunnel oxide layer Tox is located between the floating gate layer FG and the semiconductor layer AA. The tunnel oxide layer Tox includes a central region 310 and a peripheral region 320. The ratio T2 / T1 of the minimum thickness T2 of the peripheral region 320 to the maximum thickness T1 of the central region 310 is defined as a corner ratio C. The maximum thickness T1 of the central region 310 is greater than the minimum thickness T2 of the peripheral region 320, and the corner ratio C is less than 0.99.

[0014] Hereinafter, embodiments of the present invention will be described, in which different process methods are used to manufacture the tunnel oxide layer Tox of the PUF code generating element, and the corner ratio C of the first memory cell 112 can be made less than 0.99. Furthermore, each embodiment may be suitably combined.

[0015] 4A and 4B show a flowchart of steps for fabricating a tunnel oxide layer of a first memory cell through a first process according to an embodiment of the present invention. The tunnel oxide layer fabricated by the first process can make the corner ratio of the first memory cell less than 0.99.

[0016] Please refer to Figures 4A and 4B. In Figure 4A, an annealing step is performed on the semiconductor layer AA by introducing an excess amount of oxygen, and a tunnel oxide layer Tox of a first thickness 410 is formed on the semiconductor layer AA. Next, in Figure 4B, the tunnel oxide layer Tox of the first thickness 410 is planarized, and a tunnel oxide layer Tox of a second thickness 420 is formed on the semiconductor layer AA. The tunnel oxide layer Tox of the second thickness 420 can have a corner ratio C of less than 0.99. The tunnel oxide layer of the second thickness is 140 angstroms to 240 angstroms.

[0017] 5A and 5B show a flowchart of steps for fabricating a tunnel oxide layer of a first memory cell through a second process, which can make the corner ratio of the first memory cell less than 0.99.

[0018] Please refer to Figures 5A and 5B. In Figure 5A, ion implantation 510 is performed on the semiconductor layer AA to form a silicon nitride layer. Next, in Figure 5B, part of the silicon nitride layer is removed, and an annealing step is performed on the semiconductor layer AA to form a tunnel oxide layer Tox (such as silicon oxynitride (SiON)) on the semiconductor layer AA so that the corner ratio C is less than 0.99. In the ion implantation 510 step in Figure 5A, nitrogen atoms can change the oxidation rate of the semiconductor layer in the annealing step, so that the thickness of the formed tunnel oxide layer Tox has the characteristic of a corner ratio C less than 0.99.

[0019] 6 shows a flowchart of the steps of fabricating a tunnel oxide layer of a first memory cell through a third process according to an embodiment of the present invention. The tunnel oxide layer fabricated by the third process can make the corner ratio of the first memory cell less than 0.99. Referring to FIG. 6, in this embodiment, for example, by directly forming a tunnel oxide layer Tox with a thickness of less than 95 angstroms on the semiconductor layer AA, the corner ratio of the thickness of the tunnel oxide layer Tox can be made less than C0.99.

[0020] By manufacturing the tunnel oxide layer Tox of the first memory cell 112 in the PUF code generating device 110 through at least one of the first process, the second process, or the third process described above, the corner ratio C of the first memory cell 112 in the PUF code generating device 110 can be made less than 0.99.

[0021] 7 shows a flowchart of a PUF code generation method according to an embodiment of the present invention. Referring to FIGS. 1 and 7, the PUF code generation method of this embodiment can be applied to at least the PUF code generation device 100 of the embodiment of FIG. 1, but the present invention is not limited thereto. In step S100, a tunnel oxide layer of a first memory cell 112 in a PUF code generation device 110 is manufactured through a first process, a second process, or a third process so that a corner ratio of the first memory cell 112 in the PUF code generation device 110 is less than 0.99. In step S110, the PUF code generation device 110 is programmed as a first logic value “0” and some bits of the PUF code generation device 110 are randomly changed to a second logic value “1” through a data retention loss process to generate a PUF code 210, 220, or 230. In step S120, the PUF code 210, 220, or 230 is stored in the PUF code storage element 120 to function as an encryption key and improve the security of the system device.

[0022] In summary, in an embodiment of the present invention, the PUF code generating device includes a NOR flash memory. After the NOR flash memory manufactured according to the present invention is programmed, a PUF code is generated by randomly changing some bits through a data retention loss process. The PUF code generating device generates a PUF code by utilizing the randomly changing bit data characteristics of the NOR flash memory manufactured according to the present invention. [Industrial Applicability]

[0023] Based on the random and unique properties of the random code generated by the PUF, the random code can function as an encryption key, thereby improving the security of the system device. The present invention is suitable for manufacturing a miniaturized PUF code generator to increase the total number of dies on a wafer. Therefore, the production cost and energy consumption when manufacturing a single IC are reduced, and the production energy consumption of the subsequent packaging is also reduced, thereby reducing the carbon emissions in the manufacturing process of the PUF code generator. Furthermore, the present invention reduces the power consumption of PUF code generation and simplifies the manufacturing process of the PUF code generator. The present invention provides a sustainable PUF code generator.

[0024] Although the present invention has been described with reference to the above embodiments, the described embodiments are not intended to limit the present invention. Those skilled in the art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of the present invention is to be limited to the scope defined by the appended claims. [Explanation of symbols]

[0025] 100: PUF code generator 110: PUF code generation element 112: First memory cell 120: PUF code storage element 122: Second memory cell 130: Selector circuit 140: Sense amplifier circuit 210, 220, 230: PUF code 410, 420, T1, T2: Thickness 510: Ion implantation AA: Semiconductor layer BL: Bit line FG: Floating gate layer Tox: Tunnel oxide layer WL: Word line X, Y, Z: direction S100, S110, S120: Step

Claims

1. a PUF code generation element configured to generate a PUF code; a PUF code storage element configured to receive and store the PUF code; Equipped with the PUF code generation element includes a plurality of first memory cells, each of the first memory cells including a floating gate layer, a semiconductor layer, and a tunnel oxide layer, the tunnel oxide layer being located between the floating gate layer and the semiconductor layer, the tunnel oxide layer including a central region and a peripheral region, a ratio of a minimum thickness of the tunnel oxide layer in the peripheral region to a maximum thickness of the tunnel oxide layer in the central region being defined as a corner ratio, and the corner ratio is less than 0.99; Physically Unclonable Function (PUF) code generator.

2. the first memory cell is a NOR type flash memory cell; The PUF code generation device according to claim 1 .

3. The tunnel oxide layer of the first memory cell is manufactured through a first process so that the corner ratio is less than 0.99, and the first process includes: performing an annealing step on the semiconductor layer to form a tunnel oxide layer of a first thickness on the semiconductor layer; planarizing the tunnel oxide layer to form the tunnel oxide layer of a second thickness on the semiconductor layer, wherein the corner ratio of the tunnel oxide layer of the second thickness is less than 0.

99. The PUF code generation device according to claim 1 .

4. the second thickness of the tunnel oxide layer is between 140 angstroms and 240 angstroms; The PUF code generation device according to claim 3.

5. The tunnel oxide layer of the first memory cell is manufactured through a second process so that the corner ratio is less than 0.99, and the second process includes: performing ion implantation on the semiconductor layer to form a silicon nitride layer; removing a portion of the silicon nitride layer; and performing an annealing step on the semiconductor layer to form the tunnel oxide layer on the semiconductor layer such that the corner ratio is less than 0.

99. The PUF code generation device according to claim 1 .

6. The tunnel oxide layer of the first memory cell is manufactured through a third process so that the corner ratio is less than 0.99, and the third process includes: forming the tunnel oxide layer on the semiconductor layer to a thickness of less than 95 angstroms; The PUF code generation device according to claim 1 .

7. the PUF code generating element is programmed as a first logical value, and a part of the bits of the PUF code generating element is randomly changed to a second logical value through a data retention loss process to generate the PUF code; The PUF code generation device according to claim 1 .

8. a selector circuit coupled to the PUF code generation element; a sense amplifier circuit coupled between the selector circuit and the PUF code storage element; a plurality of decoders for addressing corresponding memory cells in the PUF code storage element that store selected PUF codes; Further provided with The PUF code generation device according to claim 1 .

9. 1. A PUF code generation method configured for a PUF code generation device, comprising: the PUF code generation device comprises a PUF code generation element and a PUF code storage element; The PUF code generation method includes: fabricating tunnel oxide layers of a plurality of first memory cells in the PUF code generation device through a first process, a second process, or a third process, such that a corner ratio of the plurality of first memory cells in the PUF code generation device is less than 0.99; programming the PUF code generator with a first logic value and randomly changing some bits of the PUF code generator to a second logic value through a data retention loss process to generate a PUF code; storing the PUF code in the PUF code storage element; Equipped with Each of the first memory cells includes a gate layer, a semiconductor layer, and a tunnel oxide layer, the tunnel oxide layer being located between the gate layer and the semiconductor layer, the tunnel oxide layer including a central region and a peripheral region, and a ratio of a minimum thickness of the tunnel oxide layer in the peripheral region to a maximum thickness of the tunnel oxide layer in the central region is defined as the corner ratio. Physically Unclonable Function (PUF) code generation method.

10. the first memory cell is a NOR type flash memory cell; The method for generating a PUF code according to claim 9.

11. The first process comprises: performing an annealing step on the semiconductor layer to form a tunnel oxide layer of a first thickness on the semiconductor layer; planarizing the tunnel oxide layer to form the tunnel oxide layer of a second thickness on the semiconductor layer, wherein the corner ratio of the tunnel oxide layer of the second thickness is less than 0.

99. The method for generating a PUF code according to claim 9.

12. the second thickness of the tunnel oxide layer is between 140 angstroms and 240 angstroms; The method for generating a PUF code according to claim 11.

13. The second process comprises: performing ion implantation onto the semiconductor layer, forming a silicon nitride layer; removing a portion of the silicon nitride layer; and performing an annealing step on the semiconductor layer to form the tunnel oxide layer on the semiconductor layer such that the corner ratio is less than 0.

99. The method for generating a PUF code according to claim 9.

14. The third process comprises: forming the tunnel oxide layer on the semiconductor layer to a thickness of less than 95 angstroms; The method for generating a PUF code according to claim 9.

15. The data retention loss process includes placing the PUF code generating device in an ambient temperature environment.

10. The method of claim 9, wherein the PUF code is generated by:

16. After the data retention loss process, there is no selection process to select unstable bits. The method for generating a PUF code according to claim 9.

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