Reception unit, processing system, processing method, and program

By implementing a receiving unit with observation and transmission capabilities to manage AMS initiation rights, the USB PD standard systems achieve faster communication speeds by reducing latency in changing these rights.

JP2026021977AActive Publication Date: 2026-02-12NEC PLATFROMS LTD
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Patent Information

Application Number
JP2024123276
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-07-30
Publication Date
2026-02-12
Estimated Expiration
2044-07-30

AI Technical Summary

Technical Problem

Existing USB PD standard systems face challenges in achieving faster communication due to the long waiting times associated with changing the Atomic Message Sequence (AMS) initiation rights, which are necessary for rapid power adjustments and collision avoidance in half-duplex communication.

Method used

A receiving unit equipped with an observation means to monitor current and voltage levels on a signal line, and a transmission means to send transfer information when certain levels indicate the right to initiate information exchange, allowing for explicit control of AMS initiation rights without waiting for predefined times.

Benefits of technology

This approach reduces communication latency, enabling faster communication speeds by explicitly managing AMS initiation rights, thus overcoming the limitations of the USB PD standard.

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Abstract

To provide a reception unit capable of performing communication at higher speed.SOLUTION: The reception unit includes an observation unit that observes a current level and a voltage level of a predetermined signal line in a bus between the reception unit and the supply unit, and a transmission unit that, when the current level and the voltage level observed by the observation unit are a first current level and a first voltage level indicating that the reception unit has a right to start information exchange via the bus, transmits assignment information that is information for assigning the right to the supply unit.SELECTED DRAWING: Figure 10
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Description

[Technical Field]

[0001] The present disclosure relates to a receiving unit, a processing system, a processing method, and a program. [Background technology]

[0002] Systems compliant with the USB (Universal Serial Bus) PD (Power Delivery) standard are used in various fields where computers are used, etc. Patent Document 1 discloses a related technology, which is a power supply system compliant with the USB PD standard. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2019-087089 Summary of the Invention [Problem to be solved by the invention]

[0004] In systems that comply with the USB (Universal Serial Bus) PD (Power Delivery) standard, such as the system described in Patent Document 1, there is a demand for technology that enables faster communication.

[0005] One of the objectives of each aspect of the present disclosure is to provide a receiving unit, a processing system, a processing method, and a program that can solve the above-mentioned problems. [Means for solving the problem]

[0006] According to one aspect of the present disclosure, a receiving unit is a unit that receives power from a supply unit that is a unit that supplies the power, and is equipped with an observation means that observes the current level and voltage level of a specified signal line in a bus between the receiving unit and the supply unit, and a transmission means that transmits transfer information that transfers the right to the supply unit when the current level and the voltage level observed by the observation means are a first current level and a first voltage level that indicate that the receiving unit has the right to start information exchange via the bus.

[0007] According to another aspect of the present disclosure, a processing system includes the receiving unit and the supplying unit that supplies power to the receiving unit.

[0008] According to another aspect of the present disclosure, a processing method is a processing method executed by a receiving unit, which is a unit that receives power from a supplying unit, which is a unit that supplies the power, and includes observing a current level and a voltage level of a predetermined signal line in a bus between the supplying unit and the receiving unit, and if the observed current level and the voltage level are a first current level and a first voltage level that indicate that the receiving unit has the right to initiate information exchange via the bus, transmitting transfer information to the supplying unit, which is information that transfers the right.

[0009] According to another aspect of the present disclosure, a program causes a receiving unit, which is a unit that receives power from a supplying unit, which is a unit that supplies power, to observe current levels and voltage levels of a predetermined signal line in a bus between the supplying unit and the receiving unit, and if the observed current levels and voltage levels are a first current level and a first voltage level that indicate that the receiving unit has the right to initiate information exchange via the bus, to send transfer information to the supplying unit, which is information that transfers the right. [Effects of the Invention]

[0010] According to each aspect of the present disclosure, communication can be performed at higher speeds. [Brief explanation of the drawings]

[0011] [Figure 1] FIG. 1 illustrates an example of a configuration of a processing system according to some embodiments of the present disclosure. [Figure 2] FIG. 2 illustrates a first example of a change of state in a processing system according to some embodiments of the present disclosure. [Figure 3] FIG. 10 illustrates a second example of a change of state in a processing system according to some embodiments of the present disclosure. [Figure 4] FIG. 1 illustrates an example of a configuration of a processing system according to some embodiments of the present disclosure. [Figure 5] FIG. 2 illustrates a first example of a change of state in a processing system according to some embodiments of the present disclosure. [Figure 6] FIG. 10 illustrates a second example of a change of state in a processing system according to some embodiments of the present disclosure. [Figure 7] FIG. 10 illustrates a first example of a reduction in time associated with an AMS initiation right change in a processing system according to some embodiments of the present disclosure. [Figure 8] FIG. 10 illustrates a second example of a reduction in time associated with an AMS initiation right change in a processing system according to some embodiments of the present disclosure. [Figure 9] FIG. 10 illustrates a third example of a reduction in time associated with an AMS initiation right change in a processing system according to some embodiments of the present disclosure. [Figure 10] FIG. 10 illustrates an example of the configuration of a receiving unit according to some embodiments of the present disclosure. [Figure 11] FIG. 10 illustrates an example of a processing flow of a receiving unit according to some embodiments of the present disclosure. [Figure 12] FIG. 1 is a schematic block diagram illustrating the configuration of a computer according to at least one embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0012] Hereinafter, the embodiments will be described in detail with reference to the drawings. <Embodiment> A processing system 1 according to an embodiment of the present disclosure will be described with reference to the drawings. The processing system 1 is a system that can accelerate the start timing of communication between a unit 10 (to be described later) and a unit 20 (to be described later) that are connected via a bus conforming to the USB (Universal Serial Bus) PD (Power Delivery) standard.

[0013] (Comparative processing system) To make it easier to understand how processing system 1 advances the timing for starting communication between unit 10 and unit 20, which are connected via a USB PD standard bus, we will first explain the comparative processing system 900 and the timing defined in the USB PD standard.

[0014] 1 is a diagram illustrating an example of the configuration of a processing system 900 according to some embodiments of the present disclosure. The processing system 900 is a system that exchanges messages in half-duplex mode between a source unit 901 and a sink unit 902 (described later) using a single signal line 903 (described later) of the USB PD standard. As shown in FIG. 1, the processing system 900 includes the source unit 901, the sink unit 902, and the signal line 903. In the messages, a sequence called an Atomic Message Sequence (hereinafter referred to as "AMS") is defined.

[0015] The source unit 901 is a unit that supplies power. The source unit 901 controls the state of the pull-up resistor of the source. In the USB PD standard, the right to start AMS (hereinafter referred to as "AMS start right") is held by the source unit 901, which is the source in the initial state.

[0016] The sink unit 902 is a unit to which power is supplied. The sink unit 902 knows the state of the AMS initiation right by observing the state of the pull-up resistor of the source. Note that in the USB PD standard, when the state of the pull-up resistor is SinkTxOK, the AMS initiation right belongs to the sink (i.e., sink unit 902 in this case). Also, in the USB PD standard, when the state of the pull-up resistor is SinkTxNG, the AMS initiation right belongs to the source (i.e., source unit 901 in this case).

[0017] The signal line 903 is a single signal line. For example, the signal line 903 is a signal line that corresponds to the CC line of a USB Type-C cable.

[0018] FIG. 2 illustrates a first example of a state change in a processing system 900 according to some embodiments of the present disclosure. FIG. 2 illustrates an example of the time it takes to start AMS when the state of the pull-up resistor is changed from SinkTxOK to SinkTxNG. Part (a) of FIG. 2 illustrates the state of the pull-up resistor. Part (b) of FIG. 2 illustrates the state of the AMS initiation right of the source unit 901. Part (c) of FIG. 2 illustrates the state of the AMS initiation right of the sink unit 902. As illustrated in FIG. 2, when the state of the pull-up resistor is changed from SinkTxOK to SinkTxNG, the source unit 901 can start AMS when a time tSinkTx (16 to 18 to 20 ms) has elapsed after controlling the change from SinkTxOK to SinkTxNG. Note that (16 to 18 to 20 ms) indicates that the minimum value is 16 ms, the maximum value is 20 ms, and the nominal value is 18 ms, which is the intermediate value between the minimum and maximum values. Furthermore, the sink unit 902 cannot start AMS if the time tSinkDelay (5 ms) has elapsed since detecting the change from SinkTxOK to SinkTxNG. Thus, in the processing system 900, both the source unit 901 and the sink unit 902 cannot start AMS for a relatively long time (i.e., a time in ms). This is because the USB PD standard is a half-duplex communication standard, and packet collisions must be avoided. Note that AMS also transmits and receives information about the power being received. Therefore, changing the AMS initiation right in the processing system 900 is disadvantageous when performing more rapid power adjustment.

[0019] FIG. 3 is a diagram illustrating a second example of a state change in the processing system 900 according to some embodiments of the present disclosure. FIG. 3 is a diagram illustrating an example of the time it takes to start AMS when the state of the pull-up resistor is changed from SinkTxNG to SinkTxOK. Part (a) in FIG. 3 illustrates the state of the pull-up resistor. Part (b) in FIG. 3 illustrates the state of the AMS initiation right of the source unit 901. Part (c) in FIG. 3 illustrates the state of the AMS initiation right of the sink unit 902. As shown in FIG. 3, when the state of the pull-up resistor is changed from SinkTxNG to SinkTxOK, there is no time during which both the source unit 901 and the sink unit 902 cannot start AMS.

[0020] (Processing system of the present disclosure) Next, a processing system 1 according to an embodiment of the present disclosure will be described.

[0021] (Configuration of the processing system of the present disclosure) 4 is a diagram illustrating an example of a configuration of a processing system 1 according to some embodiments of the present disclosure. As shown in FIG. 4, the processing system 1 according to one embodiment of the present disclosure includes units 10 and 20 and a CC line 30.

[0022] One of the units 10 and 20 is a source, and the other is a sink. For convenience of explanation, it is assumed below that the unit 10 is the source, and the unit 20 is the sink.

[0023] 4, the unit 10 includes a management section 101, a communication section 102, a control section 103, and a pull-up resistor 104. The management section 101 manages the presence or absence of an AMS initiation right as a source.

[0024] The communication unit 102 communicates with the unit 20. For example, the communication unit 102 forms a packet in response to an instruction from the management unit 101. Then, the communication unit 102 transmits the formed packet to the unit 20 via the CC line 30. Furthermore, for example, the communication unit 102 receives a packet transmitted by the unit 20 via the CC line 30.

[0025] Control unit 103 sets pull-up resistor 104 to the SinkTxOK state or the SinkTxNG state in response to an instruction from management unit 101. Pull-up resistor 104 is in the SinkTxOK state or the SinkTxNG state under the control of control unit 103. The SinkTxOK state is a state in which pull-up resistor 104 outputs a predetermined voltage (e.g., 5 volts) and outputs a high-level current (e.g., 3 amperes). The SinkTxNG state is a state in which pull-up resistor 104 outputs a predetermined voltage (e.g., 5 volts) and outputs a low-level current (e.g., 1.5 amperes).

[0026] 4, the unit 20 includes a management section 201, a communication section 202, and an observation section 203. The management section 201 manages the status of whether or not the unit 20 has the AMS initiation right as a sink.

[0027] The communication unit 202 communicates with the unit 10. For example, the communication unit 202 forms a packet in response to an instruction from the management unit 201. Then, the communication unit 202 transmits the formed packet to the unit 20 via the CC line 30. Also, for example, the communication unit 202 receives a packet transmitted by the unit 10 via the CC line 30.

[0028] The observation unit 203 observes the state of the pull-up resistor 104. Then, the observation unit 203 notifies the management unit 201 of the observation result. For example, if the observation unit 203 observes a high-level current and voltage as the state of the CC line 30, it means that it has observed a SinkTxOK state as the state of the pull-up resistor 104. Also, for example, if the observation unit 203 observes a low-level current and voltage as the state of the CC line 30, it means that it has observed a SinkTxNG state as the state of the pull-up resistor 104.

[0029] FIG. 5 is a diagram illustrating a first example of a state change in the processing system 1 according to some embodiments of the present disclosure. FIG. 5 is a diagram illustrating an example of the time it takes to start AMS when the state of the pull-up resistor 104 is changed from SinkTxNG to SinkTxOK. Part (a) in FIG. 5 illustrates the state of the pull-up resistor 104. Part (b) in FIG. 5 illustrates the state of the AMS initiation right of the unit 10. Part (c) in FIG. 5 illustrates an AMS initiation right change packet (AMSC in FIG. 5), which will be described later, transmitted by the unit 10. Part (d) in FIG. 5 illustrates the state of the AMS initiation right of the unit 20. Part (e) in FIG. 5 illustrates a GoodCRC message packet (GCRC in FIG. 5), in accordance with the USB PD standard, which notifies the unit 10, which is the sender, that the unit 20 has received the AMS initiation right change packet.

[0030] As shown in FIG. 5, when unit 10 changes the state of pull-up resistor 104 from SinkTxNG to SinkTxOK, it transmits an AMS initiation right change packet, which indicates that the state of the AMS initiation right has been changed from SinkTxNG to SinkTxOK, to unit 20 via CC line 30 before the change. The AMS initiation right change packet may be, for example, a Vender_Define message type packet, which is classified as a Data Message in the USB PD standard. A Vender_Define message type packet consists of a 16-bit Header, a 32-bit VDM Header, and 0 to 6 optional 32-bit VDOs. The VDM Header also defines the packet as an AMS initiation right change packet.

[0031] Unit 20 receives the AMS initiation right change packet from unit 10 via CC line 30. By receiving the AMS initiation right change packet, unit 20 learns that the state of the AMS initiation right has changed from SinkTxNG to SinkTxOK. Unit 20 sends a GoodCRC message packet to unit 10 indicating that it has received the AMS initiation right change packet. Unit 10 receives the GoodCRC message packet from unit 20. The change of AMS initiation right is completed by sending and receiving this GoodCRC message packet.

[0032] Note that the unit 10, which is the source, has the initiative to control the state of the pull-up resistor 104. Therefore, by setting a period during which the AMS initiation right is SinkTxOK in advance in the AMS initiation right change packet, the unit 10 can notify the unit 20 how long the state of the pull-up resistor 104 will be SinkTxOK (i.e., the timing when the unit 20, which is the sink, can start AMS).

[0033] FIG. 6 is a diagram illustrating a second example of a state change in the processing system 1 according to some embodiments of the present disclosure. FIG. 6 is a diagram illustrating an example of the time it takes to start AMS when the state of the pull-up resistor 104 is changed from SinkTxOK to SinkTxNG. Part (a) in FIG. 6 illustrates the state of the pull-up resistor 104. Part (b) in FIG. 6 illustrates the state of the AMS initiation right of the unit 10. Part (c) in FIG. 6 illustrates a Good CRC message packet (GCRC in FIG. 6) in accordance with the USB PD standard, which notifies the unit 20, which is the sender, that the unit 10 has received an AMS initiation right change packet. Part (d) in FIG. 6 illustrates the state of the AMS initiation right of the unit 20. Part (e) in FIG. 6 illustrates an AMS initiation right change packet (AMSC in FIG. 6) transmitted by the unit 20.

[0034] 6, when the state of the pull-up resistor 104 is SinkTxOK, the unit 20 explicitly transmits an AMS initiation right change packet to the unit 10 via the CC line 30. This allows the unit 20 to explicitly return the AMS initiation right to the unit 10.

[0035] When unit 10 receives the AMS initiation right change packet from unit 20, it changes pull-up resistor 104 from SinkTxOK to SinkTxNG. Unit 10 then transmits a GoodCRC message packet to unit 10 indicating that it has received the AMS initiation right change packet. Unit 20 receives the GoodCRC message packet from unit 10. The change of AMS initiation right is completed by sending and receiving this GoodCRC message packet. This allows unit 10 to start AMS without having to wait for time tSinkTx.

[0036] 4, the CC line 30 connects the unit 10 and the unit 20. For example, the CC line 30 is one of the buses for transmitting and receiving packets configured in a USB Type-C cable conforming to the USB PD standard.

[0037] The processing performed by the processing system 1 according to an embodiment of the present disclosure is not limited to the above-described processing. For example, the processing system 1 may perform the processing described below.

[0038] (Processing performed by the processing system of the present disclosure) Next, the processing performed by the processing system 1 according to an embodiment of the present disclosure will be described.

[0039] FIG. 7 is a diagram illustrating a first example of a reduction in time associated with an AMS initiation right change in the processing system 1 according to some embodiments of the present disclosure. Part (a) of FIG. 7 illustrates the state of the pull-up resistor 104. Part (b) of FIG. 7 illustrates the state of the AMS initiation right of the unit 10. Part (c) of FIG. 7 illustrates a Good CRC message packet (GCRC in FIG. 7) in accordance with the USB PD standard, which notifies the unit 20, which is the sender, that the unit 10 has received an AMS initiation right change packet. Part (d) of FIG. 7 illustrates the state of the AMS initiation right of the unit 20. Part (e) of FIG. 7 illustrates an AMS initiation right change packet (AMSC in FIG. 7) transmitted by the unit 20.

[0040] When the AMS initiation right is changed from the unit 10, which is the source, to the unit 20, which is the sink, the control unit 103 changes the state of the pull-up resistor 104 from SinkTxNG to SinkTxOK, as shown in FIG.

[0041] 7, when the AMS initiation right is changed from unit 20, which is the sink, to unit 10, which is the source, the communication unit 202 generates an AMS initiation right change packet under the instruction of the management unit 201. Then, the communication unit 202 transmits the generated AMS initiation right change packet to unit 10 via the CC line 30.

[0042] The communication unit 102 receives the AMS initiation right change packet from the unit 20 via the CC line 30. When the communication unit 102 receives the AMS initiation right change packet, the control unit 103 changes the state of the pull-up resistor 104 from SinkTxOK to SinkTxNG. Furthermore, under the instruction of the management unit 101, the communication unit 102 generates a GoodCRC message packet indicating that the AMS initiation right change packet has been received. The communication unit 102 then transmits the generated GoodCRC message packet to the unit 20 via the CC line 30. The communication unit 202 receives the GoodCRC from the unit 10. The change of the AMS initiation right is completed by sending and receiving this GoodCRC message packet. As a result, the unit 10 can start AMS without having to wait for the time tSinkTx.

[0043] FIG. 8 is a diagram illustrating a second example of a reduction in the time required for changing the AMS initiation right in the processing system 1 according to some embodiments of the present disclosure. Part (a) of FIG. 8 illustrates the state of the pull-up resistor 104. Part (b) of FIG. 8 illustrates the state of the AMS initiation right of the unit 10. Part (c) of FIG. 8 illustrates an AMS initiation right change packet (AMSC in FIG. 8) transmitted by the unit 10. Part (d) of FIG. 8 illustrates the state of the AMS initiation right of the unit 20. Part (e) of FIG. 8 illustrates a GoodCRC message packet (GCRC in FIG. 8) in the USB PD standard that notifies the unit 10, which is the sender, that the unit 20 has received the AMS initiation right change packet.

[0044] When the AMS initiation right is changed from unit 10, which is the source, to unit 20, which is the sink, and when the control unit 103 changes the state of the pull-up resistor 104 from SinkTxNG to SinkTxOK as shown in FIG. 8 , before the change, the communication unit 102 generates an AMS initiation right change packet under the instruction of the management unit 101. A period during which the AMS initiation right will be SinkTxOK is set in advance in this AMS initiation right change packet. The communication unit 102 then transmits the generated AMS initiation right change packet to unit 20 via the CC line 30.

[0045] The communication unit 202 receives an AMS initiation right change packet from the unit 10 via the CC line 30. Upon receiving the AMS initiation right change packet, the communication unit 202, under the instruction of the management unit 201, generates a GoodCRC message packet indicating that the AMS initiation right change packet has been received. Then, the communication unit 202 transmits the generated GoodCRC message packet to the unit 10 via the CC line 30. The communication unit 102 receives the GoodCRC from the unit 20. The change of the AMS initiation right is completed by sending and receiving this GoodCRC message packet. As a result, the unit 20 can know the period during which the state of the pull-up resistor 104 is SinkTxOK, and can immediately start AMS. Note that the sink unit 20 can more safely avoid packet collisions by starting AMS within a period (for example, a period delayed by 10%) that allows a margin relative to the period during which SinkTxOK is set in the AMS initiation right change packet sent by the source unit 10.

[0046] Furthermore, when the AMS initiation right is changed from unit 20, which is the sink, to unit 10, which is the source, as shown in FIG. 8, control unit 103 changes the state of pull-up resistor 104 from SinkTxOK to SinkTxNG.

[0047] FIG. 9 is a diagram illustrating a third example of a reduction in the time required for changing the AMS initiation right in the processing system 1 according to some embodiments of the present disclosure. Part (a) of FIG. 9 illustrates the state of the pull-up resistor 104. Part (b) of FIG. 9 illustrates the state of the AMS initiation right of the unit 10. Part (c) of FIG. 9 illustrates an AMS initiation right change packet (AMSC in FIG. 9) transmitted by the unit 10, and a Good CRC message packet (GCRC in FIG. 9) in accordance with the USB PD standard, which notifies the unit 20, which is the sender, that the unit 10 has received the AMS initiation right change packet. Part (d) of FIG. 9 illustrates the state of the AMS initiation right of the unit 20. Part (e) of FIG. 9 illustrates a Good CRC message packet (GCRC in FIG. 9) in accordance with the USB PD standard, which notifies the unit 10, which is the sender, that the unit 20 has received the AMS initiation right change packet, and an AMS initiation right change packet (AMSC in FIG. 9) transmitted by the unit 20.

[0048] 9 shows an example in which an AMS initiation right change packet is sent from unit 20 to unit 10 before the timing at which unit 20, the sink, changes from SinkTxOK to SinkTxNg in comparison with the example shown in FIG. 8. This allows unit 10 to start AMS without having to wait for time tSinkTx.

[0049] (advantage) The processing system 1 according to an embodiment of the present disclosure has been described above. In the processing system 1, the unit 20 (an example of a receiving unit) is a unit that receives power from the unit 10 (an example of a supplying unit), which is a unit that supplies the power. In the unit 20, the observation unit 203 (an example of an observation means) observes the current level and voltage level of the CC line 30 (an example of a predetermined signal line) in the bus between the unit 20 and the unit 10. When the current level and the voltage level observed by the observation unit 203 are at a high level (an example of a first current level, an example of a first voltage level) indicating that the unit 20 has the right to start information exchange via the bus, the communication unit 202 (an example of a transmission means) transmits an AMS initiation right change packet (an example of transfer information) that is information for transferring the right to the unit 10.

[0050] The waiting time in communication can be reduced by the unit 20 included in this processing system 1. As a result, the processing system 1 can perform communication at a higher speed than, for example, the processing system 900 to be compared.

[0051] Note that the processing system 1 according to the modified embodiment of the present disclosure may perform USB data transfer instead of transmitting and receiving USB PD packets, for example. In other words, the processing system 1 according to the modified embodiment of the present disclosure may use any method that can determine a change in the AMS initiation right.

[0052] Note that the processing system 1 according to another modified example of the embodiment of the present disclosure may use a packet of a different type from the AMS initiation right change packet described above.

[0053] Next, a description will be given of a receiving unit 300 according to some embodiments of the present disclosure. Fig. 10 is a diagram illustrating an example of the configuration of the receiving unit 300 according to some embodiments of the present disclosure. The receiving unit 300 is a unit that receives power from a supply unit that supplies the power. As shown in Fig. 10, the receiving unit 300 includes an observation means 301 and a transmission means 302.

[0054] The observation means 301 observes the current level and voltage level of a predetermined signal line in the bus between the supply unit and the receiving unit. If the current level and voltage level observed by the observation means 301 are a first current level and a first voltage level indicating that the receiving unit has the right to start information exchange via the bus, the transmission means 302 transmits transfer information, which is information for transferring the right, to the supply unit.

[0055] The receiving unit 300 can be realized, for example, by using the function of the unit 20 illustrated in Fig. 4. The observation means 301 can be realized, for example, by using the function of the observation unit 203 illustrated in Fig. 4. The transmission means 302 can be realized, for example, by using the function of the communication unit 202 illustrated in Fig. 4.

[0056] Next, a process performed by the receiving unit 300 according to some embodiments of the present disclosure will be described. Fig. 11 is a diagram showing an example of a processing flow of the receiving unit 300 according to some embodiments of the present disclosure. Here, the process of the receiving unit 300 will be described with reference to Fig. 11.

[0057] The receiving unit 300 is a unit that receives power from a supplying unit that supplies the power. In the receiving unit 300, the observation means 301 observes the current level and voltage level of a predetermined signal line in the bus between the receiving unit and the supplying unit (step S101). If the current level and the voltage level observed by the observation means 301 are a first current level and a first voltage level that indicate that the receiving unit has the right to start information exchange via the bus, the transmission means 302 transmits transfer information, which is information that transfers the right, to the supplying unit (step S102).

[0058] The receiving unit 300 according to some embodiments of the present disclosure has been described above. The receiving unit 300 enables faster communication.

[0059] The order of the processes in each embodiment of the present disclosure may be changed as long as the processes are performed appropriately.

[0060] Each embodiment of the present disclosure has been described, but the processing system 1, units 10, 20, and other control devices may have a computer system built therein. The above-described processing steps are stored in the form of a program on a computer-readable recording medium, and the computer reads and executes this program to perform the above processing. Specific examples of computers are shown below.

[0061] 12 is a schematic block diagram showing the configuration of a computer according to at least one embodiment. As shown in FIG. 12, the computer 5 includes a CPU (Central Processing Unit) 6, a main memory 7, a storage 8, and an interface 9.

[0062] For example, the above-described processing system 1, units 10, 20, and other control devices are each implemented in a computer 5. The operations of the above-described processing units are stored in the form of a program in a storage 8. A CPU 6 reads the program from the storage 8, loads it into the main memory 7, and executes the above-described processing in accordance with the program. The CPU 6 also allocates storage areas in the main memory 7 corresponding to the above-described storage units in accordance with the program.

[0063] Examples of storage 8 include a hard disk drive (HDD), a solid state drive (SSD), a magnetic disk, a magneto-optical disk, a compact disc read-only memory (CD-ROM), a digital versatile disc read-only memory (DVD-ROM), and a semiconductor memory. Storage 8 may be an internal medium directly connected to the bus of computer 5, or an external medium connected to computer 5 via interface 9 or a communication line. In addition, when this program is distributed to computer 5 via a communication line, computer 5 that receives the program may load the program into main memory 7 and execute the above-mentioned processing. In at least one embodiment, storage 8 is a non-transitory tangible storage medium.

[0064] The program may also implement some of the functions described above. Furthermore, the program may be a file that can implement the functions described above in combination with a program already recorded in the computer system, a so-called differential file (differential program).

[0065] Although several embodiments of the present disclosure have been described, these embodiments are merely examples and do not limit the scope of the disclosure. Various additions, omissions, substitutions, and modifications may be made to these embodiments without departing from the spirit of the disclosure.

[0066] Note that part or all of the above-described embodiments can be described as, but are not limited to, the following supplementary notes.

[0067] (Appendix 1) A receiving unit is a unit that receives electric power from a supplying unit that supplies electric power, an observation means for observing a current level and a voltage level of a predetermined signal line in a bus between the supply unit; a transmitting means for transmitting transfer information to the supplying unit when the current level and the voltage level observed by the observing means are a first current level and a first voltage level indicating that the receiving unit has the right to start information exchange via the bus; A receiving unit comprising:

[0068] (Appendix 2) The bus is a bus defined by the USB Power Delivery standard. Recipient units as described in Appendix 1.

[0069] (Appendix 3) the first current level and the first voltage level are high levels; Recipient units as described in Appendix 1 or Appendix 2.

[0070] (Appendix 4) The transmitting means When the current level and the voltage level observed by the observation means are the first current level and the first voltage level, the supply unit sends the transfer information before changing the first current level to a second current level different from the first current level. A recipient unit as set forth in any one of Schedules 1 to 3.

[0071] (Appendix 5) A receiving unit according to any one of Annexes 1 to 4; the supply unit for supplying power to the receiving unit; A processing system comprising:

[0072] (Appendix 6) The supply unit comprises: changing means for changing the first current level to a second current level different from the first current level; 6. The processing system of claim 5, comprising:

[0073] (Appendix 7) A processing method performed by a receiving unit that is a unit that receives electric power from a supplying unit that is a unit that supplies electric power, the method comprising: monitoring current and voltage levels on predetermined signal lines in a bus between said supply units; If the observed current level and the observed voltage level are a first current level and a first voltage level indicating that the receiving unit has the right to start information exchange via the bus, transmitting transfer information to the supplying unit, the transfer information being information for transferring the right; A processing method comprising:

[0074] (Appendix 8) The bus is a bus defined by the USB Power Delivery standard. The processing method described in Appendix 7.

[0075] (Appendix 9) the first current level and the first voltage level are high levels; A processing method as described in Appendix 7 or Appendix 8.

[0076] (Appendix 10) If the observed current level is the first current level and the observed voltage level is the first voltage level, transmitting the transfer information before the supply unit changes the first current level to a second current level different from the first current level; 10. The processing method according to any one of appendices 7 to 9,

[0077] (Appendix 11) A power supply unit supplies power to a power receiving unit, which receives the power. monitoring current and voltage levels on predetermined signal lines in a bus between said supply units; If the observed current level and the observed voltage level are a first current level and a first voltage level indicating that the receiving unit has the right to start information exchange via the bus, transmitting transfer information to the supplying unit, the transfer information being information for transferring the right; A program that executes the following.

[0078] (Appendix 12) The bus is a bus defined by the USB Power Delivery standard. 12. The program described in Appendix 11.

[0079] (Appendix 13) the first current level and the first voltage level are high levels; 13. The program of claim 11 or 12.

[0080] (Appendix 14) If the observed current level is the first current level and the observed voltage level is the first voltage level, transmitting the transfer information before the supply unit changes the first current level to a second current level different from the first current level; 14. The program according to any one of claims 11 to 13, which causes the receiving unit to execute the above. [Explanation of symbols]

[0081] 1,900 Processing System 5. Computer 6 CPU 7. Main memory 8. Storage 9. Interface 10, 20... units 101, 201... Management Department 102, 202...Communications Department 103 Control unit 104 Pull-up resistor 203 Observation Section 300 receiving units 301 Observation Methods 302...Transmission method 901···Source unit 902···Sink unit

Claims

1. A receiving unit is a unit that receives electric power from a supplying unit that supplies electric power, an observation means for observing a current level and a voltage level of a predetermined signal line in a bus between the supply unit; a transmitting means for transmitting transfer information to the supplying unit when the current level and the voltage level observed by the observing means are a first current level and a first voltage level indicating that the receiving unit has the right to start information exchange via the bus; A receiving unit comprising:

2. The bus is a bus defined by the USB Power Delivery standard. The receiving unit according to claim 1 .

3. the first current level and the first voltage level are high levels; The receiving unit according to claim 1 .

4. The transmitting means When the current level and the voltage level observed by the observation means are the first current level and the first voltage level, the supply unit transmits the transfer information before changing the first current level to a second current level different from the first current level. The receiving unit according to claim 1 .

5. The receiving unit according to claim 1; the supply unit for supplying power to the receiving unit; A processing system comprising:

6. The supply unit comprises: changing means for changing the first current level to a second current level different from the first current level; The processing system of claim 5 , comprising:

7. A processing method performed by a receiving unit that is a unit that receives electric power from a supplying unit that is a unit that supplies electric power, the method comprising: monitoring current and voltage levels on predetermined signal lines in a bus between said supply units; If the observed current level and the observed voltage level are a first current level and a first voltage level indicating that the receiving unit has the right to start information exchange via the bus, transmitting transfer information to the supplying unit, the transfer information being information for transferring the right; A processing method comprising:

8. A power supply unit supplies power to a power receiving unit, which receives the power. monitoring current and voltage levels on predetermined signal lines in a bus between said supply units; If the observed current level and the observed voltage level are a first current level and a first voltage level indicating that the receiving unit has the right to start information exchange via the bus, transmitting transfer information to the supplying unit, the transfer information being information for transferring the right; A program that executes the following.

Citation Information

Patent Citations

  • Power supply system and semiconductor device to be used therefor

    JP2019087089A