Display device

Abstract

To suppress occurrence of step disconnection of an oxide semiconductor layer and to reduce resistance of a source region and a drain region of the oxide semiconductor layer in a TFT having a double gate structure.SOLUTION: The side TFT5a disposed for each of the sub-pixels constituting the display region includes a semiconductor-layer side 15ab in which a channel region side 15a, a source region side 15a, and a drain region side 10a are defined, a first gate-electrode side 15ac provided on the base substrate side 12a of the semiconductor-layer side so as to overlap the channel region side via a first gate insulating film 14, and a second gate-electrode side provided on the opposite side of the base substrate side of the semiconductor-layer side so as to overlap the channel region side via a second gate insulating film side. 15a 15ac 17a 10a 15ac 16a 15aa, the semi-conductor layer 15a is provided in a plane shape by an organic insulating film 10a disposed so as to overlap at least the source region 15aa and the drain region 15ab on the base substrate 13a side.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a display device. [Background technology]

[0002] In recent years, in display devices such as liquid crystal display devices, a thin film transistor (hereinafter also referred to as "TFT") is provided as a switching element for each subpixel, which is the smallest unit of an image. Here, well-known examples of semiconductor layers constituting TFTs include a semiconductor layer made of polysilicon with high mobility and a semiconductor layer made of an oxide semiconductor such as In-Ga-Zn-O with low leakage current.

[0003] For example, Patent Document 1 discloses a structure of a semiconductor device in which an oxide semiconductor film is formed on an oxide insulating film whose surface has been planarized by chemical mechanical polishing, thereby making it difficult for discontinuities to occur in the oxide semiconductor film. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2023-16840 Summary of the Invention [Problem to be solved by the invention]

[0005] A semiconductor layer made of an oxide semiconductor (hereinafter also referred to as "oxide semiconductor layer") includes a channel region provided so as to overlap a gate electrode, and conductive source and drain regions provided so as to be spaced apart on either side of the channel region. In a TFT having a double-gate structure in which gate electrodes are provided above and below the oxide semiconductor layer via inorganic insulating films, not only are discontinuities likely to occur in the oxide semiconductor layer due to the cross-sectional shapes of the lower gate electrode and the inorganic insulating film, but the electrical resistance of the source and drain regions of the oxide semiconductor layer also increases, making it difficult to obtain a high on-current, leaving room for improvement.

[0006] The present invention has been made in consideration of the above points, and its purpose is to suppress the occurrence of discontinuities in the oxide semiconductor layer in a TFT having a double gate structure, and to reduce the resistance of the source and drain regions of the oxide semiconductor layer. [Means for solving the problem]

[0007] In order to achieve the above object, the display device of the present invention comprises a base substrate, and a thin film transistor layer provided on the base substrate, in which a thin film transistor is arranged for each sub-pixel constituting a display area, wherein the thin film transistor comprises a semiconductor layer made of an oxide semiconductor in which a source region and a drain region are defined so as to be spaced apart from each other and a channel region is defined between the source region and the drain region, a first gate electrode provided on the base substrate side of the semiconductor layer so as to overlap the channel region via a first gate insulating film, and a second gate electrode provided on the opposite side of the semiconductor layer from the base substrate so as to overlap the channel region via a second gate insulating film, wherein the semiconductor layer is provided in a planar form by an organic insulating film arranged on the base substrate side so as to overlap at least the source region and the drain region. [Effects of the Invention]

[0008] According to the present invention, in a TFT having a double gate structure, it is possible to suppress the occurrence of discontinuities in the oxide semiconductor layer and to reduce the resistance of the source and drain regions of the oxide semiconductor layer. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a plan view showing a schematic configuration of a liquid crystal display device according to a first embodiment of the present invention. [Figure 2] 1 is a plan view of an active matrix substrate constituting a liquid crystal display device according to a first embodiment of the present invention. [Figure 3] 3 is a cross-sectional view of the active matrix substrate and a liquid crystal display device including the same, taken along line III-III in FIG. 2. FIG. [Figure 4] FIG. 3 is a cross-sectional view showing a part of a step of forming a TFT in a manufacturing process of an active matrix substrate constituting a liquid crystal display device according to a first embodiment of the present invention. [Figure 5] 5 is a cross-sectional view showing a part of the step of forming a TFT subsequent to FIG. 4. [Figure 6] 6 is a cross-sectional view showing a part of the step of forming a TFT subsequent to FIG. 5. [Figure 7] 7A to 7C are cross-sectional views showing a part of the process of forming a TFT subsequent to FIG. 6. [Figure 8] FIG. 10 is a cross-sectional view of an active matrix substrate constituting a liquid crystal display device according to a second embodiment of the present invention. [Figure 9] FIG. 10 is another cross-sectional view of the active matrix substrate constituting the liquid crystal display device according to the second embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the following embodiments.

[0011] First Embodiment 1 to 7 show a first embodiment of a display device according to the present invention. In the following embodiments, a liquid crystal display device is exemplified as the display device. FIG. 1 is a plan view showing a schematic configuration of a liquid crystal display device 50a of this embodiment. FIG. 2 is a plan view of an active matrix substrate 30a constituting the liquid crystal display device 50a. FIG. 3 is a cross-sectional view of the active matrix substrate 30a and the liquid crystal display device 50a including the same, taken along line III-III in FIG. 2.

[0012] As shown in FIGS. 1 and 3, the liquid crystal display device 50a includes an active matrix substrate 30a and a counter substrate 40 that are disposed opposite each other, and a liquid crystal layer 45 that is disposed between the active matrix substrate 30a and the counter substrate 40. In the liquid crystal display device 50a, as shown in FIG. 1, a display region D that displays an image inside a sealing material 35 (described later) has a plurality of subpixels P (see FIG. 2) arranged in a matrix. In the display region D, for example, a subpixel P for displaying red gradations, a subpixel P for displaying green gradations, and a subpixel P for displaying blue gradations are disposed adjacent to each other. In the display region D, one pixel is formed by three adjacent subpixels P for displaying red, green, and blue gradations.

[0013] As shown in FIG. 3, the active matrix substrate 30a includes a base substrate 10a such as a glass substrate, a TFT layer 25a provided on the base substrate 10a, a plurality of pixel electrodes 21 provided in a matrix on the TFT layer 25a, and an alignment film (not shown) provided to cover each pixel electrode 21.

[0014] As shown in FIG. 3, the TFT layer 25a includes a base coat film 11 provided on a base substrate 10a, a plurality of TFTs 5a provided on the base coat film 11 corresponding to a plurality of sub-pixels P, and a second interlayer insulating film 20 provided on each TFT 5a. As shown in FIG. 2, the TFT layer 25a includes a plurality of gate lines 12g extending parallel to one another in the X direction in the drawing. As shown in FIG. 2, the TFT layer 25a also includes a plurality of capacitance lines 12c extending parallel to one another in the X direction in the drawing. As shown in FIG. 2, each capacitance line 12c is disposed adjacent to each gate line 12g. As shown in FIG. 2, the TFT layer 25a also includes a plurality of source lines 19d extending parallel to one another in a direction intersecting (orthogonal to) the plurality of gate lines 12g, i.e., in the Y direction in the drawing. In the TFT layer 25a, as shown in FIG. 2, a TFT 5a is provided at the intersection of the gate line 12g and the source line 19d in each sub-pixel P, that is, for each sub-pixel P.

[0015] The base coat film 11, the second interlayer insulating film 20, and the second gate insulating film 16a and the first interlayer insulating film 18 described later are composed of an inorganic insulating film, such as a single layer film or a multilayer film, of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, etc.

[0016] As shown in FIG. 3, the TFT 5a includes a semiconductor layer 15a made of an oxide semiconductor such as an In-Ga-Zn-O system, a first gate electrode 12a provided on the base substrate 10a side of the semiconductor layer 15a via a first gate insulating film 14, a second gate electrode 17a provided on the opposite side of the semiconductor layer 15a from the base substrate 10a via a second gate insulating film 16a, and a source electrode 19a and a drain electrode 19b provided spaced apart from each other on a first interlayer insulating film 18 covering the second gate electrode 17a.

[0017] As shown in FIG. 3, the semiconductor layer 15a includes a source region 15aa and a drain region 15ab that are spaced apart from each other, and a channel region 15ac that is defined between the source region 15aa and the drain region 15ab. As shown in FIG. 3, the semiconductor layer 15a is provided in a planar state by an organic insulating film 13a that is disposed on the base substrate 10a side so as to overlap at least the source region 15aa and the drain region 15ab. As shown in FIG. 3, the organic insulating film 13a is provided adjacent to the first gate electrode 12a, and its surface opposite the base substrate 10a (top surface in the figure) is flush with the surface of the first gate electrode 12a opposite the base substrate 10a (top surface in the figure). Note that flushing does not necessarily mean flushness in the strict sense; some level difference is acceptable as long as it prevents discontinuities.

[0018] The first gate insulating film 14 has gas permeability and is made of, for example, a single-layer inorganic insulating film such as silicon oxide, etc. As shown in Fig. 3, the first gate insulating film 14 is provided in a planar shape on the surface of the organic insulating film 13a opposite to the base substrate 10a (top surface in the drawing) and on the surface of the first gate electrode 12a opposite to the base substrate 10a (top surface in the drawing).

[0019] 3, the first gate electrode 12a is provided so as to overlap with the channel region 15ac of the semiconductor layer 15a, and is configured to control conduction between the source region 15aa and the drain region 15ab of the semiconductor layer 15a. Here, the first gate electrode 12a is formed by a part of the gate line 12g, as shown in FIG.

[0020] 3, the second gate electrode 17a is provided so as to overlap with the channel region 15ac of the semiconductor layer 15a, and is configured to control conduction between the source region 15aa and the drain region 15ab of the semiconductor layer 15a. The second gate electrode 17a is electrically connected to the first gate electrode 12a.

[0021] As shown in FIG. 3, the source electrode 19a and the drain electrode 19b are electrically connected to the source region 15aa and the drain region 15ab of the semiconductor layer 15a, respectively, through contact holes formed in the first interlayer insulating film 18. Here, as shown in FIG. 2, the source electrode 19a is an L-shaped protrusion laterally of the source line 19d in each subpixel P. As shown in FIG. 2, the drain electrode 19b extends to a portion overlapping with the capacitance line 12c in each subpixel P, and forms an auxiliary capacitance together with the first gate insulating film 14 provided between the drain electrode 19b and the capacitance line 12c. As shown in FIG. 2, the drain electrode 19b is electrically connected to the pixel electrode 21 in each subpixel P through a contact hole C formed in the second interlayer insulating film 20 above the capacitance line 12c. While the present embodiment illustrates an auxiliary capacitance configuration in which the drain electrode 19b extends to a portion overlapping with the capacitance line 12c, an auxiliary capacitance may also be formed in which the drain region 15ab extends to a portion overlapping with the capacitance line 12c.

[0022] As shown in FIGS. 2 and 3, in each sub-pixel P, the pixel electrode 21 is provided on the second interlayer insulating film 20 in a rectangular shape.

[0023] As shown in FIG. 3, the opposing substrate 40 includes, for example, a base substrate 10b such as a glass substrate, a color filter layer 31 provided on the base substrate 10b, a common electrode 32 provided on the color filter layer 31, and an alignment film (not shown) provided on the common electrode 32.

[0024] The color filter layer 31 includes, for example, a plurality of colored layers (e.g., red layers, green layers, blue layers, etc.) arranged in a matrix corresponding to a plurality of sub-pixels P, and a black matrix arranged between the plurality of colored layers.

[0025] The common electrode 32 is provided so as to be shared by a plurality of sub-pixels P.

[0026] The alignment films provided on the active matrix substrate 30a and the counter substrate 40 are made of, for example, polyimide resin whose surface has been subjected to rubbing treatment.

[0027] The liquid crystal layer 45 is made of, for example, a nematic liquid crystal material having electro-optical properties. The liquid crystal layer 45 is sealed between the active matrix substrate 30a and the counter substrate 40 by a frame-shaped sealant 35 that bonds the active matrix substrate 30a and the counter substrate 40 to each other around the periphery of the display region D.

[0028] The liquid crystal display device 50a described above is configured so that when the TFT 5a is turned on in each pixel P, a potential difference is generated between the pixel electrode 21 and the common electrode 32, and a predetermined voltage is applied to the liquid crystal capacitance formed by the liquid crystal layer 45 and to the auxiliary capacitance electrically connected in parallel to the liquid crystal capacitance. In the liquid crystal display device 50a, the orientation state of the liquid crystal molecules in each pixel P changes depending on the magnitude of the voltage applied to the liquid crystal layer 45, thereby adjusting the transmittance of light incident from outside and displaying an image.

[0029] Next, a method for manufacturing the liquid crystal display device 50a of this embodiment will be described, focusing on a method for manufacturing the active matrix substrate 30a. Here, Figures 4, 5, 6, and 7 are cross-sectional views successively showing part of the process for forming the TFT 5a in the manufacturing process of the active matrix substrate 30a.

[0030] <Active matrix substrate> First, an inorganic insulating film (about 300 nm thick) such as a silicon oxide film is formed on a base substrate 10a such as a glass substrate by, for example, plasma CVD (Chemical Vapor Deposition) to form a base coat film 11.

[0031] Next, a metal film (about 300 nm thick) such as a titanium film is formed by sputtering on the substrate surface on which the base coat film 11 is formed, and then the metal film is subjected to photolithography, etching, and resist stripping and cleaning to form a gate line 12g including a first gate electrode 12a, a capacitance line 12c, etc.

[0032] Thereafter, an acrylic organic resin material (about 2.0 μm thick) is applied by, for example, spin coating or slit coating to the surface of the substrate on which the gate lines 12g and the like have been formed, and the applied organic resin material is baked to form an organic resin film 13 as shown in Fig. 4. The organic resin film 13 may be patterned by using a photosensitive organic resin material and performing exposure, development, and baking.

[0033] Furthermore, the substrate surface on which the organic resin film 13 has been formed is subjected to dry etching, physical polishing, etc. so that the organic resin film 13 does not remain on the first gate electrode 12a, thereby forming an organic insulating film 13a as shown in Figure 5.

[0034] Subsequently, an inorganic insulating film (about 300 nm thick) such as a silicon oxide film is formed by, for example, plasma CVD on the substrate surface on which the organic insulating film 13a has been formed, thereby forming the first gate insulating film .

[0035] Then, an oxide semiconductor film (about 30 nm thick) such as InGaZnO4 is formed by sputtering on the substrate surface on which the first gate insulating film 14 is formed, and then the oxide semiconductor film is subjected to photolithography, etching, and resist stripping and cleaning to form semiconductor layers 15a and the like, as shown in FIG. 6.

[0036] Furthermore, on the surface of the substrate on which the semiconductor layer 15a and the like are formed, an inorganic insulating film such as a silicon nitride film (with a thickness of about 300 nm) is formed by, for example, a plasma CVD method, and then a metal film such as a titanium film (with a thickness of about 300 nm) is formed by a sputtering method.Then, the laminated film of the inorganic insulating film and the metal film is subjected to photolithography, etching, and resist stripping and cleaning, thereby forming a second gate insulating film 16a, a second gate electrode 17a and the like.

[0037] Next, an inorganic insulating film (about 300 nm thick) such as a silicon nitride film is formed on the substrate surface on which the second gate electrode 17a etc. are formed, for example, by plasma CVD, and then the inorganic insulating film is subjected to photolithography, etching, and resist stripping and cleaning to form the first interlayer insulating film 18.

[0038] Thereafter, a titanium film (about 50 nm thick), an aluminum film (about 300 nm thick), and a titanium film (about 50 nm thick) are sequentially formed by, for example, sputtering on the substrate surface on which the first interlayer insulating film 18 has been formed to form a metal film, and then the metal film is subjected to photolithography, etching, and resist stripping and cleaning to form a source line 19d including a source electrode 19a, a drain electrode 19b, and the like, as shown in Fig. 7. Note that with respect to the semiconductor layer 15a, for example, by heat treatment after the formation of the first interlayer insulating film 18, as shown in Fig. 7, desorbed gas G from the organic insulating film 13a permeates the first gate insulating film 14 and is supplied to the semiconductor layer 15a, thereby converting a portion of the semiconductor layer 15a into a conductor, and a source region 15aa, a drain region 15ab, and a channel region 15ac are formed.

[0039] Furthermore, an inorganic insulating film (about 300 nm thick) such as a silicon nitride film is formed on the substrate surface on which the drain electrode 19b etc. are formed, for example, by plasma CVD, and then the inorganic insulating film is subjected to photolithography, etching, and resist stripping and cleaning to form a second interlayer insulating film 20.

[0040] Next, a transparent conductive film (about 100 nm thick) such as an ITO (Indium Tin Oxide) film is formed on the surface of the substrate on which the second interlayer insulating film 20 is formed, for example, by sputtering, and then the transparent conductive film is subjected to photolithography, etching, and resist stripping and cleaning to form pixel electrodes 21.

[0041] Finally, a polyimide resin film is applied by, for example, a printing method to the entire substrate on which the pixel electrodes 21 are formed, and then the resin film is subjected to baking and rubbing treatments to form an alignment film.

[0042] In this manner, the active matrix substrate 30a can be manufactured.

[0043] Furthermore, the active matrix substrate 30a and the counter substrate 40 manufactured as described above are bonded together via a frame-shaped sealant 35, and a liquid crystal material is sealed between the active matrix substrate 30a and the counter substrate 40 to form a liquid crystal layer 45, thereby manufacturing the liquid crystal display device 50a.

[0044] As described above, in the liquid crystal display device 50a of this embodiment, the organic insulating film 13a, which is disposed on the base substrate 10a side of the semiconductor layer 15a so as to overlap the source region 15aa and the drain region 15ab, is disposed adjacent to the first gate electrode 12a, and the surface of the organic insulating film 13a opposite the base substrate 10a is flush with the surface of the first gate electrode 12a opposite the base substrate 10a. As a result, the first gate insulating film 14 provided on the surface of the organic insulating film 13a opposite the base substrate 10a and the surface of the first gate electrode 12a opposite the base substrate 10a is formed planar, and the semiconductor layer 15a provided on the first gate insulating film 14 is also formed planar. Therefore, in the TFT 5a having the first gate electrode 12a and the second gate electrode 17a, discontinuity of the semiconductor layer 15a can be suppressed. Furthermore, since the organic insulating film 13a is arranged to overlap the source region 15aa and the drain region 15ab of the semiconductor layer 15a made of an oxide semiconductor, the desorbed gas G from the organic insulating film 13a can further reduce the resistance of the drain region 15ab and the channel region 15ac, thereby achieving a high on-current. Therefore, in the TFT 5a having a double-gate structure, it is possible to suppress the occurrence of discontinuities in the semiconductor layer 15a and to reduce the resistance of the source region 15aa and the drain region 15ab of the semiconductor layer 15a.

[0045] Second Embodiment Figures 8 and 9 show a second embodiment of a display device according to the present invention. Here, Figure 8 is a cross-sectional view of an active matrix substrate 30b constituting a liquid crystal display device of this embodiment, and is a view corresponding to the portion of active matrix substrate 30a in Figure 3. Also, Figure 9 is another cross-sectional view of active matrix substrate 30b. Note that in the following embodiments, the same parts as those in Figures 1 to 7 are designated by the same reference numerals, and detailed description thereof will be omitted.

[0046] In the first embodiment, the active matrix substrate 30a is exemplified in which the source region 15aa and the drain region 15ab of the semiconductor layer 15a are spaced apart from the organic insulating film 13a in the thickness direction. In the present embodiment, the active matrix substrate 30b is exemplified in which the source region 15aa and the drain region 15ab of the semiconductor layer 15a are in contact with the organic insulating film 114 in the thickness direction.

[0047] The liquid crystal display device of this embodiment includes an active matrix substrate 30b (see FIG. 8) and a counter substrate 40 (see FIG. 3) that are arranged to face each other, and a liquid crystal layer 45 (see FIG. 3) that is provided between the active matrix substrate 30b and the counter substrate 40. In addition, in the liquid crystal display device of this embodiment, a plurality of sub-pixels P are arranged in a matrix in a display region D that displays images inside a sealing material 35, similar to the liquid crystal display device 50a of the first embodiment.

[0048] As shown in FIG. 8, the active matrix substrate 30b includes a base substrate 10a, a TFT layer 25b provided on the base substrate 10a, a plurality of pixel electrodes 21 provided in a matrix on the TFT layer 25b, and an alignment film (not shown) provided to cover each pixel electrode 21.

[0049] As shown in FIG. 8 , the TFT layer 25b includes a base coat film 11 provided on the base substrate 10a, a plurality of TFTs 5b provided on the base coat film 11 corresponding to a plurality of subpixels P, and a second interlayer insulating film 20 provided on each TFT 5b. Here, similar to the TFT layer 25a of the first embodiment, the TFT layer 25b includes a plurality of gate lines 12g, a plurality of capacitance lines 12c, and a plurality of source lines 19d. Similarly to the TFT layer 25a of the first embodiment, the TFT layer 25b includes a TFT 5b at the intersection of the gate line 12g and the source line 19d in each subpixel P, i.e., for each subpixel P. Furthermore, as shown in FIG. 9 , the TFT layer 25b includes a wiring layer 15b made of an oxide semiconductor such as an In-Ga-Zn-O system, and an organic insulating film 114 is provided on the wiring layer 15b on the side of the base substrate 10a.

[0050] As shown in FIG. 8, the TFT 5b includes a semiconductor layer 15a made of an oxide semiconductor such as an In-Ga-Zn-O system, a first gate electrode 12a provided on the base substrate 10a side of the semiconductor layer 15a via a first gate insulating film 113, a second gate electrode 17a provided on the opposite side of the semiconductor layer 15a from the base substrate 10a via a second gate insulating film 16a, and a source electrode 19a and a drain electrode 19b provided spaced apart from each other on a first interlayer insulating film 18 covering the second gate electrode 17a.

[0051] As shown in Fig. 8, the semiconductor layer 15a is provided in a planar state by an organic insulating film 114 arranged so as to overlap at least the source region 15aa and the drain region 15ab on the base substrate 10a side. Here, as shown in Fig. 8, the organic insulating film 114 is provided so as to be adjacent to a convex portion J of a first gate insulating film 113 described later, and its surface opposite to the base substrate 10a (top surface in the figure) is flush with the surface of the convex portion J opposite to the base substrate 10a (top surface in the figure). As a result, the semiconductor layer 15a is provided in a planar state on the surface of the organic insulating film 114 opposite to the base substrate 10a (top surface in the figure) and the surface of the convex portion J opposite to the base substrate 10a (top surface in the figure), as shown in Fig. 8.

[0052] The first gate insulating film 113 is made of an inorganic insulating film, such as a single layer film or a multilayer film, of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, etc., similar to the base coat film 11, the second gate insulating film 16a, the first interlayer insulating film 18, and the second interlayer insulating film 20. As shown in Fig. 8, the first gate insulating film 113 is provided so as to cover the first gate electrode 12a, and has a convex portion J at the portion overlapping with the first gate electrode 12a.

[0053] A liquid crystal display device including the active matrix substrate 30b described above, like the liquid crystal display device 50a of the first embodiment, applies a predetermined voltage to the liquid crystal layer 45 and auxiliary capacitance disposed between each pixel electrode 21 and the common electrode 32, thereby changing the orientation state of the liquid crystal layer 45, thereby adjusting the transmittance of light incident from the outside and displaying an image.

[0054] The active matrix substrate 30b of this embodiment can be manufactured by the same method as for manufacturing the active matrix substrate 30a of the first embodiment, except that, in the manufacturing method for the active matrix substrate 30a of the first embodiment, first an inorganic insulating film (about 300 nm thick) such as a silicon oxide film is formed, for example, by plasma CVD, on the substrate surface on which the gate lines 12g (including the first gate electrodes 12a) and the like are formed, thereby forming a first gate insulating film 113 having a convex portion J; then, an acrylic organic resin material (about 2.0 μm thick) is applied, for example, by spin coating or slit coating, and the applied organic resin material is baked to form an organic resin film; and then, the substrate surface on which the organic resin film has been formed is subjected to dry etching or physical polishing, for example, so that no organic resin film remains on the convex portion J, thereby forming an organic insulating film 114; and then, similarly to the manufacturing method for the active matrix substrate 30a of the first embodiment, the semiconductor layer 15a and the like are successively formed. The wiring layer 15b is patterned when the semiconductor layer 15a is formed, and is made conductive when the source region 15aa and the drain region 15ab are formed by a subsequent heat treatment.

[0055] As described above, in the liquid crystal display device including the active matrix substrate 30b of this embodiment, the organic insulating film 114, which is arranged so as to overlap the source region 15aa and the drain region 15ab on the base substrate 10a side of the semiconductor layer 15a, is provided adjacent to the convex portion J of the first gate insulating film 113, and the surface of the organic insulating film 114 opposite to the base substrate 10a and the surface of the convex portion J opposite to the base substrate 10a are provided flush with each other. As a result, the semiconductor layer 15a provided on the surface of the organic insulating film 114 opposite to the base substrate 10a and the surface of the convex portion J opposite to the base substrate 10a are formed flat, and therefore, in the TFT 5b having the first gate electrode 12a and the second gate electrode 17a, the occurrence of discontinuities in the semiconductor layer 15a can be suppressed. Furthermore, since the organic insulating film 114 is disposed so as to contact and overlap the source region 15aa and the drain region 15ab of the semiconductor layer 15a made of an oxide semiconductor, the resistance of the drain region 15ab and the channel region 15ac can be further reduced by the desorbed gas G from the organic insulating film 114, thereby enabling a higher on-current to be obtained. Therefore, in the TFT 5b having a double-gate structure, it is possible to suppress the occurrence of discontinuities in the semiconductor layer 15a and to reduce the resistance of the source region 15aa and the drain region 15ab of the semiconductor layer 15a.

[0056] Furthermore, in a liquid crystal display device including the active matrix substrate 30b of this embodiment, the TFT layer 25b includes a wiring layer 15b made of an oxide semiconductor, and an organic insulating film 114 is provided on the base substrate 10a side of the wiring layer 15b, so that the resistance of the wiring layer 15b can be further reduced by the desorbed gas G from the organic insulating film 114.

[0057] Other Embodiments In the above embodiments, a liquid crystal display device has been exemplified as a display device, but the present invention can also be applied to an organic electroluminescence display device or the like.

[0058] Furthermore, in each of the above embodiments, a liquid crystal display device is exemplified that includes a TFT substrate in which the electrode of the TFT connected to the pixel electrode is the drain electrode, but the present invention can also be applied to liquid crystal displays and the like in which the electrode of the TFT connected to the pixel electrode is called the source electrode. [Industrial Applicability]

[0059] As described above, the present invention is useful for an active matrix substrate provided with a TFT having a double gate structure and a display device including the same. [Explanation of symbols]

[0060] D Display area J convex part P subpixel 5a, 5b TFT (thin film transistor) 10a Base board 12a first gate electrode 13a Organic insulating film 14 First gate insulating film 15a Semiconductor layer 15aa source region 15ab Drain region 15ac Channel Area 15b wiring layer 16a Second gate insulating film 17a Second gate electrode 18 First interlayer insulating film 19a Source electrode 19b Drain electrode 21 pixel electrode 25a, 25b TFT layer (thin film transistor layer) 30a, 30b Active matrix substrate 40 Opposing substrate 45 Liquid crystal layer 50a Liquid crystal display device 113 First gate insulating film 114 Gate insulating film

Claims

1. A base substrate; a thin film transistor layer provided on the base substrate, in which a thin film transistor is arranged for each sub-pixel constituting a display area; The thin film transistor is a display device comprising: a semiconductor layer made of an oxide semiconductor in which a source region and a drain region are defined so as to be spaced apart from each other and a channel region is defined between the source region and the drain region; a first gate electrode provided on the base substrate side of the semiconductor layer so as to overlap the channel region via a first gate insulating film; and a second gate electrode provided on the opposite side of the semiconductor layer from the base substrate so as to overlap the channel region via a second gate insulating film, The display device is characterized in that the semiconductor layer is provided in a planar state by an organic insulating film arranged so as to overlap at least the source region and the drain region on the base substrate side.

2. 2. The display device according to claim 1, the organic insulating film is provided adjacent to the first gate electrode, a surface of the organic insulating film opposite to the base substrate and a surface of the first gate electrode opposite to the base substrate are flush with each other; The display device, wherein the first gate insulating film is provided on a surface of the organic insulating film opposite to the base substrate and on a surface of the first gate electrode opposite to the base substrate.

3. 3. The display device according to claim 2, The display device is characterized in that the first gate insulating film is made of a silicon oxide film.

4. 2. The display device according to claim 1, the first gate insulating film is provided so as to cover the first gate electrode and has a convex portion at a portion overlapping the first gate electrode; the organic insulating film is provided adjacent to the convex portion, a surface of the organic insulating film opposite to the base substrate and a surface of the convex portion opposite to the base substrate are provided flush with each other; The display device is characterized in that the semiconductor layer is provided on a surface of the organic insulating film opposite to the base substrate and on a surface of the convex portion opposite to the base substrate.

5. 5. The display device according to claim 4, the thin film transistor layer includes a wiring layer made of an oxide semiconductor; The display device is characterized in that the organic insulating film is provided on the base substrate side of the wiring layer.

6. The display device according to any one of claims 1 to 5, The display device is characterized in that the thin film transistor has a source electrode and a drain electrode that are spaced apart from each other via an interlayer insulating film that covers the second gate electrode and are electrically connected to the source region and the drain region, respectively.

7. 7. The display device according to claim 6, the base substrate, the thin film transistor layer, and a plurality of pixel electrodes provided in a matrix on the thin film transistor layer and electrically connected to the drain electrodes of the corresponding thin film transistors constitute an active matrix substrate; an opposing substrate provided opposite the active matrix substrate; a liquid crystal layer provided between the active matrix substrate and the counter substrate;

Images