Apparatus and method for joining semiconductor wafers

Abstract

To improve bonding strength between wafers in a semiconductor manufacturing process by a simple configuration.SOLUTION: In the semiconductor wafer joining device 34 that joins the semiconductor wafer W1 and W2 to each other, after the semiconductor wafer W1 and W2 are plasma-treated to activate the surfaces, the semiconductor wafer W1 and W2 are brought into a high vacuum state within a predetermined time to polarize ions on the surfaces of the semiconductor wafer W1 and W2, and the ions move on the surfaces of the semiconductor wafer and by applying a high-frequency power source 110 to the semiconductor wafer and W1, thereby increasing the joining strength between the semiconductor wafer and. W2 W1 W2.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a semiconductor wafer bonding apparatus and method for bonding semiconductor wafers together by, for example, radio frequency ion flow bonding (RF Ion Flow Bonding (RFIFB)) in a semiconductor manufacturing process. [Background technology]

[0002] Hybrid bonding, which is part of a conventional semiconductor manufacturing process, includes, for example, a plasma treatment step, a cleaning step, a drying step, and a bonding step.

[0003] In the plasma treatment process, for example, atmospheric pressure plasma or vacuum plasma is applied to the semiconductor wafer to activate the surface of the semiconductor wafer. In the cleaning process, for example, a cleaning liquid (pure water or chemical liquid) is dropped onto the semiconductor wafer while the semiconductor wafer is rotated around its central axis to clean the surface of the semiconductor wafer. In the drying process, for example, water droplets are scattered from the surface of the semiconductor wafer while the semiconductor wafer is rotated at high speed around its central axis. In the bonding process, for example, two upper and lower semiconductor wafers that have undergone the plasma treatment process and the drying process are placed face to face and bonded together using a bonding device.

[0004] In conventional bonding devices, semiconductor wafers are placed on planar stages arranged opposite each other, and the pair of opposing semiconductor wafers are bonded together by a surface activated bonding (SAB) method (hereinafter referred to as the "SAB method" as appropriate), which is a room-temperature bonding process.

[0005] Surface activated bonding is a method of bonding materials at low or normal temperatures by ionizing an inert gas such as argon to create an ion beam, and then irradiating the surfaces of the materials to be bonded with this ion beam or plasma, thereby removing any oxide film or contaminant layer present on the surfaces of the materials to be bonded and activating the surfaces.

[0006] However, with the SAB method, removing the oxide film roughens the surface, reducing the bonding strength between semiconductor wafers. Moving the wafer or the beam during spot irradiation with an Ar ion beam generates particles, which creates voids and other problems. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Japanese Patent Application Publication No. 2018-201022 Summary of the Invention [Problem to be solved by the invention]

[0008] In view of the above, an object of the present invention is to provide a semiconductor wafer bonding apparatus and bonding method that can improve the bonding strength between wafers in a semiconductor manufacturing process with a simple configuration. [Means for solving the problem]

[0009] The present invention is a semiconductor wafer bonding apparatus or method for bonding semiconductor wafers together, which comprises plasma-treating the semiconductor wafers to activate their surfaces, creating a high vacuum state within a predetermined time period to polarize ions on the surfaces of the semiconductor wafers, and applying a high-frequency power source to the semiconductor wafers to cause the ions to move on the surfaces of the semiconductor wafers, thereby increasing the bonding strength between the semiconductor wafers.

[0010] The predetermined time is preferably 1 to 30 seconds.

[0011] The predetermined time is more preferably 1 to 10 seconds. [Effects of the Invention]

[0012] According to the present invention, the bonding strength between semiconductor wafers in a semiconductor manufacturing process can be improved with a simple configuration. [Brief explanation of the drawings]

[0013] [Figure 1] 1 is a configuration diagram of a semiconductor wafer bonding apparatus according to an embodiment of the present invention. [Figure 2] 1 is a configuration diagram showing plasma processing and bonding processing for semiconductor wafers by a semiconductor wafer bonding apparatus according to an embodiment of the present invention. [Figure 3] 1A to 1C are process diagrams illustrating plasma processing and bonding processing for semiconductor wafers by the semiconductor wafer bonding apparatus according to one embodiment of the present invention. [Figure 4] FIG. 1 is a flow diagram showing an example of a high-frequency ion flow bonding process. [Figure 5] 1 is a plan view of a semiconductor manufacturing system in which a semiconductor wafer bonding apparatus according to an embodiment of the present invention is assembled. [Figure 6] 1 is a side view of a semiconductor manufacturing system in which a semiconductor wafer bonding apparatus according to an embodiment of the present invention is assembled. [Figure 7] FIG. 1 is a diagram illustrating the structure of a monopolar electrostatic chuck. [Figure 8] FIG. 1 is a diagram illustrating the structure of a bipolar electrostatic chuck. [Figure 9] FIG. 1 is a configuration diagram showing a state in which semiconductor wafers are bonded together using a bipolar electrostatic chuck provided on a stage constituting a semiconductor wafer bonding apparatus according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0014] First, a semiconductor wafer bonding apparatus and method according to one embodiment of the present invention will be described.

[0015] In the semiconductor wafer bonding apparatus and method according to one embodiment of the present invention, semiconductor wafers are bonded together using a plasma chamber or a vacuum chamber. In other words, the plasma chamber or the vacuum chamber can also be called a bonding chamber, a bonding chamber, a bonding apparatus, a bonding apparatus, or the like.

[0016] [Technical concept of the present invention] The technical idea of ​​the present invention is a semiconductor wafer bonding device that uses Coulomb force (also called "electrostatic force"; the same applies hereinafter) to bond a pair of opposing wafers together in a vacuum environment inside a vacuum chamber where plasma processing is performed on the wafers, thereby increasing the bonding strength between them.

[0017] The vacuum chamber may have a pair of holding parts arranged at positions facing each other on a stage, and the wafers facing each other may be bonded by moving at least one of the holding parts while the wafers are adsorbed by the holding parts.

[0018] Here, it is preferable that, before bonding the opposing wafers together, a silicon electrode is used for one of the wafers and a semiconductor wafer is used for the other of the wafers, and after performing the plasma treatment for the first time on the silicon electrode and the other semiconductor wafer, the silicon electrode is changed to a bonded wafer, and the plasma treatment for the second time on the bonded wafer and the semiconductor wafer is performed.

[0019] Between the first plasma treatment and the second plasma treatment, oxide films formed on the surfaces of the semiconductor wafers facing each other may be removed by supplying an etching gas.

[0020] The above-described technical concept of the present invention is not limited to a semiconductor wafer bonding apparatus, but also applies to a semiconductor wafer bonding method having the same features as those described above.

[0021] [Configuration of semiconductor wafer bonding equipment] As shown in Fig. 1, the semiconductor wafer bonding apparatus 34 of this embodiment bonds various types of wafers together. The semiconductor wafer and bonded wafer may be, for example, a silicon wafer, but is not limited to a silicon wafer. It is also possible to use semiconductor wafers made of different materials that have been conventionally used, or to bond semiconductor wafers made of different materials together.

[0022] 1, a semiconductor wafer bonding apparatus 34 has a chamber 14 as a housing, a first stage 36 located on the upper side inside the chamber, and a second stage 38 located on the lower side inside the chamber. A first holder 102 capable of holding a semiconductor wafer or an electrode (e.g., a silicon electrode) is arranged on the first stage 36. A second holder 104 capable of holding a semiconductor wafer or an electrode (e.g., a silicon electrode) is arranged on the second stage 38.

[0023] The chamber 14 or the bonding device 34, which is a housing, can also be called a "vacuum chamber."

[0024] Here, for example, an electrostatic chuck or a mechanical clamp is used for the first stage 36 and the second stage 38, or the first holding unit 102 and the second holding unit 104. Note that the electrostatic chuck may be, for example, the electrostatic chuck shown in electrostatic chucks 78 and 80 (FIGS. 7 to 9). The configurations of the electrostatic chucks 78 and 80 shown in FIGS. 7 to 9 will be described later.

[0025] 2, a first holding part 102 and a first replacement device 106 for replacing the semiconductor wafer W1 or silicon electrode G1 held by the first holding part 102 with a semiconductor wafer or silicon electrode held by another holding part are disposed on the first stage 36, which is upstream in the direction of gravity, or in its vicinity. Note that in the process of replacing the silicon electrode G1 with the semiconductor wafer W1, it is preferable that the silicon electrode G2 and the first holding part 102 holding the silicon electrode G1 are replaced as a set, and that the replacement is performed for each set consisting of the semiconductor wafer W1 and the first holding part 102 holding the semiconductor wafer W1, but this is not limited to this embodiment.

[0026] The silicon electrode G1 is a known material, and is also called, for example, a dummy wafer or a bare wafer.

[0027] The semiconductor wafer W1 held by the first holding part 102 includes, for example, a silicon wafer electrode G1 as well as a bonded wafer G2 and the like.

[0028] The first replacement device 106 is not limited to being provided on the first stage 36 side, but may be provided as another component of the bonding device 34 or outside the bonding device 34 .

[0029] Furthermore, a second replacement device 108 for replacing the second holding part 38 and the semiconductor wafer W2 or silicon electrode held by the second holding part 38 with a semiconductor wafer W2 or silicon electrode held by another holding part may be disposed on or near the second stage 38, which is downstream in the direction of gravity. Note that in the replacement step between the silicon electrode (not shown) and the semiconductor wafer W2, the silicon electrode (not shown) and the second holding part 104 holding the silicon electrode (not shown) form a set, and replacement is preferably performed for each set consisting of the semiconductor wafer W2 and the second holding part 104 holding the semiconductor wafer W2, but this is not limited to this embodiment.

[0030] The second replacement device 108 is not limited to being provided on the second stage 38 side, but may be provided as another component of the bonding device 34 or outside the bonding device 34 .

[0031] It is preferable that at least one of the first replacement device 106 and the second replacement device 108 is provided.

[0032] Here, for example, robot hands are used as the first replacement device 106 and the second replacement device 108, but the present invention is not limited to this.

[0033] The semiconductor wafer W1 held by the first holding part 102 and the semiconductor wafer W2 held by the second holding part 104 are exemplified by, but not limited to, a Si wafer or a SiC wafer.

[0034] 1, a radio frequency power supply 110 is connected to each of the first stage 36 and the second stage 38. The radio frequency power supply 110 has the ability to generate a radio frequency electric field (13.56 MHz, 200 W). When the radio frequency power supply 110 is applied, the electric field promotes the flow and diffusion of atoms, improving the adhesion of the bonding surfaces of the semiconductor wafers W1 and W2.

[0035] The semiconductor wafer bonding apparatus 34 is provided with an automatic pressure control device 112 (APC) that can control the pressure inside the housing. The automatic pressure control device 112 controls the pressure inside the housing.

[0036] The semiconductor wafer bonding device 34 is provided with a turbo molecular pump (TMP) 114. The turbo molecular pump 114 is composed of, for example, a rotor (moving blades) with turbine-type blades and a stator (fixed blades).

[0037] Turbomolecular pump 114 is 1 x 10 -6 It is a high-performance pump with a high vacuum and high pumping speed of 100 Pa.

[0038] [Effects of semiconductor wafer bonding equipment] The bonding between the wafers becomes stronger. When bonding semiconductor wafers that require different plasma treatment times, the plasma treatment time can be shortened by using the semiconductor wafer that requires a shorter plasma treatment time as the bonded wafer and replacing it with a silicon electrode. This allows for shorter plasma treatment of the bonded wafer. As a result, the surface of the bonded wafer does not deteriorate due to prolonged plasma treatment, and deterioration in the quality of the semiconductor product (semiconductor device, etc.) formed by bonding the wafers can be prevented.

[0039] [First plasma treatment run] As shown in FIGS. 1 and 2, a semiconductor wafer bonding apparatus 34 has a parallel plate electrode structure. The inside of the housing is evacuated, a silicon electrode G1 (also referred to as a "silicon wafer electrode") is held by a first holder 102, and a semiconductor wafer W2 (e.g., a silicon wafer) is held by a second holder 104. A first plasma treatment is then performed using argon plasma or the like. As a result, silicon is sputtered from the silicon electrode G1 using argon plasma inside the vacuum chamber 14, and the surface of the semiconductor wafer W2 held by the second holder 104 is activated by the plasma, forming a silicon deposition film X on the surface of the semiconductor wafer W2. The surface activation of the semiconductor wafer W2 using plasma uses a gas such as argon (Ar) or nitrogen (N), and removes oxide films and contaminants from the surface of the semiconductor wafer W2. The second plasma treatment also has a similar effect.

[0040] Here, the use of the high frequency power supply 110 reduces energy and reduces plasma damage to the surface of the semiconductor wafer W2. Also, a thin vapor deposition film X is formed on the semiconductor wafer W2 by sputtering against the plasma electrode G1, which is a silicon wafer electrode.

[0041] [Isotropic etching] Between the first plasma treatment and the second plasma treatment described below, an isotropic etching step may be performed to remove an oxide film formed on the surface of the semiconductor wafer W2 by supplying an etching gas such as SF6. After the isotropic etching step, the plasma gas is switched to argon gas (gas replacement), and the wafer surface is activated in the second plasma treatment.

[0042] [Second plasma treatment run] Next, the silicon electrode G1 is replaced with a bonded wafer G2, which is a semiconductor wafer W1. The bonded wafer G2 is, for example, a semiconductor wafer such as a silicon wafer, but is not limited to silicon. The process of replacing the silicon electrode G1 with the bonded wafer W1 is performed, for example, by replacing the silicon electrode G1 and the first holding part 102 that holds the silicon electrode G1 as a set of parts with another set of parts that includes the bonded wafer G2 and the first holding part 102 that holds the bonded wafer G2. Alternatively, the first holding part 102 may be used in common as is, and after only the silicon electrode G1 is separated from the first holding part 102, the bonded wafer G2 may be held by the first holding part 102. During and after the exchange process, plasma processing is performed, and the surfaces of the bonded wafer G2 held by the first holding part 102 and the semiconductor wafer W2 held by the second holding part 104 are activated using a gas such as argon (Ar) or nitrogen (N2). Oxide films and contaminants are removed from the surfaces of the bonded wafer G2 held by the first holding part 102 and the semiconductor wafer W2 held by the second holding part 104. Then, in an environment where the application of pressure by the high-frequency power supply 110 continues, the supply of gas such as argon (Ar) or nitrogen (N2) is stopped, and the automatic pressure control device 112 is driven at high output, and the degree of vacuum inside the chamber 14 reaches the ultimate vacuum (for example, 1×10) in, for example, about 10 seconds. -6At this time, the plasma is extinguished, but ions remain polarized on the surfaces of the bonded wafer G2 held by the first holding part 102 and the semiconductor wafer W2 held by the second holding part 104.

[0043] The time required for the interior of chamber 14 to reach the ultimate vacuum is not limited to approximately 10 seconds, and may be set, for example, in the range of 1 to 30 seconds, more preferably in the range of 1 to 15 seconds, and even more preferably in the range of 1 to 10 seconds. The shorter the time required for the interior of chamber 14 to reach the ultimate vacuum, the better.

[0044] [Wafer-to-wafer bonding process] In this state, for example, as shown in Figure 3, by moving the first stage 36 and / or the second stage 38 closer to each other, the separation distance between the bonded wafer G2 held by the first holder 102 and the semiconductor wafer W2 held by the second holder 104 is reduced, and the interatomic distance between the wafers is reduced due to the Coulomb force (electrostatic force) generated on the surfaces of both wafers, and they eventually come into contact. At this time, the first stage 36 may be fixed, and the second stage 38 may be moved closer to the first stage 36 side. Alternatively, the second stage 38 may be fixed, and the first stage 36 may be moved closer to the second stage 38 side. The initial bonding force between the bonded wafer G2 held by the first holding part 102 and the semiconductor wafer W2 held by the second holding part 104 becomes strong, but by continuing to apply the high frequency power supply 110 even after the opposing wafers G2 and W2 come into contact with each other, RF high frequency waves flow between the surfaces of the respective wafers G2 and W2, and ion flow (atomic diffusion) occurs due to the electric field, thereby making the bonding between the two even stronger.

[0045] The semiconductor wafer manufacturing method according to this embodiment is the first of its kind in the industry, and is called RF Ion Flow Bonding (RFIFB).

[0046] It should be noted that the plasma treatment is performed only once on the bonded wafer G2 held by the first holding part 102, whereas the plasma treatment is performed only twice on the semiconductor wafer W2 held by the second holding part 104.

[0047] Furthermore, a preferred configuration is to replace the first holding part 102 and the silicon electrode G1 held by the first holding part 102 with another first holding part 102 and the bonded wafer G2 held by the first holding part 102, and then bond the bonded wafer G2 held by the first holding part 102 to the semiconductor wafer W2 held by the second holding part 104, but this is not limitative. Furthermore, it is preferred that the first holding part 102 be located upstream (upper side) in the direction of gravity, and the second holding part 104 be located downstream (lower side) in the direction of gravity.

[0048] On the other hand, there is a conventional technology called atomic diffusion bonding (ADB). Atomic diffusion bonding is a technology called room temperature activation bonding, and is known to involve activating the surface of a semiconductor wafer with an Ar beam or by activating the surface of a semiconductor wafer with Si sputtering. However, in either case, it takes several minutes to bond activated semiconductor wafers together.

[0049] Generally, the activated state of the semiconductor wafer surface deteriorates in a short time, so rapid evacuation and bonding are required.

[0050] Therefore, according to this embodiment, after activating the wafer surfaces by plasma treatment, the turbo molecular pump 114 is used to evacuate the wafers to the ultimate pressure within, for example, about 10 seconds, and the wafers are then bonded together, thereby enabling atomic diffusion bonding with minimal surface activation decay after wafer surface activation.

[0051] That is, this embodiment uses, for example, parallel flat-plate plasma electrodes in the upper and lower directions, a structure (for example, an electrostatic chuck, a mechanical clamp, etc.) that can hold a wafer on the upper and lower electrodes, and one of the electrodes is designed to be replaceable with a bonded wafer.

[0052] According to this embodiment, roughening of the electrode surface due to sputtering of the silicon electrode G1 causes particles to appear in the parallel-plate wafer plasma, resulting in the formation of voids. The sputtering roughens the surface of the silicon electrode G1, and the re-sputtered silicon grows and peels off from the surface of the silicon electrode G1. The peeled-off silicon continues to float as particles due to Brownian motion, causing void defects in the wafer. However, in this embodiment, the silicon electrode G1 (e.g., a Si bare wafer) is used instead of the bonded wafer G2 in the early stages, thereby reducing damage to the bonded wafer G2 due to voids. This prevents quality degradation and deterioration of the semiconductor product obtained by bonding the bonded wafer G2 and the semiconductor wafer W2. It is preferable to periodically replace the silicon electrode G1 after each or multiple bonding operations.

[0053] As described above, by surface activation of the wafers used on one or both sides of the parallel plates and soft sputtering by applying the high frequency power supply 110 to the silicon electrode G1, a vapor deposition film X, which is an extremely thin high purity Si film, is formed on the processing surface of the semiconductor wafer W2 facing the silicon electrode G1.

[0054] In the plasma environment, the surface of the semiconductor wafer W2 is bombarded with ions to expose a clean surface. After the surface of the semiconductor wafer W2 is cleaned, a high-frequency power supply 110 with a different frequency is applied to a silicon electrode G1 (e.g., a silicon wafer) located at the upper (upper) side. As a result, minute Si particles fly out from the silicon electrode G1 and accumulate on the surface of the semiconductor wafer W2 located at the lower (lower) side, forming a vapor-deposited film X, which is a thin film formed by vapor deposition.

[0055] If a thin film formed by vapor deposition is not required, this step can be omitted.

[0056] Next, in bonding the bonded wafer G2 and the semiconductor wafer W2, the surface of the bonded wafer G2 is activated using a gas such as argon (Ar) or nitrogen (N2) while the bonded wafer G2 is set on, for example, an upper (upper) electrode. At this time, the surface of the semiconductor wafer W2 placed below (below) is also activated. For these reasons, surface activation of the bonded wafer G2 is performed only once, and surface activation of the semiconductor wafer W2 is performed only twice.

[0057] Inside the chamber 14, which is a single housing, the surfaces of the two wafers (bonded wafer G2 and semiconductor wafer W2) are activated at a pressure that allows plasma to be applied between the opposing electrodes and that allows plasma to be maintained at as high a vacuum as possible. The electrode structure may be configured with an additional magnetron, ICP coil, etc., to enable plasma to be maintained at a high vacuum.

[0058] Furthermore, after plasma surface activation is completed, the distance between the bonded wafer G2 arranged on the upper side and the semiconductor wafer W2 arranged on the lower side is preferably narrow. Furthermore, the distance between the silicon electrode G1 arranged on the upper side and the semiconductor wafer W2 arranged on the lower side is preferably narrow. For example, the distance may be the minimum distance between the electrodes that allows plasma to be uniformly applied during plasma processing, and may be in the range of 10 μm to 50 μm when the pressure is changed to a high vacuum after completion of plasma processing. This is because narrowing the distance makes it difficult for particles and the like to infiltrate between the electrodes from the outside, preventing particles from being mixed in during the wafer bonding process and shortening the time from reaching vacuum to bonding.

[0059] After the surfaces of the bonded wafer G2 and the semiconductor wafer W2 have been activated by plasma processing, the supply of gas such as argon (Ar) or nitrogen (N2) is stopped, and the automatic pressure control device 112 is driven and controlled so that the vacuum pressure reached by the turbomolecular pump 114 (or cryopump) is reached within, for example, about 10 seconds. At this time, the application of the high-frequency power supply 110 continues, but this is not limitative.

[0060] As a result, polarized ions (electrons) reside on the surfaces of the bonded wafer G2 and the semiconductor wafer W2. When the bonded wafer G2 and the semiconductor wafer W2 are bonded in a high vacuum, the ion potential on the surfaces of the bonded wafer G2 and the semiconductor wafer W2 increases atomic motion, facilitating temporary movement of atoms on the surfaces of the bonded wafer G2 and the semiconductor wafer W2. Furthermore, application of the high-frequency power supply 110 after bonding the bonded wafer G2 and the semiconductor wafer W2 also increases atomic motion, facilitating temporary movement of atoms on the surfaces of the bonded wafer G2 and the semiconductor wafer W2. These synergistic effects relocate atoms to a more stable energy state. In particular, when the surfaces of the bonded wafer G2 and the semiconductor wafer W2 are activated, atoms are more likely to be relocated to optimal positions. As a result, the energy on the surfaces of the bonded wafer G2 and the semiconductor wafer W2 is minimized, and the bonding strength between the bonded wafer G2 and the semiconductor wafer W2 is improved.

[0061] Generally, the time from the completion of plasma processing of semiconductor wafers to the bonding of the semiconductor wafers is several minutes, which includes the time it takes to transfer the semiconductor wafers from the plasma processing chamber to the bonding chamber, the plasma processing time for the second semiconductor wafer, and the transport time. During this time, the activity of the surface of the semiconductor wafer is attenuated and deteriorated by about 10 to 50% from immediately after plasma processing (attenuation rate 10 to 50%).

[0062] In contrast to this, in this embodiment, instantaneous bonding is performed immediately after the plasma treatment of the bonded wafer G2 and the semiconductor wafer W2, so that the bonded wafer G2 and the semiconductor wafer W2 are bonded together while the activated states of the respective surfaces of the bonded wafer G2 and the semiconductor wafer W2 are maintained at a decay rate of 1% or less. As a result, the bonding between the bonded wafer G2 and the semiconductor wafer W2 is strong.

[0063] [Void-less bonding] Most of the voids are flakes from Si sputtering and particles in the chamber. Frequent replacement of the silicon electrode G1 eliminates the flakes and particles formed by sputtering, reducing the number of voids. In addition, in the vacuum plasma, organic substances that act as seeds for forming voids between the bonded wafer G2 and the semiconductor wafer W2 are removed by the plasma. The plasma also prevents organic substances from penetrating between the wafers from the outside. These results enable void-less bonding.

[0064] [Features of RF ion flow bonding] High frequency ion flow bonding has the following features: (1) The surface of the wafer can be activated and cleaned by controlling the plasma treatment and instantaneous vacuum. (2) The initial bonding strength between wafers can be strengthened by utilizing Coulomb force (electrostatic force). (3) A high-frequency power source (RF high frequency) promotes the flow and diffusion of atoms, improving the bonding strength between wafers.

[0065] [High frequency ion flow bonding process flow] An example of the flow of the high frequency ion flow bonding process will be described. As shown in Figure 4, for example, wafers are removed from a wafer cassette (S100) and aligned (S200). The wafers are cleaned (S300) and transferred to a load lock chamber (S400). Plasma processing is performed on the wafers (S500) and the wafers are bonded together (S600). After that, a semiconductor product formed by bonding the wafers together is removed from the load lock chamber (S700), and the semiconductor product is inspected (S800). Here, it is preferable that the time required from the end of the plasma processing step (S500) on the wafer to the end of the bonding step (S600) be, for example, 10 seconds or less. As described above, for example, Coulomb force control assisted bonding using an ESC chuck can prevent misalignment of opposing wafers when they come into contact with each other, and high-frequency ion flow bonding technology can achieve high-strength bonding.

[0066] (Example) Next, an example of high frequency ion flow bonding will be described.

[0067] [Overview] (1) Two Si wafers are placed in a vacuum with a parallel plate electrode structure. (2) A replaceable silicon wafer electrode is used on one side, and the surface of the silicon wafer electrode is activated with argon plasma. (3) The silicon protruding from the surface of the silicon wafer electrode is deposited by sputtering on the surface of the semiconductor wafer facing the silicon wafer electrode.

[0068] [Process] (1) Surface activation using silicon wafer electrodes The surfaces of the silicon wafer electrode and the semiconductor wafer facing the silicon wafer electrode are activated by a plasma treatment (first time) using argon plasma, and silicon is sputtered from the silicon wafer electrode. The silicon wafer electrode is replaced with a bonded wafer that will serve as the bonding target. The bonded wafer and the semiconductor wafer are subjected to argon plasma treatment (second time), and after the gas supply is stopped, a turbo molecular pump or the like is used to achieve the ultimate vacuum within, for example, about 10 seconds. Although the plasma disappears when the vacuum is drawn, ions remain in a polarized state on the surfaces of the bonded wafer and the semiconductor wafer, which face each other. (2) Wafer-to-wafer bonding Ions that are polarized and reside on the surfaces of the bonded wafer and the semiconductor wafer generate Coulomb force (electrostatic force), which shortens the interatomic distance between the wafers and brings them into contact. RF radio waves flow across the surface of each wafer, and an electric field causes ion flow (atomic diffusion) to occur, resulting in a strong bond between the wafers.

[0069] [Specific structure] (1) Parallel plate plasma electrode structure (1-1) Wafer holding mechanism An electrostatic chuck or a mechanical clamp is used as each holding portion, and a structure is provided in which each wafer can be held by the upper electrode and the lower electrode. At least one of the upper and lower electrodes is designed to be replaceable with a bonded wafer. The replacement is preferably performed by a robot hand or the like. It is also preferable to replace the upper electrode with a bonded wafer. This can suppress the generation of particles due to roughness on the electrode surface. (1-2) Electrode sputtering The electrode is a silicon electrode made of a bare silicon wafer, which controls particles during the plasma process, thereby reducing voids during bonding of the bonded wafer and the semiconductor wafer. (1-3) Surface activation of one or both sides of the wafers facing each other Soft sputtering is performed by applying high-frequency power to each electrode, and silicon sputtered from the electrode accumulates on the surface of the opposing wafer, forming a thin, highly pure silicon film. Note that the process of forming a highly pure silicon film (silicon film) can be omitted if necessary. A high frequency power supply of a different frequency may be applied to the upper electrode to sputter Si (silicon).

[0070] (2) Setting the bonded wafers (2-1) Activation of the wafer surface using gas The surface of the wafer is activated using Ar (argon) or N2 (nitrogen) gas. Two wafers, one on top and one on the bottom, are simultaneously subjected to plasma processing in one chamber. (2-2) Plasma treatment Plasma processing is performed in a high vacuum. A magnetron or ICP coil can be used. The space between the electrodes is designed so that the plasma is uniform and is not subject to external influences such as the intrusion of dust from outside. (2-3) Evacuation after plasma treatment The supply of argon gas and nitrogen gas into the chamber is stopped, and the automatic pressure control device (APC) is driven, and the pressure inside the chamber is controlled to reach the ultimate vacuum pressure by the turbomolecular pump in, for example, about 10 seconds. Depending on the product, the application of high frequency power to the upper and lower electrodes may be continued or stopped. (2-4) Vacuum lamination (vacuum bonding) The wafers, each with a charged surface, are brought close together and brought into contact by Coulomb force (electrostatic force). The use of Coulomb force improves the initial bonding strength between the wafers. The use of Coulomb force also increases atomic movement, making it easier for atoms on the surface of each wafer to move. By applying a high frequency power source to each electrode, the atoms are rearranged into a stable energy state, forming a strong bond between the wafers.

[0071] (3) Instant bonding of wafers after plasma processing (instant bonding) By bonding the wafers, for example, in about 10 seconds after the surfaces of the wafers have been activated, it is possible to minimize deterioration of the activated state (activity level) of the wafer surfaces. In contrast, with conventional room-temperature activation bonding or atomic diffusion bonding, it takes time to bond wafers together. Specifically, if there is a wait time of several minutes, the activation state decreases by about 20%. This has caused a problem of deterioration in the quality of semiconductor wafer products, but this problem has been solved by the high-frequency ion flow bonding of this embodiment.

[0072] [In high vacuum (1×10 -6 Decay rate after surface activation in Pa (pascal) Decay rate after 10 seconds in a vacuum: A(10 seconds) ≒ 99.83% A(10 seconds) = 99.83% = 0.17% Decay rate Decay rate after 2 minutes in a vacuum: A(2 minutes) ≒ 81.87% A(2 minutes) = 81.87% = 18.13% Decay rate From the above, it has been found that rapid evacuation and bonding of the wafers together are extremely important for maintaining the surface activation state, and as a result, strong bonding between the wafers can be obtained.

[0073] Next, we analyze the diffusion of ions in the high-frequency ion flow bonding process, in which silicon wafers are subjected to plasma treatment in a vacuum to activate their surfaces, and then the gas is stopped and the wafers are bonded together at high speed in a vacuum while maintaining the surface activation state, and a high-frequency power supply is applied.

[0074] [High frequency ion flow bonding process] (1) Plasma surface activation Organic contaminants and oxides on the wafer surface are chemically removed by plasma etching using fluorine-based gases. Argon sputtering removes any remaining micro-contaminants and non-uniform chemical residues. The wafer surface is cleaned by activation and plasma etching, and at the same time, the atoms on the wafer surface are further activated by physically hitting the wafer surface with argon sputtering, thereby improving the efficiency of bonding wafers together. The combined effect of cleaning and activating the wafer surface is to diffuse atoms, resulting in high bonding strength between the wafers.

[0075] (2) Gas stop and high-speed vacuuming After the plasma processing of the wafer, the supply of argon gas and nitrogen gas was stopped, and a turbo molecular pump was used to create a high vacuum (1×10 -6 Pa (Pascal) is controlled. The ultimate vacuum level is reached within approximately 10 seconds, and the activated state of the wafer surface is maintained.

[0076] (3) Wafer-to-wafer bonding The wafers are bonded together with the polarized ions remaining on the surface of each wafer. Coulomb force (electrostatic force) reduces the interatomic distance between the surfaces of the adjacent wafers, strengthening the contact between the wafers.

[0077] (4) Application of high-frequency power After the wafers are bonded together, a high frequency power source is applied to generate an electric field on the surface of each wafer. The electric field causes ions on the wafer surface to flow, strengthening the bonds between atoms.

[0078] [Considerations of ion diffusion] (1) Ion state on the wafer surface Due to activation by the plasma treatment, the ions remaining on the wafer surface become polarized. The polarized ions are strongly adsorbed to the wafer surface, facilitating the movement of the ions. In a high vacuum, the electrodes are insulated from each other, and the ions do not ionize (discharge) but remain on the wafer surface.

[0079] (2) High vacuum state In a high vacuum, the activated state of the wafer surface is maintained, and recontamination of the wafer surface is suppressed.

[0080] (3) Effect of high frequency power supply The high frequency electric field (13.56 MHz, 200 W) has the following effects on the wafer surface and interface. (3-1) Fluctuation of surface potential The high frequency electric field generates an alternating electric field on the wafer surface, which causes the potential on the wafer surface to fluctuate, resulting in the following effects: Surface potential fluctuation: A potential of ±200V fluctuates at 13.56MHz, causing the movement of electrons and ions on the wafer surface. Effect of high frequency electric field: A high frequency electric field (alternating electric field) rearranges atoms and ions on the wafer surface. (3-2) Promotion of atomic diffusion at the interface The high frequency electric field exerts the following effects on the wafer surface. Ion movement: The alternating electric field makes it easier for ions on the wafer surface to move. Changes in atomic forces: The alternating electric field changes the atomic forces between the wafers, forming stronger bonds. Reduction of activation energy: The alternating electric field reduces the energy required for atomic diffusion, promoting bonding between atoms.

[0081] [Mechanism of ion diffusion] When a high frequency power source is applied, ion diffusion occurs according to the following mechanism. (1) Electric field-induced ion migration A high-frequency electric field (RF field) attracts and repels ions on the wafer surface, causing the ions to move uniformly across the entire wafer surface.

[0082] (2) Surface diffusion The movement of ions across the wafer surface rearranges atoms. The rearrangement of the wafer surface atoms creates a more stable energy state.

[0083] (3) Strengthening interatomic bonds The rearrangement of the atoms on the wafer surface strengthens the bonds between the atoms, resulting in a strong bond between the wafers.

[0084] The RF ion flow bonding process involves chemically reacting silicon wafers in a vacuum, isotropically etching the oxide film on the wafer surface, and then activating the wafer surface by soft sputtering with argon. The wafers are then bonded together in a high-vacuum environment at high speed for, for example, about 10 seconds, while maintaining the activated state of the wafer surfaces. Furthermore, by continuing to apply RF power between the wafers, ions on the wafer surfaces diffuse, causing them to move and strengthen the interatomic bonds. This strengthens the bond between the wafers. Thus, RF ion flow bonding is extremely effective in wafer bonding, improving both the bond strength and quality between wafers.

[0085] In addition, frequent automatic electrode replacement and the use of bare wafers contribute to reducing flakes and particles formed by Si sputtering, achieving void-free bonding, which significantly reduces the frequency of chamber cleaning, reduces equipment maintenance time, and contributes to improving equipment availability.

[0086] [Example of a semiconductor manufacturing system] An example in which the semiconductor wafer bonding apparatus of this embodiment and example is assembled into a semiconductor manufacturing system will be described.

[0087] 5 and 6, a semiconductor wafer bonding apparatus 34 can be installed in a semiconductor manufacturing system 200 in place of the plasma chamber 10 of a conventional system. The semiconductor manufacturing system 200 shown in FIGS. 5 and 6 includes a central chamber 202 accommodating a robot hand, a semiconductor wafer bonding apparatus 34 capable of performing plasma processing on semiconductor wafers and bonding wafers together, a vacuum bonding chamber 204, an atomic bonding chamber 206, a rotary cleaning chamber 208, a standby chamber 210, and a load lock chamber 212. A wafer transport mechanism 214 and a plurality of wafer cassettes 216 are arranged near the load lock chamber 212.

[0088] [An example of a wafer holding mechanism] Next, an example of a wafer holding mechanism for holding each wafer will be described.

[0089] The semiconductor wafer bonding apparatus and bonding method of this embodiment are configured such that an electrostatic chuck 80 (see FIGS. 7 to 9) is disposed as a wafer holding mechanism on a first stage 36 and a second stage 38 for holding semiconductor wafers W1 and W2. Note that the electrostatic chuck 80 (see FIGS. 7 to 9) may be disposed instead of the first holding part 102 and the second holding part 104.

[0090] 7 and 8 illustrate the structures of a monopolar electrostatic chuck 78 and a bipolar electrostatic chuck 80. Each of the electrostatic chucks 78, 80 is made of an insulating material such as aluminum oxide (Al2O3) or aluminum nitride (AIN). The chucks have a structure in which an electrode is built into the insulator, and by applying a voltage to this electrode, they attract objects 86, 92 such as semiconductor wafers W1, W2.

[0091] The monopolar electrostatic chuck 78 shown in FIG. 7 is a monopolar electrostatic chuck having a base substrate 82 and an internal electrode (also referred to as an electrode sheet or a polyimide film electrode layer) 84 disposed on the base substrate 82. The base substrate 82 applies either a positive or negative voltage to the internal electrode 84. For example, when a positive voltage is applied to the internal electrode 84, a negative charge is transferred to the surface of the object to be attracted 86, causing the object to be attracted to the monopolar electrostatic chuck 78. When a negative voltage is applied to the internal electrode 84, a positive charge is transferred to the surface of the object to be attracted 86, causing the object to be attracted to the monopolar electrostatic chuck 78.

[0092] 8 is a bipolar electrostatic chuck having a base substrate 88 and an internal electrode (also referred to as an electrode sheet or a polyimide film electrode layer) 90 disposed on the base substrate 88. The base substrate 88 applies both positive and negative voltages to the internal electrode 90. For example, a negative charge moves to the surface of an object to be attracted 92 facing the internal electrode 90 to which a positive voltage is applied, and a positive charge moves to the surface of the object to be attracted 92 facing the internal electrode 90 to which a negative voltage is applied, thereby attracting the object to be attracted to the bipolar electrostatic chuck 80.

[0093] An example in which a bipolar electrostatic chuck is used in a semiconductor wafer bonding apparatus will be described. As shown in FIG. 9 , an electrostatic chuck 80 is preferably built into each of the first stage 36 and the second stage 38. For ease of explanation, the electrostatic chuck 80 built into the first stage 36 will be referred to as the first electrostatic chuck 80A, and the electrostatic chuck 80 built into the second stage 38 will be referred to as the second electrostatic chuck 80B. Each of the electrostatic chucks 80A and 80B is, for example, a bipolar type. Since the first stage 36 and the second stage 38 are disposed opposite each other, the electrostatic chucks 80A and 80B are disposed opposite each other, thereby constituting a pair of electrostatic chucks.

[0094] The first electrostatic chuck 80A has a first base substrate 88A and a first internal electrode 90A disposed on the first base substrate 88A. The first internal electrode 90A is connected to ground. The first base substrate 88A controls the voltage applied to the first internal electrode 90A. The first internal electrode 90A is composed of two or more adjacent first unit electrodes 91A, and mutually opposite positive and negative voltages are applied to adjacent first unit electrodes 91A, respectively.

[0095] The second electrostatic chuck 80B is disposed opposite the first electrostatic chuck 80A. Similar to the configuration of the first electrostatic chuck 80A, the second electrostatic chuck 80B has a second base substrate 88B and a second internal electrode 90B disposed on the second base substrate 88B. The second internal electrode 90B is connected to ground. The second base substrate 88B controls the voltage applied to the second internal electrode 90B. The second internal electrode 90B is composed of two or more adjacent second unit electrodes 91B, and mutually opposite positive and negative voltages are applied to adjacent second unit electrodes 91B, respectively.

[0096] Here, the first base plate 88A and the second base plate 88B control the first unit electrode 91A on the first electrostatic chuck 80A side and the second unit electrode 91B on the second electrostatic chuck 80B side facing the first unit electrode 91A so that voltages of opposite polarities (positive and negative) are applied to them. Therefore, the first unit electrode 91A of the first internal electrode 90A of the first electrostatic chuck 80A, to which a negative voltage is applied, is positioned opposite to the second unit electrode 91B of the second internal electrode 90B of the second electrostatic chuck 80B, to which a positive voltage is applied. Similarly, the first unit electrode 91A of the first internal electrode 90A of the first electrostatic chuck 80A, to which a positive voltage is applied, is positioned opposite to the first unit electrode 91B of the second internal electrode 90B of the second electrostatic chuck 80B, to which a negative voltage is applied.

[0097] The general principle of the bipolar electrostatic chuck 80 is that, with a semiconductor wafer W1 placed on the first electrostatic chuck 80A and a semiconductor wafer W2 placed on the second electrostatic chuck 80B, positive and negative voltages are applied to the first inner electrode 90A and the second inner electrode 90B, respectively. This causes the positive and negative charges of the semiconductor wafers W1 and W2 to move toward the opposing inner electrodes 90A and 90B in a mutually attractive manner (dielectric polarization). As a result, an attraction force is generated between the first inner electrode 90A and the semiconductor wafer W1, and between the second inner electrode 90B and the semiconductor wafer W2, thereby fixing the semiconductor wafers W1 and W2.

[0098] 7, in a monopolar electrostatic chuck 78, a voltage is generally applied between an object to be attracted (such as a semiconductor wafer) 86 and an internal electrode 84 (also referred to as a chuck or a holding device), generating an electric charge on the surface of the object to be attracted (such as a semiconductor wafer) 86. Specifically, if the internal electrode 84 is positively charged, the surface of the object to be attracted (such as a semiconductor wafer) 86 facing the internal electrode 84 is negatively charged, and if the internal electrode 84 is negatively charged, the surface of the object to be attracted (such as a semiconductor wafer) 86 facing the internal electrode 84 is positively charged. This principle is also applied to a bipolar electrostatic chuck 80 shown in FIG. 8.

[0099] Typically, the surfaces of semiconductor wafers W1 and W2 are negatively (or possibly positively) charged after being activated by plasma processing. Therefore, when attempting to bond semiconductor wafers W1 and W2 with negatively (or positively) charged surfaces together, they electrically repel each other. Forcibly bonding the semiconductor wafers W1 and W2 together in this state results in a mutual repulsion, resulting in misalignment and a reduction in the bonding accuracy of the semiconductor wafers W1 and W2.

[0100] 9, the surface of one of the opposing semiconductor wafers W1 is positively (negatively) charged, and the surface of the other semiconductor wafer W2 is negatively (positively) charged, intentionally creating a state in which the semiconductor wafers to be bonded are charged with opposite polarities. This, for example, utilizes both the van der Waals force (intermolecular force) and the Coulomb force (electrostatic force) generated between the two to improve the adsorptive force and assist in bonding the semiconductor wafers W1 and W2 together.

[0101] Generally, when two negatively charged objects (or two positively charged objects) come together, they repel each other. This is one of the basic properties of static electricity: charges of the same sign (for example, when both are negative) repel each other, and charges of opposite polarities (for example, one is positive and the other is negative) attract each other.

[0102] The semiconductor wafers W1 and W2 are charged to opposite polarities (opposite polarities) and are controlled with a voltage between their surfaces that does not cause discharge, and when the positively charged semiconductor wafer W1 (or W2) comes into contact with the negatively charged semiconductor wafer W2 (or W1), electrons move from the positively charged object to the negatively charged object, neutralizing the charge. This weakens the effect of static electricity and simultaneously increases the bonding attraction force during bonding.

[0103] In a typical bipolar electrostatic chuck, the surface of the semiconductor wafer is maintained in an electrically balanced state by applying voltages of the same magnitude (absolute value) to the positive and negative sides.

[0104] In contrast to this, rather than applying voltages of the same magnitude (absolute value) to the positive and negative, voltages of different magnitudes are applied to intentionally disrupt the positive or negative balance. In other words, an imbalance is created between the positive and negative voltages in terms of the magnitude of the applied voltage.

[0105] 9, for example, a voltage of −400 volts is applied to one first unit electrode 91A constituting a first inner electrode 90A of a first electrostatic chuck 80A, and a voltage of +500 volts is applied to the other first unit electrode 91A. At the same time, a voltage of +400 volts is applied to one second unit electrode 91B constituting a second inner electrode 90B of a second electrostatic chuck 80B, and a voltage of −500 volts is applied to the other second unit electrode 91B.

[0106] Here, the first unit electrode 91A of the first inner electrode 90A of the first electrostatic chuck 80A, which is on one side to which a voltage of −400 V is applied, and the second unit electrode 91B of the second inner electrode 90B of the second electrostatic chuck 80B, which is on one side to which a voltage of +400 V is applied, are set to be positioned opposite each other. Although these electrodes have different polarities (positive and negative), voltages of the same absolute value are applied to them.

[0107] Furthermore, the first unit electrode 91A of the first inner electrode 90A of the first electrostatic chuck 80A, which is on the other side to which a voltage of +500 V is applied, and the second unit electrode 91B of the second inner electrode 90B of the second electrostatic chuck 80B, which is on the other side to which a voltage of −500 V is applied, are set to be positioned opposite each other. Although these electrodes have different polarities (positive and negative), voltages of the same magnitude in absolute value are applied to them.

[0108] As a result, the surface of the semiconductor wafer W1 facing the first electrostatic chuck 80A is charged with a charge of +100 volts, which is the difference between +500 volts and −400 volts of the first electrostatic chuck 80A. Similarly, the surface of the semiconductor wafer W2 facing the second electrostatic chuck 80B is charged with a charge of −100 volts, which is the difference between +400 volts and −500 volts of the second electrostatic chuck 80B.

[0109] At this time, floating charges are generated on the surfaces of the semiconductor wafers W1 and W2. As a result, by applying reverse voltages to the mutually opposing internal electrodes 90A and 90B (or unit electrodes), the semiconductor wafers W1 and W2 are attracted to each other by a strong Coulomb force and bonded together. As a result, the generation of bubbles when bonding the semiconductor wafers W1 and W2 together can be suppressed.

[0110] Here, the semiconductor wafers W1 and W2 held by the pair of electrostatic chucks 80A and 80B are preferably placed in a microspace (minimal space) environment with a separation distance of 10 μm to 50 μm, inclusive. In the microspace, the semiconductor wafers W1 and W2 are bonded to each other while maintaining their planar orientation.

[0111] It should be noted that the present embodiment and examples illustrate one aspect of the present invention, and the present invention is not limited thereto. Differences in the degree of design changes from the present embodiment and examples are naturally included within the scope of the technical idea of ​​the present invention. [Explanation of symbols]

[0112] 14 Chamber 16 stages 34 Semiconductor wafer bonding equipment 36 First Stage 38 Second Stage 78 Single-pole electrostatic chuck 80 Bipolar electrostatic chuck 80A First Electrostatic Chuck 80B Second electrostatic chuck 82 Base 84 Internal electrode 86 Adsorbed object 88 Base 88A First Base 88B Second Base 90 Internal electrode 90A First inner electrode 90B Second internal electrode 91A First unit electrode 91B Second unit electrode 92 Adsorbed object 102 first holding part 104 Second holding part 106 First Replacement Device 108 Second Replacement Device 110 High frequency power supply 112 Automatic pressure control device 114 Turbomolecular Pump 200 Semiconductor Manufacturing System 202 Central Chamber 204 Vacuum Bonding Chamber 206 Atomic Bonding Chamber 208 Rotating Wash Chamber 210 Waiting Chamber 212 Load Lock Chamber 214 Wafer transport mechanism 216 Wafer Cassette G1 silicon wafer G2 bonded wafer W1 Semiconductor wafer W2 semiconductor wafer

Claims

1. A semiconductor wafer bonding apparatus for bonding semiconductor wafers together, A semiconductor wafer bonding device that performs plasma processing on the semiconductor wafer to activate the surface, then creates a high vacuum state within a predetermined time to polarize ions on the surface of the semiconductor wafer, and applies a high-frequency power source to the semiconductor wafer to cause the ions to move on the surface of the semiconductor wafer, thereby increasing the bonding strength between the semiconductor wafers.

2. 2. The semiconductor wafer bonding apparatus according to claim 1, wherein the predetermined time is 1 to 30 seconds.

3. 2. The semiconductor wafer bonding apparatus according to claim 1, wherein the predetermined time is 1 to 10 seconds.

4. A semiconductor wafer bonding method for bonding semiconductor wafers together, comprising: A method for bonding semiconductor wafers, comprising: subjecting the semiconductor wafers to plasma treatment to activate their surfaces; creating a high vacuum state within a predetermined time period to polarize ions on the surfaces of the semiconductor wafers; and applying a high frequency power source to the semiconductor wafers to cause the ions to move on the surfaces of the semiconductor wafers, thereby increasing the bonding strength between the semiconductor wafers.

5. 5. The semiconductor wafer bonding method according to claim 4, wherein the predetermined time is 1 to 30 seconds.

6. 5. The semiconductor wafer bonding method according to claim 4, wherein the predetermined time is 1 to 10 seconds.

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