Zero current sensor and power supply circuit

The zero current sensor with a saturable inductor and transformer configuration addresses inefficiencies in existing detection methods by minimizing iron loss and noise interference, enabling high-speed and efficient current polarity detection.

JP2026028444APending Publication Date: 2026-02-20GS YUASA CORP
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Patent Information

Application Number
JP2024130867
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-08-07
Publication Date
2026-02-20

AI Technical Summary

Technical Problem

Existing zero current detection methods in power supply circuits suffer from inefficiencies due to noise interference and high iron loss in detection components, limiting high-frequency operation and accuracy.

Method used

A zero current sensor utilizing a saturable inductor connected in series with the current path and a transformer with a primary winding in parallel, which minimizes iron loss and enables high-speed polarity detection by leveraging a narrow magnetization curve and small shunt current.

Benefits of technology

The solution achieves extremely low loss and high-speed detection of current polarity, enhancing efficiency and noise immunity, allowing operation at higher frequencies.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a zero current sensor having an extremely small loss and capable of detecting the polarity of a current at a high speed.SOLUTION: A zero current sensor 1 for detecting a timing when a current flowing through a current path CP becomes zero includes a saturable inductor Lsat connected on the current path CP, and a transformer T having a primary winding Np connected in parallel with the saturable inductor Lsat. The zero current sensor 1 includes an output circuit 10 that is connected to a secondary winding Ns of a transformer T and outputs an induced current of the secondary winding Ns as a detection signal Vsen. The output circuit 10 outputs a positive pulse or a negative pulse corresponding to the direction of the induced current of the secondary winding Ns as the detection signal Vsen.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present invention relates to a zero current sensor for detecting zero current and a power supply circuit. [Background technology]

[0002] In power supply circuits such as discontinuous current converters, a zero current detection sensor is used to determine current discontinuities. As shown in Figure 8, the zero current detection sensor detects the voltage drop caused by the current flowing through Rshant, which is placed in the current path. In the boost circuit shown in Figure 8(a), when Q2 is on, the sensor detects the moment when the Q2 current becomes negative, such as L → Vin → Rshant → Co → Q2 → L.

[0003] It has also been proposed to use a coupling transformer Lsatcoup with a saturable core to detect zero current (see, for example, Patent Document 1). FIG. 9 shows an example of a power factor correction circuit incorporating a coupling transformer Lsatcoup with a saturable core. Referring to FIG. 10(a), when the primary current flowing through the primary side Lsatcoup_p of the coupling transformer Lsatcoup changes between -lsat and +lsat, the L value (magnetic flux density B) of the primary side Lsatcoup_p changes, generating an induced voltage in the secondary side Lsatcoup_s. The induced voltage becomes positive or negative depending on whether the primary current increases or decreases, and the induced voltage pulse can be used as a zero current detection signal. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Swiss Patent No. 701847 Summary of the Invention [Problem to be solved by the invention]

[0005] However, the detection resistor Rshant needed to have low resistance to maintain high efficiency, and was prone to malfunction due to the effects of noise. This required the installation of a filter to remove noise, which limited the ability to operate at high frequencies. Furthermore, the power factor correction circuit and inverter shown in Figure 8(b) often have a current detector installed in the AC line, which also required isolation from the AC line.

[0006] The coupled transformer Lsatcoup with a saturable core has hysteresis characteristics with a large squareness ratio, as shown in Figure 10(b), even though it is a saturable core. As a result, the magnetization of the saturable core swings between +Isat and -Isat, tracing the core curve shown in Figure 5, resulting in large iron loss and a plateau in efficiency improvement. The symbols a to i shown in Figure 10(a) and (b) indicate that the primary current and the magnetization curve are relative to each other. As shown in Figure 10(b), the magnetization pattern traces the outer edge of the magnetization curve. The energy of the secondary side Lsatcoup_s is extremely small, but the L value is large, so large iron loss occurs and efficiency improvement plateaus.

[0007] One aspect of the present invention provides a zero current sensor and a power supply circuit that can detect the polarity of a current at high speed with extremely low loss. [Means for solving the problem]

[0008] A zero current sensor according to one aspect of the present invention is a zero current sensor that detects when a current flowing through a current path becomes zero, and includes a saturable inductor connected to the current path, and a transformer having a primary winding connected in parallel to the saturable inductor. [Effects of the Invention]

[0009] According to one aspect of the present invention, the iron loss in the saturable inductor Lsat can be made very small, so that the loss is extremely small and the polarity of the current can be detected at high speed. [Brief explanation of the drawings]

[0010] [Figure 1]1 is a diagram showing a circuit configuration of an embodiment of a power supply circuit equipped with a zero current sensor; [Figure 2] FIG. 2 is a diagram illustrating a configuration of an output circuit. [Figure 3] 1A and 1B are diagrams illustrating the operation of a saturable inductor. [Figure 4] 4A to 4C are waveform diagrams of the various parts of the zero current sensor. [Figure 5] 1 is a diagram showing the magnetization curve of a saturable inductor. [Figure 6] FIG. 10 is a diagram showing another example of the configuration of the output circuit. [Figure 7] FIG. 10 is a diagram showing another power supply circuit equipped with a zero current sensor. [Figure 8] FIG. 1 is a diagram showing the configuration of a conventional zero current sensor using a detection resistor. [Figure 9] FIG. 1 is a diagram showing the configuration of a conventional zero current sensor using a coupled transformer with a saturable core. [Figure 10] FIG. 1 illustrates the operation of a coupled transformer with a saturable core. DETAILED DESCRIPTION OF THE INVENTION

[0011] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In the following, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following embodiments, components having similar functions will be given the same reference numerals and descriptions thereof will be omitted as appropriate.

[0012] The zero current sensor 1 of this embodiment is a sensor that detects the timing when the current flowing through the current path CP becomes zero. Referring to Fig. 1, the zero current sensor 1 includes a saturable inductor Lsat, a transformer T, and an output circuit 10, and is mounted, for example, on a totem-pole PFC power supply circuit. In the example of the power supply circuit shown in Fig. 1, a current sensor CS for feedback control is separately provided.

[0013] The saturable inductor Lsat is connected in series with the inductor L on the current path CP. The saturable inductor Lsat has a large difference in inductance between the unsaturated and saturated states, and this change is also steep. The saturable inductor Lsat is configured by winding one or more turns around a toroidal or bead-shaped core. In other words, the wire that carries the current can simply be passed through it, or it can be wound several times.

[0014] The transformer T has a primary winding Np connected in parallel with the saturable inductor Lsat. The transformer T transfers the current shunted from the unsaturated saturable inductor Lsat from the primary winding Np to the secondary winding Ns.

[0015] The output circuit 10 is connected to the secondary winding Ns of the transformer T and outputs the induced current in the secondary winding Ns as a detection signal Vsen. The detection signal Vsen outputs a positive pulse or a negative pulse depending on the direction of the induced current. Referring to FIG. 2, the output circuit 10 includes voltage-dividing resistors R1 and R2, a capacitor C1, and a current-limiting resistor R3 connected in series between a voltage Vcc and a common voltage. One end of the secondary winding Ns is connected to the common voltage, and the other end is connected to the junction of the voltage-dividing resistors R1 and R2 via the capacitor C1 and the current-limiting resistor R3. The output circuit 10 outputs the voltage at the junction of the voltage-dividing resistors R1 and R2 as a detection signal Vsen.

[0016] The saturable inductor Lsat is in a non-saturated state when the current flowing through it is between -Isat and +Isat, and is in a saturated state when the current flowing through it is below -Isat or above +Isat. In the non-saturated state, the saturable inductor Lsat has an inductance that is much larger than its saturated inductance.

[0017] In the saturated state, the saturable inductor Lsat can be considered as being connected as shown in Figure 3(a). Therefore, the inductor current I L When is less than -Isat or more than +Isat, the current I flows through the saturated inductor Lsat as shown in Figure 4. Lsatbecomes dominant.

[0018] In the non-saturated state, the saturable inductor Lsat can be regarded as being in a disconnected state, as shown in Figure 3(b). Therefore, the inductor current I L is within the range of -Isat to +Isat, the shunt current I to the transformer T is T As a result, there is no need to maintain the magnetization, and the magnetization curve of the saturable inductor Lsat is narrow (small squareness ratio) as shown in Figure 5, and iron loss is very small. At this time, the inductance of the saturable inductor Lsat becomes large, but the inductor current I L is close to zero, the energy of the saturable inductor Lsat (Li 2 / 2) is extremely small. The shunt current I to the transformer T T is also very small, the transformer T can be made very small, the area of ​​the magnetization curve of the transformer T becomes very small, and the iron loss becomes very small.

[0019] The output circuit 10 is connected by a capacitor C1 between the secondary winding Ns of the transformer T and the circuit biased by the voltage Vcc and the voltage dividing resistors R1 and R2, so that the current I Lsat The current limiting resistor R3 may be omitted. The detection signal Vsen output from the output circuit 10 is compared with the threshold values ​​Vth1 and Vth2 as shown in FIG. L You can see the direction.

[0020] The zero current sensor 1 is advantageous in that it can obtain a signal with a magnitude that makes it easier to detect the voltage Vsat across the saturable inductor Lsat as the current to be detected becomes higher in frequency. L→H In this case, the voltage Vsat at both ends is Lsat L→HEven if the current i itself is small, di / dt increases with increasing frequency, so the voltage Vsat across the saturable inductor Lsat becomes a large signal that is easy to detect.

[0021] When the frequency of the current to be detected is low, di / dt also becomes small, so in order to increase the L value of the saturable inductor Lsat, it is advisable to increase the number of turns in the saturable core or change to a core material with higher magnetic permeability.

[0022] In the zero current sensor 1a shown in FIG. 6, an output circuit 10a is connected to a secondary winding Ns of a transformer T. The output circuit 10a includes an NPN transistor Q10, a PNP transistor Q11, diodes D1 to D4, a capacitor C1, and a current-limiting resistor R3. The NPN transistor Q10 and the PNP transistor Q11 are connected in series between a voltage Vcc and a common voltage. One end of the secondary winding Ns is connected to a connection point between the emitter of the NPN transistor Q10 and the emitter of the PNP transistor Q11. The other end of the secondary winding Ns is connected to one end of a current-limiting resistor R3 via a capacitor C1. The other end of the current-limiting resistor R3 is connected to the collector of the NPN transistor Q10 via a diode D1 and to the base of the NPN transistor Q10 via a diode D2. The NPN transistor Q10 and the diodes D1 and D2 form a first buffer (first Baker clamp) circuit, which clamps the level of a positive pulse. The base of the PNP transistor Q11 is connected via a diode D2, and the collector is connected via a diode D4 to the other end of the current-limiting resistor R3. The PNP transistor Q11 and diodes D3 and D4 form a second buffer (second Baker clamp) circuit, which clamps the level of the negative pulse. The voltage at the connection point between the emitter of the NPN transistor Q10 and the emitter of the PNP transistor Q11 is output as a detection signal Vsen. The first buffer circuit and second buffer circuit allow the output circuit 10a to lower its output impedance, support higher frequencies, and improve noise immunity.

[0023] FIG. 7(a) shows a configuration example in which the zero current sensor 1 is applied to an inverter, which is a power supply circuit. The inverter shown in FIG. 7(a) is a half-bridge type discontinuous current inverter, but it may also be a full-bridge type or a multi-level type. The inverter circuit system may be changed without departing from the spirit of the present invention.

[0024] Figure 7(b) shows an example of a configuration in which the zero current sensor 1 is applied to a charge / discharge circuit of a storage battery, which is a power supply circuit. The zero current sensor 1 can quickly detect the current direction, so it can quickly detect the polarity of the charge / discharge current. The zero current sensor 1 can also be applied to abnormality detection. The charge / discharge circuit may be a converter, inverter, insulated, or non-insulated. The destination connected to the storage battery via the charge / discharge circuit may be DC, a grid, or a storage battery.

[0025] (summary) (1) The zero current sensor 1 according to each embodiment of the present invention detects the current (inductor current I L The zero current sensor 1 detects the timing when the current path CP becomes zero, and includes a saturable inductor Lsat connected on the current path CP, and a transformer T having a primary winding Np connected in parallel to the saturable inductor Lsat.

[0026] According to the zero current sensor 1 described in (1) above, the iron loss in the saturable inductor Lsat can be made very small, so that the loss is extremely small and the polarity of the current can be detected at high speed. In other words, the zero current sensor 1 can be provided as a lossless sensor with a significant reduction in loss. Furthermore, since the zero current sensor 1 uses the transformer T, it can also have an insulating function. The shunt current I to the transformer T T is very small, the transformer T can be made very small, and the iron loss of the transformer T becomes very small.

[0027] (2) The zero current sensor 1 described in (1) above may include an output circuit 10 connected to the secondary winding Ns of the transformer T and outputting the induced current of the secondary winding Ns as a detection signal Vsen.

[0028] According to the zero current sensor 1 described in (2) above, it is possible to obtain a detection signal Vsen of an appropriate magnitude.

[0029] (3) In the zero current sensor 1 described in (2) above, the output circuit 10 may output a positive pulse or a negative pulse as the detection signal Vsen according to the direction of the induced current in the secondary winding Ns.

[0030] According to the zero current sensor 1 described above in (3), the current flowing through the current path CP (inductor current I L ) orientation can be detected.

[0031] (4) In the zero current sensor 1 described in (3) above, the output circuit 10a may include a first buffer circuit that clamps the level of a positive pulse and a second buffer circuit that clamps the level of a negative pulse.

[0032] According to the zero current sensor 1 described in (4) above, the output impedance can be reduced, it is possible to cope with higher frequencies, and it is possible to improve noise resistance.

[0033] (5) A power supply circuit equipped with the zero current sensor 1 according to any one of (1) to (4) above.

[0034] According to the power supply circuit described above in (5), the current flowing through the current path CP (inductor current I L ) becomes zero can be detected quickly and accurately.

[0035] Although the present invention has been described above with reference to specific embodiments, it goes without saying that the above embodiments are merely examples and can be modified and implemented without departing from the spirit of the present invention. [Explanation of symbols]

[0036] 1, 1a zero current sensor 10, 10a output circuit B: Magnetic flux density C1 capacitor CP current path D1~D4 Diodes L inductor Lsatcoup_p: Primary side Lsatcoup_s: Secondary side Lsat saturable inductor Np: Primary winding Ns: Secondary winding Q10 NPN transistor Q11 PNP transistor R1, R2 voltage dividing resistors R3 Current limiting resistor T transformer

Claims

1. A zero current sensor that detects when a current flowing through a current path becomes zero, a saturable inductor connected on the current path; a transformer having a primary winding connected in parallel with the saturable inductor.

2. 2. The zero current sensor according to claim 1, further comprising an output circuit connected to a secondary winding of the transformer and outputting an induced current in the secondary winding as a detection signal.

3. 3. The zero current sensor according to claim 2, wherein the output circuit outputs a positive pulse or a negative pulse as the detection signal according to the direction of the induced current in the secondary winding.

4. 4. The zero current sensor according to claim 3, wherein the output circuit comprises a first buffer circuit that clamps the level of the positive pulse and a second buffer circuit that clamps the level of the negative pulse.

5. A power supply circuit equipped with the zero current sensor according to claim 1 or 2.

Citation Information

Patent Citations

  • Method for controlling active converter circuit in power electronic system, involves determining two time periods, and deactivating bidirectional conductive switches after detection of zero-crossing of current

    CH701847A2