Method for evaluating resin-cured layer

Abstract

To provide an evaluation method of a resin cured layer capable of accurately and easily evaluating the flux resistance of the resin cured layer in a state close to a structure used in an actual semiconductor package.SOLUTION: The method for evaluating a cured resin layer includes an applying step of applying the flux 11 to the metal pad layer 4 and at least the periphery of the metal pad layer 4 in the cured resin layer 3 in the evaluation structure 1, a forming step of disposing the solder ball 13 on the metal pad layer 4 to which the flux 11 is applied and forming the solder layer 5 on the metal pad layer 4 by heating the evaluation structure 1 including the solder ball 13, and an observing step of observing the presence or absence of the crack K in the cured resin layer 3 after the solder layer 5 is formed.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a method for evaluating a cured resin layer. [Background technology]

[0002] In recent years, with the miniaturization of electronic devices, there has been an increasing need for smaller and more highly integrated semiconductor packages to be mounted on electronic devices. Packaging technologies being considered for use in manufacturing semiconductor packages include FOWLP (Fan-Out Wafer Level Packaging), which provides solder balls directly to a semiconductor chip via a re-distribution layer (RDL) without using a circuit board (see, for example, Patent Document 1).

[0003] An evaluation structure called a TEG (Test Element Group) is used to evaluate the reliability of semiconductor packages and materials used in semiconductor packages. The evaluation structure is a structure that mimics the structure of an actual semiconductor package. The evaluation structure is configured by providing a substrate such as a glass wafer with a resin cured layer used as a rewiring layer, a metal pad layer, a solder layer, and the like. A metal wiring layer that mimics the pattern used in an actual semiconductor package is arranged on the resin cured layer (see, for example, Patent Document 2). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] International Publication No. WO2020 / 105485 [Patent Document 2] Patent Publication No. 2021-189403 Summary of the Invention [Problem to be solved by the invention]

[0005] Evaluation items for the cured resin layer may include resistance to flux used in forming the solder layer. Conventionally, the flux resistance of the cured resin layer has mainly been evaluated for the cured resin layer alone. However, from the viewpoint of reliability evaluation of semiconductor packages, it is desirable to be able to accurately and easily evaluate the flux resistance of the cured resin layer in a state close to the structure used in actual semiconductor packages.

[0006] The present disclosure has been made to solve the above-mentioned problems, and aims to provide a method for evaluating a resin-cured layer that can accurately and easily evaluate the flux resistance of the resin-cured layer in a state similar to a structure used in an actual semiconductor package. [Means for solving the problem]

[0007] The gist of the present disclosure is as follows.

[0008] [1] A method for evaluating a resin-cured layer, comprising: a preparation step of preparing an evaluation structure including a substrate, a resin-cured layer disposed on the substrate and having a metal wiring layer therein, and a metal pad layer disposed on the resin-cured layer; an application step of applying flux to the metal pad layer and at least the periphery of the metal pad layer in the resin-cured layer in the evaluation structure; a formation step of disposing a solder material on the metal pad layer to which the flux has been applied, and forming a solder layer on the metal pad layer by heating the evaluation structure including the solder material; and an observation step of observing whether or not cracks have occurred in the resin-cured layer after the solder layer has been formed.

[0009] In this method for evaluating a cured resin layer, during the process of forming a solder layer on a metal pad layer of an evaluation structure similar to the structure used in an actual semiconductor package, flux is applied to the metal pad layer and at least the periphery of the metal pad layer in the cured resin layer. The application of flux and heating of the evaluation structure containing the solder material cause the cured resin layer to deteriorate, weakening it and potentially causing cracks in the cured resin layer due to stress caused by warpage of the substrate. Therefore, by observing whether or not cracks occur in the cured resin layer, the flux resistance of the cured resin layer can be evaluated accurately and simply.

[0010] [2] In the method for evaluating a resin-cured layer according to [1], the flux is applied to the entire surface of the resin-cured layer in the application step. This allows the deterioration of the resin-cured layer to progress more sufficiently by applying the flux and heating the evaluation structure containing the solder material. Therefore, the flux resistance of the resin-cured layer can be evaluated more accurately.

[0011] [3] The method for evaluating a cured resin layer according to [1] or [2], wherein the forming step uses solder balls as the solder material. In this case, by mounting the solder balls on the metal pad layer, stress from the solder balls can be applied to the cured resin layer in addition to stress caused by warpage of the substrate, etc. Therefore, the flux resistance of the cured resin layer can be evaluated more accurately.

[0012] [4] The method for evaluating a resin-cured layer according to any one of [1] to [3], further comprising a step of removing the flux between the forming step and the observing step. In this case, by removing the flux before observing the resin-cured layer, it is possible to suitably observe whether or not cracks have occurred in the resin-cured layer.

[0013] [5] The method for evaluating a resin-cured layer according to any one of [1] to [4], wherein the observation step uses a field emission scanning electron microscope to observe whether or not cracks have occurred in the resin-cured layer. In this case, the presence or absence of cracks in the resin-cured layer can be observed with higher accuracy. [Effects of the Invention]

[0014] According to the present disclosure, it is possible to accurately and easily evaluate the flux resistance of a cured resin layer in a state close to the structure used in an actual semiconductor package. [Brief explanation of the drawings]

[0015] [Figure 1] 1 is a flowchart illustrating a method for evaluating a resin-cured layer according to an embodiment of the present disclosure. [Figure 2] 10A to 10C are schematic cross-sectional views showing a preparation step. [Figure 3] FIG. 1(a) is a schematic cross-sectional view showing a coating step, and FIG. 1(b) is a schematic cross-sectional view showing a forming step. [Figure 4] 3(a) is a schematic cross-sectional view showing a step subsequent to FIG. 3(b), and FIG. 3(b) is a schematic cross-sectional view showing a removal step. [Figure 5] 10(a) and 10(b) are schematic cross-sectional views showing the observation step. [Figure 6] FIG. 10 is a diagram showing the observation results of a resin-cured layer according to an example. [Figure 7] FIG. 10 is a diagram showing the observation results of a resin-cured layer according to a comparative example. DETAILED DESCRIPTION OF THE INVENTION

[0016] Hereinafter, a preferred embodiment of a method for evaluating a resin-cured layer according to one aspect of the present disclosure will be described in detail with reference to the drawings.

[0017] 1 is a flowchart illustrating a method for evaluating a resin-cured layer according to an embodiment of the present disclosure. The method for evaluating a resin-cured layer illustrated in FIG. 1 is an evaluation method used, for example, to evaluate the reliability of a FOWLP-type semiconductor package in which solder balls are directly provided on a semiconductor chip via a rewiring layer. This method for evaluating a resin-cured layer uses an evaluation structure 1 fabricated to simulate the structure of an actual semiconductor package, and evaluates the flux resistance of a resin material used as a rewiring layer during the fabrication process.

[0018] As shown in FIG. 1, this method for evaluating a cured resin layer includes a preparation step S01, an application step S02, a formation step S03, a removal step S04, and an observation step S05.

[0019] The preparation step S01 is a step of preparing an evaluation structure 1. As shown in FIG. 2, the evaluation structure 1 is configured to include a substrate 2, a cured resin layer 3, and a metal pad layer 4. The substrate 2 is the base of the evaluation structure 1. For example, the substrate 2 can be a glass substrate, a silicon substrate, a resin substrate, a metal thin film substrate, a laminate, a copper-clad laminate, a silicon wafer whose surface has been modified with silicon dioxide, or a substrate whose surface has a metal thin film of copper or the like formed by sputtering or the like. In this embodiment, the substrate 2 is configured as a glass substrate. The thickness of the substrate 2 is, for example, approximately 0.1 mm to 2.0 mm. By setting the thickness of the substrate 2 to 0.1 mm or more, the handleability of the evaluation structure 1 can be sufficiently ensured. By setting the thickness of the substrate 2 to 2.0 mm or less, the manufacturing cost of the evaluation structure 1 can be reduced.

[0020] The resin-cured layer 3 is a layer having a metal wiring layer 6 therein. The resin-cured layer 3 may be formed on one surface of the substrate 2 by applying and curing a resin material. The resin-cured layer 3 may be formed, for example, by spin-coating a resin material, or may be formed on one surface of the substrate 2 by laminating a film formed from a resin material. A first resin-cured layer may be formed on one surface of the substrate 2, a metal wiring layer 6 may be formed on one surface of the first resin-cured layer, and then a second resin-cured layer may be formed so that the metal wiring layer 6 is buried, thereby forming an integrated resin-cured layer 3 having the metal wiring layer 6 therein.

[0021] The resin material constituting the resin-cured layer 3 is not particularly limited, and examples thereof include photosensitive or non-photosensitive resin materials having electrical insulation properties. The resin material may be either a thermoplastic resin material or a thermosetting resin material. Examples of the resin material include materials containing polyimide, acrylic, polybenzoxazole, phenol novolac, and polyhydroxystyrene. The thickness of the resin-cured layer 3 may be 0.4 μm to 200 μm, 4 μm to 80 μm, or 8 μm to 40 μm. By setting the thickness of the resin-cured layer 3 to 0.4 μm or more, defects in the resin-cured layer 3 can be suppressed. By setting the thickness of the resin-cured layer 3 to 200 μm or less, variations in the thickness of the resin-cured layer 3 can be suppressed. Note that the resin-cured layer in this embodiment refers to a resin layer that contains a resin material and can have metal wiring therein. The cured resin layer may be a layer containing a cured product of a curable resin composition. The cured product of the curable resin composition may include both a completely cured product and a partially cured product (a product in which part of the composition remains uncured).

[0022] Considering the degree of stress applied when heating the evaluation structure 1 including the solder material 12 described below, the difference in average thermal expansion coefficient between the substrate 2 and the resin-cured layer 3 at 373 K to 423 K may be 10 ppm / K or more. The difference in average thermal expansion coefficient between the substrate 2 and the resin-cured layer 3 at 373 K to 423 K may be 100 ppm / K or more, or may be 200 ppm / K or more. By providing a sufficient difference in average thermal expansion coefficient between the substrate 2 and the resin-cured layer 3, it becomes possible to sufficiently apply stress caused by warping of the substrate 2 to the resin-cured layer 3 when heating the evaluation structure 1 including the solder material 12 described below.

[0023] The metal wiring layer 6 is a layer that imitates the pattern of the metal wiring layer in an actual semiconductor package. The metal wiring layer 6 is formed by, for example, electrolytic plating. Other methods for forming the metal wiring layer 6 include a method using a metal thin film and a method using a metal paste. Examples of materials for forming the metal wiring layer 6 include copper, silver, gold, and aluminum. The pattern of the metal wiring layer 6 is a simplification of the pattern of the metal wiring layer in an actual semiconductor package. In this embodiment, a single-layer metal wiring layer 6 is disposed inside the resin-cured layer 3. The thickness of the metal wiring layer 6 may be, for example, 0.1 μm to 50 μm, 1 μm to 20 μm, or 2 μm to 10 μm. The planar shape of the metal wiring layer 6 is circular.

[0024] In this embodiment, no via is provided between the metal wiring layer 6 and the metal pad layer 4 to electrically connect the metal wiring layer 6 and the metal pad layer 4, and the entire surface of the metal wiring layer 6 is surrounded by the resin-cured layer 3. In this embodiment, the metal wiring layer 6 is located closer to the metal pad layer 4 in the thickness direction of the resin-cured layer 3. In the example of FIG. 2, the center of the metal wiring layer 6 in the thickness direction is located closer to the metal pad layer 4 than the center of the resin-cured layer 3 in the thickness direction.

[0025] The metal pad layer 4 is a layer that imitates the pattern of a metal pad layer in an actual semiconductor package. The metal pad layer 4 is formed by, for example, electrolytic plating. Other methods for forming the metal pad layer 4 include a method using a metal thin film and a method using a metal paste. Examples of materials for forming the metal pad layer 4 include copper, silver, gold, and aluminum. The pattern of the metal pad layer 4 is a simplification of the pattern of a metal pad layer in an actual semiconductor package. In this embodiment, the metal pad layer 4 is disposed on one surface of the resin-cured layer 3 so as to face the metal wiring layer 6 in the thickness direction of the resin-cured layer 3. The thickness of the metal pad layer 4 may be, for example, 0.1 μm to 50 μm, 1 μm to 20 μm, or 2 μm to 10 μm. The planar shape of the metal pad layer 4 is circular.

[0026] The above-mentioned metal wiring layer 6 is arranged so as to overlap the metal pad layer 4 and protrude outward beyond the metal pad layer 4 when viewed from the thickness direction of the resin-cured layer 3. In this embodiment, the planar shape of the metal pad layer 4 is one size smaller than the planar shape of the metal wiring layer 6. Furthermore, the metal pad layer 4 is arranged concentrically with the metal wiring layer 6 when viewed from the thickness direction of the resin-cured layer 3. As a result, when viewed from the thickness direction of the resin-cured layer 3, the entire metal pad layer 4 overlaps the metal wiring layer 6, and the entire peripheral portion of the metal wiring layer 6 protrudes outward beyond the metal pad layer 4.

[0027] The preparation step S01 may include a singulation step, in which the structure is singulated to obtain a plurality of evaluation structures 1. In the singulation step, the substrate 2 and the cured resin layer 3 are diced using, for example, a blade or laser light so that a set of the metal wiring layer 6 and the metal pad layer 4 forms a unit, thereby forming a plurality of evaluation structures 1 each having at least one unit.

[0028] The application step S02 is a step of applying a flux 11. In the application step S02, the flux 11 is applied to the metal pad layer 4 and at least the periphery of the metal pad layer 4 in the resin-cured layer 3 of the evaluation structure 1. In this embodiment, as shown in FIG. 3(a), the flux 11 is applied to the entire surface of the metal pad layer 4 and the entire surface of the resin-cured layer 3. Fluxes commonly used in solder bonding can be used. Examples of such fluxes include zinc chloride, a mixture of zinc chloride and an inorganic halide, a mixture of zinc chloride and an inorganic acid, a molten salt, phosphoric acid, a phosphoric acid derivative, an organic halide, hydrazine, an organic acid, an amine, and rosin. A single flux may be used, or two or more fluxes may be used in combination.

[0029] The forming step S03 is a step of forming a solder layer 5 on the metal pad layer 4. In the forming step S03, first, as shown in FIG. 3(b), a solder material 12 is placed on the metal pad layer 4 to which the flux 11 has been applied. The form of the solder material 12 is not particularly limited, but examples thereof include solder paste and solder balls. In this embodiment, solder balls 13 are used as the solder material 12. By applying the flux 11 to the metal pad layer 4 in advance, the oxide film on the surface of the metal pad layer 4 is reduced and misalignment of the solder balls 13 when they are mounted on the metal pad layer 4 can be prevented. After the solder balls 13 are mounted on the metal pad layer 4, a heating step is performed at a temperature equal to or higher than the melting temperature of the solder balls 13 (for example, a maximum temperature of approximately 260°C), thereby forming the solder layer 5 on the entire surface of the metal pad layer 4 as shown in FIG. 4(a). Examples of heating methods for the evaluation structure 1 including the solder material 12 in the heating step include reflow heating, heating on a hot plate, and heating in an oven.

[0030] The removal step S04 is a step of removing the flux 11. In the removal step S04, as shown in FIG. 4(b), the flux 11 remaining on the resin-cured layer 3 and the metal pad layer 4 is removed. Flux can be removed by a common flux cleaning method such as spraying, ultrasonic waves, or jetting. Fluids used for cleaning can be, for example, water or a flux cleaning solution. Note that the removal step S04 may be omitted and the observation step S05 may be performed.

[0031] The observation step S05 is a step for observing whether or not cracks K have occurred in the resin-cured layer 3. When the evaluation structure 1 containing the solder material 12 is heated in the formation step S03, the resin-cured layer 3 containing the flux 11 swells due to the heat. That is, the flux 11 penetrates into the resin-cured layer 3, causing deterioration of the resin-cured layer 3. As the resin-cured layer 3 deteriorates, it becomes brittle, which can cause cracks K to occur in the resin-cured layer 3 due to stress caused by warpage of the substrate 2. Therefore, if the resin-cured layer 3 has sufficient flux resistance, cracks K will not occur in the resin-cured layer 3 at the time of the observation step S05. However, if the resin-cured layer 3 has insufficient flux resistance, cracks K will occur in the resin-cured layer 3 at the time of the observation step S05. Therefore, by observing whether or not cracks K have occurred in the resin-cured layer 3 after the formation step S03, the flux resistance of the resin-cured layer 3 can be evaluated.

[0032] If the resin-cured layer 3 has insufficient flux resistance, a crack K may occur in the resin-cured layer 3 between the metal wiring layer 6 and the metal pad layer 4, as shown in FIG. 5( a), for example. The crack K starts from the peripheral portion of the metal pad layer 4, where stress tends to concentrate, and progresses toward the metal wiring layer 6. A general microscope or a scanning electron microscope (SEM) is used to observe the resin-cured layer 3. In this embodiment, a field emission scanning electron microscope (FE-SEM), which is a type of scanning electron microscope, is used.

[0033] 5(b), the solder layer 5 and the metal pad layer 4 may be polished to expose the resin-cured layer 3 below the metal pad layer 4. To check whether or not cracks K have occurred, the evaluation structure 1 may be polished so that at least the cross section of the resin-cured layer 3 in the thickness direction is exposed.

[0034] As described above, in this method for evaluating a resin-cured layer, during the process of forming a solder layer 5 on the metal pad layer 4 of the evaluation structure 1, which is similar to the structure used in an actual semiconductor package, flux 11 is applied to the metal pad layer 4 and at least the periphery of the metal pad layer 4 in the resin-cured layer 3. The application of the flux 11 and heating of the evaluation structure 1, which includes the solder material 12, causes deterioration of the resin-cured layer 3, making the resin-cured layer 3 brittle. As a result, cracks K may occur in the resin-cured layer 3 due to stress caused by warpage of the substrate 2, etc. Therefore, by observing whether or not cracks K occur in the resin-cured layer 3, the flux resistance of the resin-cured layer 3 can be evaluated accurately and simply.

[0035] In this embodiment, in the application step S02, the flux 11 is applied to the entire surface of the resin-cured layer 3. This allows the application of the flux 11 and the heating of the evaluation structure 1 including the solder material 12 to more fully promote the deterioration of the resin-cured layer 3. Therefore, the flux resistance evaluation of the resin-cured layer 3 can be performed with higher accuracy.

[0036] In this embodiment, in the forming step S03, solder balls 13 are used as the solder material 12. In this case, in addition to stress caused by warpage of the substrate 2, stress caused by the solder balls 13 can be applied to the resin-cured layer 3. Therefore, the flux resistance of the resin-cured layer 3 can be evaluated more accurately.

[0037] In this embodiment, between the forming step S03 and the observing step S05, a removing step S04 for removing the flux 11 is further provided. In this case, by removing the flux 11 before observing the resin-cured layer 3, it is possible to preferably observe whether or not cracks K have occurred in the resin-cured layer 3.

[0038] In the present embodiment, in the observation step S05, a field emission scanning electron microscope is used to observe whether or not cracks K have occurred in the resin-cured layer 3. By using a field emission scanning electron microscope, the presence or absence of cracks K in the resin-cured layer 3 can be observed with higher accuracy.

[0039] In the evaluation structure 1 used in the above-mentioned method for evaluating a resin cured layer, for example, in the above embodiment, the planar shape of the metal wiring layer 6 is slightly larger than the planar shape of the metal pad layer 4, but the planar shape of the metal wiring layer 6 may be the same as the planar shape of the metal pad layer 4.

[0040] Furthermore, in the above embodiment, the planar shape of the metal pad layer 4 in the evaluation structure 1 is circular, but the planar shape of the metal pad layer 4 may have corners. The corners may be located at any position in the planar shape of the metal pad layer 4. The number of corners may be either single or multiple. When corners are present, the planar shape of the metal pad layer 4 may be rectangular or other polygonal, or elliptical with pointed ends in the long axis direction. [Example]

[0041] Hereinafter, examples of the present disclosure will be described.

[0042] In this example, multiple samples of evaluation structures were fabricated using different types of resin material and flux for the resin-cured layer. A solder material was mounted on a metal pad layer coated with flux, and the evaluation structures containing the solder material were heated and then observed for cracks in the resin-cured layer. The evaluation structures containing the solder material were heated by reflow, and solder balls were used as the solder material, for example.

[0043] The resin materials of the resin cured layer were three different types, Material 1, Material 2, and Material 3, and the flux was two different types, Material A and Material B. In Example 1, the resin cured layer was made of Material 3 and the flux was Material A, and in Example 2, the resin cured layer was made of Material 2 and the flux was Material A. In Example 3, the resin cured layer was made of Material 1 and the flux was Material A, and in Example 4, the resin cured layer was made of Material 3 and the flux was Material B. Cracks were observed using an FE-SEM and a microscope (a general optical microscope).

[0044] FIG. 6 shows the results of observation of the resin-cured layer in the examples. Here, the crack occurrence rate was used as an index. The crack occurrence rate is the percentage of pairs of metal wiring layers and metal pad layers included in the evaluation structure in which cracks originating around the periphery of the metal pad layer occurred in the resin-cured layer. As shown in FIG. 6 , the crack occurrence rates observed using FE-SEM in Examples 1 to 3 were 73%, 3%, and 0%, respectively. These results confirmed that using FE-SEM for crack observation allows for accurate evaluation of the flux resistance between Materials 1 to 3. Furthermore, the crack occurrence rates observed using a general optical microscope in Examples 1 to 3 were 48%, 0%, and 0%, respectively. These results confirmed that the flux resistance between Material 3 and Materials 1 and 2 can also be evaluated using crack observation using a general optical microscope.

[0045] Comparing Example 1 and Example 4, which use the same resin material for the resin-cured layer but different flux materials, it is clear that there is a significant difference in the crack occurrence rate when cracks are observed using both FE-SEM and a general optical microscope. This result confirms that it is possible to evaluate the flux resistance of the resin-cured layer even when the flux materials are different.

[0046] In this example, reflow was performed without placing a solder material on the flux-coated metal pad layer, and the presence or absence of cracks in the resin-cured layer after reflow was observed as a comparative example. In comparative example 1, the resin-cured layer was made of material 3 and the flux was made of material A, and in comparative example 2, the resin-cured layer was made of material 1 and the flux was made of material A.

[0047] Fig. 7 shows the observation results of the resin-cured layer in the comparative example. As shown in Fig. 7, in the comparative examples 1 and 2, the crack occurrence rate was 0% in both the case where FE-SEM and the case where a general optical microscope were used for crack observation. From this result, it was confirmed that heating with a solder material mounted on the metal pad layer is effective in improving the accuracy of the evaluation of the flux resistance of the resin-cured layer. [Explanation of symbols]

[0048] 1...Evaluation structure, 2...Substrate, 3...Resin cured layer, 4...Metal pad layer, 5...Solder layer, 11...Flux, 12...Solder material, 13...Solder ball, K...Crack.

Claims

1. a preparation step of preparing an evaluation structure including a substrate, a resin-cured layer disposed on the substrate and having a metal wiring layer therein, and a metal pad layer disposed on the resin-cured layer; a coating step of coating the metal pad layer and at least a periphery of the metal pad layer in the cured resin layer in the evaluation structure; a forming step of disposing a solder material on the metal pad layer to which the flux has been applied, and forming a solder layer on the metal pad layer by heating the evaluation structure including the solder material; an observation step of observing whether or not cracks occur in the cured resin layer after the solder layer is formed.

2. The method for evaluating a cured resin layer according to claim 1 , wherein the flux is applied to the entire surface of the cured resin layer in the applying step.

3. 2. The method for evaluating a cured resin layer according to claim 1, wherein the forming step uses a solder ball as the solder material.

4. The method for evaluating a cured resin layer according to claim 1 , further comprising a step of removing the flux between the forming step and the observing step.

5. 5. The method for evaluating a cured layer according to claim 1, wherein the observation step uses a field emission scanning electron microscope to observe whether or not cracks have occurred in the cured resin layer.

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