Method of manufacturing semiconductor device

By preparing and bonding silicon carbide substrates with uniform thickness and grinding the interface, the method simplifies semiconductor manufacturing and enhances device reliability by eliminating voids and maintaining consistent equipment settings.

JP2026030962APending Publication Date: 2026-02-24MITSUBISHI ELECTRIC CORP
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Patent Information

Application Number
JP2024134172
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-08-09
Publication Date
2026-02-24

AI Technical Summary

Technical Problem

Conventional semiconductor manufacturing processes require adjustments to manufacturing equipment due to varying wafer thickness, complicating the process, and the bonding of silicon carbide wafers can introduce voids leading to increased on-resistance and reduced reliability.

Method used

A method involving the preparation of two silicon carbide substrates with uniform thickness, bonding them to form a bonded crystal substrate, forming an epitaxial layer, and grinding the interface to eliminate voids, simplifying the process and ensuring consistent thickness.

Benefits of technology

Simplifies the manufacturing process by maintaining consistent equipment settings and eliminates voids, improving device reliability and reducing the risk of cracks and increased on-resistance.

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Abstract

An object of the present disclosure is to provide a method for manufacturing a semiconductor device capable of simplifying the manufacturing process.SOLUTION: A method of manufacturing a semiconductor device according to the present disclosure includes a preparation step of preparing two crystal substrates each made of silicon carbide and having a constant thickness, a bonding step of bonding the two crystal substrates to form a bonded crystal substrate, an epitaxial growth step of forming an epitaxial layer on a first main surface of the bonded crystal substrate, an element formation step of forming an element on the epitaxial layer, and a grinding step of grinding a second main surface side of the bonded crystal substrate opposite to the first main surface, including an interface at which the two crystal substrates are bonded, after the element formation step.SELECTED DRAWING: Figure 5
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Description

[Technical Field]

[0001] The present disclosure relates to a method for manufacturing a semiconductor device using silicon carbide. [Background technology]

[0002] BACKGROUND ART Conventionally, a technique for manufacturing semiconductor devices by repeatedly using one wafer source has been disclosed (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2022 / 059473 Summary of the Invention [Problem to be solved by the invention]

[0004] Conventional manufacturing equipment for manufacturing semiconductor devices uses wafers with a uniform thickness to manufacture the semiconductor devices.

[0005] In Patent Document 1, a single wafer source is cut and polished using a support member, and this process is repeated to reuse the wafer source, so the thickness of the wafer source changes each time it is used. Therefore, in order to utilize conventional manufacturing equipment, it is necessary to adjust the manufacturing equipment according to the thickness of the wafer source, which causes a problem of complicated manufacturing processes.

[0006] The present disclosure has been made to solve such problems, and has an object to provide a method for manufacturing a semiconductor device that can simplify the manufacturing process. [Means for solving the problem]

[0007] In order to solve the above problems, the method for manufacturing a semiconductor device according to the present disclosure includes a preparation step of preparing two crystal substrates made of silicon carbide, each having a uniform thickness; a bonding step of bonding the two crystal substrates together to form a bonded crystal substrate; an epitaxial growth step of forming an epitaxial layer on a first main surface of the bonded crystal substrate; an element formation step of forming an element on the epitaxial layer; and, after the element formation step, a grinding step of grinding the second main surface side opposite the first main surface of the bonded crystal substrate, including the interface where the two crystal substrates are bonded together. [Effects of the Invention]

[0008] According to the present disclosure, it is possible to simplify the manufacturing process. [Brief explanation of the drawings]

[0009] [Figure 1] 2A to 2C are diagrams for explaining a method for manufacturing a semiconductor device according to the first embodiment. [Figure 2] 2A to 2C are diagrams for explaining a method for manufacturing a semiconductor device according to the first embodiment. [Figure 3] 2A to 2C are diagrams for explaining a method for manufacturing a semiconductor device according to the first embodiment. [Figure 4] 2A to 2C are diagrams for explaining a method for manufacturing a semiconductor device according to the first embodiment. [Figure 5] 2A to 2C are diagrams for explaining a method for manufacturing a semiconductor device according to the first embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] <First Embodiment> In the following, we will explain the case where the wafer thickness required for the device formation process (WP), which is a standard manufacturing process using 6-inch silicon carbide (hereinafter referred to as "SiC") wafers, is 350 μm, and the final chip (semiconductor device) thickness is 100 μm.

[0011] 1 to 5 are diagrams illustrating a method for manufacturing a semiconductor device according to embodiment 1. The semiconductor device according to embodiment 1 is a SiC semiconductor device.

[0012] First, in the preparation step shown in FIG. 1, a SiC single crystal substrate 1 and a SiC polycrystalline substrate 2, each of which has a uniform thickness, are prepared. The thickness of the SiC single crystal substrate 1 is set to "100 μm + α" because the final chip thickness is 100 μm. The thickness of the SiC polycrystalline substrate 2 is set to "250 μm - α" because the wafer thickness required for the device formation process (WP) is 350 μm. Here, "α" is a margin, e.g., 5 to 10 μm, to avoid concerns that the interface where the SiC single crystal substrate 1 and the SiC polycrystalline substrate 2 are bonded together may remain in the semiconductor device due to processing variations in the SiC single crystal substrate 1 and processing variations when reducing the overall wafer thickness to 100 μm after device formation.

[0013] Next, in the bonding step shown in Fig. 2, the SiC single crystal substrate 1 and the SiC polycrystalline substrate 2 are bonded together to form a bonded crystal substrate. In Fig. 2, the thickness of the bonded crystal substrate is 350 µm.

[0014] Next, in the epitaxial growth step shown in FIG. 3, an epitaxial layer 3 is formed on the first main surface of the bonded crystal substrate (on the SiC single crystal substrate 1).

[0015] Next, in the element formation step shown in FIG. 4, an element 4 is formed on the epitaxial layer 3.

[0016] 5, the second main surface side (SiC polycrystalline substrate 2 side) opposite the first main surface of the bonded crystal substrate is ground until the final thickness is 100 μm. At this time, the interface where the SiC single crystal substrate 1 and the SiC polycrystalline substrate 2 are bonded together is also ground. After the grinding step, the wafer contains the SiC single crystal substrate 1, the epitaxial layer 3, and the element 4.

[0017] Thereafter, the ground wafer is subjected to a dicing process to complete the semiconductor device.

[0018] <Effects> In the first embodiment, the thickness of the bonded crystal substrate formed by bonding the SiC single crystal substrate 1 and the SiC polycrystalline substrate 2 is constant (350 μm). Therefore, unlike Patent Document 1, there is no need to adjust the manufacturing equipment in accordance with the thickness of the wafer source, which simplifies the manufacturing process of the semiconductor device.

[0019] When a SiC single crystal substrate 1 and a SiC polycrystalline substrate 2 are bonded together, voids are generated at their interface. The voids present within the semiconductor device inhibit the flow of current within the semiconductor device, increasing the on-resistance of the semiconductor device. Even if the semiconductor device passes a shipping test because the effect of the increase in on-resistance is small, repeated temperature increases and decreases during use of the semiconductor device can subject the semiconductor device to significant stress, potentially causing cracks at the bonded interface originating from the voids and resulting in damage to the semiconductor device. Thus, the presence of voids in a semiconductor device can lead to concerns about reduced yields and reduced device reliability. In the first embodiment, the interface between the bonded SiC single crystal substrate 1 and the SiC polycrystalline substrate 2 is ground in the grinding process, so no voids are present in the semiconductor device after grinding. This can avoid concerns about reduced yields and reduced device reliability.

[0020] Furthermore, in the first embodiment, a bonded crystal substrate formed by bonding together a SiC single crystal substrate 1 and a SiC polycrystalline substrate 2 is ground. This simplifies the manufacturing process of a semiconductor device compared to the process of cutting a wafer source and then polishing it as in Patent Document 1.

[0021] Furthermore, within the scope of the present disclosure, the embodiments may be modified or omitted as appropriate.

[0022] <Additional Notes> Various aspects of the present disclosure are summarized below as appendices.

[0023] (Appendix 1) a preparation step of preparing two crystal substrates made of silicon carbide, each having a uniform thickness; a bonding step of bonding the two crystal substrates together to form a bonded crystal substrate; an epitaxial growth step of forming an epitaxial layer on the first main surface of the bonded crystal substrate; an element forming step of forming an element on the epitaxial layer; a grinding step of grinding a second main surface side of the bonded crystal substrate opposite to the first main surface, including an interface where the two crystal substrates are bonded together, after the element formation step; A method for manufacturing a semiconductor device, comprising: (Appendix 2) 2. The method for manufacturing a semiconductor device according to claim 1, wherein the two crystalline substrates are a single crystalline substrate and a polycrystalline substrate. (Appendix 3) 3. The method for manufacturing a semiconductor device according to claim 2, wherein the epitaxial layer is formed on the single crystal substrate. (Appendix 4) The thickness of the single crystal substrate is 100 μm or more, The thickness of the polycrystalline substrate is 250 μm or less, 4. The method for manufacturing a semiconductor device according to claim 2, wherein the thickness of the bonded crystal substrate is 350 μm. [Explanation of symbols]

[0024] 1 SiC single crystal substrate, 2 SiC polycrystalline substrate, 3 epitaxial layer, 4 element.

Claims

1. a preparation step of preparing two crystal substrates made of silicon carbide, each having a uniform thickness; a bonding step of bonding the two crystal substrates together to form a bonded crystal substrate; an epitaxial growth step of forming an epitaxial layer on the first main surface of the bonded crystal substrate; an element forming step of forming an element on the epitaxial layer; a grinding step of grinding a second main surface side of the bonded crystal substrate opposite to the first main surface, including an interface where the two crystal substrates are bonded together, after the element formation step; A method for manufacturing a semiconductor device, comprising:

2. 2. The method for manufacturing a semiconductor device according to claim 1, wherein said two crystalline substrates are a single crystalline substrate and a polycrystalline substrate.

3. 3. The method for manufacturing a semiconductor device according to claim 2, wherein said epitaxial layer is formed on said single crystal substrate.

4. The thickness of the single crystal substrate is 100 μm or more, The thickness of the polycrystalline substrate is 250 μm or less, 4. The method for manufacturing a semiconductor device according to claim 2, wherein the thickness of said bonded crystal substrate is 350 [mu]m.

Citation Information

Patent Citations

  • Semiconductor device manufacturing method and wafer structural object

    WO2022059473A1