Vertical cavity surface emitting laser and surface emitting laser device

Abstract

A vertical cavity surface emitting laser and a surface emitting laser device are provided which have excellent heat dissipation, low threshold current density, high luminous efficiency, and improved life span. [Solution] The semiconductor device includes a first reflector on a light-transmitting substrate, a semiconductor layer on the first reflector, a first electrode on the first semiconductor layer, an active layer protruding from the first semiconductor layer and provided on the first semiconductor layer, a second semiconductor layer on the active layer, a second reflector on the second semiconductor layer, a contact layer on the second reflector, and a second electrode on the contact layer, and a heat dissipation substrate 40 to which the second electrode is bonded. The second reflector has first and second thin films with different refractive indices, and the second thin films are the outermost layers of the second reflector. The heat dissipation substrate has a wiring electrode facing the first electrode, and the first electrode and the wiring electrode are bonded. The contact layer has an opening that is filled with a second electrode, and the second electrode is in non-ohmic contact with the second reflector.

Description

[Technical Field]

[0001] The present invention relates to a vertical cavity surface emitting laser and a surface emitting laser device. [Background technology]

[0002] BACKGROUND ART Conventionally, vertical cavity light emitting devices such as vertical cavity surface emitting lasers (VCSELs) have been known which have a structure in which light is resonated perpendicular to a substrate surface and emitted in a direction perpendicular to the substrate surface.

[0003] Vertical-cavity surface-emitting lasers (VCSELs) use semiconductor or dielectric distributed Bragg reflectors (DBRs) to form the cavity, but DBRs have the problem of high thermal resistance and poor heat dissipation.

[0004] For example, Patent Document 1 discloses that a VCSEL element with low thermal resistance is realized by dissipating heat generated in the active layer via a second substrate made of a material with high thermal conductivity.

[0005] Patent Document 2 discloses a surface-emitting laser that has a long cavity structure, has good heat dissipation properties, and is capable of high output and single transverse mode oscillation compared to conventional surface-emitting lasers.

[0006] Patent Document 3 discloses a light emitting device having a semi-insulating member and a submount for transferring heat generated in the active layer of a vertical cavity surface emitting laser.

[0007] Furthermore, Patent Document 4 discloses a laser element formed by bonding a transparent substrate and a laser unit via an adhesive layer. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] WO2021 / 124968 publication [Patent Document 2] Patent No. 4494501 [Patent Document 3] Japanese Patent Application Publication No. 2019-134019 [Patent Document 4] US 2020 / 0153197 A1 Summary of the Invention [Problem to be solved by the invention]

[0009] In conventional vertical cavity surface emitting lasers, further improvement in heat dissipation is required, and reduction of threshold current, improvement of light emission efficiency and lifespan have been issues. An object of the present invention is to provide a vertical cavity surface emitting laser and a surface emitting laser device that have excellent heat dissipation, a low threshold current density, high luminous efficiency, and an improved lifespan. [Means for solving the problem]

[0010] A vertical cavity surface emitting laser according to one embodiment of the present invention comprises: a light-transmitting substrate; a first reflecting mirror provided on the light-transmitting substrate; a first semiconductor layer of a first conductivity type provided on the first reflector; a first electrode provided on the first semiconductor layer; a mesa portion including: an active layer protruding from the first semiconductor layer and provided on the first semiconductor layer; a second semiconductor layer of a second conductivity type provided on the active layer and having an opposite conductivity type to the first conductivity type; a second reflecting mirror provided on the second semiconductor layer; a contact layer provided on the second reflecting mirror; and a second electrode provided on the contact layer; a heat dissipation substrate to which the second electrode is bonded, the second reflecting mirror is configured by laminating a first thin film and a second thin film having refractive indices different from each other, and both outermost layers of the second reflecting mirror are the second thin films; the heat dissipation substrate has a wiring electrode facing the first electrode, the first electrode and the wiring electrode are joined by a joining member, the contact layer has an opening; The opening is filled with the second electrode, and the second electrode is in non-ohmic contact with the second reflector within the opening.

[0011] A surface-emitting laser device according to another embodiment of the present invention comprises: A plurality of the vertical cavity surface emitting lasers, The plurality of vertical cavity surface emitting lasers share the heat dissipation substrate and are bonded onto the heat dissipation substrate. [Brief explanation of the drawings]

[0012] [Figure 1] 1 is a cross-sectional view schematically showing the structure of a vertical-cavity surface-emitting laser according to a first embodiment of the present invention. [Figure 2] FIG. 2 is an enlarged cross-sectional view showing a detailed structure of a laser unit of a vertical cavity surface emitting laser. [Figure 3] FIG. 2 is a diagram schematically illustrating a heat dissipation path of a vertical-cavity surface-emitting laser. [Figure 4] 10 is a diagram schematically showing the positional relationship between an n-electrode and an n-wiring electrode when viewed from above. FIG. [Figure 5A] FIG. 10 is a diagram showing a first modified example of an n-electrode and an n-wiring electrode. [Figure 5B] FIG. 10 is a diagram showing a second modified example of the n-electrode and n-wiring electrode. [Figure 5C] FIG. 10 is a cross-sectional view schematically showing a third modified example of the p-electrode. [Figure 6A] 1 is a diagram schematically showing a cross section of a surface-emitting laser device in which a vertical-cavity surface-emitting laser according to a first embodiment is mounted. [Figure 6B] FIG. 10 is a diagram showing another example of a surface-emitting laser device, and is a diagram showing a schematic cross section of a surface-emitting laser device on which a plurality of vertical-cavity surface-emitting lasers are mounted. DETAILED DESCRIPTION OF THE INVENTION

[0013] In the following, preferred embodiments of the present invention will be described, but these may be modified and combined as appropriate. In the following description and accompanying drawings, substantially the same or equivalent parts are designated by the same reference numerals.

[0014] [First embodiment] (1) Structure of vertical-cavity surface-emitting laser Fig. 1 is a cross-sectional view schematically showing the structure of a vertical-cavity surface-emitting laser 10 according to a first embodiment of the present invention. Fig. 2 is an enlarged cross-sectional view showing the detailed structure of a laser unit 10U of the vertical-cavity surface-emitting laser 10.

[0015] The vertical-cavity surface-emitting laser 10 of this embodiment is a red-emitting vertical-cavity surface-emitting laser (VCSEL). The vertical-cavity surface-emitting laser (VCSEL) 10 has a light-transmitting substrate 11 (hereinafter referred to as transparent substrate 11), a laser unit 10U provided on the transparent substrate 11, and a heat dissipation substrate 40. The laser unit 10U is bonded to the heat dissipation substrate 40.

[0016] The transparent substrate 11 is made of a material that transmits the light from the laser unit 10U, and may be made of, for example, glass or sapphire. An anti-reflection film (AR coating) 11A is provided on the surface of the transparent substrate 11, i.e., the emission surface of the emitted light LE, to prevent reflection on the transparent substrate 11. The anti-reflection film 11A may be, for example, a Ta2O5 / SiO2 film, a ZrO / SiO2 film, or a TiO2 / Al2O3 film.

[0017] As shown in FIG. 1, in a vertical cavity surface emitting laser 10, a laser unit 10U is bonded to a transparent substrate 11 with an adhesive layer 12. The laser unit 10U has a semiconductor stack in which a first semiconductor DBR (Distributed Bragg Reflector) 13, a first semiconductor layer consisting of an n-type semiconductor layer 15 and an n-AlGaInP layer 17, an active layer 23, a second semiconductor layer consisting of a p-type semiconductor layer 24 and a constriction layer 25, a second semiconductor DBR 27 and a p-contact layer 28 are stacked in this order, an n-electrode 19 and a p-electrode 31.

[0018] The semiconductor laminate can be formed by epitaxial growth using, for example, MOCVD (Metal Organic Chemical Vapor Deposition), but the crystal growth method is not limited to this.

[0019] The present invention can also be applied to a vertical cavity surface emitting laser made of a semiconductor layer of a III-V compound semiconductor having a zincblende crystal structure.

[0020] The semiconductor laminate can be grown using a so-called just substrate or a substrate (wafer) having an off-angle. For example, it can be formed by growing crystal on a GaAs substrate whose substrate surface is inclined at an off-angle (for example, 6°) from the (100) plane.

[0021] After the crystal growth, the substrate (wafer) is completely removed to obtain the laser unit 10U. The substrate can be removed using a known polishing method or etching method. Alternatively, the substrate for crystal growth may be thinned without being completely removed.

[0022] Note that a buffer layer may be formed on the substrate before the semiconductor laminate is formed. In this case, the substrate and buffer layer after crystal growth can be completely removed or the buffer layer can be thinned to obtain the laser unit 10U.

[0023] In FIG. 1, the direction perpendicular to the active layer 23 is indicated as the z direction, and directions perpendicular to each other in a plane parallel to the active layer 23 are indicated as the x direction and the y direction, respectively.

[0024] The vertical cavity surface emitting laser 10 has a mesa portion 10M which is a light emitting structure portion protruding from the n-type semiconductor layer 15 in the direction perpendicular to the n-type semiconductor layer 15 (the +z direction). More specifically, the mesa portion 10M is formed to protrude from the n-type semiconductor layer 15, and has a first opposing surface 15E around the mesa portion 10M which is an exposed surface where the n-type semiconductor layer 15 is exposed and which faces the upper surface (bonding surface) of the heat dissipation substrate 40.

[0025] The mesa portion 10M can be formed by etching a semiconductor laminate formed by crystal growth. In this embodiment, the first opposing surface 15E of the n-type semiconductor layer 15 is formed by etching until it reaches the inside of the n-type semiconductor layer 15. That is, the first opposing surface 15E is formed outside the mesa portion 10M as a surface recessed from the growth surface of the n-type semiconductor layer 15. As a result, the portion of the n-type semiconductor layer 15 outside the mesa portion 10M is formed as a heat dissipation path for heat from the active layer 23. Alternatively, etching may be performed down to the surface of the n-type semiconductor layer 15 to expose the growth surface of the n-type semiconductor layer 15, and this growth surface may serve as the first opposing surface 15E.

[0026] In other words, the laser unit 10U has a mesa portion 10M and a first opposing surface 15E surrounding the mesa portion 10M. An n-electrode 19 is provided on the first opposing surface 15E and is in ohmic contact with the n-type semiconductor layer 15. The first opposing surface 15E is preferably formed as a flat surface that is parallel to the transparent substrate 11 (i.e., perpendicular to the central axis CZ).

[0027] The mesa portion 10M has a cylindrical shape with a central axis CZ perpendicular to the first semiconductor DBR 13. In the following, the case where the mesa portion 10M has a cylindrical shape will be described as an example, but the present invention is not limited to this.

[0028] For example, the mesa portion 10M may have an elliptical cylindrical shape, a polygonal cylindrical shape, etc. Alternatively, the mesa portion 10M may have a frustum shape, such as a circular truncated cone shape, a polygonal truncated pyramid shape, etc. Note that the mesa portion 10M preferably has a shape that is rotationally symmetric about the central axis CZ.

[0029] The first semiconductor DBR 13 and the n-type semiconductor layer 15 have a rectangular shape (for example, a square shape) and are large enough to encompass the mesa portion 10M when viewed from above.

[0030] More specifically, the mesa portion 10M has an n-type semiconductor layer columnar portion 15A protruding from a part of the n-type semiconductor layer 15, an n-AlGaInP layer 17, an active layer 23, a p-type semiconductor layer 24, a narrowing layer 25, a second semiconductor DBR 27 (p-DBR), a p-contact layer 28, and a p-electrode 31.

[0031] As described above, the mesa portion 10M has a first semiconductor layer of a first conductivity type (n-type), a second semiconductor layer of a second conductivity type (p-type) that is the opposite conductivity type to the first conductivity type, and an active layer 23 sandwiched between the first semiconductor layer and the second semiconductor layer.

[0032] The layer structure of the semiconductor layers of the mesa portion 10M, the composition of each semiconductor layer, etc. will be described below, but are not limited thereto and may be modified as appropriate within the scope of the present invention.

[0033] That is, the first semiconductor layer or the second semiconductor layer may further include at least one semiconductor layer having a different composition, band gap, doping concentration, etc., and may also include at least one i-layer or undoped layer. For example, it may further include a so-called carrier trap layer or spacer layer.

[0034] Each layer of the mesa portion 10M will be described in detail below. The first semiconductor DBR 13 (n-DBR) is a distributed Bragg reflector, and is an n-type semiconductor DBR made of a multilayer film in which n-type semiconductor layers having different refractive indices and an optical film thickness of 1 / 4 wavelength are alternately stacked. The first semiconductor DBR 13 is made of, for example, Al 0.5 Ga 0.5 As layer and Al 0.95 Ga 0.05 As layers are alternately stacked, for example, 50 to 60 pairs of Al 0.5 Ga 0.5 As / Al 0.95 Ga 0.05 As layers are stacked. The first semiconductor DBR 13 is made of Al 0.5 Ga 0.5 As layer and Al z1 Ga 1-z1 It is preferable that 50 to 60 pairs of As layers (0.9≦z1≦0.95) are laminated. z2 Ga 1-Z2 As layer and Al z3 Ga 1-Z3 It may be an As layer (0.45≦z2≦0.95, 0.45≦z3≦0.95, z2≠z3). The first semiconductor DBR 13 may be a dielectric DBR instead of a semiconductor DBR.

[0035] An n-type semiconductor layer 15 is provided on the first semiconductor DBR 13. The n-type semiconductor layer 15 has a first opposing surface 15E and an n-type semiconductor layer columnar portion 15A. The n-type semiconductor layer 15 can be made of n-AlAs, n-AlGaAs, or n-AlInP, which have good thermal conductivity. It is most preferable to use n-AlAs.

[0036] The n-type semiconductor layer 15 functions as a spacer layer. A long cavity structure can be formed by increasing the thickness of the n-type semiconductor layer 15. Specifically, when the in-medium wavelength is λ, the layer thickness (optical film thickness) of the n-type semiconductor layer 15 is preferably 2λ or more, and more preferably 3λ or more.

[0037] The n-type semiconductor layer 15 is made of n-Alx Ga 1―x When As is used, the Al composition (x) is preferably 0.9 or more and y or less (0.9≦x≦y) (the Al composition of the current injection portion 25A of the confinement layer 25).

[0038] An n-AlGaInP layer 17 is provided on the n-type semiconductor layer columnar portion 15A. The n-AlGaInP layer 17 has a larger band gap than the n-type semiconductor layer 15 and functions as a carrier confinement layer. Note that instead of the n-AlGaInP layer 17, a semiconductor layer with a different composition can also be used.

[0039] The active layer 23 has a multiple quantum well (MQW) structure and is composed of a plurality of GaInP well layers and AlGaInP barrier layers, and has, for example, 2 to 5 well layers.

[0040] A p-type semiconductor layer 24 made of p-AlGaInP is provided on the active layer 23. The p-type semiconductor layer 24 functions as a carrier confinement layer.

[0041] The narrowing layer 25 is composed of a current injection portion 25A and an oxide layer 25B. The current injection portion 25A is p-Al y Ga 1-y The oxide layer 25B is an oxide layer of p-AlGaAs (AlyOz4). The Al composition (y) is preferably 0.9 or more and 1 or less (0.9≦y≦1). In this case, z4 is between 0.8 and 1.

[0042] More specifically, current injection portion 25A has a thin cylindrical shape (i.e., a circular shape when viewed from above), and the outside of current injection portion 25A is formed as an oxide layer by, for example, steam oxidation. Oxide layer 25B functions as a constriction portion that constricts current and light.

[0043] A second semiconductor DBR 27 (p-DBR) is provided on the narrowing layer 25. The second semiconductor DBR 27 is formed by alternately stacking p-type semiconductor layers, i.e., first thin films 27A and second thin films 27B, which have different refractive indices and an optical film thickness of ¼ wavelength.

[0044] The second semiconductor DBR 27 is composed of k layers (k is a natural number) of first thin films 27A and (k+1) layers of second thin films 27B. For ease of explanation, the stacked structure of the first thin films 27A and the second thin films 27B may be described using the fraction 0.5, such as a (k.5) pair.

[0045] The second semiconductor DBR27 is made of Al 0.5 Ga 0.5 As layer and Al z2 Ga 1-z2 It is preferable that the second semiconductor DBR 27 is configured by laminating 30.5 to 45.5 pairs (k=30 to 45) of As layers (0.9≦z2≦0.95). That is, both outermost layers of the second semiconductor DBR 27 are the second thin films 27B. Also, for example, the first thin film 27A is Al 0.95 Ga 0.05 The second thin film 27B is an As layer, and the second thin film 27B is an Al 0.5 Ga 0.5 This is the As layer.

[0046] The reason why the first thin film 27A and the second thin film 27B are stacked as a (k.5) pair is as follows: A distributed feedback reflector (DBR) achieves high reflectivity because the phases of the light reflected by each layer are aligned and the reflected light components constructively interact. At the interface between the semiconductor and the metal, the reflectivity is higher than when light is reflected only by the DBR (or when light is reflected between the outermost layer of the DBR and the air interface), but the phase is inverted, and the phase-inverted light components cause destructive interference within the DBR and the resonator. Therefore, the second semiconductor DBR 27 employs a (k.5) pair configuration in which both outermost layers are made of the same material. It is preferable that the second semiconductor DBR 27 (p-DBR) has a smaller number of stacked layers (k) than the first semiconductor DBR 13 (n-DBR) so as to reduce optical loss.

[0047] A p-contact layer 28 is provided on the second thin film 27B of the second semiconductor DBR 27. The p-contact layer 28 is, for example, a p-GaAs layer, and is in ohmic contact with the second thin film 27B of the second semiconductor DBR 27.

[0048] Furthermore, the p-contact layer 28 has a circular opening in the top view at the center thereof, which penetrates the p-contact layer 28 and is coaxial with the central axis CZ. The p-contact layer 28 is made of, for example, p-GaAs, but is not limited to this, and any semiconductor layer that makes ohmic contact with the p-electrode 31 can be used.

[0049] A p-electrode 31 is provided on the p-contact layer 28. The p-electrode 31 fills the opening of the p-contact layer 28 and is in contact with the second thin film 27B of the second semiconductor DBR 27 exposed in the opening. Here, the p-electrode 31 forms non-ohmic contact with the surface of the second semiconductor DBR 27 (p-DBR).

[0050] By contacting the second semiconductor DBR 27 in the resonance region with the p-electrode 31 (metal), the effect of metallic reflection by the p-electrode 31 can be obtained, thereby reducing the number of layers stacked in the second semiconductor DBR 27 (p-DBR). This reduces the film thickness of the p-DBR, which has lower thermal conductivity than metal, thereby improving heat dissipation. Furthermore, by contacting the second semiconductor DBR 27 in the resonance region with the p-electrode 31 (metal), light absorption by the p-contact layer 28 (p-GaAs) can be avoided.

[0051] Furthermore, as described above, by configuring the p-DBR as a (k.5) pair, the reflectivity can be improved, which allows the number of layers (number of pairs) in the p-DBR to be further reduced, further improving heat dissipation.

[0052] The p-electrode 31 may be, for example, a Ti / Pt / Au layer formed by depositing titanium (Ti), platinum (Pt), and gold (Au) in this order, but is not limited to this. The p-electrode 31 may be a multi-metal layer such as a Ni / Au layer, or may be made of Au or Ag.

[0053] The p-electrode 31 is bonded to a heat dissipation substrate 40. The heat dissipation substrate 40 may be a semiconductor submount made of aluminum nitride (AlN), silicon carbide (SiC), or a metal such as copper (Cu).

[0054] 1, a p-type wiring electrode 41 is provided on a heat dissipation substrate 40. The p-type electrode 31 is bonded to the p-type wiring electrode 41 by a bonding member 33 and is electrically connected to the p-type wiring electrode 41.

[0055] In addition, an n-type wiring electrode 42 is provided on the upper surface of the heat dissipation substrate 40. More specifically, the upper surface of the heat dissipation substrate 40 has a second opposing surface 40E that faces the first opposing surface 15E of the n-type semiconductor layer 15, and the n-type wiring electrode 42 is provided on the second opposing surface 40E.

[0056] That is, the first opposing surface 15E is parallel to the second opposing surface 40E, and the n-electrode 19 provided on the first opposing surface 15E is joined to the n-wiring electrode 42 by the joining member 35 and is electrically connected to the n-wiring electrode 42.

[0057] The n-electrode 19 may be, for example, an Au / Ge / Ni / Au layer formed by depositing gold (Au), germanium (Ge), nickel (Ni), and gold (Au) in this order, but is not limited to this.

[0058] The bonding members 33 and 35 can be made of fusion solder such as AuSn, In, Sn, or AgSn, or can be made of a thick Au film or metal nanoparticles (e.g., Au nanoparticles). Alternatively, the electrode surfaces can be activated by plasma treatment and the activated surfaces can be bonded together. In particular, when a substrate such as Cu having a linear expansion coefficient different from that of the semiconductor material is used for the heat dissipation substrate 40, a thick Au film or a thick Au film having particulate domains can be used. In the above explanation, the composition, thickness, etc. of each semiconductor layer are exemplified, but they can be appropriately modified and applied within the scope of the present invention.

[0059] The thickness of each semiconductor layer in the vertical-cavity surface-emitting laser 10 can be adjusted as appropriate by adjusting the positions of the active layer 23 and the constriction layer 25 relative to the standing wave intensity distribution in the cavity and the design value of the cavity length. To efficiently confine light in the light emission direction (the direction of the central axis CZ), the active layer 23 is preferably designed to be located at a loop of the standing wave intensity distribution. Because light is scattered in the constriction layer 25, the constriction layer 25 is preferably designed to be located at a node of the standing wave intensity distribution. In particular, the interface between the constriction layer 25 and the second semiconductor DBR 27 is preferably designed to be located at a node of the standing wave intensity distribution. The thickness of the constriction layer 25 is preferably 60 nm or less. The distance between the first semiconductor DBR 13 and the second semiconductor DBR 27 is preferably a natural number multiple of the in-medium wavelength λ (n × λ, n is a natural number). In other words, the total thickness of the n-type semiconductor layer 15, n-AlGaInP layer 17, active layer 23, p-type semiconductor layer 24, and confinement layer 25 is preferably a natural number multiple of the in-medium wavelength λ.

[0060] (2) Heat dissipation path 3 is a diagram schematically showing heat dissipation paths of the vertical cavity surface emitting laser 10. A first heat dissipation path P1 and a second heat dissipation path P2 are indicated by thick solid lines.

[0061] The first heat dissipation path P1 is a path that passes through the second semiconductor DBR 27. That is, the first heat dissipation path P1 is composed of a path P11 through which heat generated in the active layer 23 passes through the contact region (non-ohmic contact) between the second semiconductor DBR 27 and the p-electrode 31, and a path P12 through the second semiconductor DBR 27 and the p-contact layer 28. The heat in the active layer 23 is dissipated to the heat dissipation substrate 40 via the first heat dissipation path P1.

[0062] In the first heat dissipation path P1, as described above, the second semiconductor DBR 27 is in contact with the p-electrode 31 (metal), and the second semiconductor DBR 27 is configured as a (k.5) pair, thereby shortening the heat dissipation path and achieving high heat dissipation performance.

[0063] The second heat dissipation path P2 is a path that dissipates heat generated in the active layer 23 by spreading it on the n-layer side. More specifically, the second heat dissipation path P2 includes a path P21 through which the heat of the active layer 23 passes through the n-type semiconductor layer 15 (spacer layer) and the bonding member 35, a path P22 through which the n-type semiconductor layer 15 and the first semiconductor DBR 13 (n-DBR) and the bonding member 35, and a path P23 through which the n-type semiconductor layer 15, the first semiconductor DBR 13, and the transparent substrate 11 and the bonding member 35. In this way, the heat generated in the active layer 23 is dissipated via paths P21, P22, and P23, thereby achieving high heat dissipation properties.

[0064] That is, by having a plurality of heat dissipation paths consisting of the first heat dissipation path P1 and the second heat dissipation path P2, high heat dissipation performance can be achieved.

[0065] (3) Structure of n-electrode and n-wiring electrode FIG. 4 is a diagram schematically illustrating the position, shape, and positional relationship of the n-electrode 19 of the n-type semiconductor layer 15 and the n-wiring electrode 42 of the heat dissipation substrate 40 in a top view of the vertical-cavity surface-emitting laser 10 (i.e., when viewed from the direction along the central axis CZ).

[0066] The n-electrode 19 and the n-wiring electrode 42 are provided at positions and in shapes corresponding to each other. Note that the n-electrode 19, the n-wiring electrode 42, and the bonding member 35 are shown overlapping, and the p-electrode 31, the p-wiring electrode 41, and the mesa portion 10M are shown overlapping.

[0067] More specifically, as shown in FIG. 4, the n-electrode 19 and the n-wiring electrode 42 have annular shapes (central axes CZ) of the same size, and are joined to each other by a joining member 35, thereby joining the laser unit 10U and the heat dissipation substrate 40.

[0068] That is, the n-electrode 19 and the n-wiring electrode 42 have an annular shape whose central axis is coaxial with the central axis CZ of the mesa portion 10M. Therefore, the bonding member 35 has a hollow cylindrical shape that surrounds the periphery of the mesa portion 10M.

[0069] For example, the layer thickness of the bonding member 33 between the p electrode 31 and the p wiring electrode 41 is about several μm (e.g., 2 μm), and the layer thickness of the bonding member 35 between the n electrode 19 and the n wiring electrode 42 is about several μm to tens of μm (e.g., 10 μm).

[0070] Since the n-electrode 19 and the n-wiring electrode 42 have an annular shape and are joined by a joining member 35, the cross-sectional area of ​​the heat dissipation path (heat dissipation path P2 on the n-layer side) is large, and heat can be dissipated to the heat dissipation substrate 40 uniformly within the surface.

[0071] FIG. 5A is a top view schematically showing the shape and positional relationship of the n-electrode 19 and the n-wiring electrode 42 according to Modification 1. FIG.

[0072] In this modified example 1, the n-electrodes 19 and the n-wiring electrodes 42 have a strip or rectangular shape. The example shows a case where four n-electrodes 19 and n-wiring electrodes 42 are provided. Each of the four n-electrodes 19 and n-wiring electrodes 42 extends in a direction surrounding the mesa portion 10M, and is provided symmetrically with respect to the central axis CZ across the mesa portion 10M.

[0073] Such shapes and arrangements of the n-electrode 19 and the n-wiring electrode 42 can increase the cross-sectional area of ​​the heat dissipation path (heat dissipation path P2 on the n-layer side), thereby achieving a high heat dissipation effect. Also, uniform heat dissipation can be achieved within the surface.

[0074] It is also possible to provide multiple pairs of n-electrodes 19 and n-wiring electrodes 42. In this case, it is preferable for obtaining uniform heat dissipation that the n-electrodes 19 and n-wiring electrodes 42 are provided at rotationally symmetric positions with respect to the central axis CZ so as to surround the mesa portion 10M.

[0075] FIG. 5B is a diagram showing a modified example 2 in which two pairs of n-electrodes 19 and n-wiring electrodes 42 are provided. In this modified example 2, the two pairs of n-electrodes 19 and n-wiring electrodes 42 are provided at positions rotationally symmetrical with respect to the central axis CZ. In such a case, a high heat dissipation effect can be obtained by increasing the area or adjusting the shape of the n-electrode 19 and the n-wiring electrode 42. Also, uniform heat dissipation can be achieved within the surface.

[0076] 5C is a cross-sectional view schematically showing a third modified example of p-electrode 31. P-electrode 31 of the first modified example has an opening filling layer 31A and a p-contact electrode layer 31B. The burying layer 31A for the opening is a single metal layer that fills the opening of the p-contact layer 28 and has the same thickness as the p-contact layer 28. It is preferable that the lower surface of the p-contact layer 28 (the surface facing the heat dissipation substrate 40) and the lower surface of the burying layer 31A for the opening are flush with each other. The metal used for the burying layer 31A for the opening can be selected appropriately from materials that have high reflectivity for light resonating within the resonator structure. Examples of suitable metals include gold (Au), silver (Ag), and aluminum (Al). The burying layer 31A for the opening forms a non-ohmic contact with the surface of the second semiconductor DBR 27 (p-DBR). The p-contact electrode layer 31B is formed on the surface of the opening filling layer 31A and the p-contact layer 28 facing the heat dissipation substrate 40, and is in ohmic contact with the p-contact layer 28, and can be made of the same metal as the p-electrode 31.

[0077] [Second embodiment] FIG. 6A is a diagram schematically showing a cross section of a surface-emitting laser device 110 in which a vertical-cavity surface-emitting laser 10 is mounted.

[0078] In addition to the vertical cavity surface-emitting laser 10, the surface-emitting laser device 110 also includes a vertical cavity surface-emitting laser 111 and a vertical cavity surface-emitting laser 112. The vertical cavity surface-emitting lasers 111 and 112 are formed by bonding a p-electrode 115 and an n-electrode 117 to the heat dissipation substrate 40 common to the vertical cavity surface-emitting laser 10 of the above-described embodiment. The vertical cavity surface-emitting lasers 111 and 112 may have element configurations different from the vertical cavity surface-emitting laser 10 in other respects.

[0079] The vertical-cavity surface-emitting lasers 111 and 112 are vertical-cavity surface-emitting lasers that emit different emission wavelengths, for example, green (G) and blue (B), respectively, and are housed in a package 121 common to the vertical-cavity surface-emitting laser 10 (R: red). The package 121 is sealed with a glass cover 123 that transmits the emitted light from the vertical-cavity surface-emitting laser 10 and the vertical-cavity surface-emitting lasers 111 and 112. Therefore, the surface-emitting laser device 110 functions as an RGB surface-emitting laser module.

[0080] FIG. 6B is a diagram schematically showing a cross section of a surface-emitting laser device 150 in which a plurality of vertical-cavity surface-emitting lasers 10 are mounted. In the above, a case has been described in which vertical-cavity surface-emitting lasers having different element configurations from the vertical-cavity surface-emitting laser 10 are bonded to a common heat dissipation substrate 40, but this is not limiting. As shown in Fig. 6B, a surface-emitting laser device 150 may have a configuration in which a plurality of (three in this case) vertical-cavity surface-emitting lasers 10 are bonded to a common heat dissipation substrate 40. In this case, the three vertical-cavity surface-emitting lasers 10 may have different configurations within the scope of the present invention. For example, the emission wavelength, the composition of each semiconductor layer, the layer thickness, etc. may not be the same.

[0081] Therefore, the surface-emitting laser device 110 has a plurality of vertical-cavity surface-emitting lasers, and has high heat dissipation performance.

[0082] As described above in detail, the present invention can provide a vertical-cavity surface-emitting laser and a surface-emitting laser device that have excellent heat dissipation, a low threshold current density, high luminous efficiency, and an improved lifetime. [Explanation of symbols]

[0083] 10: Vertical cavity surface emitting laser 10U: Laser unit 11: Transparent substrate 13: First semiconductor DBR 15: n-type semiconductor layer 15E: First opposing surface 17:n-AlGaInP layer 19:n electrode 23:Active layer 24: p-type semiconductor layer 25: Constriction layer 27: Second semiconductor DBR 28:p contact layer 31:p electrode 33: Joint material 35: Joint material 40: Heat dissipation board 40E: Second opposing surface 10M: Mesa section 41:p wiring electrode 42:n wiring electrode 110: Surface-emitting laser device

Claims

1. a light-transmitting substrate; a first reflecting mirror provided on the light-transmitting substrate; a first semiconductor layer of a first conductivity type provided on the first reflector; a first electrode provided on the first semiconductor layer; a mesa portion including: an active layer protruding from the first semiconductor layer and provided on the first semiconductor layer; a second semiconductor layer of a second conductivity type provided on the active layer and having an opposite conductivity type to the first conductivity type; a second reflecting mirror provided on the second semiconductor layer; a contact layer provided on the second reflecting mirror; and a second electrode provided on the contact layer; a heat dissipation substrate to which the second electrode is bonded, the second reflecting mirror is configured by laminating a first thin film and a second thin film having refractive indices different from each other, and both outermost layers of the second reflecting mirror are the second thin films; the heat dissipation substrate has a wiring electrode facing the first electrode, the first electrode and the wiring electrode are joined by a joining member, the contact layer has an opening; the opening is filled with the second electrode, and the second electrode is in non-ohmic contact with the second reflector within the opening; Vertical-cavity surface-emitting laser.

2. the mesa portion has a central axis perpendicular to the active layer, The opening includes the central axis.

2. The vertical cavity surface emitting laser according to claim 1.

3. the mesa portion has a cylindrical shape, 2. The vertical cavity surface emitting laser according to claim 1, wherein said first electrode and said wiring electrode have an annular shape coaxial with a central axis of said mesa portion.

4. The first semiconductor layer is n-Al ｘ Ga １―ｘ As (0.9≦x) layer and the n-Al ｘ Ga １―ｘ an n-type semiconductor layer formed on the As layer; The first electrode is made of the n-Al ｘ Ga １―ｘ 2. The vertical cavity surface emitting laser according to claim 1, wherein the laser is formed on the first semiconductor layer recessed below the growth surface of the As layer.

5. the active layer is a GaInP-based semiconductor layer, the first semiconductor layer includes an AlAs layer; 2. The vertical cavity surface emitting laser according to claim 1, wherein the thickness of said first semiconductor layer is 2λ or more, where λ is an in-medium wavelength.

6. 6. The vertical cavity surface emitting laser according to claim 1, wherein the first semiconductor layer is an n-type semiconductor layer, and the second semiconductor layer is a p-type semiconductor layer.

7. A laser diode including a plurality of vertical cavity surface emitting lasers according to any one of claims 1 to 5, The plurality of vertical cavity surface emitting lasers share the heat dissipation substrate and are bonded onto the heat dissipation substrate.

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