Optical circuit
The optical circuit addresses the integration issue of waveguides at different heights by configuring them with a transition region, enabling simultaneous chip mounting and reducing costs in optical transceivers.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-08-21
- Publication Date
- 2026-03-06
AI Technical Summary
Conventional PLC-type FIFO modules hinder the integration of optical transceivers due to waveguides being formed at different heights in multiple layers, necessitating separate optical modulator and photodiode chips, increasing manufacturing costs and complexity.
An optical circuit with waveguides configured to have varying heights and a transition region that gradually changes from one end face to another, allowing all waveguides to be at the same height at the second end face, facilitating integration of optical modulator and photodiode chips onto a single chip.
Reduces manufacturing costs and improves integration efficiency by allowing simultaneous mounting of optical modulator and photodiode chips, enhancing the manufacturing process of optical transceivers.
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Figure 2026037062000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to an optical circuit for connecting multi-core fibers. [Background technology]
[0002] As the capacity of optical communication networks continues to increase, spatial multiplexing transmission has attracted attention and research and development into it is progressing. In conventional optical communication networks, the basic transmission medium was single-mode fiber (SMF), which is designed to have one path (one core) in one optical fiber and one guided mode. In spatial multiplexing transmission, multiple SMFs or uncoupled multi-core fiber (MCF) are used. In a spatial multiplexing transmission system, spatial channels using different cores can be controlled independently. In spatial multiplexing transmission systems for backbone networks that handle large volumes of traffic, wavelength division multiplexing (WDM) optical transceivers are combined with MCF.
[0003] In corporate networks and telecom networks with relatively low traffic volumes, the PSM (Parallel Single Mode Fiber) method, which uses multiple SMFs in parallel rather than WDM, is used. When relatively few wavelengths are used, the transmitter and receiver of an optical transceiver are connected in a point-to-point configuration. This allows for the construction of a spatial multiplexing transmission system at lower cost, for example, when connecting Ethernet between nodes over short distances.
[0004] If PSM optical transceivers are connected using MCF instead of multiple SMFs, the number of fibers can be reduced, making the optical transceivers easier to manage. For example, a four-core MCF can handle the same amount of traffic as four SCFs, and it can connect transmitters (Tx) and receivers (Rx) between four independent channels between optical transceivers. Using MCF simplifies fiber management by handling the equivalent of four SCFs as if they were a single fiber. In optical transceivers, it is necessary to connect each core of the MCF to the optical circuit elements of the transmitter and receiver corresponding to one spatial channel. For this purpose, a fan-in-fan-out (FIFO) device is used to connect each core of the MCF to the core of the SCF.
[0005] FIFO devices include fiber bundle type, fused and drawn type, spatial optics type, planar optical waveguide type, etc. A PLC-type FIFO device that uses a planar lightwave circuit (PLC) is known as a FIFO module (Patent Document 1).
[0006] FIG. 1 is a schematic diagram showing the configuration of a PLC-type FIFO module for MCF. FIG. 1(a) shows a perspective view of the overall configuration of a FIFO module 60, and FIG. 1(b) shows a cross-sectional view of the end face (yz plane) of the PLC on the MCF side. The FIFO module 60 is composed of a PLC 61 that connects an MCF 50 having four cores to four SCFs 51-1 to 51-4. The PLC 61 has waveguides 1-3 and 1-4 formed in a first cladding layer 11-1 formed on a substrate 10, which expand the spacing for connection to the SCFs. Furthermore, waveguides 1-1 and 1-2 are formed in a second cladding layer 11-2, which expand the spacing for connection to the SCFs. The FIFO module 60 using the PLC 61 is approximately the size of a 1x4 splitter, can utilize existing fiber packaging technology, and is suitable for mass production. [Prior art documents] [Patent documents]
[0007] [Patent Document 1] Patent No. 7071636 specification Summary of the Invention [Problem to be solved by the invention]
[0008] In conventional PLC-type FIFO modules, in order to increase the spacing between the waveguides from the MCF to the SCF, the waveguides were formed at different heights in two or more layers within the PLC. The different waveguide heights in the PLC-type FIFO module hindered the integration of optical transceivers.
[0009] FIG. 2 illustrates an implementation of an optical transceiver including a PLC-type FIFO. (b) of FIG. 2 is a top view (xz plane) of a portion of an optical transceiver 70 including a transmitter. (a) and (c) of FIG. 2 are cross-sectional views (xy plane) taken perpendicular to the PLC substrate surface along lines AA and CC. The PLC-type FIFO 61 has the same function as the FIFO module 60 shown in FIG. 1 in that it adapts the four cores of the MCF to the spacing between the waveguide cores and elements of other optical circuits within the optical transceiver. Referring to (b) of FIG. 2, in the optical transceiver 70, two Si photonics optical modulator chips 20-1 and 20-2 are mounted on the end faces of the PLC-type FIFO 61 using adhesive or the like. A light source such as a laser diode (LD) 30 is connected to the two optical modulator chips via SCFs 51-1 and 51-2.
[0010] Each of the two optical modulator chips 20-1 and 20-2 includes two Mach-Zehnder interferometers (MZIs) 22. A baseband electrical signal (e.g., an Ethernet signal) is applied to one MZI 22, which operates as an optical modulator using BQPSK. Therefore, each optical modulator chip outputs two channels of modulated optical signals.
[0011] In the FIFO chip 61, waveguides 1-1 to 1-4 are formed in two core layers in a cladding layer on a substrate 10 made of silicon, synthetic quartz, or the like. The right end of the FIFO chip 61 is connected to an MCF (not shown) having four cores. Therefore, the waveguide configuration at the end face of the FIFO chip 61 connected to the MCF is the same as that shown in FIG. 1(b). As shown in FIG. 2(c), one optical modulator chip 20-2 is fixed to the end face of the FIFO chip 61 so that the waveguide 23 of the MZI and the waveguides 1-3 and 1-4 in the core layer closer to the substrate 10 are at the same height. Also, as shown in FIG. 2(a), the other optical modulator chip 20-1 is mounted on the end face of the FIFO chip 61 so that the waveguide 23 of the MZI and the waveguides 1-1 and 1-2 in the core layer farther from the substrate 10 are at the same height. When a transmitter is configured using the FIFO chip 61 of the prior art, the two optical modulator chips 20-1 and 20-2 cannot be further integrated because their fixed heights (y-axis direction) are different.
[0012] FIG. 3 is another diagram showing an implementation of an optical transceiver including a PLC-type FIFO. (b) of FIG. 3 is a top view (xz plane) of a portion of an optical transceiver 70 including a receiver. (a) and (c) of FIG. 3 are cross-sectional views (xy plane) taken perpendicular to the PLC substrate surface along lines AA and CC. The configuration of the waveguides 1-1 to 1-4 of the FIFO chip 61 in FIG. 3 is the same as that of the FIFO chip 61 used in the transmitter in FIG. 2. Referring to (b) of FIG. 3, in the optical transceiver 70, edge-illuminated photodiodes (PDs) 40-1 to 40-4 are mounted on the end faces of the FIFO chip 61 using an adhesive or the like. The PDs convert the optical signals received via the FIFO chip 61 into electrical signals and output the electrical signals (not shown).
[0013] 3(c), the two PDs 40-3 and 40-4 are mounted on the end face of the FIFO chip 61 so as to match the heights of the waveguides 1-3 and 1-4 in the core layer closer to the substrate 10. As shown in FIG. 3(a), the two PDs 40-1 and 40-2 are mounted on the end face of the FIFO chip 61 so as to match the heights of the waveguides 1-1 and 1-2 in the core layer farther from the substrate 10.
[0014] Thus, when a receiver is configured using the conventional FIFO chip 61, the four PDs 40-1 to 40-4 are mounted at different heights (in the y-axis direction), similar to the transmitter configuration described in Figure 2. Because the waveguides 1-1 to 1-4 are formed in two core layers at different heights, separate PD chips are required, and integrated PDs cannot be used. Mounting the two optical modulator chips 20-1 and 20-2 of the transmitter and the four PDs 40-1 to 40-4 of the receiver on the FIFO chip 61 is time-consuming, increasing the manufacturing cost of the optical transceiver. While Figures 2 and 3 show an example of a FIFO chip that adapts four MCF cores to four waveguides or optical circuit elements, increasing the number of MCF cores further complicates the implementation of the optical transceiver.
[0015] The present invention has been made in view of the above problems, and an object of the present invention is to provide an optical circuit having a FIFO function that reduces the implementation cost. [Means for solving the problem]
[0016] One embodiment of the present invention is an optical circuit on a substrate, comprising a plurality of waveguides formed in at least two core layers and configured so that the spacing between them in the substrate surface increases from a first end face to a second end face of the substrate, wherein one or more waveguides in a first group of the plurality of waveguides are located at a first height from the substrate, and one or more waveguides in a second group of the plurality of waveguides are located at a second height at the first end face that is farther from the substrate than the first height, and at the first height at the second end face, and wherein a core height gradually changes from the second height to the first height in a transition region between the first end face and the second end face, and the plurality of waveguides are located at the same height at the second end face. [Effects of the Invention]
[0017] As described above, the present invention can provide an optical circuit having a FIFO function with reduced implementation costs. [Brief explanation of the drawings]
[0018] [Figure 1] FIG. 1 is a schematic diagram showing the configuration of a PLC-type FIFO module for an MCF. [Figure 2] FIG. 1 illustrates an implementation of an optical transceiver including a PLC-type FIFO. [Figure 3] FIG. 10 is another diagram illustrating an implementation of an optical transceiver including a PLC-type FIFO. [Figure 4] 1 is a configuration diagram of an optical transceiver including a FIFO chip of the optical circuit of the present disclosure. [Figure 5] FIG. 10 is a perspective view illustrating a transition region of the core height of the FIFO chip of the present disclosure. [Figure 6] FIG. 10 is another configuration diagram of an optical transceiver including the FIFO chip of the present disclosure. [Figure 7] FIG. 1 is a process flow diagram showing a manufacturing procedure for the FIFO chip of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION
[0019] The optical circuit disclosed herein provides a FIFO function that can reduce the packaging efficiency and cost of optical transceivers. The FIFO function refers to spatially matching and optically coupling each core of an MCF to a core of an SCF or a waveguide core of another optical circuit. Specifically, by using multiple waveguides configured to expand their mutual spacing within the substrate plane, the spacing between each core of the MCF is expanded and expanded to match the spacing between the cores of the SCF or the waveguides of another optical circuit. The cores of the multiple waveguides are arranged non-linearly at the MCF-side end face of the optical circuit, while the cores of the multiple waveguides with expanded spacing within the optical circuit are arranged linearly parallel to the substrate plane at the chip end face.
[0020] In the optical circuit of the present disclosure, multiple waveguides are arranged at the same height on an axis perpendicular to the substrate surface at a second end face on the side that connects to a core of an SCF or a waveguide core of another optical circuit. Some of the waveguides in the optical circuit include a transition region in which the core height gradually changes from a first height to a second height from the first end face on the side that connects to an MCF on the chip to the second end face. The optical circuit of the present disclosure will be described in detail below, along with its specific configuration.
[0021] FIG. 4 illustrates the configuration of an optical transceiver including a PLC-type FIFO according to the present disclosure. (b) of FIG. 4 is a top view (xz plane) of a portion of the optical transceiver 100 including a transmitter. (a) and (c) of FIG. 4 are a cross-sectional view (xy plane) taken along line AA and perpendicular to the substrate surface, and a cross-sectional view (yz plane) taken along line CC and perpendicular to the substrate surface. The optical transceiver 100 illustrated in FIG. 4 is shown with its length in the x-axis direction shortened, and has roughly the same overall configuration as the optical transceiver 70 illustrated in FIG. 2. The following points are different from the configuration of the conventional optical transceiver illustrated in FIG. 2.
[0022] The optical circuit of the present disclosure is a PLC-type FIFO chip 101 having a FIFO function, and corresponds to the conventional PLC-type FIFO chip 61 shown in FIG. 2. As shown in the top view of FIG. 4(b), the FIFO chip 101 includes a plurality of waveguides 2-1 to 2-4 whose waveguide spacing at the end face connected to the MCF is expanded and developed along the x direction to match the spacing of the output waveguides of an optical modulator chip 21, which is another optical circuit. Like the conventional FIFO chip 61 of FIG. 2, the FIFO chip 101 of FIG. 4 is also connected to an MCF (not shown) at the right end of the drawing. Therefore, the configuration of the waveguides at the end face (first end face) of the FIFO chip 101 connected to the MCF is the same as that shown in FIG. 1(b).
[0023] The conventional FIFO chip 61 shown in Fig. 2 has waveguides formed in two core layers at different heights on the second end facet connected to another optical circuit such as an optical modulator chip. In contrast, in the FIFO chip 101 shown in Fig. 4(c), the waveguides 2-1 to 2-4 are configured at the same height (first height) from the substrate 10 on the second end facet (yz plane) connected to the optical modulator chip 21. On the first end facet connected to the MCF, the waveguides 2-1 to 2-4 are configured in two core layers at the first height and the second height, as shown in the cross-sectional view of Fig. 1(b), in order to connect to the four cores of the MCF.
[0024] The above-mentioned FIFO chip has a first end face connected to the MCF, where the height of the second group of waveguides 2-1 and 2-2 in the layer farthest from the substrate is gradually changed until it reaches the same height (first height) as the first group of waveguides 2-3 and 2-4 in the layer closer to the substrate.
[0025] As shown in Fig. 4(b), the FIFO chip 101 connected to the optical modulator chip 21 has a core height transition region 110 in which the height of the waveguide core changes near the second end face. As shown in Fig. 4(a), in the transition region 110, the height of the waveguides 2-1 and 2-2 of the second group gradually decreases toward the second end face, and at the second end face, the height is the same as that of the waveguides 2-3 and 2-4 of the first group.
[0026] Therefore, the optical circuit of the present disclosure can be implemented as an optical circuit 101 on a substrate, comprising a plurality of waveguides formed in at least two core layers and configured to increase their mutual spacing within the substrate surface from a first end face to a second end face of the substrate, wherein one or more waveguides 2-3, 2-4 of the plurality of waveguides are located at a first height from the substrate, and one or more waveguides 2-1, 2-2 of the plurality of waveguides are located at a second height at the first end face that is farther from the substrate than the first height, and at the second end face at the first height, and wherein a core height gradually changes from the second height to the first height in a transition region 110 between the first end face and the second end face, and the plurality of waveguides are configured to be at the same height at the second end face.
[0027] FIG. 5 is a perspective view illustrating the configuration of the core height transition region of the FIFO chip of the present disclosure. It is a view of the chip end face including the core height transition region 110 at an intermediate stage of the FIFO chip manufacturing flow described below. The configuration in FIG. 5 shows the stage at which the upper cladding layer 11a is etched to form a sloped cladding layer so that the thickness of the upper cladding layer 11a is zero at the end face, i.e., the height of the upper cladding layer 11a is the same as the height of the lower cladding layer 11b. After forming such a sloped surface, the waveguide 2-2 is formed. In FIG. 5, the sloped surface in the transition region 110 is shown as a straight line, with a right-angled inner surface and a sharply curved waveguide 2-2. However, because FIG. 5 exaggerates the height direction and significantly compresses the waveguide length direction, the transition region 110 can be considered substantially flat in terms of waveguide fabrication.
[0028] Referring again to FIG. 4, the FIFO chip 101 having the transition region 110 is configured at the same height from the substrate and in a straight line parallel to the substrate surface at the second end face connected to the optical modulator chip 21. The above-described configuration of the FIFO chip 101 allows the optical modulator chip 21 to integrate four MZIs on a single chip. In the conventional optical transceiver shown in FIG. 2, the four waveguides were at different heights on the chip end face, requiring separate optical modulator chips. In the optical transceiver 100 shown in FIG. 4, the optical modulator chip mounting process can be performed only once, thereby improving the efficiency of the optical transceiver manufacturing process.
[0029] 4 shows an example in which four channels of modulated optical signals from the optical modulator chip 21 are connected to a four-core MCF, but the FIFO chip 101 can also be connected to the cores of an MCF with more cores. By integrating more MZIs into one chip, the integration of optical transceivers can be advanced.
[0030] While Figure 4 shows an example of an MCF connected to two layers of waveguides in an optical circuit, a FIFO chip 101 connected to an MCF with three or more layers of cores is also feasible. For example, consider a FIFO chip connected to a seven-core MCF with cores at the center and vertices of a regular hexagon. In this case, the height of the second-layer waveguide from the substrate surface side gradually decreases toward the chip end face in the first core height transition region, until the end face is flush with the first-layer waveguide. Furthermore, the height of the third-layer waveguide from the substrate surface side gradually decreases toward the chip end face in the second core height transition region, until the end face is flush with the first-layer waveguide. The fabrication process for the sloped surface structure and waveguide shown in Figure 5 can be performed twice.
[0031] In the FIFO chip 101 shown in Figure 4 for connection to a four-core MCF, there are two waveguides in the first group whose core height remains the first height, and two waveguides in the second group whose core height changes to the second height in the transition region. The number of waveguides in the first group and the second group vary depending on the number and arrangement of cores in the cross section of the MCF. The FIFO chip 101 shown in Figure 4 can also be applied to the receiver of an optical transceiver.
[0032] FIG. 6 illustrates the configuration of an optical transceiver including a PLC-type FIFO according to the present disclosure. (b) of FIG. 6 is a top view (x-z plane) of a portion of the optical transceiver 100 including a receiver. (a) and (c) of FIG. 6 are a cross-sectional view (x-y plane) taken along line AA and perpendicular to the substrate surface, and a cross-sectional view (y-z plane) taken along line CC and perpendicular to the substrate surface. The optical transceiver 100 illustrated in FIG. 6 has roughly the same overall configuration as the optical transceiver 70 illustrated in FIG. 3. It differs from the configuration of the conventional optical transceiver illustrated in FIG. 3 in the following respects.
[0033] 6(c), in the FIFO chip 102, on the second end face (yz plane) connected to the PD array 41 at the left end of the drawing, the waveguides 2-1 to 2-4 are configured at the same height on the axis (y axis) perpendicular to the substrate 10. On the first end face connected to the MCF of the FIFO chip 101, the waveguides 2-1 to 2-4 are configured in two core layers to connect to the four cores of the MCF, as shown in the cross-sectional view of FIG. 1(b).
[0034] The above-described FIFO chip 102 may also have a structure in which the height from the substrate 10 gradually changes from the waveguides 2-1 and 2-2 in the layer farthest from the substrate surface to the same height as the waveguides 2-3 and 2-4 in the layer closest to the substrate at the first end face connected to the MCF. Therefore, the FIFO chip 102 can be realized with exactly the same configuration as the FIFO chip 102 for the transmitter shown in FIG. 4. As shown in FIG. 6(b), the FIFO chip 102 connected to the PD array 41 has a core height transition region 110 near the second end face where the height of the waveguide core changes. As shown in FIG. 6(a), in the transition region 110, the height of the waveguides 2-1 and 2-2 gradually decreases toward the second end face, and at the second end face, they reach the same height as the waveguides 2-3 and 2-4.
[0035] The above-described configuration of the FIFO chip 102 allows PDs for four channels to be integrated into a single PD array 41 chip. In the conventional optical transceiver shown in Figure 3, the four waveguides were at different heights on the chip end face, requiring separate PD chips. In the optical transceiver 100 shown in Figure 6, the PD array 41 only needs to be mounted once, thereby improving the efficiency of the optical transceiver manufacturing process.
[0036] The FIFO chip 101 for the transmitter shown in Fig. 4 and the FIFO chip 102 for the receiver shown in Fig. 6 can be realized with the same configuration. In a PSM optical transceiver, a modulated optical signal from an optical modulator chip is output to the MCF side, and a received signal from the MCF is input to each PD in the PD array. Therefore, the only difference between the transmitter and receiver is the propagation direction of the optical signal relative to the MCF.
[0037] In a PSM optical transceiver, the transmitter shown in Figure 4 and the receiver shown in Figure 6 are housed in a single package, and can be configured as a QSFP+ optical module with a specified physical size configuration.
[0038] FIG. 7 is a process flow diagram showing the manufacturing procedure of the FIFO chip of the present disclosure. Each figure is a perspective view of the FIFO chip of FIGS. 4 and 6, including the second end face (yz plane) connected to an optical modulator chip or a PD array. At the second end face of the FIFO, the waveguide spacing at the first end face (not shown) connected to the MCF is enlarged for connection to an SCF or other optical circuit. In each figure of FIG. 7, the cross-sectional size of the waveguide is greatly enlarged. Note that the second end face is created after the FIFO chip is cut out from the wafer, and does not exist during the process of FIG. 7.
[0039] In step (a), a first cladding layer 11a and a metal layer 12 are formed on a substrate 10 made of silicon, synthetic quartz, or the like. In step (b), waveguides 2-3 and 2-4 are fabricated by photolithography. In step (c), a second cladding layer 11b is formed.
[0040] Next, in step (d), the second cladding layer 11b is locally etched to form the slope of the transition region 110. Local etching is performed at the position that will become the second end face in the x direction, so that the etched surface is at the same height as the upper surface of the first cladding layer 11a. In FIG. 7(d), the inner surface of the slope is depicted as being sharply cut, but in reality, it has a smooth shape. Furthermore, the slope does not have to be linear, but may be smooth.
[0041] In the next step (e), a metal layer 13 is formed on the entire surface, including the transition region 110. Then, in step (f), waveguides 2-1 and 2-2 are fabricated on the upper surface of the transition region 110. Finally, in step (g), an overclad layer 11c is formed on the entire surface. Through the above manufacturing steps, the cores of the waveguides 2-1 to 2-4 are arranged in a straight line parallel to the substrate surface at the chip end face (second end face) connected to the optical modulator chip or PD array.
[0042] 4 to 7, the transition region 110 that changes the core height is shown as being in contact with the second end face and having the same height (first height) at the second end face. The position of the transition region 110 within the chip (xz plane) is not limited to this, and the transition region 110 may have the same height (first height) at a position inside the chip surface from the second end face.
[0043] In the FIFO chips 101 and 102 shown in FIGS. 4 and 6, which are optical circuits according to the present disclosure, the second end face connected to another optical circuit such as an optical modulator chip or a PD array, and the first end face connected to an MCF, are located on opposing short sides of the chip. When the PLC-type FIFO chips 101 and 102 are configured using a silicon substrate, the length of the long side (z direction) is approximately 5 mm, and the length of the short side is approximately 1 mm. When the FIFO chips 101 and 102 are used as FIFOs between an MCF and multiple SCFs, rather than in combination with an optical transceiver, it is preferable to have the ends on opposing short sides, as shown in FIGS. 4 and 6.
[0044] However, when the FIFO chip is used to connect an MCF to another optical circuit, the second end face and the first end face may be two orthogonal end faces of the chip. Furthermore, when the shape of the chip is close to a square, the second end face and the first end face may be on the same side by using a layout in which multiple waveguides are folded back.
[0045] 4 and 6 have been described as optical transceiver configurations that connect FIFO chips 101 and 102 to other optical circuits such as optical modulator chips and PD arrays. However, even when four SCFs are connected, they can be connected to a fiber array at the same height, which makes the manufacturing process of the FIFO as shown in FIG. 1 easier. Furthermore, the FIFO chips 101 and 102 of the optical circuit disclosed herein can be used not only in optical transceivers but also in combination with other optical circuits and devices that are connected to MCFs. [Industrial Applicability]
[0046] The present invention can be generally applied to optical communications. [Explanation of symbols]
[0047] 1-1~1-4, 2-1~2-4 waveguide 10 Substrate 20-1, 20-2, 21 Optical modulator chip 30LD 40-1~40-4 PD 41 PD array 50 MCF 51, 51-1, 51-2 SCF 61, 101, 102 FIFO chips 70, 100 Optical Transceiver
Claims
1. an optical circuit on a substrate, a plurality of waveguides formed in at least two core layers, the plurality of waveguides being configured such that the spacing between them increases in a substrate plane from a first end face toward a second end face of the substrate; a first group of one or more waveguides of the plurality of waveguides are located at a first height above the substrate; a second group of one or more waveguides among the plurality of waveguides is located at a second height at the first end face that is farther from the substrate than the first height, and at the second end face that is at the first height, and a core height gradually changes from the second height to the first height in a transition region between the first end face and the second end face; The optical circuit is configured so that the plurality of waveguides are at the same height on the second end face.
2. 2. The optical circuit of claim 1, wherein the arrangement of the cores of the plurality of waveguides at the first end face corresponds to the arrangement of the cores in a cross section of a multicore fiber.
3. 3. The optical circuit of claim 1, wherein the first group includes two waveguides, and the second group includes two waveguides, and the first end face corresponds to a core arrangement in a cross section of a four-core multicore fiber.
Citation Information
Patent Citations
Multicore fiber splicer
JP7071636B2