Range imaging apparatus

Abstract

To improve the accuracy of distance measurement.SOLUTION: A distance image capturing apparatus includes a light receiving unit including a light source unit that emits a light pulse, a pixel circuit including a photoelectric conversion element that generates an electric charge corresponding to the light and a plurality of charge accumulation units, and a pixel drive circuit that distributes and accumulates the electric charge in each of the charge accumulation units, and a distance image processing unit that determines a measurement distance to a subject based on an amount of electric charge accumulated in each of the charge accumulation units, wherein the pixel circuit includes a transfer transistor corresponding to each of the plurality of charge accumulation units and a charge discharging transistor that discharges the electric charge from the photoelectric conversion element, the distance image processing unit drives the pixel drive circuit so that a constant interval is formed from an off timing of the charge discharging transistor to an on timing of the transfer transistor, and the on timing of the transfer transistor is a different timing in each of the charge accumulating units.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a distance imaging device. [Background technology]

[0002] Time-of-Flight (hereinafter referred to as "TOF") distance imaging devices have been realized that utilize the fact that the speed of light is known and measure the distance between a measuring device and an object based on the time of flight of light in space (measurement space) (see, for example, Patent Document 1). Known TOF distance imaging devices include a photoelectric conversion element that converts the amount of incident light into electric charges, and a distance imaging element that distributes and accumulates the electric charges converted by the photoelectric conversion element in multiple charge accumulation units. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 4235729 Summary of the Invention [Problem to be solved by the invention]

[0004] However, in the conventional distance imaging device described above, in order to improve distance accuracy, it is necessary to accurately distribute reflected light to each charge accumulation unit. That is, in the conventional distance imaging device, when the charges converted by the photoelectric conversion element are transferred to each charge accumulation unit, if there is a characteristic difference (e.g., characteristic dependency of the charge accumulation unit), this affects distance accuracy, and it may become difficult to ensure distance accuracy.

[0005] The present invention has been made to solve the above problems, and an object of the present invention is to provide a range image pickup device that can improve the accuracy of distance measurement. [Means for solving the problem]

[0006] In order to solve the above problems, one aspect of the present invention is a distance image capturing device comprising: a light receiving unit having a light source unit that irradiates a measurement space in which a subject is present with a light pulse; a pixel circuit having a photoelectric conversion element that generates a charge in response to the incident light and a plurality of charge accumulation units that accumulate the charge; and a pixel drive circuit that allocates and accumulates the charge in each of the charge accumulation units in the pixel circuit at a predetermined timing synchronized with the irradiation of the light pulse; and a distance image processing unit that determines a measurement distance to the subject based on the amount of charge accumulated in each of the charge accumulation units, wherein the pixel circuit comprises transfer transistors corresponding to each of the plurality of charge accumulation units, the transfer transistors transferring the charge from the photoelectric conversion element to each of the charge accumulation units, and charge drain transistors draining the charge from the photoelectric conversion element, and the distance image processing unit drives the pixel drive circuit so that the time interval between the off timing of the charge drain transistor and the on timing of the transfer transistor is constant and so that the on timing of the transfer transistor is different for each of the charge accumulation units, thereby allocating and accumulating the charge in each of the charge accumulation units. [Effects of the Invention]

[0007] According to the present invention, the accuracy of distance measurement can be improved. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a block diagram showing an example of a distance imaging device according to an embodiment of the present invention; [Figure 2] FIG. 2 is a block diagram showing an example of a range image sensor according to the present embodiment. [Figure 3] FIG. 2 is a block diagram showing an example of a pixel circuit according to the present embodiment. [Figure 4] 5 is a timing chart showing an example of the operation of the range imaging device according to the present embodiment in normal driving mode. [Figure 5] 1 is a timing chart showing an example of the operation of a conventional distance imaging device in normal driving mode. [Figure 6] FIG. 1 is a first diagram illustrating a comparison between the present embodiment and the prior art in normal driving. [Figure 7] FIG. 2 is a second diagram illustrating a comparison between the present embodiment and the prior art in normal driving. [Figure 8] FIG. 3 is a first diagram showing the distance accuracy of the distance image pickup device according to the present embodiment. [Figure 9] FIG. 2 is a second diagram showing the distance accuracy of the distance image pickup device according to this embodiment. [Figure 10] 10 is a timing chart showing an example of the operation of the range image pickup device according to the present embodiment when driven in HDR mode. [Figure 11] 10 is a timing chart showing an example of the operation of the conventional distance imaging device when driven in HDR mode. [Figure 12] FIG. 1 is a first diagram illustrating a comparison between this embodiment and the prior art in HDR driving. [Figure 13] FIG. 2 is a second diagram illustrating a comparison between the present embodiment and the prior art in HDR driving. DETAILED DESCRIPTION OF THE INVENTION

[0009] A range imaging device according to an embodiment of the present invention will now be described with reference to the drawings.

[0010] FIG. 1 is a block diagram showing an example of a distance image capturing device 1 according to this embodiment. As shown in Fig. 1, the distance image capturing device 1 includes a light source unit 2, a light receiving unit 3, and a distance image processing unit 4. Fig. 1 also shows a subject OB, which is an object to measure the distance to using the distance image capturing device 1.

[0011] The light source unit 2 irradiates a light pulse PO into a space to be photographed, in which a subject OB, the distance of which is to be measured by the distance image pickup device 1, is present, under the control of the distance image processor 4. The light source unit 2 is, for example, a surface-emitting semiconductor laser module such as a vertical cavity surface-emitting laser (VCSEL). The light source unit 2 also includes a light source device 21 and a diffuser plate 22.

[0012] The light source device 21 is a light source that emits laser light in a near-infrared wavelength band (for example, a wavelength band of 850 nm to 940 nm) that becomes the light pulses PO that are irradiated onto the subject OB. The light source device 21 is, for example, a semiconductor laser light-emitting element. The light source device 21 emits pulsed laser light in response to control from the measurement control unit 43.

[0013] The diffusion plate 22 is an optical component that diffuses the laser light in the near-infrared wavelength band emitted by the light source device 21 to the extent of the surface that is irradiated onto the subject OB. The pulsed laser light diffused by the diffusion plate 22 is emitted as a light pulse PO and is irradiated onto the subject OB.

[0014] The light receiving unit 3 receives reflected light RL of the light pulse PO reflected by an object OB, the distance of which is to be measured in the range image pickup device 1, and outputs a pixel signal corresponding to the received reflected light RL. The light receiving unit 3 includes a lens 31 and a range image sensor 32.

[0015] The lens 31 is an optical lens that guides the incident reflected light RL to the range image sensor 32. The lens 31 outputs the incident reflected light RL to the range image sensor 32 side, and causes the light to be received (incident) by pixel circuits 321 provided in the light receiving region of the range image sensor 32.

[0016] The range image sensor 32 is an imaging element used in the range image capturing device 1. The range image sensor 32 includes a plurality of pixel circuits 321 in a two-dimensional light receiving area, and a pixel drive circuit 322 that controls each of the pixel circuits 321.

[0017] The pixel circuit 321 includes one photoelectric conversion element (for example, a photoelectric conversion element PD described later), a plurality of charge accumulation units (for example, charge accumulation units CS (CS1 to CS4) described later) corresponding to the one photoelectric conversion element, and components that distribute charge to each charge accumulation unit.

[0018] The pixel drive circuit 322 turns on the transfer transistors G (described later) of the charge accumulation sections CS (CS1 to CS4) at predetermined accumulation timing synchronized with the irradiation of the light pulse PO, and distributes and accumulates the charges. The distance image sensor 32 including the pixel circuits 321 and the pixel drive circuits 322 will be described in detail later with reference to FIG.

[0019] The range image sensor 32 distributes the charges generated by the photoelectric conversion elements to the respective charge accumulation sections in accordance with control from the measurement control section 43. The range image sensor 32 also outputs pixel signals according to the amount of charge distributed to the charge accumulation sections. The range image sensor 32 has multiple pixel circuits arranged in a two-dimensional matrix, and outputs pixel signals for one frame corresponding to each pixel circuit.

[0020] Here, the detailed configuration of the distance image sensor 32 will be described with reference to FIG. FIG. 2 is a block diagram showing an example of the distance image sensor 32 in this embodiment.

[0021] 2, the distance image sensor 32 includes, for example, a light receiving area 320 in which a plurality of pixel circuits 321 are arranged, and a pixel driving circuit 322. The pixel driving circuit 322 also includes a vertical scanning circuit 323 having a distribution operation, a horizontal scanning circuit 324, a pixel signal processing circuit 325, and a control circuit 326.

[0022] The light receiving region 320 is a region in which a plurality of pixel circuits 321 are arranged, and in FIG. 2, an example is shown in which the pixel circuits are arranged in a two-dimensional matrix of 8 rows and 8 columns. A plurality of pixel circuits 321 are arranged in a two-dimensional matrix, and accumulate electric charges corresponding to the amount of light received. The detailed configuration of the pixel circuits 321 will be described later with reference to FIG.

[0023] The control circuit 326 comprehensively controls the range image sensor 32. The control circuit 326 controls the operation of the components of the range image sensor 32, for example, in response to instructions from the measurement control unit 43 of the range image processing unit 4. Note that the components of the range image sensor 32 may be directly controlled by the measurement control unit 43, in which case the control circuit 326 may be omitted.

[0024] The vertical scanning circuit 323 is a circuit that controls the pixel circuits 321 arranged in the light receiving region 320 for each row in accordance with control from the control circuit 326. The vertical scanning circuit 323 outputs a voltage signal corresponding to the amount of charge accumulated in each charge accumulation unit CS of the pixel circuits 321 to the pixel signal processing circuit 325. In this case, the vertical scanning circuit 323 distributes and accumulates the charge converted by the photoelectric conversion element in each charge accumulation unit CS of the pixel circuits 321.

[0025] The pixel signal processing circuit 325, under the control of the control circuit 326, performs predetermined signal processing (for example, noise suppression processing, A / D conversion processing, etc.) on the voltage signals output from the pixel circuits 321 of each column.

[0026] Horizontal scanning circuit 324 is a circuit that outputs signals output from pixel signal processing circuit 325 sequentially in time series under control of control circuit 326. As a result, pixel signals corresponding to the amount of charge accumulated for one frame are output sequentially to distance image processing unit 4. In the following explanation, it is assumed that pixel signal processing circuit 325 performs A / D conversion processing and that the pixel signals are digital signals.

[0027] Next, the configuration of the pixel circuit 321 arranged in the light receiving region 320 provided in the range image sensor 32 will be described with reference to FIG.

[0028] FIG. 3 is a block diagram showing an example of a pixel circuit 321 in this embodiment. The pixel circuit 321 shown in FIG. 3 is an example configuration including four pixel signal readout units RU (RU1 to RU4).

[0029] 3, the pixel circuit 321 includes one photoelectric conversion element PD, a charge discharging transistor GD, and four pixel signal readout units RU (RU1 to RU4) that output voltage signals from corresponding output terminals O (O1 to O4). Each pixel signal readout unit RU includes a transfer transistor G, a floating diffusion FD, a charge storage capacitance C, a reset transistor RT, a source follower transistor SF, and a selection transistor SL. The floating diffusion FD and the charge storage capacitance C form a charge storage unit CS.

[0030] 3, the pixel signal readout unit RU1, which outputs a voltage signal from the output terminal O1, includes a transfer transistor G1, a floating diffusion FD1, a capacitor C1 (charge storage capacitance C), a reset transistor RT1, a source follower transistor SF1, and a selection transistor SL1. In the pixel signal readout unit RU1, the floating diffusion FD1 and the capacitor C1 form a charge storage unit CS1. The pixel signal readout units RU2 to RU4 have a similar configuration.

[0031] The photoelectric conversion element PD is a buried photodiode that photoelectrically converts incident light, generates charges corresponding to the incident light, and accumulates the generated charges. In this embodiment, the incident light is incident from the space to be measured.

[0032] In the pixel circuit 321, the photoelectric conversion element PD photoelectrically converts incident light to generate electric charges, which are then distributed to each of the four charge accumulation units CS (CS1 to CS4), and voltage signals corresponding to the amounts of the distributed electric charges are output to the pixel signal processing circuit 325.

[0033] Furthermore, the configuration of the pixel circuit arranged in the distance image sensor 32 is not limited to the configuration having four pixel signal readout units RU (RU1 to RU4) as shown in Figure 3, but may be a pixel circuit having a configuration having two or more pixel signal readout units RU.

[0034] Furthermore, in driving the pixel circuit 321, a light pulse PO is emitted at an emission time To, and reflected light RL is received by the distance image sensor 32 after a delay time Td. The pixel drive circuit 322 is controlled by the measurement control unit 43 to synchronize with the emission of the light pulse PO according to a frame period, and to redirect the charges generated in the photoelectric conversion element PD by supplying accumulation drive signals TX1 to TX4 to the transfer transistors G (G1, G2, G3, G4) at the respective timings, causing the charges to be accumulated in the charge accumulation units CS1, CS2, CS3, CS4 in that order. The details of driving the pixel circuit 321 will be described later with reference to the drawings.

[0035] In addition, the pixel driving circuit 322 controls each of the reset transistor RT and the selection transistor SL by driving signals RST and SEL, respectively, converts the charges accumulated in the charge storage unit CS into an electrical signal by the source follower transistor SF, and outputs the generated electrical signal to the distance calculation unit 42 via the output terminal O.

[0036] Furthermore, under the control of the measurement control unit 43, the pixel driving circuit 322 turns on the charge discharging transistor GD using the driving signal RSTD, and discharges the charge generated in the photoelectric conversion element PD to the power supply VDD (erases the charge).

[0037] 1, the distance image processor 4 controls the distance image pickup device 1 and calculates the distance to the subject OB. Based on the amount of charge accumulated in each charge accumulation unit CS, the distance image processor 4 measures the distance to the subject OB present in the measurement space as the measurement distance. Further, distance image processing unit 4 includes timing control unit 41, distance calculation unit 42, and measurement control unit 43.

[0038] The timing control unit 41 controls the timing of outputting various control signals required for measurement in accordance with the control of the measurement control unit 43. The various control signals here include, for example, a signal that controls the irradiation of the light pulse PO, a signal that distributes and accumulates the reflected light RL in multiple charge accumulation units CS, and a signal that controls the number of accumulations per frame. The number of accumulations is the number of times that the process of distributing and accumulating electric charge in the charge accumulation units CS is repeated, and is a predetermined number of distributions per frame period. The product of this number of accumulations and the time duration (accumulation time duration) for accumulating electric charge in each charge accumulation unit CS per process of distributing and accumulating electric charge is the exposure time.

[0039] The timing control unit 41 drives the pixel drive circuit 322 so that, for example, there is a fixed interval between the off timing of the charge discharging transistor GD and the on timing of the transfer transistor G, and so that the on timing of the transfer transistor G is different for each charge accumulation unit CS, thereby distributing and accumulating charge in each charge accumulation unit CS. Note that the above-mentioned fixed interval is, for example, a period of 0 or more, and also includes the case where the off timing of the charge discharging transistor GD and the on timing of the transfer transistor G are simultaneous.

[0040] Furthermore, the timing control unit 41 drives the pixel driving circuit 322 so that the number of times the transfer transistor G is turned on is the same for each charge accumulation unit CS immediately after the charge discharging transistor GD is turned off.

[0041] The distance calculation unit 42 outputs distance information calculated based on the pixel signals output from the distance image sensor 32. The distance calculation unit 42 calculates the delay time from when the light pulse PO is emitted until when the reflected light RL is received based on the amount of charge accumulated in the multiple charge accumulation units CS. The distance calculation unit 42 calculates the distance to the object OB according to the calculated delay time.

[0042] In this embodiment, the light source unit 2 irradiates different areas with multiple light pulses PO at different times. Therefore, the distance calculation unit 42 calculates the distance to the object OB corresponding to the irradiation area (irradiation position) of each light pulse PO based on the reflected light RL corresponding to the multiple light pulses PO. The distance calculation unit 42 combines the calculated distances to the object OB corresponding to each light pulse PO to generate a distance image (distance information) corresponding to the entire imaging area.

[0043] The distance calculation unit 42 calculates the delay time Td according to the following formula (1), utilizing the fact that the amount of charge corresponding to the reflected light RL component is divided and stored in the two charge storage units CS at a ratio according to the delay time Td until the reflected light RL is incident on the distance image pickup device 1. The distance calculation unit 42 calculates the round-trip distance to the subject OB by multiplying the delay time Td calculated by formula (1) by the speed of light (velocity). The distance calculation unit 42 then calculates the distance to the subject OB by dividing the calculated round-trip distance. Note that formula (1) assumes that the amount of charge corresponding to the external light component (disturbance light component) is accumulated in the charge storage unit CS1, and the amount of charge corresponding to the reflected light RL component is divided and stored in the charge storage units CS2 and CS3.

[0044] Td=To×(Q3-Q1) / (Q2+Q3-2×Q1) …(1) Here, To is the period during which the light pulse PO is irradiated. Q1 is the amount of charge stored in the charge storage unit CS1. Q2 is the amount of charge stored in the charge storage unit CS2. Q3 is the amount of charge stored in the charge storage unit CS3.

[0045] The example shown in equation (1) is an example in which the amount of charge of the reflected light RL is divided and stored in the charge storage units CS2 and CS3, with the amount of charge corresponding to the component of the reflected light RL being divided and stored in the charge storage units CS2 and CS3. Therefore, for example, if the charge is stored in the charge storage units CS1 and CS2 or the charge storage units CS3 and CS4, the basic method for calculating the delay time Td from the ratio of the amount of charge stored in the two charge storage units CS is the same, although it will be slightly different.

[0046] The measurement control unit 43 controls the timing control unit 41. For example, the measurement control unit 43 sets the number of accumulations and accumulation time width for one frame, and controls the timing control unit 41 so that imaging is performed according to the set contents.

[0047] With this configuration, in the distance image capturing device 1, the light source unit 2 irradiates a light pulse PO in the near-infrared wavelength band onto the subject OB, and the light receiving unit 3 receives the reflected light RL reflected by the subject OB, and the distance image processing unit 4 outputs distance information (distance image) measuring the distance to the subject OB.

[0048] Next, the operation of the range image pickup device 1 according to this embodiment will be described with reference to the drawings. First, the normal drive timing of the range image pickup device 1 according to this embodiment will be described with reference to FIG.

[0049] FIG. 4 is a timing chart showing an example of the operation of the range image pickup device 1 according to this embodiment in normal driving. 4, waveform W1 indicates a state L1 of irradiation of light pulse PO, and waveform W2 indicates a state L2 of reception of reflected light RL. Waveforms W3 to W7 indicate the states of transfer transistors G1 to G4 and charge discharging transistor GD. In waveforms W3 to W7, the H (High) state indicates an ON state (conducting state), and the L (Low) state indicates an OFF state (non-conducting state).

[0050] 4, in normal driving of pixel circuit 321, first, at time T1, timing control unit 41 causes light source unit 2 to output a light pulse PO (see waveform W1) and drives pixel drive circuit 322 to turn off charge discharging transistor GD (see waveform W7). Note that the light pulse PO output at time T1 is referred to as light pulse PO1 (first light pulse).

[0051] Next, at time T2, the timing control unit 41 drives the pixel drive circuit 322 to turn on the transfer transistor G1 (first transfer transistor) (see waveform W3). This allows charge to be stored in the charge storage unit CS1 from the photoelectric conversion element PD. Note that the period from the off timing of the charge discharging transistor GD to the on timing of the transfer transistor G1 is defined as period TD, and the period from the output timing of the light pulse PO1 to the on timing of the transfer transistor G1 is defined as period TLD1.

[0052] Next, at time T3, the timing control unit 41 causes the light source unit 2 to output a light pulse PO (see waveform W1), and at time T4, causes the pixel drive circuit 322 to drive the charge discharging transistor GD to turn off (see waveform W7). Note that the light pulse PO output at time T3 is referred to as a light pulse PO2 (second light pulse).

[0053] Next, at time T5, the timing control unit 41 drives the pixel drive circuit 322 to turn on the transfer transistor G2 (second transfer transistor) (see waveform W4). This allows charge to be accumulated in the charge accumulation unit CS2 from the photoelectric conversion element PD. The period from the off timing of the charge discharging transistor GD to the on timing of the transfer transistor G2 is defined as period TD, and the period from the output timing of the light pulse PO2 to the on timing of the transfer transistor G2 is defined as period TLD2. The above-mentioned periods TLD1 and TLD2 have different timings and are set so that the on-state periods of the transfer transistors G do not overlap.

[0054] Next, at time T6, the timing control unit 41 causes the light source unit 2 to output a light pulse PO (see waveform W1), and at time T7, causes the pixel drive circuit 322 to drive the charge discharging transistor GD to turn off (see waveform W7). Note that the light pulse PO output at time T6 is referred to as a light pulse PO3 (third light pulse).

[0055] Next, at time T8, the timing control unit 41 drives the pixel drive circuit 322 to turn on the transfer transistor G3 (third transfer transistor) (see waveform W5). This allows charge to be stored in the charge storage unit CS3 from the photoelectric conversion element PD. The period from the off timing of the charge discharging transistor GD to the on timing of the transfer transistor G3 is defined as period TD, and the period from the output timing of the light pulse PO3 to the on timing of the transfer transistor G3 is defined as period TLD3. The above-mentioned periods TLD2 and TLD3 have different timings and are set so that the on-state periods of the transfer transistors G do not overlap.

[0056] Next, at time T9, the timing control unit 41 causes the light source unit 2 to output a light pulse PO (see waveform W1), and at time T10, causes the pixel drive circuit 322 to drive the charge discharging transistor GD to turn off (see waveform W7). Note that the light pulse PO output at time T9 is referred to as a light pulse PO4 (fourth light pulse).

[0057] Next, at time T11, the timing control unit 41 drives the pixel drive circuit 322 to turn on the transfer transistor G4 (fourth transfer transistor) (see waveform W6). This allows charge to be stored in the charge storage unit CS4 from the photoelectric conversion element PD. The period from the off timing of the charge discharging transistor GD to the on timing of the transfer transistor G4 is defined as period TD, and the period from the output timing of the light pulse PO4 to the on timing of the transfer transistor G4 is defined as period TLD4. The above-mentioned periods TLD3 and TLD4 have different timings and are set so that the on-state periods of the transfer transistors G do not overlap.

[0058] In this way, distance image processor 4 causes light source unit 2 to emit light pulses PO (light pulses PO1 to PO4) in accordance with the accumulation of charge in each of the plurality of charge accumulation units CS. Distance image processor 4 also drives pixel drive circuit 322 so that there is a fixed interval (period TD) between the off timing of charge discharge transistor GD and the on timing of transfer transistor G, and so that the on timing of transfer transistor G differs for each charge accumulation unit CS, thereby distributing and accumulating charge in each charge accumulation unit CS.

[0059] 4, a frame period indicating the period of one frame includes an accumulation period and a readout period. The accumulation period includes cycle periods indicating the basic period in the accumulation period, the number of times equal to the number of accumulations.

[0060] As shown in FIG. 4, the cycle period in normal driving of this embodiment has a first driving pattern, a second driving pattern, a third driving pattern, and a fourth driving pattern.

[0061] The period from time T1 to time T3 is the first driving pattern, and charges are accumulated from the photoelectric conversion element PD in the charge accumulation unit CS1. Furthermore, the period from time T3 to time T6 is the second driving pattern, and charges are accumulated from the photoelectric conversion element PD in the charge accumulation unit CS2.

[0062] Furthermore, the period from time T6 to time T9 corresponds to the third driving pattern, in which charges are accumulated from the photoelectric conversion element PD in the charge accumulation unit CS3. Furthermore, the period from time T9 to time T12 corresponds to the fourth driving pattern, in which charge is accumulated from the photoelectric conversion element PD in the charge accumulation unit CS4.

[0063] In this way, distance image processing unit 4 causes pixel drive circuit 322 to drive in sequence using the first to fourth drive patterns in a cycle period.

[0064] Next, for comparison, the operation of normal driving in the prior art will be described with reference to FIG. FIG. 5 is a timing chart showing an example of the operation of a conventional distance imaging device in normal driving mode.

[0065] 5, waveform W11 indicates a state L1 of irradiation of light pulse PO, and waveform W12 indicates a state L2 of reception of reflected light RL. Waveforms W13 to W17 indicate the states of transfer transistors G1 to G4 and charge discharging transistor GD. In waveforms W13 to W17, the H state indicates an ON state (conducting state), and the L state indicates an OFF state (non-conducting state).

[0066] As shown in FIG. 5, in the normal driving of the conventional technology, at time T21, the light source unit 2 outputs a light pulse PO (see waveform W11), and the charge discharging transistor GD is turned off (see waveform W17).

[0067] Next, at time T22, the transfer transistor G1 is turned on, and at time T23, the transfer transistor G2 is turned on. At time T24, the transfer transistor G3 is turned on, and at time T25, the transfer transistor G4 is turned on.

[0068] In addition, a period TD is provided as a gap period between the off timing of the charge discharging transistor GD and the on timing of the transfer transistor G1, the period between the off timing of each transfer transistor G and the on timing of the next transfer transistor G, and the period between the off timing of the transfer transistor G4 and the on timing of the charge discharging transistor GD.

[0069] Each of the periods TLD1 to TLD4 is the same as the normal drive period according to this embodiment shown in FIG. Next, a comparison between this embodiment and the prior art in normal driving will be described with reference to FIGS.

[0070] 6 is a first diagram illustrating a comparison between this embodiment and the prior art in normal driving. Here, a comparison is made of the number of times the transfer transistor G (Gx) is turned on immediately after the charge discharging transistor GD is turned off in a cycle period.

[0071] As shown in Fig. 6, in the normal driving of the conventional technology, the number of times that the transfer transistor G (Gx) is turned on immediately after the charge discharging transistor GD is turned off in a cycle period is "1" for the transfer transistor G1 and "0" for the transfer transistors G2 to G4. That is, as shown in Fig. 5, in the conventional technology, the charge discharging transistor GD is driven in the OFF state → the transfer transistor G1 is driven in the ON state → the transfer transistor G2 is driven in the ON state → the transfer transistor G3 is driven in the ON state → the transfer transistor G4 is driven in the ON state order.

[0072] In contrast, in the normal driving mode of this embodiment, as shown in FIG. 4, the distance image processing unit 4 drives the pixel driving circuit 322 in the following order: charge discharge transistor GD is turned off → transfer transistor G1 is turned on → charge discharge transistor GD is turned off → transfer transistor G2 is turned on → charge discharge transistor GD is turned off → transfer transistor G3 is turned on → charge discharge transistor GD is turned off → transfer transistor G4 is turned on.

[0073] Therefore, as shown in FIG. 6, in the normal driving of this embodiment, the number of times that the transfer transistor G (Gx) is turned on immediately after the charge discharging transistor GD is turned off in a cycle period is "1" for all of the transfer transistors G1 to G4.

[0074] Thus, in this embodiment, the distance image processing unit 4 drives the pixel driving circuit 322 so that the number of times the transfer transistor G is turned on is the same for each charge storage unit CS (for example, "1" time) immediately after the charge discharging transistor GD is turned off.

[0075] 7 is a second diagram illustrating a comparison between this embodiment and the prior art in normal driving. Here, a comparison of the amount of charge accumulated in each charge accumulation unit CS (CS1 to CS4) in a cycle period will be described. In the example shown in FIG. 7, the expected value of the amount of charge is 100 LSB for Q2, 300 LSB for Q3, and 400 LSB for the total reflected light RL.

[0076] 7(a) shows the amount of charge accumulated in each charge accumulation unit CS (CS1 to CS4) in normal driving of the conventional technology, and FIG. 7(b) shows the amount of charge accumulated in each charge accumulation unit CS (CS1 to CS4) in normal driving of this embodiment.

[0077] In the example shown in FIG. 7(a), the charge amount Q1 accumulated in the charge accumulation unit CS1 due to the cycle period is 150 LSB of the normal external light component plus 60 LSB due to the effect immediately after the charge discharging transistor GD is turned off.

[0078] The amount of charge Q2 accumulated in the charge accumulation unit CS2 is 250 LSB, the amount of charge Q3 accumulated in the charge accumulation unit CS3 is 450 LSB, and the amount of charge Q4 accumulated in the charge accumulation unit CS4 is 150 LSB of the normal external light component. In this case, the total charge amount IR is calculated as 340 LBS using the following formula (2).

[0079] IR=|Q1-Q3|+|Q2-Q4| =|210-450|+|250-150|=340[LSB] …(2)

[0080] Thus, in the normal driving of the conventional technology, the expected charge amount is 340 LSB compared to 400 LSB, resulting in a decrease in distance accuracy.

[0081] In contrast, in the example of this embodiment shown in FIG. 7(b), the charge amount Q1 accumulated in the charge accumulation unit CS1 due to the cycle period is 150 LSB of the normal external light component plus 60 LSB as an effect immediately after the charge discharging transistor GD is turned off.

[0082] Moreover, the charge amount Q2 stored in the charge storage unit CS2 is 250 LSB plus 60 LSB as an effect immediately after the charge discharging transistor GD is turned off. Further, the charge amount Q3 stored in the charge storage unit CS3 is 450 LSB plus 60 LSB as an effect immediately after the charge discharging transistor GD is turned off.

[0083] Further, the charge amount Q4 stored in the charge storage section CS4 includes 150 LSB of the normal external light component, plus 60 LSB as an effect immediately after the charge discharging transistor GD is turned off. In this case, the total charge amount IR is calculated to be 400 LBS using the following equation (3).

[0084] IR=|Q1-Q3|+|Q2-Q4| =|210-510|+|310-210|=400[LSB] …(3)

[0085] In this way, in the normal driving of this embodiment, it is possible to calculate the expected charge amount of 400 LSB.

[0086] Next, the distance accuracy of the distance image pickup device 1 according to this embodiment will be described with reference to FIGS. FIG. 8 is a first diagram showing the distance accuracy of the distance image capturing device 1 according to this embodiment.

[0087] The graph shown in FIG. 8 shows the relationship between the actual distance and the distance measured by the range image pickup device 1. 8, the horizontal axis represents the actual distance, and the vertical axis represents the measured distance, and the straight line LL1 represents the ideal value.

[0088] In FIG. 8, black circles (●) indicate measurement values ​​obtained by the range image pickup device 1 of this embodiment, and white circles (◯) indicate measurement values ​​obtained by the prior art. As shown in FIG. 8, the distance image pickup device 1 of this embodiment can improve distance accuracy compared to the prior art.

[0089] FIG. 9 is a second diagram showing the distance accuracy of the distance image pickup device 1 according to this embodiment. The graph shown in FIG. 9 shows the actual distance and the absolute error of the distance measured by the distance image pickup device 1.

[0090] 9, the horizontal axis represents the actual distance, and the vertical axis represents the absolute error of the measured distance (|measured distance - actual distance|). Furthermore, black circles (●) represent the absolute error of the range image pickup device 1 of this embodiment, and white circles (○) represent the absolute error of the prior art.

[0091] Also, in Figure 9, line LL2 indicates the line of absolute error value where the relative error (|measured distance - actual distance| / actual distance x 100) is 13%, and line LL3 indicates the line of absolute error value where the relative error is 2%.

[0092] As shown in Figure 9, the relative error in the conventional technology is approximately 13% or less (see line LL2 and the white circle (○)), whereas the relative error in the distance image capturing device 1 of this embodiment is approximately 2% or less (see line LL3 and the black circle (●)).

[0093] As described above, the distance image capturing device 1 according to this embodiment includes a light source unit 2, a light receiving unit 3, and a distance image processing unit 4. The light source unit 2 irradiates a measurement space containing an object OB with a light pulse PO. The light receiving unit 3 includes a pixel circuit 321 and a pixel drive circuit 322. The pixel circuit 321 includes a photoelectric conversion element PD that generates charge in response to incident light and multiple charge accumulation units CS that accumulate the charge. The pixel drive circuit 322 distributes and accumulates the charge in each of the charge accumulation units CS in the pixel circuit 321 at a predetermined timing synchronized with the irradiation of the light pulse PO. The distance image processing unit 4 determines the measurement distance to the object OB based on the amount of charge accumulated in each charge accumulation unit CS. The pixel circuit 321 includes a transfer transistor G and a charge discharge transistor GD. The transfer transistor G corresponds to each of the multiple charge accumulation units CS and transfers charge from the photoelectric conversion element PD to the respective charge accumulation unit CS. The charge discharging transistor GD discharges charge from the photoelectric conversion element PD. The distance image processing unit 4 drives the pixel driving circuit 322 so that there is a constant interval between the off timing of the charge discharging transistor GD and the on timing of the transfer transistor G, and so that the on timing of the transfer transistor G differs for each charge accumulation unit CS, thereby distributing and accumulating charge in each charge accumulation unit CS.

[0094] As a result, the distance image pickup device 1 according to this embodiment can reduce the difference in characteristics among the plurality of charge accumulation sections CS by setting a fixed interval (period TD) between the off timing of the charge discharge transistor GD and the on timing of the transfer transistor G (each of the transfer transistors G1 to G4). Therefore, the distance image pickup device 1 according to this embodiment can improve the accuracy of distance measurement, as shown in the above-mentioned FIGS. 8 and 9.

[0095] In this embodiment, immediately after turning off the charge discharging transistor GD, the distance image processor 4 drives the pixel drive circuit 322 so that the number of times the transfer transistor G is turned on is the same for each charge accumulation unit CS (for example, once per cycle period) (see FIG. 6). The distance image processor 4 also causes the light source unit 2 to emit a light pulse PO in response to the accumulation of charge in each charge accumulation unit CS.

[0096] As a result, the distance image pickup device 1 according to this embodiment can make the influence immediately after the charge discharging transistor GD is turned off the same in each of the charge accumulation sections CS (charge accumulation sections CS1 to CS4), as shown in FIG. 7(b). Therefore, the distance image pickup device 1 according to this embodiment can cancel the influence immediately after the charge discharging transistor GD is turned off, for example, as shown in equation (3), and can improve the accuracy of distance measurement. The distance image pickup device 1 according to this embodiment can improve the accuracy of distance measurement particularly when there is strong external light (disturbance light) that is likely to have an influence immediately after the charge discharging transistor GD is turned off.

[0097] In this embodiment, the plurality of charge accumulation units CS are four charge accumulation units CS, and the pixel circuit 321 includes four transfer transistors G. The four transfer transistors G are transfer transistor G1 (first transfer transistor), transfer transistor G2 (second transfer transistor), transfer transistor G3 (third transfer transistor), and transfer transistor G4 (fourth transfer transistor). The distance image processor 4 causes the pixel drive circuit 322 to drive the first drive pattern, second drive pattern, third drive pattern, and fourth drive pattern in sequence in a cycle period indicating the basic period of the accumulation period within one frame. In the first drive pattern, the distance image processor 4 turns off the charge discharging transistor GD in response to the on-timing of the transfer transistor G1 after irradiation with a light pulse PO1 (first light pulse), and turns on the transfer transistor G1 after a fixed interval (period TD) from the off-timing of the charge discharging transistor GD. In the second drive pattern, the distance image processor 4 turns on the charge discharging transistor GD in response to the light pulse PO2 (second light pulse). In the third driving pattern, after irradiation of a light pulse PO3 (third light pulse), the distance image processor 4 turns off the charge discharging transistor GD in response to the on timing of the transfer transistor G2, and turns on the transfer transistor G2 a fixed interval (period TD) after the off timing of the charge discharging transistor GD. In the fourth driving pattern, after irradiation of a light pulse PO4 (fourth light pulse), the distance image processor 4 turns off the charge discharging transistor GD in response to the on timing of the transfer transistor G4, and turns on the transfer transistor G4 a fixed interval (period TD) after the off timing of the charge discharging transistor GD.

[0098] As a result, the distance image capturing device 1 according to this embodiment can reduce the difference in characteristics of the four charge accumulation units CS (charge accumulation unit CS1 to charge accumulation unit CS4) by driving the first to fourth drive patterns in sequence, thereby improving the accuracy of distance measurement.

[0099] <Modification> Next, a modified example of the range image pickup device 1 according to this embodiment will be described with reference to the drawings. In this modified example of this embodiment, a change example that corresponds to HDR (High Dynamic Range) drive instead of normal drive will be described.

[0100] FIG. 10 is a timing chart showing an example of the operation of the range image capturing device 1 according to this embodiment in HDR driving mode. 10, waveform W21 indicates a state L1 of irradiation of light pulse PO, and waveform W22 indicates a state L2 of reception of reflected light RL. Waveforms W23 to W27 indicate the states of transfer transistors G1 to G4 and charge discharging transistor GD. In waveforms W23 to W27, the H state indicates the ON state, and the L state indicates the OFF state.

[0101] 10, in HDR driving of the pixel circuit 321, first, at time T31, the timing control unit 41 drives the pixel drive circuit 322 to turn off the charge discharging transistor GD (see waveform W27) and turn on the transfer transistor G4 (see waveform W26). Although not shown, it is assumed that a gap period (period TD) similar to that in FIG. 5 is provided between the on / off timing of the charge discharging transistor GD and each transfer transistor G.

[0102] Next, at time T32, the timing control unit 41 causes the light source unit 2 to output a light pulse PO (see waveform W21) and drives the pixel drive circuit 322 to turn on the transfer transistor G1 (see waveform W23). Note that the light pulse PO output at time T32 is referred to as a light pulse PO1 (first light pulse).

[0103] Next, at time T33, the timing control unit 41 drives the pixel drive circuit 322 to turn on the transfer transistor G2 (see waveform W24), and at time T34, the timing control unit 41 drives the pixel drive circuit 322 to turn on the transfer transistor G3 (see waveform W25).Next, at time T35, the timing control unit 41 drives the pixel drive circuit 322 to turn on the transfer transistor G4 (see waveform W26).

[0104] Next, at time T36, the timing control section 41 causes the light source section 2 to output a light pulse PO (see waveform W21). The light pulse PO output at time T36 is referred to as a light pulse PO2 (second light pulse).

[0105] Next, at time T37, the timing control section 41 drives the pixel drive circuit 322 to turn off the charge discharging transistor GD (see waveform W27) and turn on the transfer transistor G2 (see waveform W24).

[0106] Next, at time T38, the timing control unit 41 drives the pixel driving circuit 322 to turn on the transfer transistor G3 (see waveform W25), and at time T39, the timing control unit 41 drives the pixel driving circuit 322 to turn on the transfer transistor G4 (see waveform W26).

[0107] Next, at time T40, the timing control section 41 causes the light source section 2 to output a light pulse PO (see waveform W21). The light pulse PO output at time T40 is referred to as a light pulse PO3 (third light pulse).

[0108] Next, at time T41, the timing control section 41 drives the pixel drive circuit 322 to turn off the charge discharging transistor GD (see waveform W27) and turn on the transfer transistor G3 (see waveform W25). Next, at time T42, the timing control section 41 drives the pixel drive circuit 322 to turn on the transfer transistor G4 (see waveform W26).

[0109] Next, at time T43, the timing control unit 41 drives the pixel driving circuit 322 to turn off the charge discharging transistor GD (see waveform W27) and turn on the transfer transistor G1, and then turns on the transfer transistor G1 twice with different timings (see waveform W23).

[0110] Next, at time T44, the timing control section 41 turns on the transfer transistor G2 twice at different timings (see waveform W24). Next, at time T45, the timing control section 41 turns on the transfer transistor G3 (see waveform W25).

[0111] 10, the fourth driving pattern turns on the transistors in the following order: transfer transistor G1 → transfer transistor G1 → transfer transistor G1 → transfer transistor G2 → transfer transistor G2 → transfer transistor G3. However, the fourth driving pattern may be driven in any other order as long as it turns on the transfer transistor G1 first, then turns on the transfer transistor G1 a total of three times, the transfer transistor G2 a total of two times, and the transfer transistor G2 once. The fourth driving pattern may be driven in a driving order such as transfer transistor G1 → transfer transistor G2 → transfer transistor G1 → transfer transistor G2 → transfer transistor G1 → transfer transistor G3.

[0112] In this way, the distance image processing unit 4 drives the pixel driving circuit 322 so that there is a fixed interval (period TD) between the off timing of the charge discharge transistor GD and the on timing of the transfer transistor G, and so that the on timing of the transfer transistor G is different for each charge storage unit CS, thereby distributing and storing charge in each charge storage unit CS.

[0113] As shown in FIG. 10, the cycle period in HDR driving of this embodiment has a first driving pattern, a second driving pattern, a third driving pattern, and a fourth driving pattern.

[0114] The period from time T31 to time T36 is the first drive pattern, in which charges are accumulated from the photoelectric conversion element PD in the charge accumulation units CS1 to CS4. Note that in the first drive pattern, the charge accumulation unit CS4 accumulates two charges in total: one for the external light component and one for the reflected light RL.

[0115] The period from time T36 to time T40 is the second driving pattern, in which charges are accumulated from the photoelectric conversion element PD in the charge accumulation units CS2 to CS4, and no charges are accumulated in the charge accumulation unit CS1.

[0116] The period from time T40 to time T43 corresponds to the third driving pattern, in which charges are accumulated from the photoelectric conversion element PD in the charge accumulation units CS3 and CS4, and charges are not accumulated in the charge accumulation units CS1 and CS2.

[0117] The period from time T43 to time T46 corresponds to the fourth driving pattern. In the fourth driving pattern, the timing control unit 41 drives the pixel driving circuit 322 so that the number of accumulations corresponding to each of the charge accumulation units CS (charge accumulation units CS1 to CS4) is equal in each cycle period.

[0118] In this way, the closer the charge accumulation unit CS is to the object OB during the period in which it receives the light pulse PO reflected by the object OB, the fewer times the transfer transistor G is turned on. The distance image processor 4 causes the pixel drive circuit 322 to accumulate charge from external light without reflected light to fill the reduced number of times, and drives the pixel drive circuit 322 so that the number of accumulations corresponding to each charge accumulation unit CS is equal in each cycle.

[0119] Furthermore, distance image processor 4 causes pixel drive circuit 322 to sequentially drive the first to fourth drive patterns in a cycle. In the first drive pattern, distance image processor 4 turns off charge discharging transistor GD, and after a certain interval from the timing at which charge discharging transistor GD is turned off, turns on transfer transistor G4 and irradiates light pulse PO1, and after the irradiation of light pulse PO1, turns on transfer transistor G1, transfer transistor G2, transfer transistor G3, and transfer transistor G4 in that order, with their on-timings shifted.

[0120] In addition, in the second drive pattern, after irradiation of the light pulse PO2, the distance image processing unit 4 turns off the charge discharge transistor GD in accordance with the on timing of the transfer transistor G2, turns on the transfer transistor G2 a certain interval after the off timing of the charge discharge transistor GD, and turns on the transfer transistor G3 and the transfer transistor G4 in that order, with their on timings shifted.

[0121] In addition, in the third driving pattern, after irradiation of the light pulse PO3, the distance image processing unit 4 turns off the charge discharge transistor GD in accordance with the on timing of the transfer transistor G3, turns on the transfer transistor G3 a certain interval after the off timing of the charge discharge transistor GD, and turns on the transfer transistor G4 with a shifted on timing.

[0122] Furthermore, in the fourth drive pattern, the distance image processing unit 4 turns off the charge discharge transistor GD without irradiating the light pulse PO, and after a certain interval from the timing at which the charge discharge transistor GD turns off, turns on the transfer transistor G1, and then turns on the transfer transistor G1 twice with different timings, turns on the transfer transistor G2 twice with different timings, and turns on the transfer transistor G3 once with different timings.

[0123] Next, for comparison, the operation of HDR driving in the prior art will be described with reference to FIG. FIG. 11 is a timing chart showing an example of the operation of the conventional distance imaging device in HDR driving mode.

[0124] 11, waveform W31 indicates a state L1 of irradiation of light pulse PO, and waveform W32 indicates a state L2 of reception of reflected light RL. Waveforms W33 to W37 indicate the states of transfer transistors G1 to G4 and charge discharging transistor GD. In waveforms W33 to W37, the H state indicates the ON state, and the L state indicates the OFF state.

[0125] As shown in FIG. 11, the cycle period in HDR driving of the conventional technology has a first drive pattern, a second drive pattern, a third drive pattern, and a fourth drive pattern. The period from time T51 to time T52 corresponds to the first driving pattern of the prior art, and after irradiation with the light pulse PO1, the charge discharging transistor GD is turned off and the transfer transistors G1 to G4 are turned on in sequence.

[0126] Furthermore, the period from time T52 to time T53 corresponds to the second driving pattern of the prior art, in which after irradiation with the light pulse PO2, the charge discharging transistor GD is turned off and the transfer transistors G2 to G4 are turned on in sequence.

[0127] Furthermore, the period from time T53 to time T54 corresponds to the third driving pattern of the prior art, in which after irradiation with the light pulse PO3, the charge discharging transistor GD is turned off, and the transfer transistor G3 and the transfer transistor G4 are turned on in sequence.

[0128] Furthermore, the period from time T54 to time T55 corresponds to the fourth driving pattern of the prior art, in which the light pulse PO is not irradiated, and the charge discharging transistor GD is turned off, and then the transfer transistor G1 is turned on twice and the transfer transistor G2 is turned on once in sequence.

[0129] Next, a comparison between this embodiment and the prior art in HDR driving will be described with reference to FIGS.

[0130] 12 is a first diagram illustrating a comparison between this embodiment and the prior art in HDR driving. Here, a comparison is made of the number of times the transfer transistor G (Gx) is turned on immediately after the charge discharging transistor GD is turned off in a cycle period.

[0131] As shown in Figure 12, in conventional HDR driving, the number of times that the transfer transistor G (Gx) is turned on immediately after the charge discharging transistor GD is turned off in a cycle period is "2" times for the transfer transistor G1, "1" time for the transfer transistor G2 and the transfer transistor G3, and "0" times for the transfer transistor G4.

[0132] In contrast, in the HDR drive of this embodiment, the number of times that the transfer transistor G (Gx) is turned on immediately after the charge discharging transistor GD is turned off in a cycle period is "1" for all of the transfer transistors G1 to G4.

[0133] Thus, in this embodiment, the distance image processing unit 4 drives the pixel driving circuit 322 so that the number of times the transfer transistor G is turned on is the same for each charge storage unit CS (for example, "1" time) immediately after the charge discharging transistor GD is turned off.

[0134] 13 is a second diagram illustrating a comparison between this embodiment and the prior art in HDR driving. Here, a comparison of the amount of charge accumulated in each charge accumulation unit CS (CS1 to CS4) in a cycle period will be described. In the example shown in FIG. 13, the expected value of the amount of charge is 100 LSB for Q2, 300 LSB for Q3, and 400 LSB for the entire reflected light RL.

[0135] In HDR driving, the electric charge amounts Q1 to Q4 are corrected by the following equation (4).

[0136] Qmin=min(Q1,Q2,Q3,Q4) Q1=(Q1-Qmin) / 1 Q2=(Q2-Qmin) / 2 Q3=(Q3-Qmin) / 3 Q4=(Q4-Qmin) / 3 …(4)

[0137] Fig. 13(a) shows the amount of charge accumulated in each charge accumulation unit CS (CS1 to CS4) in HDR driving of the conventional technology, and Fig. 13(b) shows the amount of charge accumulated in each charge accumulation unit CS (CS1 to CS4) in HDR driving of this embodiment.

[0138] In the example shown in FIG. 13(a), the charge amount Q1 stored in the charge storage unit CS1 due to the cycle period is three times 150 LSB of the normal external light component, plus two times 60 LSB as an effect immediately after the charge discharging transistor GD is turned off.

[0139] The charge amount Q2 stored in the charge storage section CS2 is two times 100 LSB, which is three times 150 LSB of the normal external light component plus one time 60 LSB as an effect immediately after the charge discharging transistor GD is turned off.

[0140] The charge amount Q3 stored in the charge storage section CS3 is three times 300 LSB, which is three times 150 LSB of the normal external light component plus one time 60 LSB as an effect immediately after the charge discharging transistor GD is turned off.

[0141] The amount of charge Q4 stored in the charge storage unit CS4 is three times the normal 150 LSB of the external light component. In this case, the total charge amount IR is calculated as 330 LBS by the following equation (5) after correction by the above equation (4).

[0142] IR=|Q1-Q3|+|Q2-Q4| =|120-320|+|130-0|=330[LSB] …(5)

[0143] Thus, with HDR driving using the conventional technology, the expected charge amount is 400 LSB, but it is 320 LSB, resulting in a decrease in distance accuracy.

[0144] In contrast to this, in the example of this embodiment shown in FIG. 13(b), the charge amount Q1 accumulated in the charge accumulation unit CS1 due to the cycle period is four times the normal 150 LSB of the external light component, plus 60 LSB as an effect immediately after the charge discharging transistor GD is turned off.

[0145] The charge amount Q2 stored in the charge storage section CS2 includes two times 100 LSB and four times 150 LSB of the normal external light component, plus 60 LSB as an effect immediately after the charge discharging transistor GD is turned off.

[0146] The charge amount Q3 stored in the charge storage section CS3 includes three times 300 LSB and four times 150 LSB of the normal external light component, plus 60 LSB as an effect immediately after the charge discharging transistor GD is turned off.

[0147] The charge amount Q4 stored in the charge storage section CS4 is four times the normal 150 LSB of the external light component, plus 60 LSB as an effect immediately after the charge discharging transistor GD is turned off.

[0148] In this case, the total charge amount IR is calculated to be 400 LBS using the above-mentioned formula (3). In this way, in the normal driving of this embodiment, it is possible to calculate the expected charge amount of 400 LSB.

[0149] As described above, in this modification, distance image processor 4 reduces the number of times that transfer transistor G is turned on as charge accumulation unit CS corresponds to a shorter distance during the period in which light pulse PO is received as light reflected by subject OB, and causes pixel drive circuit 322 to accumulate charge of external light without reflected light for the reduced number of times so that the number of accumulations corresponding to each charge accumulation unit CS is equal in the cycle period. Here, cycle period refers to the basic period of the accumulation period within one frame.

[0150] As a result, the distance image capturing device 1 according to this embodiment can reduce the difference in characteristics between the charge accumulation units CS (charge accumulation units CS1 to CS4) in accordance with the dynamic ranges of short and long distances, thereby improving the accuracy of distance measurement.

[0151] In this modification, the distance image processor 4 causes the pixel drive circuit 322 to sequentially drive the first to fourth drive patterns in a cycle. In the first drive pattern, the distance image processor 4 turns off the charge discharging transistor GD, turns on the transfer transistor G4 a fixed interval after the charge discharging transistor GD is turned off, and irradiates the pixel with a light pulse PO1. After the light pulse PO1 is irradiated, the distance image processor 4 turns on the transfer transistors G1, G2, G3, and G4 in this order, with their on-timings shifted. In the second drive pattern, after the light pulse PO2 is irradiated, the distance image processor 4 turns off the charge discharging transistor GD in accordance with the on-timing of the transfer transistor G2, turns on the transfer transistor G2 a fixed interval after the charge discharging transistor GD is turned off, and irradiates the transfer transistors G3 and G4 in this order, with their on-timings shifted. In the third driving pattern, after irradiating the light pulse PO3, the distance image processor 4 turns off the charge discharging transistor GD in accordance with the on-timing of the transfer transistor G3, turns on the transfer transistor G3 a fixed interval after the off-timing of the charge discharging transistor GD, and turns on the transfer transistor G4 with a shifted on-timing. In the fourth driving pattern, the distance image processor 4 turns off the charge discharging transistor GD without irradiating the light pulse PO, turns on the transfer transistor G1 a fixed interval after the off-timing of the charge discharging transistor GD, then turns on the transfer transistor G1 twice with shifted timings, turns on the transfer transistor G2 twice more with shifted timings, and turns on the transfer transistor G3 once more with a shifted timing.

[0152] As a result, the distance image capturing device 1 according to this embodiment can reduce the difference in characteristics of the four charge accumulation units CS (charge accumulation unit CS1 to charge accumulation unit CS4) in HDR driving by driving the first to fourth drive patterns in sequence, thereby improving the accuracy of distance measurement.

[0153] The present invention is not limited to the above-described embodiment, and can be modified within the scope of the present invention. For example, in each of the above embodiments, an example has been described in which the pixel circuit 321 includes four charge storage units CS (CS1, CS2, CS3, CS4), but this is not limited thereto, and the pixel circuit 321 may include N charge storage units CS, where N is three or more. The multiple charge storage units CS may be, for example, four or more charge storage units CS, and the pixel circuit 321 may include four or more transfer transistors G.

[0154] In addition, in the above embodiment, an example was described in which the distance image processing unit 4 is provided inside the distance image capturing device 1, but this is not limited to this, and the distance image processing unit 4 may also be configured to be provided outside the distance image capturing device 1.

[0155] In the above embodiment, the photoelectric conversion element PD is an embedded photodiode that photoelectrically converts incident light to generate electric charges and accumulates the generated electric charges. However, the present invention is not limited to this, and the photoelectric conversion element PD may have any structure. For example, the photoelectric conversion element PD may be a PN photodiode having a structure in which a P-type semiconductor and an N-type semiconductor are joined together, or a PIN photodiode having a structure in which an I-type semiconductor is sandwiched between a P-type semiconductor and an N-type semiconductor. Furthermore, the photoelectric conversion element PD is not limited to a photodiode, and may be, for example, a photogate-type photoelectric conversion element.

[0156] In the above embodiment, the period TD, which is the period from the timing when the charge discharging transistor GD is turned off to the timing when the transfer transistor G is turned on, may be any value equal to or greater than "0".

[0157] Each component of the above-described range image pickup device 1 has an internal computer system. A program for realizing the function of each component of the above-described range image pickup device 1 may be recorded on a computer-readable recording medium, and the program recorded on the recording medium may be read into a computer system and executed to perform processing in each component of the above-described range image pickup device 1. Here, "reading a program recorded on a recording medium into a computer system and executing it" includes installing the program into a computer system. The "computer system" here includes hardware such as an OS and peripheral devices.

[0158] Furthermore, a "computer system" may include multiple computer devices connected via a network, including communication lines such as the Internet, WAN, LAN, and dedicated lines. Furthermore, a "computer-readable recording medium" refers to portable media such as flexible disks, optical magnetic disks, ROMs, and CD-ROMs, as well as storage devices such as hard disks built into a computer system. Thus, the recording medium storing the program may be a non-transitory recording medium such as a CD-ROM.

[0159] The recording medium also includes an internal or external recording medium accessible from a distribution server for distributing the program. The program may be divided into multiple parts, downloaded at different times, and then combined by the components of the range image capture device 1, or each divided program may be distributed by a different distribution server. Furthermore, the term "computer-readable recording medium" also includes a medium that stores a program for a certain period of time, such as volatile memory (RAM) within a computer system that serves as a server or client when a program is transmitted over a network. The program may also be a medium for implementing part of the above-described functions. Furthermore, the program may be a so-called differential file (differential program) that can realize the above-described functions in combination with a program already stored in the computer system.

[0160] Furthermore, some or all of the above-described functions may be realized as an integrated circuit such as an LSI (Large Scale Integration). Each of the above-described functions may be individually implemented as a processor, or some or all of the functions may be integrated into a processor. Furthermore, the integrated circuit implementation method is not limited to LSI, and may be implemented using a dedicated circuit or a general-purpose processor. Furthermore, if an integrated circuit implementation technology that can replace LSI emerges due to advances in semiconductor technology, an integrated circuit based on that technology may be used. [Explanation of symbols]

[0161] 1...Distance image capturing device 2...Light source section 3...Light receiving section 4...Distance image processing section 21...Light source device 22...Diffuser 31...Lens 32...Distance image sensor 41...Timing control section 42...Distance calculation section 43...Measurement control section 320…Light receiving area 321...Pixel circuit 322...Pixel driving circuit 323...Vertical scanning circuit 324...Horizontal scanning circuit 325...Pixel signal processing circuit 326...Control circuit C1, C2, C3, C4... Capacitors CS, CS1, CS2, CS3, CS4...Charge storage section FD, FD1, FD2, FD3, FD4...Floating diffusion G, G1, G2, G3, G4...Transfer transistors GD: Charge drain transistor OB…Subject PD...photoelectric conversion element PO...light pulse RL…Reflected light RT1, RT2, RT3, RT4...Reset transistors SF, SF1, SF2, SF3, SF4...Source follower transistors SL, SL1, SL2, SL3, SL4...Select transistors

Claims

1. a light source unit that irradiates a measurement space in which a subject is present with a light pulse; a light receiving unit including a pixel circuit having a photoelectric conversion element that generates charges according to incident light and a plurality of charge accumulation units that accumulate the charges, and a pixel drive circuit that distributes and accumulates the charges in each of the charge accumulation units in the pixel circuit at a predetermined timing synchronized with the irradiation of the light pulse; a distance image processing unit that determines a measured distance to the subject based on the amount of charge accumulated in each of the charge accumulation units; Equipped with The pixel circuit transfer transistors corresponding to the plurality of charge accumulation units, each of which transfers the charge from the photoelectric conversion element to each of the charge accumulation units; a charge drain transistor that drains the charge from the photoelectric conversion element; Equipped with The distance image processing unit drives the pixel drive circuit so that there is a constant interval between the off timing of the charge discharge transistor and the on timing of the transfer transistor, and so that the on timing of the transfer transistor differs for each of the charge accumulation units, thereby distributing and storing the charge in each of the charge accumulation units. Range imaging device.

2. The distance image processing unit drives the pixel driving circuit so that the number of times the transfer transistor is turned on is the same for each of the charge accumulation units immediately after the charge discharge transistor is turned off.

2. The distance imaging device according to claim 1.

3. The distance image processing unit causes the light source unit to irradiate the light pulse in response to the accumulation of the charge in each of the charge accumulation units.

3. The distance imaging device according to claim 1 or 2.

4. the plurality of charge accumulation units are four of the charge accumulation units, the pixel circuit includes four transfer transistors, namely, a first transfer transistor, a second transfer transistor, a third transfer transistor, and a fourth transfer transistor; The distance image processing unit, in a cycle period indicating a fundamental period in an accumulation period within one frame, a first driving pattern that turns off the charge discharging transistor in response to an on-timing of the first transfer transistor after irradiation with the first light pulse, and turns on the first transfer transistor after the certain interval from the off-timing of the charge discharging transistor; a second driving pattern that turns the charge discharging transistor off in response to an on-timing of the second transfer transistor after irradiation with the second light pulse, and turns the second transfer transistor on after the certain interval from the off-timing of the charge discharging transistor; a third driving pattern that turns the charge discharging transistor off in response to an on-timing of the third transfer transistor after irradiation with the third light pulse, and turns the third transfer transistor on after the certain interval has elapsed since the off-timing of the charge discharging transistor; a fourth driving pattern in which, after irradiation with the fourth light pulse, the charge discharging transistor is turned off in response to the on-timing of the fourth transfer transistor, and the fourth transfer transistor is turned on after the certain interval from the off-timing of the charge discharging transistor; 4. The distance imaging device according to claim 3, wherein the pixel driving circuit drives the pixels in sequence.

5. The distance image processing unit reduces the number of times the transfer transistor is turned on as the charge accumulation unit corresponds to a shorter distance during a period in which the light pulse is received as reflected light reflected by the subject, and causes the pixel drive circuit to accumulate charge of external light without the reflected light for the reduced number of times, so that the number of accumulations corresponding to each of the charge accumulation units becomes equal in a cycle period indicating a basic period in an accumulation period within one frame.

3. The distance imaging device according to claim 2.

6. the plurality of charge accumulation units are four of the charge accumulation units, the pixel circuit includes four transfer transistors, namely, a first transfer transistor, a second transfer transistor, a third transfer transistor, and a fourth transfer transistor; The distance image processing unit performs the following in the cycle period: a first driving pattern in which the charge discharging transistor is turned off, the fourth transfer transistor is turned on after the certain interval from the off timing of the charge discharging transistor, and the first light pulse is irradiated, and after the irradiation of the first light pulse, the first transfer transistor, the second transfer transistor, the third transfer transistor, and the fourth transfer transistor are turned on with staggered on timings in this order; a second driving pattern in which, after irradiation with the second light pulse, the charge discharging transistor is turned off in response to the on-timing of the second transfer transistor, the second transfer transistor is turned on after the certain interval from the off-timing of the charge discharging transistor, and the third transfer transistor and the fourth transfer transistor are turned on in this order with their on-timings shifted; a third driving pattern in which, after irradiation with the third light pulse, the charge discharging transistor is turned off in response to the on-timing of the third transfer transistor, the third transfer transistor is turned on after the certain interval from the off-timing of the charge discharging transistor, and the fourth transfer transistor is turned on with a shifted on-timing; a fourth driving pattern in which the charge discharging transistor is turned off without irradiating the light pulse, the first transfer transistor is turned on after the certain interval from the timing at which the charge discharging transistor is turned off, the first transfer transistor is turned on twice with different timings, the second transfer transistor is turned on twice with different timings, and the third transfer transistor is turned on once with different timings; 6. The distance imaging device according to claim 5, wherein the pixel driving circuit drives the pixels in sequence.

Images